Light source driver circuit, optical measuring device having a light source driver circuit, apparatus for checking valuable documents, and method for operating a light source load by means of a light source driver circuit

Abstract

The invention relates to a light source driver circuit, comprising: a switch controller having a voltage input terminal for applying an input voltage, a voltage output terminal for outputting an output voltage to be adjusted for operating a light source load, and a regulating input terminal for applying a regulating voltage for adjusting the voltage magnitude of the output voltage; a current source having a switch element and a voltage controllable component arranged in series with the light source load, wherein a pulse signal is applied to a control terminal of the switch element to connect the control terminal of the voltage controllable component to the voltage source in a first switching state of the switch element and disconnect the control terminal of the voltage controllable component from the voltage source in a second switching state of the switch element; and a regulating unit, whose first input terminal is connected to the first terminal of the voltage controllable component and whose second input terminal is connected to the second terminal of the voltage controllable component to measure a voltage drop on the voltage controllable component during the first switching state, and whose output terminal is connected to the regulating input terminal of the switch controller to provide a regulating voltage, wherein the regulating voltage is adjusted according to the voltage drop on the voltage controllable component. In addition, the invention relates to an optical measuring device having a light source driver circuit, a device for checking valuable documents using the light source driver circuit, and a method for operating a light source load using the light source driver circuit.

Description

Technical Field

[0001] The invention relates to a light source driver circuit, an optical measuring device having a light source driver circuit, a device for checking a valuable document using a light source driver circuit, and a method for operating a light source load using a light source driver circuit. Background Art

[0002] Light source driver circuits or optical measuring devices are, for example, system components for feature recognition of machine-readable features in banknote processing machines. Machine-readable features are used, for example, for valuable documents such as banknotes, passports or identity cards (hereinafter referred to as measurement objects) in order to be able to prove the authenticity of the measurement objects. In this case, the measurement objects are illuminated with the aid of rapidly switching and highly bright light flashes and the characteristic response of the measurement objects to these light flashes is analyzed. With the aid of such a method, forgeries of the measurement objects can be reliably detected.

[0003] The device according to the invention for checking value documents should check a large number of measuring objects in the shortest possible time. In this case, in banknote processing machines, transport and processing speeds of several meters per second, in particular between 1 and 12 m / s, are desired. These processing speeds for checking the measuring objects place high demands on the generation of the light flashes, which are then subjected to a plurality of light flashes.

[0004] The illumination of the measurement object to be inspected is achieved by means of at least one light source, in particular an LED. When operating the light source load, a light source driver circuit with a switching controller is usually used. Here, the general goal is to operate the light source load with low current ripple and reduce the voltage required to control the light source load in order to reduce unnecessary power losses.

[0005] KR 2009 0060878 A and KR 10 102 88 60 B1 respectively propose LED driver circuits for lighting applications. In a circuit variant, a pulse width modulation (PWM) operation of the LED driver circuit is proposed to achieve effective brightness adjustment with a constant LED current and a constant LED wavelength. These circuits are not suitable for generating alternating pulse current values ​​for LED loads.

[0006] Circuits without PWM operation mode cannot provide the steady-state LED load pulse current value of the circuit immediately after being turned on (i.e., applying the operation voltage). Circuits with PWM operation mode cannot provide the steady-state LED load pulse current value of the circuit immediately after applying the PWM control pulse.

[0007] US 2009 / 0187925 A1 describes an LED driver circuit that provides a constant current to all series-connected LEDs and ensures uniform illumination and optimal operating efficiency at low cost over a wide range of input / output voltages and temperatures. Short-term variations in the LED branch voltage, such as those provided in pulsed current operation, will result in variations in the LED current. Therefore, the circuit is not suitable for pulsed operation.

[0008] In addition, data sheets of LED driver circuits, such as the LM3464 circuit from Texas Instruments or the ZXLD1362 circuit from Zetex Semiconductor, are known. Although these solutions disclose minimizing the voltage drop of the drain-source voltage of the MOSFET in order to minimize the power consumption, none of the solutions shown are suitable for pulsed operation of LED loads, in particular when using a changed pulse sequence, such as alternating pulse heights, in order to acquire properties of a measurement object by means of light emission through an LED driver circuit of an optical measuring device or an apparatus for checking value documents. Summary of the invention

[0009] The technical problem to be solved by the present invention is to achieve efficient operation of light source loads, in particular LED loads, wherein the voltage variation of the switch controller is regulated. In this case, different light source loads should be able to be operated. The number and type of light sources to be operated should not be restricted. In addition, the nominally different flow voltages of the light sources and the fluctuations of the flow voltage during operation should be compensated in an energy-saving manner. For example, aging of the LED load or heating of the LED load or the use of rapidly or even periodically changing pulse sequences (as required, for example, in devices for checking valuable documents) should not have an effect on the power consumption of the light source driver. The periodically changing pulse sequence is here a sequence of current pulses, which can have in particular different pulse lengths, pulse pauses and current intensities, which are repeated at fixed time intervals.

[0010] This object is achieved by the features described in the independent claim. Advantageous embodiments of the invention are described in the dependent claims.

[0011] According to the present invention, a light source driver circuit is provided. The light source driver circuit has a switch controller having a voltage input terminal for applying an input voltage, a voltage output terminal for outputting an output voltage to be adjusted for operating a light source load, and a regulating input terminal for applying a regulating voltage for adjusting the voltage level of the output voltage.

[0012] At least one light source to be operated is provided as a light source load. Preferably, an LED, also called a light emitting diode (English: light emitting diode), or an interconnection of a plurality of LEDs connected in series or in parallel is provided as a light source load. A parallel circuit of a plurality of series circuits (LED branches) consisting of LEDs is also conceivable. In another preferred embodiment, the light source load includes at least one other semiconductor light source based on the same operating principle, such as a laser diode, a resonant cavity light emitting diode (RC-LED for short) or an organic light emitting diode (OLED for short). Other loads, such as incandescent lamps, motors or thermoelectric elements, can also be advantageously operated using the current driver according to the present invention.

[0013] A switching controller is a voltage controller that serves as the basis for providing an effective voltage supply to a load (here a light source load) by means of periodically switched electronic switching elements and at least one energy storage device (for example a capacitive energy storage device and / or an inductive energy storage device). The switching controller can have a rectifier unit.

[0014] The switch controller adjusts the input voltage applied (fed) to the voltage input terminal of the switch controller, such as the input AC voltage or the input DC voltage, into an output DC voltage that can be output (measured, available) at the voltage output terminal of the switch controller, also referred to as the output voltage. The output DC voltage preferably has a voltage level that is higher, lower, or inversely proportional to the input voltage.

[0015] As a switching controller, for example, a DC voltage controller (also called a DC-DC controller or a DC regulator) is used, which regulates the input DC voltage fed to the voltage input of the switching controller to an output DC voltage that can be output at the voltage output of the switching controller and has a higher (buck-boost converter, Buck-Boost Converter), lower (buck converter, Buck Converter) or reverse voltage level.

[0016] Preferably, a buck converter is used as the switch controller. A buck converter (also called a step-down converter, English: Buck Converter) adjusts the input voltage fed at the voltage input terminal of the switch controller to an output voltage provided at the voltage output terminal of the switch controller, which has a lower voltage level than the fed input voltage.

[0017] The switch controller comprises a regulating input for applying (feeding) a regulating voltage. The regulating voltage sets the voltage level of the output voltage to be outputted by the switch controller. Therefore, the voltage level of the output voltage depends on the regulating voltage (= preference). The voltage level of the regulating voltage can be mapped to the output voltage monotonically, preferably monotonically increasing / decreasingly, and in special cases bijectively. Therefore, a change in the regulating voltage of the switch controller is clearly converted into a change in the output voltage. This dependence is preferably linear or logarithmic. A drop in the output voltage is only possible when the energy storage of the switch controller is discharged, i.e., a current flows out of the switch controller.

[0018] Preferably, the output voltage that can be tapped at the voltage output of the switch controller varies linearly with the control voltage provided at the control input. The slope of this linear function is referred to as the proportionality factor. Particularly preferably, the proportionality factor is negative, so that the output voltage decreases when the control voltage increases. This allows a particularly simple control of the switch controller.

[0019] The light source driver circuit according to the present invention also has a current source, which has a switching element and a voltage-controllable component arranged in series with the light source load, wherein a pulse signal is applied to a control terminal of the switching element, wherein in a pulse phase of the pulse signal, the switching element switches to a first switching state, in which the control terminal of the voltage-controllable component is connected to the voltage source, and wherein, in a pulse pause of the pulse signal, the switching element switches to a second switching state, in which the control terminal of the voltage-controllable component is not connected to the voltage source.

[0020] In a preferred embodiment, in the second switching state of the switching element, the control terminal of the voltage-controllable component is connected to a reference potential, so that any charges present flow out of the voltage-controllable component.

[0021] For this component of the light source driver circuit, the use of the term "current source" instead of the equally applicable term "current sink" is arbitrary. It should be noted that the choice of the corresponding term is defined solely by the direction of the current at the output of the current source / current sink. Thus, in the case of a current source an output current is provided, while in the case of the reverse definition of the current direction the same component would be referred to as a current sink. Since the current source used here operates in series with the light source load, the choice of the term "current source" or "current sink" depends solely on the actual position of the light source load relative to the current source / current sink. Since the actual position is not restricted according to the invention, the term current source can be used synonymously with the term current sink. In the present application, the term current source is used for this component of the light source driver circuit.

[0022] A current source is an active electrode in a light source driver circuit, which supplies current to the light source load at its connection point. Here, the current intensity of the transmitted current depends only slightly or ideally not at all on the voltage at its connection point, so that the current is almost independent of the connected light source load (connected electrical consumer). For example, in the case of a voltage change of 1 V, the current changes only by 0.1%. The current source is connected in series with the light source load, so that the current provided by the current source is the current flowing through the light source load.

[0023] The current source comprises a switching element, such as an electronic switch or an electromechanical switch or a mechanical switch. Preferably, an electronic switch, such as a semiconductor switch, is used. The switching element switches from a first switching state (e.g., closed) to a second switching state (e.g., open) by means of a pulse signal at its control terminal. In the pulse phase of the pulse signal, the switching element switches to the first switching state. In the pulse pause of the pulse signal, the switching element switches to the second switching state. In the first switching state of the switching element of the current source, the current source is switched to activated, and in the second switching state of the pulse signal, the current source is switched to inactivated. The pulse signal, preferably a binary switching signal, is applied to the control terminal of the switching element (e.g., the gate terminal of the switching transistor). The pulse signal is, for example, an output signal of a microcontroller connected to the control terminal of the switching element.

[0024] The switching element of the switch controller is different from the switching element of the current source, and the switching element of the switch controller is operated independently of the switching element of the current source by means of a pulse signal generated by itself in the switch controller.

[0025] In addition to the switching element, the current source also includes a voltage-controllable component, preferably a field effect transistor, FET for short. The switching element of the current source is connected to the control terminal of the voltage-controllable component by means of a first terminal. In a first switching state of the switching element, the control terminal of the voltage-controllable component is connected to the voltage source, in which first switching state (closed), the current source provides a current. Therefore, in the first switching state, the voltage-controllable component provides an output current of the current source. Here, the voltage level of the voltage source sets the current level of the output current of the current source. In a second switching state of the switching element, the control terminal of the voltage-controllable component is not connected to the voltage source, in which second switching state (open), the current source does not provide an output current.

[0026] The voltage controllable component is connected to the connector of the light source load by means of the first connector. The output current of the current source thus flows through the light source load. This means that the output current set by the voltage level at the control connector of the voltage controllable component and provided by the voltage controllable component during the pulse phase of the pulse signal also flows through the light source load in the first switching state of the switching element, whereby the light source load emits light. This also means that in the second switching state of the switching element, the current source does not provide an output current, and therefore no current flows through the light source load, whereby the light source load does not emit light in the second switching state.

[0027] In addition, the light source driver circuit has a regulating unit, whose first input is connected to the first connection of the voltage-controllable component of the current source, and whose second input is connected to the second connection of the voltage-controllable component of the current source, so as to measure the voltage drop across the voltage-controllable component in the first switching state (closed). The output of the regulating unit is connected to the regulating input of the switch controller, so as to apply (provide) the regulating voltage to the switch controller.

[0028] The regulating voltage is regulated by the regulating unit as a function of the voltage drop in the first switching state (closed) at the voltage-controllable component. This regulation of the regulating voltage by the regulating unit is performed such that the voltage drop across the voltage-controllable component is minimized.

[0029] By means of the regulating unit according to the present invention, the output voltage outputted by the switch controller is regulated to a value which is equal to the sum of the voltage drop across the light source load and the desired minimum voltage drop across the voltage-controllable load.

[0030] If the current source has a current measuring resistor (shunt) connected in series with the light source load and the voltage controllable component, the output voltage output by the switch controller is adjusted to the following value: this value is equal to the sum of the voltage drop on the light source load plus the minimum voltage drop sought on the voltage controllable component plus the voltage drop on the current measuring resistor.

[0031] By adjusting the voltage drop across the voltage controllable component to a minimum, the energy consumed in the voltage controllable component is reduced to a minimum and thereby the energy consumption of the light source driver circuit is reduced.

[0032] Furthermore, variations in the output voltage of the switching controller are compensated. For example, for a given light source driver circuit, this compensation enables the number of light sources and their interconnection (series or parallel) to be varied. Nominally different light source flow voltages and fluctuations in the light source flow voltages during operation of the light source driver circuit due to aging or temperature fluctuations (heating / cooling) inside or outside the circuit are also compensated in an energy-saving manner.

[0033] The pulse signal on the control joint of the switching element of the current source is also called a pulse train. The pulse signal is a periodic repetitive change of the voltage level at the control joint of the switching element of the current source, wherein in the pulse phase (first switching state), the current flows through the voltage-controllable component, and in the pulse interval (second switching state), no current flows through the voltage-controllable component. Through this cyclic alternation of the switching state, the control joint of the voltage-controllable component is connected to or not connected to the voltage source corresponding to the pulse signal, thereby periodically turning on and off the current source. When the pulse signal is applied, the current source provides a pulse current for the light source load. The pulse signal causes a cyclic pulse current, and as a result, the light source load is periodically (cyclically) turned on or off. The current flowing through the light source load in the pulse interval is preferably 0A.

[0034] The pulse signal is composed of a sequence of at least two single pulses. Each single pulse includes a single pulse phase (e.g., a voltage of a "high" level) and a single pulse pause (e.g., a voltage of a "low" level). The single pulse phase and the single pulse pause result in a single pulse cycle duration. Preferably, the single pulse cycle durations of at least two single pulses are equal in length, that is, the single pulses have a fixed frequency. The frequency is preferably between 100 Hz and 50 kHz (corresponding to a single pulse cycle duration between 20 μs and 10 ms). When a light source driver circuit is used in a device for inspecting banknotes, these frequencies enable position-resolved inspection of moving banknotes at typical processing speeds between 1 and 12 m / s.

[0035] The pulse signal can be a so-called burst signal. The burst signal consists of at least one burst consisting of a finite number of single pulses. The sum of the period durations of all single pulses of the burst results in a burst phase. Preferably, the burst consists of 5 to 50 single pulses. When the light source driver circuit is used in a device for checking banknotes, this enables a position-resolved check of a moving banknote, wherein the light source is only switched on when the banknote is present in the measuring area.

[0036] The burst signal may be a periodically recurring signal. The time period between two successive bursts is a burst pause. The burst phase and the burst pause result in a burst cycle duration. The burst cycle duration is preferably between 10 milliseconds and 1 second. When the light source driver circuit is used in a device for checking banknotes, one burst is therefore generated per banknote at a typical processing speed between 1 and 12 m / s.

[0037] In this case, the pulse signal for switching the switching element can be a pulse width modulated signal, so that the pulse signal has a variable duty cycle. For a periodic sequence of pulses, the duty cycle describes the ratio of the pulse phase to the pulse period duration.

[0038] In a preferred embodiment, the regulating unit has a storage capacitor for increasing and decreasing the voltage magnitude of the regulating voltage. In order to increase the regulating voltage, charge is introduced into the storage capacitor. In order to reduce the regulating voltage, charge is extracted from the storage capacitor. Therefore, the storage capacitor is a dynamic charge storage. The average voltage generated on the storage capacitor is applied to the regulating input of the switch controller as the regulating voltage. This makes it possible to compensate for fluctuations in the voltage drop on the light source load and changes in the output voltage of the switch controller. Here, by the voltage drop on the voltage controllable component in the first switching state (closed), the voltage controllable component operates at the optimal operating point with minimum voltage drop in the first switching state (closed).

[0039] Here, the storage capacitor is part of a linear, time-invariant system in the regulating unit. Preferably, the storage capacitor is part of two resistor-capacitor components, RC components for short, to form two integral, time-continuous, linear, time-invariant transmission components in the regulating unit, which are easy to implement.

[0040] The time constant of the RC component for charging the storage capacitor must take such a value that the highest rate of change of the storage capacitor voltage is less, preferably twice less, than the quotient formed by the lowest rate of change of the switch controller output voltage and the switch controller proportionality factor. The rate of change of the storage capacitor voltage can also be smaller, but the adjustment phase will be unnecessarily prolonged. The rate of change of the switch controller output voltage is the quotient formed by the minimum light source load current in the pulse phase and the capacitance of the energy storage at the output of the switch controller. The dimensioning conditions for the time constant ensure that no undershoot of the switch controller output voltage occurs at the end of the adjustment phase, which can lead to a too low voltage drop on the voltage-controllable component, which can result in an undesirable reduction of the light source current.

[0041] In the preferred design, the following values ​​are determined:

[0042] The minimum change rate of the switching controller output voltage dUSRA1 / dt=165V / s

[0043] Switch controller proportional coefficient KS = 5.5

[0044] The rate of change of the storage capacitor voltage dUSK1 / dt = dUSRA1 / dt / Ks / 2 = 15V / s

[0045] The charging voltage of the RC component is UL = 5V

[0046] Time constant of RC component τ(charging) = UL / dUSK1 / dt = 0.3s

[0047] In the pulse interval, it is necessary that the charge flows out of the storage capacitor, so that the regulating unit can adjust the switch controller output voltage to its maximum value again after the light source pulse is turned off, which corresponds to the initial state. The time constant of the RC component used to discharge the storage capacitor should adopt such a value that the switch controller output voltage increases only by a small value in the pulse interval. Preferably, the switch controller output voltage increases by less than 0.1V in the pulse interval. The increase in the switch controller output voltage leads to an increase in the voltage drop on the voltage-controllable component, which results in a higher power loss in the voltage-controllable component. It is not necessary to select a time constant for the discharge, which ensures that the switch controller output voltage increases equally under all operating conditions (for the duration of the pulse phase and the pulse interval), especially under very long pulse intervals. As the pulse interval becomes larger and the pulse phase remains unchanged, the duty cycle (=pulse phase / pulse period duration) decreases. In the case where the light source current remains unchanged and the duty cycle is reduced in the pulse phase, the average power loss in the voltage-controllable component is reduced. Therefore, it is only necessary to determine the value for the longest pulse interval at which the power loss due to the increased voltage drop across the voltage-controllable member does not become greater than the power loss for the same light source current value in the pulse phase and the shortest pulse interval (=maximum duty cycle). From this value for the longest pulse interval and the value to be defined for increasing the switching controller output voltage during the pulse interval, the time constant for the discharge is determined. As in the charging process, the switching controller proportionality factor must also be included in the calculation during the discharge process.

[0048] In the preferred design, the following values ​​are determined:

[0049] The increase of the switching controller output voltage during the pulse interval is dUSRA2 = 0.1V

[0050] With a minimum voltage drop of 1.5V across the voltage controllable component (no increase), the power loss in the voltage controllable component increases by the same factor as the voltage increase: (0.1V+1.5V) / 1.5V=1.07

[0051] Switch controller proportional coefficient KS = 5.5

[0052] The reduction in storage capacitor voltage dUSK2 = dUSRA2 / KS = 0.0182 V

[0053] The longest pulse interval TPause = 0.125s

[0054] The rate of change of the storage capacitor voltage dUSK2 / dt = dUSK2 / TPause = 0.146V / s

[0055] Maximum storage capacitor voltage USKmax = 2.6V

[0056] Time constant τ(discharge) of RC component = USKmax / dUSK2 / dt = 18s

[0057] While in other designs the time constant of charging should be increased (to reduce the rate of change of the storage capacitor voltage), the time constant of discharging must be increased by the same factor to avoid further increasing the power losses in the voltage controllable component.

[0058] In a preferred design, the regulating unit has a comparison unit, which provides a comparison voltage at its output terminal according to the voltage drop on the voltage-controllable component. Preferably, the comparison voltage is a binary voltage, which makes the implementation of the subsequent regulating voltage setting unit particularly simple. The comparison unit can be constructed as a comparator. The output of the comparison unit is connected to the input of the regulating voltage setting unit of the regulating unit. This modular construction method makes the design of the regulating unit more flexible. The regulating voltage setting unit adjusts the regulating voltage according to the comparison voltage. The output of the regulating voltage setting unit is connected to the regulating input of the switch controller to provide the regulating voltage.

[0059] In a preferred embodiment, when the (binary) comparison voltage has a first state, the adjustment voltage is increased by the adjustment voltage setting unit, and when the comparison voltage has a second state different from the first state, the adjustment voltage is decreased by the adjustment voltage setting unit. In this case, the magnitude of the comparison voltage should be taken into account in the desired operation of the light source driver circuit, i.e. when the adjustment phase (=start-up phase) of the switch controller and the adjustment unit ends.

[0060] In a preferred design, the comparison unit comprises a comparator and a DC voltage source, wherein a first input of the comparator is connected to a first connector of the voltage controllable component. The first connector of the DC voltage source is connected to a second input of the comparator, and the second connector of the DC voltage source is connected to a second connector of the voltage controllable component as a second input of the adjustment unit. The DC voltage source provides a comparison voltage level to the second input of the comparator, which is compared with the voltage level of the first input of the comparator. Based on the comparison result, a comparison voltage is provided at the output of the comparator. In this way, a light source driver circuit is created, wherein the comparison unit compares the voltage drop of the voltage controllable component with a reference DC voltage to generate a comparison voltage. This structure is particularly space-saving and has low power consumption.

[0061] In a preferred design, a diode is inserted in the connection between the first terminal of the voltage controllable component and the first input terminal of the comparator, the anode of the diode is connected to the first input terminal of the comparator, and the cathode of the diode is connected to the first terminal of the voltage controllable component as the first input terminal of the adjustment unit. The diode has a blocking function to prevent current from flowing through the light source load during pulse pauses.

[0062] In a preferred embodiment, a first connection of the storage capacitor of the comparison unit is connected to the anode of the diode, and a second connection of the storage capacitor of the comparison unit is connected to the second input of the control unit. The storage capacitor of the comparison unit is different from the storage capacitor of the control voltage setting unit described above. In the case of an alternating pulse sequence, the storage capacitor has the effect of optimizing the control voltage for the highest current intensity occurring during the pulse phase. In this case, the lowest voltage drop occurs at the voltage-controllable component at the highest current intensity.

[0063] In a preferred design, a voltage source with a high internal resistance is arranged at the connection between the anode of the diode and the first input of the comparator. The voltage level of the voltage source is greater than the voltage level of the DC voltage source at the second input of the comparator. As a result, in the startup state of the circuit (see below), the comparison voltage is reliably set to a "high" level. In the startup state, this affects the minimum regulation voltage of the switch controller and therefore the maximum output voltage, so that at the first switch-on, the expected current flows through the light source load. Even if the light source load changes during the operation of the light source driver, the voltage source can increase the output voltage of the switch controller.

[0064] Therefore, when the current source is not activated (pulse pause of the pulse signal or the second switching state), the storage capacitor of the comparison unit is charged to the voltage level of the voltage source at the first input of the comparator. Since the voltage level at the first input is higher, the first state of the comparison voltage is provided at the output of the comparator. If the current source is then turned on by means of the pulse phase of the pulse signal, and if the voltage on the voltage-controllable component drops, which is less than the difference between the voltage magnitude at the first input of the comparator and the voltage magnitude of the flow voltage of the diode in the conduction direction, the storage capacitor is discharged by the voltage-controllable component via the diode to the following voltage value: This voltage value corresponds to the sum of the voltage magnitude of the voltage on the voltage-controllable component and the flow voltage of the diode in the conduction direction. If the voltage level at the first input of the comparator reached by the discharge process is greater than the voltage level at the second input of the comparator, the first state of the comparison voltage is first kept provided at the output. This leads to a change in the regulation voltage, thereby leading to a change in the output voltage of the switch controller. This change leads to a change in the voltage drop on the voltage-controllable component and therefore to a switching of the voltage level of the comparison voltage at the output of the comparator.

[0065] In another preferred embodiment, the regulating unit is installed executable in a microcontroller as a computer program product. Here, the voltage drop at the voltage-controllable component is digitized by means of an AD converter and provided to the microcontroller. The microcontroller generates a corresponding regulating voltage according to the process described here. The regulating voltage is converted into an analog voltage signal by means of a DA converter and then fed to the switch controller at the regulating input. This enables flexible reprogramming of the regulating parameters.

[0066] In another aspect of the present invention, an optical measuring device is provided. The optical measuring device has at least one light source for illuminating a measuring object. The light source, in particular an LED, is operated by means of a light source driver circuit of the above type. Here, a pulse signal is used for the current source so that a periodic pulse current is generated by the current source, which then also flows through the light source load and periodically switches the light source load on and off. This periodic switching on and off of the light source load is used to illuminate the above-mentioned measuring object. Here, the optical measuring device is particularly used to identify machine-readable security features on valuable documents. Here, the optical measuring device can be part of a device for checking valuable documents.

[0067] In another aspect of the invention, a device for checking valuable documents with machine-readable security features is provided, which has a measuring area for accommodating valuable documents as measuring objects and an optical measuring device for illuminating security features according to the aforementioned type. The device according to the invention checks a large number of measuring objects in the shortest possible time. Here, a transmission speed through the measuring area of ​​several meters per second is particularly set. By this, it means that only a very short time period (for example 0.02 seconds) can be used to check the measuring object that is subsequently subjected to multiple flashes. This leads to a short on and off time for the light source load achieved by means of a pulse signal. In a preferred embodiment, the device for checking valuable documents also has a detector, wherein the detector collects the response of the security feature to the illumination and converts it into an electronic output signal. Compared with visual acquisition, this enables a more accurate inspection of the security feature and thus improves the anti-counterfeiting protection. In a preferred embodiment, the device for checking valuable documents also has a processor, wherein the processor evaluates the properties of the security feature (for example authenticity, document category) based on the output signal of the detector and outputs the evaluation result. This enables the device for checking to be integrated in an industrial environment, for example in a banknote processing machine, and to analyze the security feature more accurately and thus improve the anti-counterfeiting protection. It is further preferred that the microprocessor (N1, 24) of the light source driver according to the invention is at the same time the processor of the device for checking value documents.

[0068] In another aspect of the present invention, a method for operating a light source load by means of a light source driver circuit according to the aforementioned type is provided. Here, a pulse signal is first connected to the control terminal of the switching element to connect the control terminal of the voltage-controllable component to the voltage source. In addition, the voltage drop on the voltage-controllable component is measured by means of a regulating unit. In addition, a regulating voltage is provided by means of the regulating unit, wherein the regulating voltage is adjusted according to the voltage drop on the voltage-controllable component. In addition, the regulating voltage is received in the switch controller and an output voltage to be adjusted for operating the light source load is output when the voltage level of the output voltage is adjusted using the regulating voltage, wherein the output voltage preferably decreases linearly with the regulating voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0069] The invention or other embodiments and advantages of the invention are described in more detail below with reference to the accompanying drawings, wherein the drawings only describe embodiments of the invention. The same components are provided with the same reference numerals in the drawings. The drawings are not to be considered as drawn to scale, and the individual elements in the drawings may be shown with exaggerated dimensions or exaggerated simplification.

[0070] Figure 1 A first embodiment of the principle of a light source driver circuit according to the present invention is shown;

[0071] Figure 2 A second embodiment of the principle of a light source driver circuit according to the present invention is shown;

[0072] Figure 3 The method for Figure 1 A first embodiment of a circuit loop of a light source driver circuit according to the principle;

[0073] Figure 4 The method for Figure 2 A second embodiment of the circuit loop of the light source driver circuit of the principle;

[0074] Figure 5 A first embodiment of a flow chart of a method for operating a light source load according to the present invention is shown;

[0075] Figure 6 Shown according to Figure 3 a first voltage / current-time trend of a signal selected in a light source driver circuit;

[0076] Figure 7 Shows Figure 6 A selected partial region of the voltage / current time curve shown in;

[0077] Figure 8 Shows Figure 7A selected partial region of the voltage / current time curve shown in;

[0078] Fig. 9 Shown according to Figure 3 a second voltage-time trend of a signal in a light source driver circuit;

[0079] Fig.10 Shows Fig. 9 The first partial region of the voltage-time curve shown in ;

[0080] Fig.11 Shows Fig. 9 The second partial region of the voltage-time curve shown in ;

[0081] Fig.12 Shows Fig. 9 Part of the voltage-time curve shown in ;

[0082] Fig.13 Shows Fig.12 The partial region of the voltage-time curve shown in ; and

[0083] Fig.14 Shows Fig.12 The partial region of the voltage-time curve is shown in FIG. DETAILED DESCRIPTION

[0084] Figure 1 The first embodiment of the principle of the light source driver circuit according to the present invention is shown. The switch controller N8 has a voltage input terminal N8_1 for applying an input voltage U6. The switch controller N8 has a voltage output terminal N8_2 for outputting an output voltage U5 to be adjusted. The switch controller N8 has an adjustment input N8_3 for applying an adjustment voltage U4 to adjust the voltage magnitude of the output voltage U5.

[0085] The voltage output N8_2 is connected to the connector of the light source load 3. The light source load 3 is shown as an LED V3 in this example. According to the present invention, as the light source load 3, the operation of multiple LEDs connected in series or in parallel is also provided. It is also conceivable to connect multiple series circuits (LED branches) composed of LEDs in parallel, or to use other semiconductor light sources based on the same working principle. The anode of the light source load 3 is connected to the voltage output terminal N8_2.

[0086] The current source 1 is arranged in the light source driver circuit. The term "current source" is used throughout the description of the figures regardless of the current direction at the output terminals (connectors V1_1 and V1_2 of the voltage controllable member V1) of the current source 1. The term "current source" can be interchanged with the term "current sink".

[0087] The current source 1 has a switching element N3 and a voltage controllable component V1, which is shown here as a field effect transistor FET by way of example. The first terminal V1_1 of the FET is connected to the cathode of the light source load 3 as the current output terminal of the current source 1. The second terminal V1_2 of the FET is connected to the first terminal of the current measuring resistor R1 (shunt). The second terminal of the current measuring resistor R1 is connected to the reference potential.

[0088] The control terminal V1_3 of the FET is connected to the first terminal N3_1 of the switching element N3. The second terminal N3_2 of the switching element N3 is connected to the first terminal of the voltage source N2. The second terminal of the voltage source N2 is connected to the reference potential. The pulse signal U7 is applied to the control terminal N3_3 of the switching element N3. The pulse signal U7, as a switching signal for the switching element N3, has a pulse phase and a pulse pause, with the help of which the switching element N3 is switched to the first switching state (closed), and with the help of which the switching element N3 is switched to the second switching state (open). The switching element N3 is, for example, an electronic switching element, such as a transistor. Figure 1 , the switch element N3 is shown in a second switching state (open), wherein the control terminal V1_3 of the FET is not connected to the first terminal of the voltage source N2. In the first switching state (not shown) of the switch element N3, the control terminal V1_3 of the FET is connected to the first terminal of the voltage source.

[0089] The first terminal V1_1 of the FET V1 is connected to the first input terminal 2_1 of the regulating unit 2. The second terminal V1_2 of the FET V1 is connected to the second input terminal 2_2 of the regulating unit 2. Thus, the voltage drop across the FET V1 can be measured by the regulating unit 2. The output terminal 2_3 of the regulating unit 2 is connected to the regulating input terminal N8_3 of the switch controller N8 to provide a regulating voltage U4, wherein the regulating voltage U4 is regulated according to the voltage drop at the FET V1.

[0090] The switch controller N8 is illustratively a standard DC-DC buck converter, the function of which need not be described in more detail. For example, the switch controller N8 can be implemented by a combination of a TPS541540 integrated circuit from Texas Instruments and a resistor at the feedback input. The use of other integrated circuits is not excluded here.

[0091] Figure 1 The comparison unit 21 and the adjustment voltage setting unit 22 of the adjustment unit 2 are shown in FIG. Figure 3 is described in more detail in .

[0092] Next, Figure 1 The principle of the light source driver circuit shown in FIG.

[0093] The switchable current source 1 can be switched on and off by means of a pulse signal U7. The output current level of the current source 1 is set by a voltage source N2. Here, any change in the output current level must be synchronized with the pulse signal, so that a periodically changing current pulse sequence is generated through the light source load.

[0094] The light source load V3 is supplied with its output voltage U5 from the efficient switch controller N8. Its input voltage U6 is, for example, a supply voltage of 24 V DC. Other voltage magnitudes or voltage types of the input voltage U6 are not excluded here, so an AC voltage can also be applied to the switch controller N8 and then rectified.

[0095] In order to operate the current source 1 with high efficiency, the voltage drop between the first connection V1_1 and the second connection V1_2 of the voltage controllable component V1 should be as low as possible during the first switching state (closed). If the voltage controllable component V1 is a FET, the voltage drop between the connections V1_1 and V1_2 is called the drain-source voltage UDS, and the voltage drop between the input terminals V1_3 and V1_2 is called the gate-source voltage UGS. The FET has a threshold voltage Vth of, for example, 1.8 V, characterized in that for UGS>Vth, the available drain current, in particular the current flowing through the light source load, flows. The drain-source voltage preferably satisfies the condition UDS>UGS-Vth, whereby the drain current, in particular the current flowing through the light source load, is as independent of UDS as possible.

[0096] The switch controller N8 is connected to the output terminal 2_3 of the regulating unit 2 by means of the regulating input terminal N8_3. Preferably, the output voltage U5 of the switch controller N8 decreases linearly with the increase of the regulating voltage U4. There may also be another dependency between U4 and U5. The values ​​of U4 and U5 may be a bijective mapping. Thus, the voltage level of the output voltage U5 can be set by means of the voltage level of the regulating voltage U4.

[0097] The magnitude of the regulating voltage U4 is regulated by the regulating unit 2 .

[0098] In the first switching state of the switching element N3 (current source 1 switched on), the voltage drop across the FET V1 is tapped and the regulating voltage U4 is correspondingly regulated.

[0099] In the second switching state of the switching element N3 (current source 1 switched off), the regulated voltage U4 is not regulated.

[0100] During the operation of the light source driver circuit (second and third operation stages, see below), the pulse signal U7 is applied to the switching element N3 to periodically (cyclically) switch the current source 1 on and off. As a result, the light source load 3 is switched on or off corresponding to the pulse signal U7. As a result, for example, flashes are generated, which are emitted to the measurement object, such as banknotes, so as to obtain and analyze characteristic responses to the flashes. For example, this enables the authenticity check of machine-readable features on the measurement object by a banknote inspection system.

[0101] In the second operating phase of the light source driver circuit, the "adjustment phase" (see Figures 6 to 14 The increased power losses of the FETs during operation must be considered in component selection and in the thermal design of the circuit board.

[0102] Figure 2 A second embodiment of the principle of a light source driver circuit according to the present invention is shown. Figure 2 The principle of the light source driver circuit corresponds to Figure 1 The principle of the light source driver circuit can be fully referenced Figure 1 The following is only a description of Figure 1 and Figure 2 The difference between Figure 1 Differently, in Figure 2 In the embodiment, the regulating unit 2 is not constructed with a comparison unit 21 and a regulating voltage setting unit 22, but instead has an AD converter 23, a microcontroller 24 and a DA converter 25. This difference will be explained in detail in FIG. Figure 4 In the microcontroller 24, the voltage difference at the FET is acquired based on the voltage values ​​converted from analog to digital at the first terminal V1_1 and the second terminal V1_2, and the digital regulating voltage corresponding to the digital voltage drop is set. In the subsequent DA converter, the set digital regulating voltage is converted into an analog regulating voltage, which is then fed to the switch controller N8 as the regulating voltage U4.

[0103] Figure 3 It shows that according to the present invention Figure 1 A first embodiment of a circuit loop of a light source driver circuit of the principle. Figure 1 The description also applies to Figure 3 , so you can refer to it in full Figure 1 Below, therefore, only Figure 1 and Figure 3 The difference between.

[0104] and Figure 1 Differently, Figure 3 The current source 1 is a precision current source, which additionally includes a digital-to-analog converter N2 and an operational amplifier N4.

[0105] like Figure 1 As in FIG. 1 , the current source 1 further comprises a switch element N3 and a voltage controllable component V1, which is shown as a field effect transistor FET. The first terminal V1_1 of the FET is connected to the cathode of the light source load 3 as the current output terminal of the current source 1. The light source load is shown as a series circuit of LEDs V3 to Vn. Figure 3 The load current flows from the cathode of the light source load to the terminal V1_1 of the current source 1, so from a purely circuit theory point of view, the term "current sink" is more appropriate.

[0106] exist Figure 3 In an implementation variation not shown in the figure, a first terminal V1_1 of the voltage-controllable component V1 is connected to the output terminal N8_2 of the switch controller N8, and a second terminal V1_2 of the voltage-controllable component V1 is connected to the anode of the light source load 3, for example, to the anode of the first LED Vn among all the LEDs V3 to Vn connected in series, and a cathode of the LED V3 is connected to a first terminal of the current measuring resistor R1.

[0107] exist Figure 3 In another embodiment variant not shown, the first terminal V1_1 of the voltage controllable component V1 is connected to the output terminal N8_2 of the switch controller N8, the second terminal V1_2 of the voltage controllable component V1 is connected to the first terminal of the current measuring resistor R1, and the second terminal of the current measuring resistor R1 is connected to the anode of the light source load 3, for example, the anode of the first LED Vn in all the LEDs V3 to Vn connected in series. The cathode of the LED V3 is connected to the reference potential.

[0108] The design of these implementation variations is easy to implement for those skilled in the art of light source drivers. Since in these implementation variations, the output current of the current source 1 flows from the terminal V1_2 to the light source load, the term "current source" is more appropriate from the perspective of pure circuit theory.

[0109] Since the topology of the “current source” 1 is the same in all implementation variants and only the current direction of the output current toward the light source load 3 changes, the term “current source” is generally used here.

[0110] A second terminal V1_2 of the FET V1 is connected to a first terminal of a current measuring resistor R1 (shunt). A second terminal of the current measuring resistor R1 is connected to a reference potential.

[0111] The control terminal V1_3 of the FET V1 is connected to the output of the operational amplifier N4. The positive input of the operational amplifier N4 is connected to the first terminal N3_1 of the switch element N3. The negative input of the operational amplifier N4 is connected to the first terminal of the current measuring resistor R1.

[0112] The second terminal N3_2 of the switch element N3 is connected to the output of the voltage source N2 (here configured as a DA converter). The input of the DA converter is connected to the microcontroller N1. Alternatively (not shown), the second terminal N3_2 of the switch element N3 is connected to the analog output of the microcontroller N1, wherein the DA converter is an integrated component of the microcontroller N1.

[0113] The pulse signal U7 is applied again to the control terminal N3_3 of the switch element N3. The pulse signal U7 is generated by the microcontroller N1. The pulse signal U7 has a pulse phase, by which the switch element N3 is switched to the first switching state (closed), and a pulse pause, by which the switch element N3 is switched to the second switching state (open). The switch element N3 is, for example, an electronic switch element, such as a transistor. Figure 3 , the switch element N3 is shown in a second switching state (disconnected), wherein the first input terminal (positive input terminal) of the operational amplifier N4 is not connected to the output terminal of the DA converter N2. In a preferred embodiment (not shown), in the second switching state of the switch element N3, the first input terminal of the operational amplifier N4 is connected to the reference potential, so that any charge that may be present flows out of the operational amplifier. As a result, the reference potential is also present at the output terminal of the operational amplifier, thereby ensuring that no current flows through the light source load.

[0114] In a first switching state (closed) of the switch element N3 (not shown), a first input (positive input) of the operational amplifier N4 is connected to the output of the DA converter N2.

[0115] like Figure 1 Like in Figure 3 In FIG. 1 , the first terminal V1_1 of the FET is also connected to the first input terminal 2_1 of the regulating unit 2. The second terminal V1_2 of the FET is connected to the second input terminal 2_2 of the regulating unit 2. As a result, the voltage drop U across the FET DS can be measured by the regulating unit 2. The output terminal 2_3 of the regulating unit 2 is connected to the regulating input terminal N8_3 of the switch controller N8 to provide a regulating voltage U4, wherein the regulating voltage U4 is regulated according to the voltage drop at the FET V1.

[0116] Figure 3 The regulating unit 2 includes a comparison unit 21, a regulation voltage setting unit 22 and a NAND gate D1. Instead of the NAND gate D1, another digital gate can also be used to temporally couple the pulse signal U7 and the output signal of the comparison unit 21 to each other.

[0117] The comparison unit 21 comprises a comparator N5, whose first input (positive input) is connected to the anode of a diode V2. The cathode of the diode V2 is connected to the first terminal V1_1 of the FET and represents the first input 2_1 of the adjustment unit 2. The anode of the diode V2 is also connected to the first terminal of the resistor R2. The second terminal of the resistor R2 is connected to the voltage source U2. The anode of the diode V2 is also connected to the first terminal of the storage capacitor C1.

[0118] A second terminal of the storage capacitor C1 is connected to the second terminal V1_2 of the FET and represents the second input 2_2 of the regulating unit 2. A second terminal of the storage capacitor C1 is connected to a second terminal of the DC voltage source U1. A first terminal of the DC voltage source U1 is connected to a second input (negative input) of the comparator N5.

[0119] The output terminal of the comparator N5 is connected to the first input terminal D1_1 of the NAND gate D1. The second input terminal D1_2 of the NAND gate D1 is connected to the output terminal of the microcontroller N1, which provides the pulse signal U7. The output terminal D1_3 of the NAND gate D1 is connected to the control input terminal of the switch element N6 of the adjustment voltage setting unit 22. The switch element N6 is, for example, a FET analog switch.

[0120] A first input connection of the switching element N6 is connected to a first connection of a resistor R3 of the regulating voltage setting unit 22. A second connection of the resistor R3 is connected to a voltage source U3 of the regulating voltage setting unit 22. A second input connection of the switching element N6 is connected to a first connection of a resistor R4 of the regulating voltage setting unit 22. A second connection of the resistor R4 is connected to a reference potential.

[0121] The output terminal of the switching element N6 is connected to a first terminal of a storage capacitor C2 of the regulation voltage setting unit 22. A second terminal of the storage capacitor C2 is connected to a reference potential.

[0122] By applying a corresponding signal, the control terminal of the switch element N6 has the result that either the first terminal of the resistor R3 is connected to the first terminal of the storage capacitor C2 or the first terminal of the resistor R4 is connected to the first terminal of the storage capacitor C2 .

[0123] The resistor R3 and the storage capacitor C2 form a first RC component. The resistor R4 and the storage capacitor C2 form a second RC component. The time constants of the two RC components are selected such that the functionality of the light source driver circuit is ensured in all three operating conditions (start-up condition, adjustment phase, adjustment state phase). In dimensioning recommendations (which do not limit the subject matter of the present invention), the resistor R4 is much larger than the resistor R3, in particular R4 is at least 10 times larger than R3, for example the ratio R4 / R3 is equal to 60. This ensures that the regulation voltage U4 changes only slightly during the duration of the pulse period.

[0124] The first connection of the storage capacitor C2 of the regulating voltage setting unit 22 is connected to the input of the amplifier stage N7. The output of the amplifier stage N7 provides the regulating voltage U4 and thus represents the output 2_3 of the regulating unit 2. In a preferred embodiment, the amplifier stage N7 has an amplification factor of +1. This results in a particularly simple circuit design with few electronic components.

[0125] Next, Figure 3 The principle of the light source driver circuit shown in FIG.

[0126] The switchable current source 1 can be switched on and off by means of a pulse signal U7. The output current level of the current source is set by the analog output value of the voltage source N2, here a DA converter or a microcontroller N1. Here, any change in the output current level must be synchronized with the pulse signal, so that a periodically changing current pulse sequence is generated by the light source load.

[0127] The light source load 3 is supplied with its output voltage U5 from the efficient switch controller N8, and its input voltage U6 is, for example, a supply voltage of a 24V DC voltage.

[0128] In order to operate the current source 1 with high efficiency, the voltage drop between the first connection V1_1 and the second connection V1_2 of the voltage controllable component must be as low as possible during the first switching state (closed). For example, the voltage drop is about 1.5 volts. Figure 3 In the regulation state of the light source driver circuit, the voltage between the first connection V1_1 and the second connection V1_2 of the voltage controllable component is set by the comparison unit 21, in particular by the voltage level of the DC voltage source U1.

[0129] The switch controller N8 is connected to the output terminal 2_3 of the regulating unit 2 by means of the regulating input terminal N8_3, and is thereby also connected to the output terminal of the amplifier stage N7 of the regulating voltage setting unit 22. The output voltage U5 of the switch controller N8 decreases, for example, linearly as the regulating voltage U4 increases. Thus, the voltage level of the output voltage U5 can be set by means of the voltage level of the regulating voltage U4. The magnitude of the regulating voltage U4 is adjusted by the regulating unit 2.

[0130] The pulse signal U7 is, for example, binary and has a logic "low" level to switch the switch element N3 to the second switch state, and has a logic "high" level to switch the switch element N3 to the first switch state. The specific voltage magnitudes of the two levels are irrelevant to the present invention, and the correlation between the levels and the switch state of the switch element N3 is also irrelevant to the present invention.

[0131] Figure 4 It shows that according to the present invention Figure 2 The second embodiment of the light source driver circuit of the present invention is shown in FIG. Figure 3 to avoid unnecessary repetition. Figure 3 The analog circuit components are Figure 4 In the embodiment of the invention, the control loop is at least partially designed digitally, wherein the voltage drop is converted into a digital value by means of an AD converter 23, which can be evaluated by a microcontroller 24. The microcontroller 24 then maps Figure 1 or Figure 3 The comparison unit 21 and the regulating voltage setting unit 22 shown in the figure are used to adjust the digital regulating voltage. The digital regulating voltage thus generated is converted into an analog regulating voltage U4 by means of a DA converter 25 and is provided to a switch controller N8 at the regulating input terminal 2_3. Here, the regulating unit 2 can be constructed completely in the form of a computer program product. Preferably, the microcontroller N1 is also a microcontroller 24 for regulating the regulating voltage U4. In an embodiment variant, the DA converter 25 and / or the AD converter 23 are part of the microcontroller 24. This can reduce the number of components and reduce energy consumption.

[0132] The present invention Figures 1 to 4 All light source driver circuits have three time operation phases. The first operation phase is called the "starting condition", the second operation phase is called the "adjustment phase", and the third operation phase is called the "adjustment state phase". For details, see Figures 6 to 14 The following is based on Figures 6 to 14 The specific design scheme of the light source driver circuit of the present invention is described in more detail.

[0133] During the "start-up condition" phase, the corresponding input voltage and supply voltage are applied to the corresponding components of the light source driver circuit. Figure 3 In the case of a light source driver circuit, in this first phase, the input voltage U6 is applied to the switch controller N8, the voltage U1 is applied to the second input of the comparator N5, the voltage U2 is applied to the resistor R2 and the voltage U3 is applied to the resistor R3. The operating voltages required to power the operational amplifier N4, the comparator N5, the amplifier N7, the microcontroller N1 and the DAC N2 are also applied. In this first phase, the regulated voltage U4 in each light source driver circuit has an unregulated value, for example a voltage value of 0V, and the pulse signal U7 has a constant "low" level, whereby the continuous second switching state of the switching element N3 is switched, and the current source 1 is therefore continuously deactivated in this first phase. Reference Figure 3, whereby the storage capacitor C1 of the comparison unit 21 is charged to the voltage level of the voltage source U2. The voltage level of the voltage source U2 is greater than the voltage level of the DC voltage source U1 at the negative input terminal of the comparator N5. In addition, the (continuous) logic "low" level of the pulse signal U7 at the second input terminal D1_2 of the NAND gate D1 keeps the output terminal D1_3 of the NAND gate D1 at a logic "high" level. The logic "high" level of the output terminal D1_3 of the NAND gate D1 is applied to the control terminal of the switching element N6 (here, the electronic switching switch), and switches the switching element N6 to Figure 3 2, in which the first terminal of the resistor R4 is connected to the first terminal of the storage capacitor C2 of the regulated voltage setting unit 22. As a result, the storage capacitor C2 is discharged or maintained in a discharged state, and the regulated voltage U4 decreases or remains at a minimum value. If the minimum value of the regulated voltage U4 is, for example, zero volts, the output voltage U5 is adjusted by the switch controller N8 to its maximum value, typically a DC voltage of 19 V.

[0134] When the pulse signal U7 changes its logic state from logic "low" to logic "high" for the first time, the second operation phase ( Figures 1 to 4 The "regulation phase" of the light source driver circuit begins. Here, the first switching state of the switching element N3 (the current source 1 switched on) is switched by means of the pulse signal U7. Then, according to Figure 3 , the voltage drop UDS at the FET is greater than the difference between the voltage magnitude of the DC voltage U1 and the voltage magnitude of the flow voltage Uf_V2 of the diode V2 in the flow direction. Therefore, Figure 3 The comparator N5 first continues to carry a logic "high" level at its output. The "high" level of the comparator N5 and the "high" level of the pulse signal U7 switch the NAND gate D1 at the output to a logic "low". This switching of the output of the NAND gate D1 is supplied to the control terminal of the switching element N6, whereupon the switching element N6 switches (to Figure 3 ). As a result, the first terminal of the resistor R3 is connected to the first terminal of the capacitor C2, whereby the storage capacitor C2 is charged via the resistor R3. As the voltage at the storage capacitor C2 increases, the regulating voltage U4 also increases.

[0135] If there is sufficient average current (for example, at least 60mA) flowing through the light source load at the same time, then Figures 1 to 4The negative proportional constant between the regulated voltage U4 in the light source driver circuit and the output voltage U5 is reduced by means of the switch controller N8. The pulse sequence of the voltage U7 and the input signal to the DAC N2 should be selected so that there is a sufficient average current flowing through the light source load. As the output voltage U5 decreases, the drain-source voltage UDS of the FET decreases (UDS is the voltage drop between the first terminal V1_1 and the second terminal V1_2 of the FETV1). Reference Figure 3 , the following applies: If the voltage drop UDS is less than the difference between the voltage magnitude of the DC voltage U1 and the voltage magnitude of the flow voltage Uf_V2 of the diode V2 in the flow direction, the output of the comparator N5 changes (flips) the comparison voltage from the first state (logical "high" level) to the second state (logical "low" level). This flip switches the NAND gate D1 at the output D1_3 to the logical "HIGH", whereby the switch element N6 switches and connects the first terminal of the resistor R4 to the first terminal of the storage capacitor C2. As a result, the storage capacitor C2 is partially discharged again and the regulation voltage U4 decreases.

[0136] exist Figures 1 to 4 In the "adjustment phase" and "adjustment state phase" of the light source driver circuit of the embodiment of the present invention, the pulse signal U7 is applied to the switching element N3 to periodically (cyclically) switch the current source 1 on and off. As a result, the light source load 3 is switched on or off corresponding to the pulse signal. As a result, for example, flashes are generated, which are emitted to the measurement object in order to obtain and analyze characteristic responses to the flashes. For example, this enables authenticity checks of machine-readable features on the measurement object.

[0137] exist Figure 3 In the pulse period duration of each pulse (=pulse phase and pulse interval), the storage capacitor C2 of the regulation voltage setting unit 22 is slightly charged and also slightly discharged. The average voltage on the storage capacitor C2 sets the stable voltage value of the regulation voltage U4 of the switch controller N8, and thus sets the stable voltage value of the output voltage U5 of the switch controller N8. This stable voltage value of the output voltage U5 allows the current source 1 to operate at the optimal operating point of the current-voltage characteristic curve of the FET. Here, the voltage value of the DC voltage source U1 determines the drain-source voltage UDS of the FET in the pulse phase of the "regulation state phase".

[0138] When the average value of the regulating voltage U4 no longer increases monotonically over a longer period of time, for example, 10 pulse cycle durations (especially over 5ms), but U4 only alternates between two values ​​during this period, the second operating phase "regulation phase" ends. With the end of the "regulation phase", the "regulation state phase" (actual operating phase of the light source driver circuit) begins.

[0139] With the help of Figures 1 to 4 The regulating unit 2 of the light source driver circuit obtains a stable output voltage value of the output voltage U5, which adjusts the nominal different light source flow voltage and the fluctuation of the light source flow voltage in the operation of the light source driver circuit due to aging or temperature fluctuations (heating / cooling) inside or outside the circuit, and the voltage fluctuation of the switch controller N8. During the "adjustment phase" of the light source driver circuit, the increased power loss at the voltage controllable component V1 must be taken into account in the component selection and in the thermal design of the circuit board.

[0140] Figure 5 A first exemplary embodiment of a flow chart of a method 100 according to the invention for operating a light source load by means of a light source driver circuit according to the type described above is shown.

[0141] In a first step 101, a pulse signal is applied to the switching element to connect the control terminal of the voltage controllable component to the voltage source in the pulse phase, and the control terminal of the voltage controllable component is not connected to the voltage source in the pulse pause. In a subsequent step 102, the voltage drop on the voltage controllable component is measured by means of a regulating unit. In step 103, the voltage drop UDS is compared by means of a comparison unit in the regulating unit to see whether it is greater than the difference formed by the voltage magnitude of the DC voltage U1 and the voltage magnitude of the flow voltage Uf_V2 of the diode V2 in the flow direction.

[0142] In the case of yes in step 103, the comparison voltage is switched to the first state (step 104). Subsequently, in step 105, the adjustment voltage is adjusted (increased here) by means of the adjustment unit 2, wherein the adjustment voltage is adjusted according to the voltage drop at the voltage controllable component. In a subsequent step 106, the adjustment voltage is received in the switch controller, and the output voltage of the switch controller is reduced and output to operate the light source load, wherein the output voltage preferably decreases linearly with the increase of the adjustment voltage. The reduction of the output voltage leads to a reduction of the voltage drop UDS.

[0143] In the case of no in step 103, the comparison voltage is switched to the second state (step 107). Subsequently, in step 108, the adjustment voltage U4 is adjusted (reduced here) by means of the adjustment unit 2, wherein the adjustment voltage is adjusted according to the voltage drop at the voltage controllable component. In the subsequent step 109, the adjustment voltage is received in the switch controller, and the output voltage of the switch controller is increased and output to operate the light source load, wherein the output voltage preferably increases linearly with the decrease of the adjustment voltage. The increase in the output voltage leads to an increase in the voltage drop UDS.

[0144] Figure 5 The flowchart method can be used as Figures 1 to 4 The working method (operation method) of each of the light source driver circuits shown in FIG. Figure 1 and Figure 3 In a similar embodiment of , all method steps are executed in parallel.

[0145] Figure 6 Shows Figures 1 to 4 ,in particular Figure 3 : a first voltage / current-time curve of a selected signal of a light source driver circuit shown in . Here, Figure 6 The diagram shows the voltage trend of the output voltage U5 to be regulated of the switch controller N8 in the time period from 0 seconds to 4 seconds, the voltage trend at the first terminal V1_1 of the FET V1 in the time period from 0 seconds to 4 seconds, the voltage trend at the second terminal V1_2 of the FET V1 in the time period from 0 seconds to 4 seconds, the voltage trend of the regulating voltage U4 in the time period from 0 seconds to 4 seconds, the voltage trend of the pulse signal U7 in the time period from 0 seconds to 4 seconds, the voltage trend at the output terminal D1_3 of the digital gate D1 in the time period from 0 seconds to 4 seconds, and the current trend of the current flowing through the current resistor R1 in the time period from 0 seconds to 4 seconds.

[0146] Figure 6 The voltage-time curve of is divided into three operating phases. The time period from 0 seconds to 0.4 seconds shows the starting conditions, as described above: U5 is 19 volts, U4 is 0 volts, and U7 is at a continuous "low" level. The current source 1 is therefore deactivated in this operating phase, which is indicated by the current value of 0 A of the current I_R1 flowing through the current measuring resistor R1. The current I_R1 corresponds to the current flowing through the light source load 3 and is therefore also referred to as the light source current below. According to Figure 3 , the “low” level of the pulse signal U7 results in a “high” level at the output terminal D1_3 of the NAND gate D1.

[0147] During this "start condition" period, through the high regulation voltage U4 of 0V, due to the dependency between the voltages U4 and U5 (e.g. negative linearity), the output voltage U5 to be regulated of the switch controller N8 is output at the maximum value of 19 volts of the switch controller N8. Therefore, the voltage drop between the first terminal V1_1 and the second terminal V1_2 of the voltage-controllable component V1 (FET) is at its maximum and is, for example, 18 volts in this first stage. (The voltage trend is obtained by simulation. Due to the limitations of the simulation program, the value obtained for the voltage drop is 1V smaller. In the implemented circuit, the voltage drop is also 19V.) Since there is a maximum drain-source voltage UDS under the start condition, sufficient light source current can be provided at the first pulse (beginning of the regulation phase), regardless of the selected light source load.

[0148] The second operating phase "regulation phase" begins at 0.4 seconds from the first switch of the pulse signal U7 from logic "low" to logic "high". In this case, the current source 1 is activated in the pulse phase of the pulse signal U7, whereby, for example, a light source current I_R1 of 1 ampere is set. Other current values ​​are also possible. The pulse signal U7 can be, for example, a burst signal and have a predefined number of individual pulses, also called bursts. An exemplary pulse signal is Figure 8 The present invention is not limited to Figure 8 of burst pulse signals.

[0149] The second operating phase, “regulation phase”, ends at 2.2 seconds, which can be seen from the end of the rise in the control voltage U4 and this Figure 6 In particular, this is shown by the constant average voltage UDS (the difference between the voltages at the terminals V1_1 and V1_2 of the FETs). Furthermore, in the “regulation state phase”, the output D1_3 of the NAND gate D1 is switched at a lower frequency.

[0150] Figure 7 Shows Figure 6 The voltage / current time curve shown in FIG. 1 is a selected partial range (= here also a range selection) between 3.26 seconds and 3.44 seconds, see also Figure 6 Mark "Area Selection" in the. Figure 7 The voltage-time and current-time trends in the third operating phase "adjustment phase" are shown here. The voltage scale for U4 is enlarged 100 times and moved into the scale area shown. In this diagram, it is clearly shown that the voltage scale is adjusted according to the current. Figure 6 The slight increase and decrease of the regulation voltage U4 caused by the charging and discharging of the storage capacitor C2 (due to the switching of the output terminal D1_3 of the NAND gate D1). Therefore, in the time period between 3.3 seconds and 3.41 seconds (i.e., in the time period of about 5 bursts), the regulation voltage U4 is continuously slightly reduced, because despite the presence of the pulse signal U7, the output terminal D1_3 of the NAND gate D1 is always maintained at a logical "high" level. Therefore, the first terminal of the resistor R4 is connected to the first terminal of the capacitor C2. The formed time constant of the second RC component (formed by R4 and C2) is substantially greater than the burst phase of the pulse signal U7. The repeated occurrence of the "low" level at the output terminal D1_3 of the NAND gate D1 in the time period from 3.28 seconds to 3.3 seconds and from 3.41 seconds to 3.43 seconds leads to the switching of the switching element N6, so that the first terminal of the resistor R3 is connected to the capacitor C2. This leads to the charging of the storage capacitor C2 and thus to the increase of the regulation voltage U4. As a result, U4 fluctuates with a low amplitude around the adjusted value.

[0151] Figure 8 Shows Figure 7The voltage / current time curve shown in the selected sub-range between 3.4 seconds and 3.42 seconds, see also Figure 7 The "Area Selection" tag in Figure 7 similar, Figure 8 Therefore, the voltage-time trend and current-time trend in the third operating stage "adjustment state stage" are shown. The voltage scale for U4 is magnified 100 times and moved into the scale area shown. In this diagram, an exemplary pulse signal U7 is shown, and its burst cycle duration is 21 milliseconds. The burst phase of the burst cycle duration has 30 single pulses, which respectively have a single pulse phase of 100 microseconds and a single pulse cycle duration of 500 microseconds. Therefore, the single pulse interval generated is 400 microseconds. This sequence consisting of 30 single pulses is called a "burst", which is repeated at intervals of the burst interval.

[0152] Figure 8 The relationship between the pulse signal U7, the resulting voltage drop UDS (difference between the voltage at the first terminal V1_1 and the voltage at the second terminal V1_2) and the current I_R1 flowing through the current measuring resistor R1 is shown. It can be seen that the last six individual pulses of the burst shown (in the time period between 3.412 and 3.415 seconds) lead to a flip of the output D1_3 of the NAND gate D1 and thus to an increase in the control voltage U4.

[0153] Fig. 9 Shows Figures 1 to 4 ,in particular Figure 3 : a second voltage / current-time curve of a selected signal of the light source driver circuit shown in . Here, Fig. 9 The voltage trend of the output voltage U5 to be regulated of the switching controller N8 in the time period from 0 seconds to 4 seconds, the voltage trend at the first terminal V1_1 of the FET in the time period from 0 seconds to 4 seconds, the voltage trend at the second terminal V1_2 of the FET in the time period from 0 seconds to 4 seconds, and the voltage trend of the regulating voltage U4 in the time period from 0 seconds to 4 seconds are shown.

[0154] Fig. 9 The voltage-time trend of is also divided into three operating phases. Here, the time period from 0 seconds to 0.4 seconds shows the start condition, as described above: U5 is 19 volts, U4 is 0 volts, and U7 is at a continuous "low" level (not shown). Thus, the current source 1 is disabled during this time period.

[0155] During this "start condition" period, the output voltage U5 to be regulated of the switch controller N8 is output at the maximum value of 19 volts of the switch controller N8 due to the dependency (e.g. inversely proportional) between the voltages U4 and U5 by the 0 V high regulation voltage U4. Therefore, the voltage drop between the first terminal V1_1 and the second terminal V1_2 of the voltage-controllable component V1 (FET) is at its maximum and is also 19 volts in this first phase. (For better recognition, the curve of the voltage U5 is shifted upward by 0.4 V.)

[0156] The second operating phase "regulation phase" begins with the first switching of the pulse signal U7 from logic "low" to logic "high". As a result, the current source 1 is activated in the pulse phase. The pulse signal U7 can, for example, have a burst signal with a predefined number of single pulses, also called bursts. Such a pulse signal is Figures 10 to 14 Shown in.

[0157] Under these operating conditions, the second operating phase ends at 2.3 seconds, which can be seen from the end of the rise in the control voltage U4 and this Fig. 9 In particular, this is shown by a constant average voltage UDS (the difference between the voltages at the terminals V1_1 and V1_2 ).

[0158] Fig.10 Shows Fig. 9 The first partial region of the voltage-time curve is shown in . The location of the partial region is Fig.10 As shown in the figure above. Fig.10 The partial region shown in is selected at the beginning of the second operating phase "adjustment phase". A large voltage drop UDS (the difference between the voltages at the terminals V1_1 and V1_2) can be seen, which corresponds to a high power loss during the pulse phase. Even in the first pulse, the voltage value V1_2 has a constant amplitude, so that the desired light source current is already present in the first pulse.

[0159] Fig.11 Shows Fig. 9 The second sub-region of the voltage-time curve shown in . The second sub-region is located at Fig.11 As shown in the figure above. Fig.10 The partial region shown in is selected at the beginning of the third operating phase, “setting state phase”.

[0160] Fig.12 Shown from Fig. 9An exemplary partial area of ​​the third operating phase "regulation phase" of the voltage-time curve shown in FIG. Instead of the voltage curve of the output voltage U5 to be regulated by the switch controller N8, the voltage curve at the output D1_3 of the digital gate D1 is shown. For this figure, U4 has been measured by AC coupling, so that only the deviation from the average value is shown. Figure 7 Similarly, the change in voltage U4 due to the temporary charging and discharging of storage capacitor C2 is shown here. Figure 8 implementation plan.

[0161] Fig.13 Shows Fig.12 The partial area of ​​the voltage-time curve is shown in . The location of the partial area is Fig.13 As shown in the figure above. Figure 8 Similarly, an exemplary pulse signal represented by V1_1 and V1_2 is presented here in a time-stretched illustration. For this figure, U4 has been measured by AC coupling, so only the deviation from the average value is shown. Figure 3 The last eight logic "low" level pulses (having a length of about 4 microseconds) of the output terminal D1_3 of the NAND gate D1 occur during a phase of the regulation process in which the voltage across C1 is almost identical to the DC voltage source U1. It can be seen that these last eight logic "low" level pulses of the output terminal D1_3 of the NAND gate D1 do not lead to any relevant increase in the regulation voltage U4. Due to the analog regulation principle, the number of "low" level pulses of the output terminal D1_3 can be varied.

[0162] Fig.14 Shows Fig.12 The partial area of ​​the voltage-time curve is shown in . The location of the partial area is Fig.14 As shown in the figure above. It is shown that the voltage difference UDS at the FET is 1.44 volts (the difference between V1_1 and V1_2). This corresponds to the difference between the 2 volt voltage of the DC voltage source U1 and the flow voltage in the forward direction of the diode D2. This low voltage difference UDS affects the minimum power loss of the FET.

[0163] Within the scope of the invention, all described and / or illustrated and / or claimed elements can be combined with one another in any manner.

[0164] Reference numerals list

[0165] 1 Switchable current source

[0166] N3 switch element

[0167] N3_1 Switching element first connection

[0168] N3_2 Switching element second terminal

[0169] N3_3 Switching element control connector

[0170] V1 voltage controllable component, FET

[0171] V1_1 FET first connection

[0172] V1_2 Second terminal of FET

[0173] V1_3 FET control connector

[0174] UDS Voltage drop across the FET, drain-source voltage

[0175] R1 shunt resistor, current measurement resistor

[0176] N4 Operational Amplifier

[0177] N2 DAC, voltage source

[0178] U7 pulse signal

[0179] 2 Adjustment unit

[0180] 2_1 The first input terminal of the regulating unit

[0181] 2_2 The second input terminal of the regulating unit

[0182] 2_3 Output of the regulation unit

[0183] 21Comparison Unit

[0184] V2 diode

[0185] C1 Storage capacitor

[0186] N5 Comparator

[0187] U1 DC voltage source

[0188] R2 resistor

[0189] U2 Voltage Source

[0190] 22 Adjustment voltage setting unit

[0191] R3 resistor

[0192] R4 resistor

[0193] C2 Storage capacitor

[0194] N6 Switching element

[0195] N7 Amplifier

[0196] 23 AD converter

[0197] 24 Microcontroller

[0198] 25 DA Converter

[0199] D1 digital gate, NAND gate

[0200] D1_1 The first input of the NAND gate

[0201] D1_2 The second input of the NAND gate D1_3 The output of the NAND gate

[0202] 3. V3 to Vn light source load

[0203] N8 Switch Controller

[0204] U6 input voltage

[0205] U4 adjusts the voltage

[0206] U5 output voltage to be adjusted

[0207] N8_1 Voltage input terminal

[0208] N8_2 Voltage output terminal

[0209] N8_3 Adjustment input terminal

[0210] Method steps 101 to 109

Claims

1. A light source driver circuit, comprising: - a switch controller (N8), which has a voltage input terminal (N8_1) for applying an input voltage (U6), a voltage output terminal (N8_2) for outputting an output voltage (U5) to be adjusted for operating a light source load (3), and a regulating input terminal (N8_3) for applying a regulating voltage (U4) for adjusting the voltage level of the output voltage (U5); - a current source (1) having a switching element (N3) and a voltage controllable component (V1) arranged in series with a light source load (3), wherein: A pulse signal (U7) is applied to a control terminal (N3_3) of a switching element (N3), wherein, in a pulse phase of the pulse signal (U7), the switching element (N3) is switched to a first switching state, in which the control terminal (V1_3) of the voltage-controllable component (V1) is connected to a voltage source (N2), and wherein, in a pulse pause of the pulse signal (U7), the switching element (N3) is switched to a second switching state, in which the control terminal (V1_3) of the voltage-controllable component (V1) is not connected to the voltage source (N2); and - a regulating unit (2), a first input terminal (2_1) of which is connected to a first terminal (V1_1) of a voltage-controllable component (V1), a second input terminal (2_2) of which is connected to a second terminal (V1_2) of the voltage-controllable component (V1), and an output terminal (2_3) of which is connected to a regulating input terminal (N8_3) of a switch controller (N8) to provide a regulating voltage (U4) to the switch controller (N8), wherein the regulating voltage (U4) is regulated according to a voltage drop (UDS) between a terminal (V1_1) and a terminal (V1_2) of the voltage-controllable component (V1).

2. The light source driver circuit according to claim 1, wherein: The regulating unit (2) has a storage capacitor (C2) so as to increase or decrease the voltage level of the regulating voltage (U4) according to the voltage drop (UDS) at the voltage controllable component (V1), thereby regulating the regulating voltage (U4).

3. The light source driver circuit according to claim 1, wherein: The regulating unit (2) has a comparison unit (21), the comparison unit providing a comparison voltage at its output end, the voltage magnitude of the comparison voltage depending on the voltage drop (UDS) on the voltage controllable component (V1), wherein the output end of the comparison unit (21) is connected to the input end of a regulating voltage setting unit (22) of the regulating unit (2), the regulating voltage setting unit adjusting the voltage magnitude of the regulating voltage (U4) according to the comparison voltage, wherein the output end of the regulating voltage setting unit is connected to the regulating input end (N8_3) of a switch controller (N8) so as to provide the regulating voltage (U4).

4. The light source driver circuit according to claim 3, wherein: When the comparison voltage has a first state, the adjustment voltage (U4) is increased by the adjustment voltage setting unit (22), and when the comparison voltage has a second state different from the first state, the adjustment voltage (U4) is decreased by the adjustment voltage setting unit (22).

5. The light source driver circuit according to claim 3 or 4, wherein: The comparison unit (21) comprises a comparator (N5) and a DC voltage source (U1), wherein a first input end of the comparator (N5) is connected to a first connector (V1_1) of a voltage-controllable component (V1), and a second input end of the comparator (N5) is connected to a first connector of the DC voltage source (U1), and a second connector of the DC voltage source (U1) is connected to a second connector (V1_2) of the voltage-controllable component (V1) as a second input end (2_2) of the adjustment unit (2).

6. The light source driver circuit according to claim 5, wherein: A diode (V2) is inserted in the connection between the first terminal (V1_1) of the voltage-controllable component (V1) and the first input terminal of the comparator (N5), the anode of the diode is connected to the first input terminal of the comparator (N5), and the cathode of the diode is connected to the first terminal (V1_1) of the voltage-controllable component (V1) as the first input terminal (2_1) of the adjustment unit (2).

7. The light source driver circuit according to claim 6, wherein: A first terminal of the storage capacitor (C1) of the comparison unit (21) is connected to the anode of the diode (V2), and a second terminal of the storage capacitor (C1) of the comparison unit (21) is connected to the second input (2_2) of the control unit (2).

8. The light source driver circuit according to claim 2, wherein: The storage capacitor (C2) of the regulating unit (2) is part of a first RC component, wherein the time constant of the first RC component adopts such a value that the highest rate of change of the storage capacitor voltage is less than the quotient formed by the lowest rate of change of the output voltage of the switching controller and the switching controller proportionality factor.

9. The light source driver circuit according to claim 8, wherein: The storage capacitor (C2) of the regulating unit (2) is also part of a second RC component, wherein the time constant of the second RC component adopts such a value that the output voltage of the switching controller increases only by a small amount during the pulse interval.

10. The light source driver circuit according to claim 3 or 4, wherein: The storage capacitor (C2) of the regulating unit (2) is part of a first RC component, wherein the time constant of the first RC component adopts such a value that the highest rate of change of the storage capacitor voltage is less than the quotient formed by the lowest rate of change of the output voltage of the switching controller and the switching controller proportionality factor.

11. The light source driver circuit according to claim 10, wherein: The storage capacitor (C2) of the regulating unit (2) is also part of a second RC component, wherein the time constant of the second RC component adopts such a value that the output voltage of the switching controller increases only by a small amount during the pulse interval.

12. The light source driver circuit according to claim 11, wherein: The first RC component or the second RC component is selected by means of a switch element (N6) of the adjustment voltage setting unit (22) according to the comparison voltage.

13. The light source driver circuit according to claim 1, wherein: The control unit (2) is introduced as a computer program product installed in a microcontroller (N1) so as to be executable.

14. An optical measuring device having at least one light source (V3) as a light source load (3) for illuminating a measurement object and a light source driver circuit according to any one of the preceding claims for operating the light source (V3).

15. A device having a light source driver circuit according to any one of claims 1 to 13 and a light source load (3). 16 . An apparatus for checking value documents, in particular banknotes, having a machine-readable security element, comprising an optical measuring device according to claim 14 for illuminating the security element.

17. A method (100) for operating a light source load (3) by means of a light source driver circuit according to any one of claims 1 to 13, wherein the method (100) comprises the following steps: - connecting (101) a pulse signal (U7) to a control terminal (N3_3) of a switching element (N3) to connect a control terminal (V1_3) of a voltage-controllable component (V1) to a voltage source (N2); - measuring (102) a voltage drop (UDS) between a connection (V1_1) and a connection (V1_2) of a voltage-controllable component (V1) by means of a regulating unit (2); - regulating (105, 108) a regulating voltage (U4) by means of a regulating unit (2), wherein the regulating voltage (U4) is regulated as a function of a voltage drop (UDS) across the voltage-controllable component (V1); - receiving a regulating voltage (U4) in a switch controller (N8) and outputting a regulated output voltage (U5) for operating a light source load (3) while using the regulating voltage (U4) to regulate (106, 109) the voltage level of the output voltage (U5), wherein the regulating voltage (U4) is preferably inversely proportional to the output voltage (U5).

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