A voltage and current control circuit and integrated chip

Abstract

The present application discloses a voltage and current control circuit and an integrated chip, wherein the voltage and current control circuit comprises a first output terminal, a second output terminal, a current loop and a voltage loop. The current loop comprises a current sampling unit, a first error amplification unit and a first transconductance unit, and the voltage loop comprises a voltage divider unit, a second error amplification unit and a second transconductance unit. The current sampling unit is used to obtain a first current. The first error amplification unit is used to output a first voltage according to the difference between the first current and the reference current. The first transconductance unit is used to output a second current according to the first voltage. The voltage divider unit is used to output a second voltage and to output a third voltage according to the second current. The second error amplification unit is used to output a fourth voltage and a fifth voltage. The second transconductance unit is used to output a third current according to the fourth voltage and to output a fourth current according to the fifth voltage. By means of the above method, the number of pins connected to the external circuit can be reduced, and the cost is low.

Description

Technical Field

[0001] The present application relates to the technical field of electronic circuits, and in particular to a voltage and current control circuit and an integrated chip. Background Art

[0002] With limited battery capacity in mobile devices, fast charging technology has become a new way to improve user experience. In recent years, various technical solutions for USB fast charging have developed rapidly, and a variety of charging protocols have emerged, such as Qualcomm Q / QC3 / QC4 protocol, Huawei FCP / SCP protocol, Apple protocol, etc. Among them, a common feature of these protocols is that they will adjust the appropriate charging voltage and charging current according to the status of the device.

[0003] Currently, two parallel loops are usually required to control the voltage and current respectively. However, this method requires three pins connected to the external circuit and two sets of external compensation components, which is costly. Summary of the invention

[0004] The embodiments of the present application aim to provide a voltage and current control circuit and an integrated chip, which can reduce the number of pins connected to external circuits and have low cost.

[0005] To achieve the above objectives, in a first aspect, the present application provides a voltage and current control circuit, comprising:

[0006] A first output terminal, a second output terminal, a current loop and a voltage loop;

[0007] The current loop includes a current sampling unit, a first error amplifying unit and a first transconductance unit, and the voltage loop includes a voltage dividing unit, a second error amplifying unit and a second transconductance unit;

[0008] The current sampling unit is connected to the power line, and the current sampling unit is used to sample the output current to obtain a first current;

[0009] The first error amplifying unit is connected to the current sampling unit and the reference current respectively, and the first error amplifying unit is used to output a first voltage according to the difference between the first current and the reference current;

[0010] The first transconductance unit is connected to the first error amplification unit, and the first transconductance unit is also connected to the first output end, the voltage divider unit and the second error amplification unit, and the connection point between the first transconductance unit, the first output end, the voltage divider unit and the second error amplification unit is a first node, and the first transconductance unit is used to output a second current to the first node according to the first voltage;

[0011] The voltage dividing unit is connected to the power line, and is used to divide the input voltage to output a second voltage, and is used to output a third voltage according to the second current;

[0012] The second error amplifying unit is connected to the voltage dividing unit and the reference voltage respectively, and is used to output a fourth voltage according to the difference between the second voltage and the reference voltage, and is used to output a fifth voltage according to the difference between the third voltage and the reference voltage;

[0013] The second transconductance unit is connected to the second error amplification unit and the second output end respectively, and is used to output a third current to the second output end according to the fourth voltage, and to output a fourth current to the second output end according to the fifth voltage.

[0014] In an optional manner, the first error amplification unit includes a first error amplifier, a first resistor, a second resistor and a first capacitor;

[0015] The non-inverting input terminal of the first error amplifier is grounded, the inverting input terminal of the first error amplifier is respectively connected to the first end of the first resistor and the first end of the first capacitor, the second end of the first resistor is connected to the current sampling unit, the first end of the second resistor and the reference current, the second end of the second resistor is grounded, and the second end of the first capacitor is connected to the output terminal of the first error amplifier and the first transconductance unit.

[0016] In an optional manner, the first transconductance unit includes a first P-type transistor;

[0017] A first end of the first P-type transistor is connected to the first error amplifying unit, a second end of the first P-type transistor is connected to the power line, and a third end of the first P-type transistor is connected to the first node.

[0018] In an optional manner, the voltage dividing unit includes a third resistor and a fourth resistor;

[0019] The third resistor is connected in series with the fourth resistor, a non-series connection point of the third resistor is connected to the power line, a connection point between the third resistor and the fourth resistor is connected to the first output terminal, and a non-series connection point of the fourth resistor is grounded, wherein the connection point between the third resistor and the fourth resistor is the first node.

[0020] In an optional manner, the second error amplification unit includes a second error amplifier;

[0021] A non-inverting input terminal of the second error amplifier is connected to the first node, an inverting input terminal of the second error amplifier is connected to the reference voltage, and an output terminal of the second error amplifier is connected to the second transconductance unit.

[0022] In an optional manner, the second transconductance unit includes a first N-type transistor;

[0023] A first end of the first N-type transistor is connected to the second error amplifying unit, a second end of the first N-type transistor is connected to the second output end, and a third end of the first N-type transistor is grounded.

[0024] In an optional manner, the voltage-current control circuit further includes a current mirror unit, a first switch and a second switch, and the current mirror unit includes a second P-type transistor, a third P-type transistor and a current source;

[0025] The first switch is connected to the second transconductance unit and the second P-type transistor respectively, the second P-type transistor is connected to the third P-type transistor, the third P-type transistor is connected to the current source, and the second switch is connected to the third P-type transistor and the first output terminal respectively;

[0026] When the first switch and the second switch are closed, the current mirror unit is used to transmit the third current to the first output terminal.

[0027] In an optional manner, the voltage and current control circuit further includes a third switch and a fourth switch;

[0028] The third switch is connected to the second output terminal and the second transconductance unit respectively, and the fourth switch is connected to the second error amplification unit, the second transconductance unit, the third switch and the second output terminal respectively;

[0029] When the first switch, the second switch, and the fourth switch are all opened and the third switch is closed, the third current is transmitted to the second output terminal.

[0030] In an optional manner, the voltage and current control circuit further includes a fifth switch;

[0031] The fifth switch is connected to the first output terminal and the first transconductance unit respectively;

[0032] When the fifth switch is closed, the second current is transmitted to the first node.

[0033] In a second aspect, the present application provides an integrated chip, which includes the voltage and current control circuit as described above.

[0034] The beneficial effect of the embodiment of the present application is: the voltage and current control circuit provided by the present application includes a first output terminal, a second output terminal, a current loop and a voltage loop. The current loop includes a current sampling unit, a first error amplification unit and a first transconductance unit, and the voltage loop includes a voltage divider unit, a second error amplification unit and a second transconductance unit. The current sampling unit is connected to the power line, and the current sampling unit is used to sample the output current to obtain the first current. The first error amplification unit is respectively connected to the current sampling unit and the reference current, and the first error amplification unit is used to output a first voltage according to the difference between the first current and the reference current. The first transconductance unit is connected to the first error amplification unit, and the first transconductance unit is also connected to the first error amplification unit, the first output terminal, the voltage divider unit and the second error amplification unit, and the connection point between the first output terminal of the first transconductance unit, the voltage divider unit and the second error amplification unit is a first node, and the first transconductance unit is used to output a second current to the first node according to the first voltage. The voltage divider unit is connected to the power line, and the voltage divider unit is used to divide the input voltage to output the second voltage, and is used to output a third voltage according to the second current. The second error amplification unit is connected to the voltage divider unit and the reference voltage respectively, and the second error amplification unit is used to output a fourth voltage according to the difference between the third voltage and the reference voltage, and is used to output a fifth voltage according to the difference between the third voltage and the reference voltage. The second transconductance unit is connected to the second error amplification unit and the second output terminal respectively, and the second transconductance unit is used to output a third current to the second output terminal according to the fourth voltage, and is used to output a fourth current to the second output terminal according to the fifth voltage. Therefore, compared with the related art that requires three pins connected to the outside, the present application only requires two pins connected to the outside, that is, it can reduce the number of pins connected to the external circuit, and the cost is lower. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0036] Figure 1 A schematic diagram of the structure of a voltage and current control circuit provided in an embodiment of the present application;

[0037] Figure 2 A schematic diagram of the circuit structure of a voltage and current control circuit provided in an embodiment of the present application;

[0038] Figure 3 A schematic diagram of the circuit structure of a voltage and current control circuit provided in another embodiment of the present application. DETAILED DESCRIPTION

[0039] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0040] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of the voltage and current control circuit provided in the embodiment of the present application. Figure 1 As shown, the voltage-current control circuit 10 includes a first output terminal VOUT1, a second output terminal VOUT2, a current loop 100 and a voltage loop 200. The current loop 100 includes a current sampling unit 101, a first error amplifying unit 102 and a first transconductance unit 103. The voltage loop 200 includes a voltage dividing unit 201, a second error amplifying unit 202 and a second transconductance unit 203.

[0041] Specifically, the current sampling unit 101 is connected to the power line 20, the first error amplifying unit 102 is respectively connected to the current sampling unit 101 and the reference current Iref, the first transconductance unit 103 is connected to the first error amplifying unit 102, the first transconductance unit 103 is also respectively connected to the first output terminal VOUT1, the voltage dividing unit 201 and the second error amplifying unit 202, and the connection point between the first transconductance unit 103, the first output terminal VOUT1, the voltage dividing unit 201 and the second error amplifying unit 202 is the first node P1, the voltage dividing unit 201 is connected to the power line 20, the second error amplifying unit 202 is respectively connected to the voltage dividing unit 201 and the reference voltage Vref, and the second transconductance unit 203 is respectively connected to the second error amplifying unit 202 and the second output terminal VOUT2. Among them, the first end of the first error amplifying unit 102 is connected to the current sampling unit 101, the second end of the first error amplifying unit 102 is connected to the reference current Iref, the third end of the first error amplifying unit 102 is connected to the first end of the first transconductance unit 103, the second end of the first transconductance unit 103 is connected to the first node P1, the first end of the second error amplifying unit 202 is connected to the first node P1, the second end of the second error amplifying unit 202 is connected to the reference voltage Vref, the third end of the second error amplifying unit 202 is connected to the first end of the second transconductance unit 203, and the second end of the second transconductance unit 203 is connected to the second output end VOUT2.

[0042] In this embodiment, the current sampling unit 101 is used to sample the output current to obtain a first current. The first error amplifying unit 102 is used to output a first voltage according to the difference between the first current and the reference current Iref. The first transconductance unit 103 is used to output a second current to the first output terminal VOUT1 according to the first voltage. The voltage dividing unit 201 is used to divide the input voltage to output a second voltage, and to obtain a third voltage according to the second current of the first node P1. The second error amplifying unit 202 is used to output a fourth voltage according to the difference between the second voltage and the reference voltage Vref, and to output a fifth voltage according to the difference between the third voltage and the reference voltage Vref. The second transconductance unit 203 is used to output a third current to the second output terminal VOUT2 according to the fourth voltage, and to output a fourth current value to the second output terminal VOUT2 according to the fifth voltage.

[0043] Thus, when the output current or output voltage changes, the change of the output current can be determined through the first output terminal VOUT1 and the second output terminal VOUI2, and the change of the output voltage can also be determined. Then, the output current and output voltage can be adjusted according to the current of the first output terminal VOUT1 and the current of the second output terminal VOUT2. In this embodiment, only two pins connected to the external circuit (i.e., the first output terminal VOUT1 and the second output terminal VOUT2) need to be set, which is lower in cost than the related art that needs to set three pins connected to the external circuit.

[0044] At the same time, in the related art, for the current loop and the voltage loop, it is necessary to respectively set corresponding compensation modules through external circuits (that is, two compensation modules need to be set). For the present application, only one compensation module connected to the first output terminal VOUT needs to be set externally. Thus, the number of compensation modules is also reduced, which is conducive to further reducing costs. Among them, the compensation module is used to ensure the stability of the loop.

[0045] In one embodiment, if Figure 2 As shown, the first error amplifying unit 102 includes a first error amplifier Gm1, a first resistor R1, a second resistor R2 and a first capacitor C1. The non-inverting input terminal of the first error amplifier Gm1 is grounded GND, the inverting input terminal of the first error amplifier Gm1 is connected to the first end of the first resistor R1 and the first end of the first capacitor C1 respectively, the second end of the first resistor R1 is connected to the current sampling unit 101, the first end of the second resistor R2 and the reference current Iref, the second end of the second resistor R2 is grounded GND, and the second end of the first capacitor C1 is connected to the output terminal of the first error amplifier Gm1 and the first transconductance unit 103.

[0046] Specifically, the second resistor R2 is used to convert the difference between the first current output by the current sampling unit 101 and the reference current Iref into a voltage V1. It is worth noting that in the embodiment of the present application, the first current and the reference current Iref both represent the magnitude of the current, that is, the absolute value, and do not include the direction of the current. Figure 2 In the embodiment, the first current flows into the inverting input terminal of the first error amplifier Gm1, and the reference current Iref flows out of the inverting input terminal of the first error amplifier Gm1. In addition, the first error amplifier Gm1, the first resistor R1 and the first capacitor C1 are used to filter and amplify the voltage V1.

[0047] In one embodiment, the first transconductance unit 103 includes a first P-type transistor PM1, wherein a first terminal of the first P-type transistor PM1 is connected to the first error amplifying unit 102, a second terminal of the first P-type transistor PM1 is connected to the power line 20, and a third terminal of the first P-type transistor PM1 is connected to the first node P1.

[0048] Specifically, the first P-type transistor PM1 is used to convert the voltage output by the first error amplifier Gm1 (ie, corresponding to the first voltage in the above embodiment) into a current (ie, corresponding to the second current in the above embodiment).

[0049] In one embodiment, the voltage dividing unit 201 includes a third resistor R3 and a fourth resistor R4. The third resistor R3 and the fourth resistor R4 are connected in series, a non-series connection point of the third resistor R3 is connected to the power line 20, a connection point between the third resistor R3 and the fourth resistor R4 is connected to the first output terminal VOUT1, and a non-series connection point of the fourth resistor R4 is grounded GND.

[0050] Specifically, the third resistor R3 and the fourth resistor R4 can divide the output voltage, and input the divided voltage on the fourth resistor R4 (corresponding to the second voltage in the above embodiment) to the second error amplifying unit 202. At the same time, the second current on the first node P1 can also enable the two ends of the fourth resistor R4 to obtain a voltage (corresponding to the third voltage in the above embodiment).

[0051] In one embodiment, the second error amplifying unit 202 includes a second error amplifier Gm2, wherein a non-inverting input terminal of the second error amplifier Gm2 is connected to the voltage dividing unit 201, an inverting input terminal of the second error amplifier Gm2 is connected to the reference voltage Vref, and an output terminal of the second error amplifier Gm2 is connected to the second transconductance unit 203.

[0052] Specifically, the second error amplifier Gm2 is used to output a corresponding voltage (i.e., corresponding to the fourth voltage in the above embodiment) to the second transconductance unit 203 according to the difference between the second voltage on the fourth resistor R4 and the reference voltage Vref. At the same time, the second error amplifier Gm2 is also used to output a corresponding voltage (i.e., corresponding to the fifth voltage in the above embodiment) to the second transconductance unit 203 according to the difference between the third voltage on the fourth resistor R4 and the reference voltage Vref.

[0053] In one embodiment, the second transconductance unit 203 includes a first N-type transistor NM1, wherein a first terminal of the first N-type transistor NM1 is connected to the second error amplification unit 202, a second terminal of the first N-type transistor NM1 is connected to the second output terminal VOUT2, and a third terminal of the first N-type transistor NM1 is grounded GND.

[0054] Specifically, the first N-type transistor NM1 is used to convert the fourth voltage output by the second error amplifier Gm2 into a current (i.e., corresponding to the third current in the above embodiment), and feed it back to the external circuit through the first output terminal VOUT1 or the second output terminal VOUT2. At the same time, the first N-type transistor NM1 is also used to convert the fifth voltage output by the second error amplifier Gm2 into a current (i.e., corresponding to the fourth current in the above embodiment), and feed it back to the external circuit through the first output terminal VOUT1 or the second output terminal VOUT2.

[0055] In one embodiment, the voltage-current control circuit 10 further includes a current mirror unit 300, a first switch T1 and a second switch T2. The current mirror unit 300 includes a second P-type transistor PM2, a third P-type transistor PM3 and a current source I1.

[0056] Specifically, the first switch T1 is connected to the second transconductance unit 203 and the second P-type transistor PM2, the second P-type transistor PM2 is connected to the third P-type transistor PM3, the third P-type transistor PM3 is connected to the current source I1, and the second switch T2 is connected to the third P-type transistor PM3 and the first output terminal VOUT1. The first end of the first switch T1 is connected to the second transconductance unit 203, the second end of the first switch T1 is connected to the first end of the second P-type transistor PM2, the first end of the second P-type transistor PM2 is connected to the first end of the third P-type transistor PM3, the third end of the second P-type transistor PM2 is connected to the third end of the third P-type transistor PM3, the second end of the second P-type transistor PM2 is connected to the first end of the second switch T2 and the first end of the current source I1, the second end of the current source I1 is grounded GND, and the second end of the second switch T2 is connected to the first output terminal VOUT1.

[0057] In this embodiment, when the first switch T1 and the second switch T2 are closed, the current mirror unit 300 can transmit the third current and / or the fourth current output by the second transconductance unit 203 to the first output terminal VOUT1 .

[0058] In one embodiment, the voltage and current control circuit 10 further includes a third switch T3 and a fourth switch T4. The third switch T3 is connected to the second output terminal VOUT2 and the second transconductance unit 203, respectively, and the fourth switch T4 is connected to the second error amplification unit 202, the second transconductance unit 203, the third switch T3, and the second output terminal VOUT2, respectively. Specifically, the first end of the third switch T3 is connected to the second output terminal VOUT2 and the first end of the fourth switch T4, the second end of the third switch T3 is connected to the second transconductance unit 203, and the second end of the fourth switch T4 is connected to the second error amplification unit 202 and the second transconductance unit 203.

[0059] In this embodiment, when the first switch T1 , the second switch T2 , and the fourth switch T4 are all opened, and the third switch T3 is closed, the third current and / or the fourth current output by the second transconductance unit 203 is transmitted to the second output terminal VOUT2 .

[0060] In one embodiment, the voltage and current control circuit 10 further includes a fifth switch T5 connected to the first output terminal VOUT1 and the first transconductance unit 103. A first end of the fifth switch T5 is connected to the first node P1, and a second end of the fifth switch T5 is connected to the first output terminal VOUT1.

[0061] Specifically, when the fifth switch T5 is closed, the second current output by the first transconductance unit 103 is transmitted to the first node P1.

[0062] In practical applications, in one embodiment, the voltage and current control circuit 10 in the embodiment of the present application can be used to connect to an external circuit including an AC-DC conversion module, and can also be used to connect to an external circuit including a DC-DC conversion module. Among them, the AC-DC conversion module refers to a module that converts an AC power supply into a DC power supply, and the DC-DC conversion module refers to a module that converts one voltage value into another voltage value in a DC circuit.

[0063] Specifically, in one embodiment, when the voltage and current control circuit 10 is used to connect to the external circuit of the AC-DC conversion module, the switch state of each switch (including the first switch T1, the second switch T2, the third switch T3, the fourth switch T4 and the fifth switch T5) should be as follows: Figure 2 As shown, the first switch T1, the second switch T2 and the fourth switch T4 are all disconnected, and the third switch T3 and the fifth switch T5 are all closed.

[0064] On the one hand, the current sampling unit 101 samples the output current to obtain a first current, and converts the first current into a voltage after subtracting the first current from the reference current Iref, and inputs the voltage into the first error amplifier Gm1. The first error amplifier Gm1 outputs the corresponding first voltage to the first P-type transistor PM1, so that the first P-type transistor PM1 outputs a second current according to the first voltage. The second current forms a voltage drop (i.e., a third voltage) at the fourth resistor R4, and is input to the second error amplifier Gm2. The second error amplifier Gm2 outputs a fifth voltage to the first N-type transistor NM1 according to the difference between the third voltage and the reference voltage Vref, so that the first N-type transistor NM1 outputs a fourth current to the second output terminal VOUT2 according to the fifth voltage.

[0065] Then, the external circuit can adjust the output current accordingly by obtaining the fourth current, thereby completing the control process of the output current. For example, in one embodiment, the external circuit also includes an optical coupler. After the fourth current passes through the optical coupler, the optical coupler outputs a corresponding feedback signal to the AC-DC conversion module, so that the AC-DC conversion module adjusts the output current according to the feedback signal.

[0066] On the other hand, the third resistor R3 and the fourth resistor R4 are used to divide the output voltage to obtain a divided voltage (i.e., a second voltage) on the fourth resistor R4. The second error amplifier Gm2 outputs a fourth voltage to the first N-type transistor NM1 according to the difference between the second voltage and the reference voltage Vref, so that the first N-type transistor NM1 outputs a third current to the second output terminal VOUT2 according to the fourth voltage.

[0067] Then, the external circuit can adjust the output voltage accordingly by obtaining the third current, thereby completing the control process of the output voltage. For example, in one embodiment, the external circuit also includes an optical coupler. After the third current passes through the optical coupler, the optical coupler outputs a corresponding feedback signal to the AC-DC conversion module, so that the AC-DC conversion module adjusts the output voltage according to the feedback signal.

[0068] It can be seen that in the embodiment of the present application, only two pins connected to the external circuit are required (including the first output terminal VOUT1 and the second output terminal VOUT2), which is lower in cost than the related art which requires three pins connected to the external circuit.

[0069] In addition, for the present application, only one compensation module connected to the first output terminal VOUT needs to be provided externally. In the related art, two compensation modules need to be provided externally. Compared with the related art, the present application can also reduce the number of external compensation modules, which is conducive to further reducing costs.

[0070] In another embodiment, when the voltage and current control circuit 10 is used to connect to an external circuit of a DC-DC conversion module, the switch state of each switch (including the first switch T1, the second switch T2, the third switch T3, the fourth switch T4 and the fifth switch T5) should be as follows: Figure 3 As shown, the first switch T1, the second switch T2 and the fourth switch T4 are all closed, and the third switch T3 and the fifth switch T5 are all open.

[0071] In this embodiment, the specific process of the first N-type transistor NM1 obtaining the third current and the fourth current is the same as that in the above embodiment, which is within the scope that can be easily understood by those skilled in the art and will not be described in detail here.

[0072] Furthermore, the current (including the third current and the fourth current) output by the first N-type transistor NM1 is transmitted to the first output terminal VOUT1 through the first switch T1 , the second P-type transistor PM2 , the third P-type transistor PM3 and the second switch T2 .

[0073] Thus, the external circuit can obtain the third current and the fourth current through the first output terminal VOUT1, and can adjust the output current and the output voltage accordingly, that is, the control process of the output current and the output voltage is completed. For example, in one embodiment, the external circuit also includes a voltage divider branch, and the voltage obtained after the third current and the fourth current are injected into the voltage divider branch is used as a feedback signal, and the feedback signal is input to the DC-DC conversion module, so that the AC-DC conversion module adjusts the output current and the output voltage according to the feedback signal.

[0074] It can be seen that the voltage and current control circuit provided in the embodiment of the present application is compatible with both the external circuit including the AC-DC conversion module and the external circuit including the DC-DC conversion module. In the related art, it is usually only applicable to the external circuit including the AC-DC conversion module. Compared with the solutions in the related art, the voltage and current control circuit provided in the present application can be applied to more application scenarios and has strong practicality.

[0075] The present application also provides an integrated chip, which includes the voltage and current control circuit in any of the above embodiments.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Under the concept of the present application, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other changes in different aspects of the present application as described above, which are not provided in detail for the sake of simplicity. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments can still be modified, or some of the technical features can be replaced by equivalents. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A voltage and current control circuit, characterized in that: include: A first output terminal, a second output terminal, a current loop and a voltage loop; The current loop includes a current sampling unit, a first error amplifying unit and a first transconductance unit, and the voltage loop includes a voltage dividing unit, a second error amplifying unit and a second transconductance unit; The current sampling unit is connected to the power line, and the current sampling unit is used to sample the output current to obtain a first current; The first error amplifying unit is connected to the current sampling unit and the reference current respectively, and the first error amplifying unit is used to output a first voltage according to the difference between the first current and the reference current; The first transconductance unit is connected to the first error amplification unit, and the first transconductance unit is also connected to the first output end, the voltage divider unit and the second error amplification unit, and the connection point between the first transconductance unit, the first output end, the voltage divider unit and the second error amplification unit is a first node, and the first transconductance unit is used to output a second current to the first node according to the first voltage; The voltage dividing unit is connected to the power line, and is used to divide the input voltage to output a second voltage, and is used to output a third voltage according to the second current; The second error amplifying unit is connected to the voltage dividing unit and the reference voltage respectively, and is used to output a fourth voltage according to the difference between the second voltage and the reference voltage, and is used to output a fifth voltage according to the difference between the third voltage and the reference voltage; The second transconductance unit is connected to the second error amplification unit and the second output terminal respectively, and the second transconductance unit is used to output a third current to the second output terminal according to the fourth voltage, and to output a fourth current to the second output terminal according to the fifth voltage; The voltage-current control circuit further includes a current mirror unit, a first switch and a second switch, wherein the current mirror unit includes a second P-type transistor, a third P-type transistor and a current source; The first switch is connected to the second transconductance unit and the second P-type transistor respectively, the second P-type transistor is connected to the third P-type transistor, the third P-type transistor is connected to the current source, and the second switch is connected to the third P-type transistor and the first output terminal respectively; When the first switch and the second switch are closed, the current mirror unit is used to transmit the third current to the first output terminal.

2. The voltage and current control circuit according to claim 1, characterized in that: The first error amplification unit includes a first error amplifier, a first resistor, a second resistor and a first capacitor; The non-inverting input terminal of the first error amplifier is grounded, the inverting input terminal of the first error amplifier is respectively connected to the first end of the first resistor and the first end of the first capacitor, the second end of the first resistor is connected to the current sampling unit, the first end of the second resistor and the reference current, the second end of the second resistor is grounded, and the second end of the first capacitor is connected to the output terminal of the first error amplifier and the first transconductance unit.

3. The voltage and current control circuit according to claim 1, characterized in that: The first transconductance unit includes a first P-type transistor; A first end of the first P-type transistor is connected to the first error amplifying unit, a second end of the first P-type transistor is connected to the power line, and a third end of the first P-type transistor is connected to the first node.

4. The voltage and current control circuit according to claim 1, characterized in that: The voltage dividing unit includes a third resistor and a fourth resistor; The third resistor is connected in series with the fourth resistor, a non-series connection point of the third resistor is connected to the power line, a connection point between the third resistor and the fourth resistor is connected to the first output terminal, and a non-series connection point of the fourth resistor is grounded, wherein the connection point between the third resistor and the fourth resistor is the first node.

5. The voltage and current control circuit according to claim 1, characterized in that: The second error amplification unit includes a second error amplifier; A non-inverting input terminal of the second error amplifier is connected to the first node, an inverting input terminal of the second error amplifier is connected to the reference voltage, and an output terminal of the second error amplifier is connected to the second transconductance unit.

6. The voltage and current control circuit according to claim 1, characterized in that: The second transconductance unit includes a first N-type transistor; A first end of the first N-type transistor is connected to the second error amplifying unit, a second end of the first N-type transistor is connected to the second output end, and a third end of the first N-type transistor is grounded.

7. The voltage and current control circuit according to claim 6, characterized in that: The voltage and current control circuit further includes a third switch and a fourth switch; The third switch is connected to the second output terminal and the second transconductance unit respectively, and the fourth switch is connected to the second error amplification unit, the second transconductance unit, the third switch and the second output terminal respectively; When the first switch, the second switch, and the fourth switch are all opened and the third switch is closed, the third current is transmitted to the second output terminal.

8. The voltage and current control circuit according to claim 1, characterized in that: The voltage and current control circuit further includes a fifth switch; The fifth switch is connected to the first output terminal and the first transconductance unit respectively; When the fifth switch is closed, the second current is transmitted to the first node.

9. An integrated chip, characterized in that: Comprising the voltage and current control circuit as described in any one of claims 1-8.

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