Surge limiting and soft start delay protection circuit, method and lithium battery charger

By designing surge restriction and soft start delay protection circuits, the problems of high-power charging and surge current limiting when multiple lithium battery chargers are used simultaneously are solved, and a safe and reliable charging process is achieved.

CN114243645BActive Publication Date: 2025-03-25SHENZHEN CLICK TECH +5
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Patent Information

Application Number
CN202111328994.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-10
Publication Date
2025-03-25
Estimated Expiration
2041-11-10

AI Technical Summary

Technical Problem

When existing lithium battery chargers are used simultaneously in multiple chargers, it is difficult to meet the high-power charging needs, and the mains protection switch limits the inrush current by too tightly, resulting in too large current at the start of the charger, which may damage the power device.

Method used

A surge restriction and soft start delay protection circuit is designed. Through NTC and relay circuits and DC/DC delay circuits, slow charging of large capacitors and delay starting of main power circuits are achieved to avoid the problem of excessive surge current and current.

Benefits of technology

It effectively reduces the input surge current, avoids excessive current when the charger starts up, protects power devices, and meets the needs of high-power charging.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention proposes a surge limiting and soft start delay protection circuit, method and lithium battery charger, the circuit includes a voltage input terminal, an EMC circuit, an NTC and a relay circuit, a rectifier circuit, a PFC power circuit, a large capacitor, an LLC power circuit, an output load, a PFC control circuit, a DC / DC delay circuit, an LLCVCC control circuit, an LLC chip control circuit and an LLC feedback circuit, the NTC and the relay circuit, the DC / DC delay circuit, the LLCVCC control circuit, the LLC chip control circuit and the LLC feedback circuit are connected in sequence, the LLC chip control circuit is connected to the LLC power circuit, and the LLC feedback circuit is connected to the output load. The present invention turns on the rear end main power circuit after the front end voltage is stable, so as to avoid the capacitor voltage rising continuously when the charger is started, causing the rear end main power circuit to have an excessive current at the moment of startup, thereby damaging the power device.
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Description

Technical Field

[0001] The present invention relates to the field of battery charging, in particular to a surge limiting and soft start delay protection circuit, method and lithium battery charger. Background Art

[0002] In recent years, with the rise of artificial intelligence products, the demand for lithium batteries has also increased sharply, and the demand for lithium battery chargers has also increased. Lithium batteries have a wide voltage and power range. The voltage of each cell can range from 1V to 4.2V. The voltage range of a 20-series and 10-parallel battery pack can be 20V-84V, and the power range can be 500W-2000W, with ultra-wide output voltage and ultra-high output power. The application of lithium batteries also requires that multiple chargers be used simultaneously in the same power supply space. Traditional chargers of dozens of watts are difficult to meet its requirements. Because of the need for fast charging, high-power chargers are required to have a relatively large charging current. When multiple chargers are used at the same time, the surge current limit of the AC protection switch will also impose strict requirements on the surge current of the charger. Summary of the invention

[0003] In order to improve the stringent requirements for surge current in the prior art, the present invention proposes a surge limiting and soft start delay protection circuit, method and lithium battery charger.

[0004] To this end, the surge limiting and soft start delay protection circuit proposed in the present invention specifically includes a voltage input end, an EMC circuit, an NTC and a relay circuit, a rectifier circuit, a PFC power circuit, a large capacitor, an LLC power circuit, an output load, a PFC control circuit, a DC / DC delay circuit, an LLC VCC control circuit, an LLC chip control circuit and an LLC feedback circuit, wherein the voltage input end, the EMC circuit, the NTC and the relay circuit, the rectifier circuit, the PFC power circuit, the large capacitor, the LLC power circuit and the output load are connected in sequence, the NTC and the relay circuit are connected to the PFC power circuit through the PFC control circuit, the NTC and the relay circuit, the PFC control circuit, the DC / DC delay circuit, the LLC VCC control circuit, the LLC chip control circuit and the LLC feedback circuit are connected in sequence, and the NTC and the relay circuit are connected to the LLC VCC control circuit, the LLC chip control circuit is connected to the LLC power circuit, and the LLC feedback circuit is connected to the output load; the DC / DC delay circuit specifically includes an operational amplifier U102A, a diode D110, a diode D111 and a diode D112, a resistor R064, a resistor R065, a resistor R066, a resistor R067, a resistor R068, and a capacitor C128; the diode D110 and the resistor R066 are connected in parallel, the cathode of the diode D110 and one end of the resistor R066 are connected to the P_VBOK port in the PFC control circuit, and the anode of the diode D110 and the resistor R The other end of the resistor R066 is connected to one end of the capacitor C128 and the positive input terminal of the operational amplifier U102A, the other end of the capacitor C128 is grounded, the resistor R067, the resistor R065 and the resistor R068 are connected in series between the reference voltage VREF and the ground, the connection between the resistor R065 and the resistor R068 is connected to the negative input terminal of the operational amplifier U102A, the resistor R064 and the diode D111 are connected in series between the positive input terminal and the output terminal of the operational amplifier U102A, the cathode of the diode D112 is connected to the output terminal of the operational amplifier U102A, and the anode of the diode D112 is connected to the LLC The collector of the transistor Q109 in the VCC control circuit; the LLC VCC control circuit specifically includes resistors R057, R058, R059, R060, R061, R062, R063, transistors Q109, Q110, capacitors C126, C127, and optocoupler PC102;One end of the resistor R059 receives the DELAY signal, the other end of the resistor R059 is connected to the base of the transistor Q109, the resistor R060 is connected between the base and emitter of the transistor Q109, the resistor R057, the resistor R061 and the capacitor C127 are connected in series between the power supply VCC1 and the ground, the connection between the resistor R057 and the resistor R061 is connected to the collector of the transistor Q109, the connection between the resistor R061 and the capacitor C127 is connected to the base of the transistor Q110, the resistor R062 and the capacitor C127 are connected in parallel between the base and emitter of the transistor Q110 The emitter of the transistor Q110 is grounded, the resistor R058 and the resistor R063 are connected in series between the power supply VCC1 and the collector of the transistor Q110, the resistor R063 is connected in parallel with the diode of the optical coupler PC102, the capacitor C126 is connected between the power supply VCC1 and the ground, and the output side of the optical coupler PC102 is connected to the base of the transistor Q205 in the LLC chip control circuit; the LLC chip control circuit specifically includes a pulse frequency modulation controller U104, a resistor R079, a transistor Q205, a transistor Q111, a transistor Q112, a transistor Q113, a transistor transistor Q114, capacitor C213, capacitor C214, capacitor C140, voltage regulator ZD201, electrolytic capacitor EC208; the capacitor C213 and the capacitor C214 are connected in parallel between the GND terminal and the VDD terminal of the pulse frequency modulation controller U104, the VDD terminal of the pulse frequency modulation controller U104 is connected to the emitter of the transistor Q205, the base of the transistor Q205 is connected to the cathode of the voltage regulator ZD201, the anode of the voltage regulator is grounded, the electrolytic capacitor EC208 is connected between the emitter of the transistor Q205 and the ground, the resistor R079 and the capacitor C140 are connected in series In parallel with the electrolytic capacitor EC208, the connection between the resistor R079 and the capacitor C140 is respectively connected to the collector of the transistor Q111 and the collector of the transistor Q113, the transistor Q111 and the transistor Q112 form a push-pull circuit 1, the transistor Q113 and the transistor Q114 form a push-pull circuit 2, the PROUT1 end and the PROUT2 end of the pulse frequency modulation controller U104 are respectively connected to the input end of the push-pull circuit 1 and the input end of the push-pull circuit 2, and the output end of the push-pull circuit 1 and the output end of the push-pull circuit 2 are connected to the input end of the LLC power circuit. ;

[0005] Furthermore, the NTC and relay circuit specifically includes resistors R027, R028 and R029, capacitor C113, diode D101, relay module RY101, transistor Q107, and thermistor NTC101.

[0006] Furthermore, the resistor R028 and the capacitor C113 are connected in parallel between the base and the emitter of the transistor Q107, one end of the resistor R029 is connected to the P_VBOK port in the PFC control circuit, the other end of the resistor R029 is connected to the base of the transistor Q107, the collector of the transistor Q107 outputs a DELAY signal, both ends of the relay coil of the relay module RY101 are connected in parallel with the diode D101, and both ends of the relay switch of the relay module RY101 are connected in parallel with the thermistor NTC101.

[0007] Furthermore, the PFC control circuit 109 includes a control chip U101.

[0008] The surge limiting and soft start delay method proposed in the present invention adopts the above-mentioned surge limiting and soft start delay protection circuit, and comprises the following steps:

[0009] S1: When AC mains power is input, the large capacitor is slowly charged through the thermistor NTC101 in the NTC and relay circuit, thereby reducing the input surge current;

[0010] S2: After the large capacitor voltage rises, the PFC power circuit works;

[0011] S3: When the voltage of the large capacitor is stable, the NTC and relay module RY101 in the relay circuit are turned on through the P_VBOK control port of the control chip U101 in the PFC control circuit. The P_VBOK port also delays the opening of the rear-end main power circuit through the DC / DC delay circuit, thereby ensuring that the front-end voltage is stable before opening the rear-end main power circuit, which plays the role of soft start delay protection.

[0012] Further, in step S3, when the voltage is stable, the voltage of the large capacitor reaches 390V.

[0013] The lithium battery charger proposed by the present invention includes the above-mentioned surge limiting and soft start delay protection circuit.

[0014] Furthermore, the output range of the lithium battery charger is 20V-90V / 12A, with an output power of 1KW.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] 1) It can be realized by simply adding relays and common operational amplifier circuits to the existing circuit, and the design is relatively simple;

[0017] 2) Turn on the main power circuit at the back end after the front-end voltage is stable, to avoid the situation where the capacitor voltage is still in the boosting stage when the charger is started, causing the main power circuit at the back end to have excessive current at the moment of startup, thus damaging the power devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 1 is a schematic diagram of the structure of a surge limiting and soft start delay protection circuit according to an embodiment of the present invention;

[0019] Figure 2 1 is a schematic diagram of the structure of the NTC and relay circuit according to an embodiment of the present invention;

[0020] Figure 3a is a schematic structural diagram of a PFC control circuit according to an embodiment of the present invention;

[0021] Figure 3b It is a structural schematic diagram of a driving current amplifying circuit of a switch MOS tube Q103 in a PFC control circuit according to an embodiment of the present invention;

[0022] Figure 3c It is a structural schematic diagram of a driving current amplifying circuit of a switch MOS tube Q106 in a PFC control circuit according to an embodiment of the present invention;

[0023] Figure 4a is a schematic structural diagram of a PFC power circuit according to an embodiment of the present invention;

[0024] Figure 4b It is a structural schematic diagram of a check resistor circuit for overvoltage protection in a PFC power circuit according to an embodiment of the present invention;

[0025] Figure 4c It is a structural schematic diagram of a PFC voltage control check resistor circuit in a PFC power circuit according to an embodiment of the present invention;

[0026] Figure 5 is a schematic diagram of the structure of a DC / DC delay circuit according to an embodiment of the present invention;

[0027] Figure 6 is a schematic diagram of the structure of an LLC VCC control circuit according to an embodiment of the present invention;

[0028] Figure 7 is a schematic diagram of the structure of the LLC chip control circuit according to an embodiment of the present invention;

[0029] Figure 8 is a schematic structural diagram of an LLC power circuit according to an embodiment of the present invention;

[0030] Fig. 9 It is a flow chart of a surge limiting and soft start delay protection method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0031] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described with reference to the accompanying drawings.

[0032] The present invention proposes a surge limiting and soft start delay protection circuit, such as Figure 1 As shown, the surge limiting and soft start delay protection circuit specifically includes a voltage input terminal 101, an EMC circuit 102, an NTC and relay circuit 103, a rectifier circuit 104, a PFC power circuit 105, a large capacitor 106, an LLC power circuit 107, an output load 108, a PFC control circuit 109, a DC / DC delay circuit 110, an LLC VCC control circuit 111, an LLC chip control circuit 112 and an LLC feedback circuit 113. The voltage input terminal 101, the EMC circuit 102, the NTC and relay circuit 103, the rectifier circuit 104, the PFC power circuit 105, the large capacitor 106, the LLC power circuit 107 and the output load 108 are connected in sequence, the NTC and relay circuit 103 are connected to the PFC power circuit 105 through the PFC control circuit 109, the NTC and relay circuit 103, the PFC control circuit 109, the DC / DC delay circuit 110, the LLC VCC control circuit 111, the LLC chip control circuit 112 and the LLC feedback circuit 113. The VCC control circuit 111 , the LLC chip control circuit 112 and the LLC feedback circuit 113 are connected in sequence, the NTC and relay circuit 103 are connected to the LLC VCC control circuit 111 , the LLC chip control circuit 112 is connected to the LLC power circuit 107 , and the LLC feedback circuit 113 is connected to the output load 108 .

[0033] like Figure 2 As shown, the NTC and relay circuit 103 specifically includes resistors R027, R028 and R029, a capacitor C113, a diode D101, a relay module RY101, a transistor Q107, and a thermistor NTC101. The resistor R028 and the capacitor C113 are connected in parallel between the base and the emitter of the transistor Q107. One end of the resistor R029 is connected to the P_VBOK port of the control chip U101 in the PFC control circuit, and the other end of the resistor R029 is connected to the base of the transistor Q107. The collector outputs a DELAY signal, both ends of the relay coil of the relay module RY101 are connected in parallel with the diode D101, both ends of the relay switch of the relay module RY101 are connected in parallel with the thermistor 101, the size of the resistor R027 is preferably 100 ohms, the size of the resistor R028 is preferably 5.1K, the size of the resistor R029 is preferably 10K, the diode is preferably 1N4148W-7-F, the relay module RY101 is preferably 215HT-1AH-FV, and the transistor Q107 is preferably 2SD1882.

[0034] like Figure 3a ,3b As shown in 3c, the PFC control circuit 109 includes a control chip U101, and the control chip U101 is preferably ICE3PCS01G.

[0035] like Figure 4a , 4b As shown in FIG. 4c , the PFC power circuit 105 may adopt the circuit structure of the PFC power circuit in the prior art.

[0036] like Figure 5 As shown, the DC / DC delay circuit 110 specifically includes an operational amplifier U102A, diodes D110, D111 and D112, resistors R064, R065, R066, R067 and R068, and capacitors C128 and C167. The diode D110 and the resistor R066 are connected in parallel, the cathode of the diode D110 and one end of the resistor R066 are connected to the P_VBOK port of the control chip U101 in the PFC control circuit, and the anode of the diode D110 and the other end of the resistor R066 are connected to one end of the capacitor C128. The other end of the capacitor C128 is grounded, the resistors R067, R065 and R068 are connected in series between the reference voltage VREF and the ground, the connection between the resistors R065 and R068 is connected to the negative input terminal of the operational amplifier U102A, the resistor R064 and the diode D111 are connected in series between the positive input terminal and the output terminal of the operational amplifier U102A, the cathode of the diode D112 is connected to the output terminal of the operational amplifier U102A, and the anode of the diode D112 is connected to the LLC The collector of the transistor Q109 in the VCC control circuit; the operational amplifier is preferably LMV358, the diode is preferably 1N4148, the size of the resistor R064 is preferably 200K, the size of the resistor R065 is preferably 10K, the size of the resistor R066 is preferably 200K, the size of the resistor R067 is preferably 10Ω, the size of the resistor R068 is preferably 20K, the size of the capacitor C128 is preferably 0.47 microfarads, and the size of the capacitor C167 is preferably 0.22 microfarads.

[0037] like Figure 6Shown, LLC The VCC control circuit 111 specifically includes resistors R057, R058, R059, R060, R061, R062, and R063, transistors Q109 and Q110, capacitors C126 and C127, and an optical coupler PC102. One end of the resistor R059 receives a DELAY signal, and the other end of the resistor R059 is connected to the base of the transistor Q109. The resistor R060 is connected between the base and the emitter of the transistor Q109. The resistor R057, the resistor R061, and the capacitor C127 are connected in series between the power supply VCC1 and the ground. The connection between the resistor R057 and the resistor R061 is connected to the collector of the transistor Q109. The connection between the resistor R061 and the capacitor C127 is connected to the base of the transistor Q110. The resistor R062 and the capacitor C127 are connected in parallel to the base of the transistor Q110. The base and emitter of the transistor Q110 are connected in series, the emitter of the transistor Q110 is grounded, the resistor R058 and the resistor R063 are connected in series between the power supply VCC1 and the collector of the transistor Q110, the resistor R063 is connected in parallel with the diode of the optocoupler PC102, the capacitor C126 is connected between the power supply VCC1 and the ground, and the output side of the optocoupler PC102 is connected to the base of the transistor Q205 in the LLC chip control circuit; the size of the resistor R057 is preferably 10K, the size of the resistor R059 is preferably 20K, the sizes of the resistors R058, R060, R061 and R062 are preferably 5.1K, the size of the resistor R063 is preferably 2K, the transistor is specifically selected from MMBT4401, the size of the capacitor C126 is preferably 1 microfarad, the size of the capacitor C127 is preferably 220 nanofarad, and the optocoupler PC102A is specifically selected from CT1019-W.

[0038] like Figure 7As shown, the LLC chip control circuit 112 includes a pulse frequency modulation controller U104, a resistor R079, a transistor Q205, a transistor Q111, a transistor Q112, a transistor Q113, a transistor Q114, a capacitor C213, a capacitor C214, a capacitor C140, a voltage regulator ZD201, and an electrolytic capacitor EC208; the capacitor C213 and the capacitor C214 are connected in parallel between the GND terminal and the VDD terminal of the pulse frequency modulation controller U104, the VDD terminal of the pulse frequency modulation controller U104 is connected to the emitter of the transistor Q205, the base of the transistor Q205 is connected to the cathode of the voltage regulator ZD201, the anode of the voltage regulator is grounded, and the electrolytic capacitor EC208 is connected to the VDD terminal of the pulse frequency modulation controller U104. Between the emitter of transistor Q205 and the ground, the resistor R079 and the capacitor C140 are connected in series and then connected in parallel with the electrolytic capacitor EC208. The connection between the resistor R079 and the capacitor C140 is respectively connected to the collector of the transistor Q111 and the collector of the transistor Q113. The transistors Q111 and Q112 form a push-pull circuit 1, and the transistors Q113 and Q114 form a push-pull circuit 2. The PROUT1 and PROUT2 terminals of the pulse frequency modulation controller U104 are respectively connected to the input terminal of the push-pull circuit 1 and the input terminal of the push-pull circuit 2. The output terminal of the push-pull circuit 1 and the output terminal of the push-pull circuit 2 are connected to the input terminal of the LLC power circuit. The pulse frequency modulation controller U104 specifically uses FAN7688SJX.

[0039] like Figure 8 As shown, the LLC power circuit 107 may adopt the circuit structure of the LLC power circuit in the prior art.

[0040] like Fig. 9 As shown, the specific working process of the surge limiting and soft start delay protection circuit is that when AC mains is input, the large capacitor is slowly charged through the thermistor NTC101 in the NTC and relay circuit 103, which greatly reduces the input surge current. After the capacitor voltage rises, the PFC power circuit works. After the voltage of the large capacitor reaches 390V, the relay module RY101 in the NTC and relay circuit 103 is opened through the PFC voltage normal signal control port (for example: P_VBOK port) of the control chip U101 in the PFC control circuit. The PFC voltage normal signal control port (for example: P_VBOK port) delays the opening of the rear-end main power circuit through the DC / DC delay circuit at the same time, ensuring that the front-end voltage is stable before opening the rear-end main power circuit, which plays the role of soft start delay protection, and avoids that when the charger is started, the voltage of the large capacitor is still in the boost stage, causing the rear-end main power circuit to have an excessive current when it is turned on, thereby damaging the power device.

[0041] The present invention provides a lithium battery charger, which adopts the above-mentioned surge limiting and soft start delay protection circuit, has an output range of 20V-90V / 12A, has an output power of 1KW, and the entire circuit works reliably and normally.

[0042] The above disclosure is only the preferred embodiment of the present invention, and certainly cannot be used to limit the scope of the present invention. It should be pointed out that for those skilled in the art, any equivalent changes made to the scheme of the present invention without departing from the design structure and principle of the present invention are considered to be within the protection scope of the present invention.

Claims

1. A surge limiting and soft start delay protection circuit, characterized in that: Specifically includes a voltage input end, an EMC circuit, an NTC and a relay circuit, a rectifier circuit, a PFC power circuit, a large capacitor, an LLC power circuit, an output load, a PFC control circuit, a DC / DC delay circuit, an LLC VCC control circuit, an LLC chip control circuit and an LLC feedback circuit, wherein the voltage input end, the EMC circuit, the NTC and the relay circuit, the rectifier circuit, the PFC power circuit, the large capacitor, the LLC power circuit and the output load are connected in sequence, the NTC and the relay circuit are connected to the PFC power circuit through the PFC control circuit, the NTC and the relay circuit, the PFC control circuit, the DC / DC delay circuit, the LLC VCC control circuit, the LLC chip control circuit and the LLC feedback circuit are connected in sequence, the NTC and the relay circuit are connected to the LLC VCC control circuit, the LLC chip control circuit is connected to the LLC power circuit, and the LLC feedback circuit is connected to the output load; The DC / DC delay circuit specifically includes an operational amplifier U102A, a diode D110, a diode D111 and a diode D112, a resistor R064, a resistor R065, a resistor R066, a resistor R067, a resistor R068, and a capacitor C128; The diode D110 and the resistor R066 are connected in parallel, the cathode of the diode D110 and one end of the resistor R066 are connected to the P_VBOK port in the PFC control circuit, the anode of the diode D110 and the other end of the resistor R066 are connected to one end of the capacitor C128 and the positive input end of the operational amplifier U102A, the other end of the capacitor C128 is grounded, the resistor R067, the resistor R065 and the resistor R068 are connected in series between the reference voltage VREF and the ground, the connection between the resistor R065 and the resistor R068 is connected to the negative input end of the operational amplifier U102A, the resistor R064 and the diode D111 are connected in series between the positive input end and the output end of the operational amplifier U102A, the cathode of the diode D112 is connected to the output end of the operational amplifier U102A, and the anode of the diode D112 is connected to the collector of the transistor Q109 in the LLC VCC control circuit; The LLC VCC control circuit specifically includes a resistor R057, a resistor R058, a resistor R059, a resistor R060, a resistor R061, a resistor R062, a resistor R063, a transistor Q109, a transistor Q110, a capacitor C126, a capacitor C127, and an optical coupler PC102; One end of the resistor R059 receives the DELAY signal, the other end of the resistor R059 is connected to the base of the transistor Q109, the resistor R060 is connected between the base and the emitter of the transistor Q109, the resistor R057, the resistor R061 and the capacitor C127 are connected in series between the power supply VCC1 and the ground, the connection between the resistor R057 and the resistor R061 is connected to the collector of the transistor Q109, the connection between the resistor R061 and the capacitor C127 is connected to the base of the transistor Q110, and the base of the transistor Q111 is connected to the emitter of the transistor Q110. The resistor R062 and the capacitor C127 are connected in parallel between the base and the emitter of the transistor Q110, the emitter of the transistor Q110 is grounded, the resistor R058 and the resistor R063 are connected in series between the power supply VCC1 and the collector of the transistor Q110, the resistor R063 is connected in parallel with the diode of the optical coupler PC102, the capacitor C126 is connected between the power supply VCC1 and the ground, and the output side of the optical coupler PC102 is connected to the base of the transistor Q205 in the LLC chip control circuit; The LLC chip control circuit specifically includes a pulse frequency modulation controller U104, a resistor R079, a transistor Q205, a transistor Q111, a transistor Q112, a transistor Q113, a transistor Q114, a capacitor C213, a capacitor C214, a capacitor C140, a voltage regulator ZD201, and an electrolytic capacitor EC208; The capacitor C213 and the capacitor C214 are connected in parallel between the GND terminal and the VDD terminal of the pulse frequency modulation controller U104. The VDD terminal of the pulse frequency modulation controller U104 is connected to the emitter of the transistor Q205. The base of the transistor Q205 is connected to the cathode of the voltage regulator ZD201. The anode of the voltage regulator is grounded. The electrolytic capacitor EC208 is connected between the emitter of the transistor Q205 and the ground. The resistor R079 and the capacitor C140 are connected in series and then connected in parallel with the electrolytic capacitor EC208. The resistor R079 The connection point with the capacitor C140 is respectively connected to the collector of the transistor Q111 and the collector of the transistor Q113, the transistor Q111 and the transistor Q112 constitute a push-pull circuit 1, the transistor Q113 and the transistor Q114 constitute a push-pull circuit 2, the PROUT1 end and the PROUT2 end of the pulse frequency modulation controller U104 are respectively connected to the input end of the push-pull circuit 1 and the input end of the push-pull circuit 2, and the output end of the push-pull circuit 1 and the output end of the push-pull circuit 2 are connected to the input end of the LLC power circuit.

2. The surge limiting and soft start delay protection circuit according to claim 1, characterized in that: The NTC and relay circuit specifically includes resistors R027, R028 and R029, capacitor C113, diode D101, relay module RY101, transistor Q107, and thermistor NTC101.

3. The surge limiting and soft start delay protection circuit according to claim 2, characterized in that: The resistor R028 and the capacitor C113 are connected in parallel between the base and the emitter of the transistor Q107, one end of the resistor R029 is connected to the P_VBOK port in the PFC control circuit, the other end of the resistor R029 is connected to the base of the transistor Q107, the collector of the transistor Q107 outputs a DELAY signal, the two ends of the relay coil of the relay module RY101 are connected in parallel with the diode D101, and the two ends of the relay switch of the relay module RY101 are connected in parallel with the thermistor NTC101.

4. The surge limiting and soft start delay protection circuit according to claim 1, characterized in that: The PFC control circuit includes a control chip U101.

5. A surge limiting and soft start delay method, using the surge limiting and soft start delay protection circuit as described in any one of claims 1 to 4, characterized in that: The steps include: S1: When AC mains power is input, the large capacitor is slowly charged through the thermistor NTC101 in the NTC and relay circuit, thereby reducing the input surge current; S2: After the large capacitor voltage rises, the PFC power circuit works; S3: When the voltage of the large capacitor is stable, the NTC and the relay module RY101 in the relay circuit are turned on through the P_VBOK port of the control chip U101 in the PFC control circuit. The P_VBOK port simultaneously delays the opening of the rear-end main power circuit through the DC / DC delay circuit, thereby ensuring that the front-end voltage is stable before opening the rear-end main power circuit, which plays a role in soft start delay protection.

6. The surge limiting and soft start delay method according to claim 5, characterized in that: In step S3, when the voltage is stable, the voltage of the large capacitor reaches 390V.

7. A lithium battery charger, characterized in that: It comprises a surge limiting and soft start delay protection circuit as claimed in any one of claims 1 to 4.

8. The lithium battery charger according to claim 7, characterized in that: The output range of the lithium battery charger is 20V-90V / 12A, with an output power of 1KW.

Citation Information

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