Circuit arrangement and oscillator

Abstract

Circuit device and oscillator. It is possible to suppress a temperature sensor circuit from becoming a noise source and degrade signal characteristics of an oscillation signal of an oscillation circuit. The circuit device includes an oscillation circuit that causes an oscillator to oscillate and generates an oscillation signal, a temperature sensor circuit that intermittently operates, a logic circuit that performs a temperature compensation process based on an output of the temperature sensor circuit, and a power supply circuit that supplies power to the oscillation circuit. Furthermore, the logic circuit or the power supply circuit is disposed between the oscillation circuit and the temperature sensor circuit.

Description

Technical Field

[0001] This invention relates to circuit devices and oscillators, etc. Background Technology

[0002] Conventional circuit devices having an oscillation circuit for oscillating an oscillator such as a quartz oscillator are known. Patent Document 1 discloses a layout configuration of a circuit device having a temperature-compensated oscillation circuit. In Patent Document 1, circuit blocks with analog circuits as structural elements and circuit blocks with digital circuits as structural elements are arranged separately, so that the wiring for the electrical connection between the analog circuit and the oscillator does not overlap with the blocks of digital circuits.

[0003] Patent Document 1: Japanese Patent Application Publication No. 2015-90973

[0004] Temperature sensor circuits are used in the temperature compensation process for the oscillation frequency of an oscillating circuit. Furthermore, the temperature compensation process targets the oscillation frequency of the oscillator. Therefore, to more accurately measure the temperature of the oscillator, the temperature sensor circuit is typically placed near the oscillating circuit, which is electrically connected to the oscillator. This is because heat from the oscillator is transferred to the oscillating circuit via metal terminals or wiring.

[0005] On the other hand, in circuit devices with temperature-compensated oscillating circuits, to achieve low power consumption, the temperature sensor circuit can be made to operate intermittently. However, when the temperature sensor circuit operates intermittently in this way, the current consumed by the temperature sensor circuit varies in an AC manner. Therefore, it is known that when such a temperature sensor circuit is close to the oscillating circuit, the temperature sensor circuit may become a noise source and degrade the signal characteristics of the oscillation signal of the oscillating circuit. Summary of the Invention

[0006] One aspect of this disclosure relates to a circuit device comprising: an oscillation circuit that causes an oscillator to oscillate to generate an oscillation signal; a temperature sensor circuit that operates intermittently; a logic circuit that performs temperature compensation processing based on the output of the temperature sensor circuit; and a power supply circuit that supplies power to the oscillation circuit, wherein the logic circuit or the power supply circuit is disposed between the oscillation circuit and the temperature sensor circuit.

[0007] Furthermore, one aspect of this disclosure relates to an oscillator comprising: the circuit arrangement described above; and the oscillator. Attached Figure Description

[0008] Figure 1 This is a structural example of the circuit device in this embodiment.

[0009] Figure 2 This is an example of the layout configuration of the circuit device in this embodiment.

[0010] Figure 3 This is an example of the layout configuration of the circuit device in this embodiment.

[0011] Figure 4 This is an example of the structure of an oscillating circuit.

[0012] Figure 5 This is an example of the structure of a temperature sensor circuit.

[0013] Figure 6 This is a diagram illustrating the operation of a temperature sensor circuit.

[0014] Figure 7 This is an example of the frequency deviation of a clock signal or output pulse signal from temperature.

[0015] Figure 8 This is a detailed structural example of a counter circuit.

[0016] Figure 9 This is a detailed diagram illustrating the operation of the temperature sensor circuit.

[0017] Figure 10 This diagram illustrates the degradation of signal characteristics of oscillating signals caused by intermittent operation.

[0018] Figure 11 This is a structural example of a ring oscillator.

[0019] Figure 12 This is an example of the structure of a regulator.

[0020] Figure 13 This is an example of the structure of a current setting circuit.

[0021] Figure 14 This is an example of the wiring of power lines and grounding lines in a circuit device.

[0022] Figure 15 This is another example of the layout configuration of the circuit device in this embodiment.

[0023] Figure 16 This is another example of the layout configuration of the circuit device in this embodiment.

[0024] Figure 17 This is another example of the layout configuration of the circuit device in this embodiment.

[0025] Figure 18 This is a side view of the oscillator in the first construction example.

[0026] Figure 19 This is a top view of the oscillator in the first construction example.

[0027] Figure 20 This is a bottom view of the oscillator in the first construction example.

[0028] Figure 21 This is a side view of the oscillator in the second construction example.

[0029] Figure 22 This is a top view of the oscillator in the second construction example.

[0030] Figure 23 This is a bottom view of the oscillator in the second construction example.

[0031] Label Explanation

[0032] 4: Oscillator; 10: Vibrator; 12: Package; 13: First substrate; 14: Second substrate; 15: Third substrate; 16: Base; 17: Cover; 20: Circuit device; 30: Oscillator circuit; 40: Temperature sensor circuit; 42: Ring oscillator; 44: Counter circuit; 46: Regulator; 48: Current setting circuit; 50: Logic circuit; 52: Latch circuit; 54: Temperature compensation circuit; 60: Power supply circuit; 61, 62: Regulator; 70: Output buffer circuit; 80: I / O circuit; CK: Clock signal; CKQ: Output clock signal; CNT1, CNT2: Count value; CT: Counter; CV1, CV2: Variable capacitor circuit; DR1, DR2, DR3, DR4: Direction; DV1, DV2: Inverter circuit; GND: Ground voltage; IVA1~IVA5: Inverter circuit; LG1, LG2A LG2B, LG3: Ground wires; LV1, LV2A, LV2B, LV3: Power lines; OE: Output enable signal; OPB: Operational amplifier; OSC: Oscillation signal; RB1, RB2: Resistors; RCK: Output pulse signal; RG1, RG2, RG3: Circuit area; SD1, SD2, SD3, SD4: Edge; TA1~TA8, TB1~TB8, TC1~TC14: Transistors; TCK: Clock terminal; TECK, TEGND, TEOE, TEVDD: External terminals; TGND: Ground terminal; TOE: Output enable terminal; TSRST: Period; TSENS: Counting period; TSQ: Temperature data; TVDD: Power terminal; TX1, TX2: Terminals; VDD: Power supply voltage; VREG1~VREG3: Adjust power supply voltage; CDC1, CDC2: Connection part. Detailed Implementation

[0033] The following describes this embodiment. It should be noted that the embodiments described below are not intended to unduly limit the scope of the claims. Furthermore, not all structures described in this embodiment are necessarily essential structural elements.

[0034] 1. Circuit device

[0035] Figure 1An example of the structure of the circuit device 20 of this embodiment is shown. The circuit device 20 of this embodiment includes an oscillation circuit 30, a temperature sensor circuit 40, a logic circuit 50, and a power supply circuit 60. Furthermore, the oscillator 4 of this embodiment includes an oscillator 10 and the circuit device 20. The oscillator 10 is electrically connected to the circuit device 20. For example, the oscillator 10 and the circuit device 20 are electrically connected using internal wiring, bonding wires, or metal bumps of a package, wherein the package houses the oscillator 10 and the circuit device 20.

[0036] The oscillator 10 is a component that generates mechanical vibration through an electrical signal. The oscillator 10 can be implemented using a vibrating plate, such as a quartz resonator. For example, the oscillator 10 can be implemented using a tuning fork type quartz resonator, a double tuning fork type quartz resonator, or a quartz resonator that performs thickness shear vibration with an AT cut or SC cut, etc. For example, the oscillator 10 can be an oscillator built into a temperature-compensated quartz oscillator (TCXO) without a thermostat, or an oscillator built into a thermostat-equipped quartz oscillator (OCXO). Furthermore, the oscillator 10 of this embodiment can be implemented using various vibrating plates, such as those other than tuning fork type, double tuning fork type, or thickness shear vibration type, or piezoelectric resonators made of materials other than quartz. For example, the oscillator 10 can also be a SAW (Surface Acoustic Wave) resonator, or a MEMS (Micro Electro Mechanical Systems) oscillator formed using a silicon substrate as a silicon oscillator.

[0037] Circuit device 20 is an integrated circuit device called an IC (Integrated Circuit). For example, circuit device 20 is an IC manufactured using semiconductor processes, which is a semiconductor chip on a semiconductor substrate on which circuit elements are formed. Figure 1 In the circuit device 20, there are an oscillation circuit 30, a temperature sensor circuit 40, a logic circuit 50, a power supply circuit 60, an output buffer circuit 70, and an I / O circuit 80.

[0038] The oscillation circuit 30 is a circuit that causes the oscillator 10 to oscillate. For example, the oscillation circuit 30 is electrically connected to terminals TX1 and TX2, and generates an oscillation signal OSC by causing the oscillator 10 to oscillate. As an example, the oscillation circuit 30 generates an oscillation signal OSC with a frequency of 32 kHz. Terminal TX1 is the first terminal, and terminal TX2 is the second terminal. For example, the oscillation circuit 30 can be implemented using an oscillation drive circuit disposed between terminals TX1 and TX2, and active components such as capacitors or resistors. The drive circuit can be implemented, for example, using a CMOS inverter circuit or a bipolar transistor. The drive circuit is the core circuit of the oscillation circuit 30, and it drives the oscillator 10 with voltage or current, thereby causing the oscillator 10 to oscillate. The oscillation circuit 30 can use various types of oscillation circuits, such as inverter type, Pierce type, Colpitts type, or Hartley type. In addition, the oscillation circuit 30 is provided with a variable capacitor circuit, and the oscillation frequency can be adjusted by adjusting the capacitance of the variable capacitor circuit. The variable capacitor circuit can be implemented, for example, using a capacitor array and a switch array connected to the capacitor array. For example, a variable capacitor circuit includes a first capacitor array having multiple capacitors whose capacitance values ​​are weighted in a binary manner.

[0039] Furthermore, the variable capacitor circuit includes a first switch array with multiple switches, each of which switches connects or disconnects the connection between each capacitor of the first capacitor array and terminal TX1. Alternatively, a first variable capacitor circuit and a second variable capacitor circuit can be provided. The first variable capacitor circuit has a first capacitor array and a first switch array connected to terminal TX1, and the second variable capacitor circuit has a second capacitor array and a second switch array connected to terminal TX2. Additionally, the variable capacitor circuit can be implemented using variable capacitor elements such as varactor diodes. Furthermore, the connection in this embodiment is an electrical connection. An electrical connection is a connection capable of transmitting electrical signals, and is a connection capable of transmitting information using electrical signals. An electrical connection can also be a connection via active components, etc.

[0040] Temperature sensor circuit 40 measures the ambient temperature or other temperatures of oscillator 10 or circuit device 20, and outputs the result as temperature data TSQ. Temperature data TSQ is data that increases or decreases monotonically relative to temperature within the operating temperature range of circuit device 20, for example, as described later. Figure 5 As shown, the temperature sensor circuit 40 is a temperature sensor that utilizes the temperature-dependent characteristic of the oscillation frequency of the ring oscillator 42. Specifically, as... Figure 5As shown, the temperature sensor circuit 40 includes a ring oscillator 42 and a counter circuit 44. During a counting period TSENS defined by a clock signal CK, the counter circuit 44 counts the oscillation signal of the ring oscillator 42, i.e., the output pulse signal RCK, and outputs its count value as temperature data TSQ. The clock signal CK is based on the oscillation signal OSC from the oscillation circuit 30. Furthermore, the temperature sensor circuit 40 is not limited to this; for example, it may also include an analog temperature sensor that outputs a temperature detection voltage utilizing the temperature dependence of the forward voltage of a PN junction, and an A / D conversion circuit that performs A / D conversion on the temperature detection voltage to output temperature data TSQ.

[0041] Furthermore, in this embodiment, the temperature sensor circuit 40 operates intermittently. For example, the temperature sensor circuit 40 operates intermittently as follows: during its operation, it calculates the temperature data TSQ corresponding to the temperature, and then stops after outputting the calculated temperature data TSQ to the logic circuit 50. Details of the intermittent operation will be described later.

[0042] The logic circuit 50 performs temperature compensation processing based on the output of the temperature sensor circuit 40. This temperature compensation processing is performed by the temperature compensation circuit 54 of the logic circuit 50. The temperature compensation processing is, for example, a process that compensates for fluctuations in the oscillation frequency caused by temperature variations. That is, the logic circuit 50 performs temperature compensation processing on the oscillation frequency of the oscillation circuit 30 so that the frequency remains constant even in the presence of temperature variations. Specifically, the logic circuit 50 performs digital temperature compensation processing based on the output of the temperature sensor circuit 40, i.e., the temperature data TSQ. For example, the logic circuit 50 calculates frequency adjustment data based on the temperature data TSQ. Then, it adjusts the capacitance value of the variable capacitor circuit of the oscillation circuit 30 based on the calculated frequency adjustment data, thereby achieving temperature compensation processing on the oscillation frequency of the oscillation circuit 30. For example, the logic circuit 50 has a storage circuit that stores a lookup table representing the correspondence between the temperature data TSQ and the frequency adjustment data. Furthermore, the logic circuit 50 uses this lookup table to perform temperature compensation processing to calculate the frequency adjustment data based on the temperature data TSQ. The storage circuit can be implemented, for example, using a non-volatile memory. Non-volatile memory can be, for example, EEPROM such as FAMOS or MONOS memory, but is not limited to these; it can also be OTP memory or fuse-type ROM. Alternatively, the storage circuit can be implemented using RAM or a register composed of latch circuits, etc. Furthermore, the logic circuit 50 can also perform the operation of converting temperature data TSQ into converted temperature data, and the lookup table can be a table representing the correspondence between the converted temperature data and the frequency adjustment data. The converted temperature data, like the temperature data TSQ, is data that monotonically increases or decreases relative to the temperature; however, the slope of the converted temperature data is obtained by converting the slope of the temperature data TSQ according to the temperature range.

[0043] Furthermore, logic circuit 50 is a control circuit that performs various control processes. For example, logic circuit 50 performs overall control of circuit device 20, or controls the operating sequence of circuit device 20. Additionally, logic circuit 50 can also perform various control processes for oscillation circuit 30, or control temperature sensor circuit 40 or power supply circuit 60. Logic circuit 50 can be implemented, for example, using an ASIC (Application Specific Integrated Circuit) circuit based on automatic configuration routing, such as a gate array.

[0044] The power supply circuit 60 is supplied with a power supply voltage VDD from the power supply terminal TVDD, providing various power supply voltages used in the internal circuitry of the circuit device 20. The power supply circuit 60 can also be considered a reference signal generation circuit, which generates reference signals such as reference voltage or reference current used by the circuit device 20. For example, the power supply circuit 60 supplies power to at least the oscillation circuit 30. Furthermore, the power supply circuit 60 can also supply power to the logic circuit 50. Specifically, in... Figure 1 In this circuit, the power supply circuit 60 includes a regulator 61, which regulates the external power supply voltage, i.e., the power supply voltage VDD, and supplies the regulated power supply voltage VREG1 as the power supply for the oscillation circuit 30. Furthermore, the power supply circuit 60 includes a regulator 62, which regulates the power supply voltage VDD and supplies the regulated power supply voltage VREG2 as the power supply for the logic circuit 50. VDD is, for example, a voltage of 1.5 to 3.6V. VREG1 is, for example, a voltage of 0.9 to 1.1V, and VREG2 is, for example, a voltage of 1.1 to 1.3V. Furthermore, VREG3, described later, is, for example, a voltage of 1.25 to 1.45V.

[0045] Output buffer circuit 70 outputs an output clock signal CKQ based on oscillation signal OSC. For example, output buffer circuit 70 buffers the clock signal CK based on oscillation signal OSC and outputs it as the output clock signal CKQ to clock terminal TCK. Then, the output clock signal CKQ is output to the outside via external terminal TECK of oscillator 4. For example, output buffer circuit 70 outputs the output clock signal CKQ in the form of a single-ended CMOS signal. For example, logic circuit 50 outputs clock signal CK based on the oscillation clock signal, i.e., oscillation signal OSC, from oscillation circuit 30. For example, logic circuit 50 receives the output enable signal OE from output enable terminal TOE via I / O circuit 80. Then, when output enable signal OE is active, logic circuit 50 outputs oscillation signal OSC as clock signal CK. Then, output buffer circuit 70 buffers this clock signal CK and outputs it as output clock signal CKQ. On the other hand, when output enable signal OE is inactive, logic circuit 50 sets the clock signal CK to a fixed voltage level, such as a low level. Thus, the voltage level of clock terminal TCK is set to a fixed voltage level. Furthermore, a valid signal, for example, means a high level in positive logic and a low level in negative logic. Conversely, an invalid signal, for example, means a low level in positive logic and a high level in negative logic. Additionally, the output buffer circuit 70 can also output the output clock signal CKQ in a signal format other than CMOS.

[0046] I / O circuit 80 is a circuit that receives the output enable signal OE from the output enable terminal TOE and outputs it to the logic circuit 50. I / O circuit 80 may include, for example, analog circuits such as circuit devices 20, or test circuits for checking.

[0047] In addition, circuit device 20 includes a power supply terminal TVDD, a ground terminal TGND, and a clock terminal TCK. Furthermore, circuit device 20 includes terminals TX1 and TX2 for oscillator connection and an output enable terminal TOE. These terminals are, for example, the pads of a semiconductor chip, i.e., circuit device 20. For example, in the pad area, a metal layer is exposed from a passivation film that serves as an insulating layer, and this exposed metal layer constitutes the terminal, i.e., the pad, of circuit device 20.

[0048] The power supply terminal TVDD is the terminal to which the power supply voltage VDD is supplied. For example, the power supply voltage VDD from an external power supply device is supplied to the power supply terminal TVDD. The ground terminal TGND is the terminal to which the ground voltage, GND, is supplied. GND can also be called VSS, and the ground voltage is, for example, the ground potential. In this embodiment, ground is appropriately referred to as GND. The clock terminal TCK is the terminal to output the clock signal CKQ, which is generated based on the oscillation signal OSC of the oscillation circuit 30. The output enable terminal TOE is the terminal used to control the enabling and disabling of the output clock signal CKQ. The power supply terminal TVDD, the ground terminal TGND, the clock terminal TCK, and the output enable terminal TOE are electrically connected to the external terminals TEVDD, TEGND, TECK, and TEOE of the oscillator 4, respectively. For example, the electrical connection is made using internal wiring of the package, bonding wires, or metal bumps. Furthermore, the external terminals TEVDD, TEGND, TECK, and TEOE of the oscillator 4 are electrically connected to external devices.

[0049] The first terminal, TX1, is electrically connected to one end of the oscillator 10, and the second terminal, TX2, is electrically connected to the other end of the oscillator 10. For example, the terminals TX1 and TX2 of the oscillator 10 and the circuit device 20 are electrically connected using internal wiring, bonding wires, or metal bumps of the package, which houses the oscillator 10 and the circuit device 20.

[0050] Figure 2 , Figure 3 An example layout of the circuit device 20 in this embodiment is shown. Figure 2 , Figure 3 In the layout configuration example, it is shown Figure 1 The layout and configuration of each circuit in the circuit device 20 are described below. Figure 2 , Figure 3 The image shows a top view of the configuration when viewed from a direction orthogonal to the substrate on which the circuit elements of the circuit device 20 are formed. Additionally, in... Figure 2 , Figure 3 In this context, "ESD" refers to the electrostatic discharge protection circuit, and "TEST" is the test terminal used during the inspection of the circuit device 20.

[0051] The circuit device 20 has sides SD1, SD2, SD3, and SD4. Sides SD1, SD2, SD3, and SD4 are the first side, the second side, the third side, and the fourth side, respectively. Sides SD1, SD2, SD3, and SD4 correspond to the sides of the circuit device 20, i.e., the rectangular semiconductor chip. For example, sides SD1, SD2, SD3, and SD4 are the sides of the substrate of the semiconductor chip. The semiconductor chip is also called a silicon wafer. Side SD2 is the side opposite to side SD1. Side SD3 is the side that intersects with sides SD1 and SD2. Here, the intersection is, for example, orthogonal. Side SD4 is the side opposite to side SD3. Side SD4 intersects with sides SD1 and SD2. Here, the direction from side SD1 towards side SD2 is designated as DR1, and the opposite direction of direction DR1 is designated as DR2. Furthermore, the direction from side SD3 towards side SD4 is designated as DR3, and the opposite direction of direction DR3 is designated as DR4. Directions DR1, DR2, DR3, and DR4 are the first, second, third, and fourth directions, respectively.

[0052] Moreover, such as Figure 1 As described above, the circuit device 20 of this embodiment includes an oscillation circuit 30 that oscillates the oscillator 10 to generate an oscillation signal OSC, a temperature sensor circuit 40 that operates intermittently, a logic circuit 50 that performs temperature compensation processing based on the output of the temperature sensor circuit 40, and a power supply circuit 60 that supplies power to the oscillation circuit 30. For example, the power supply circuit 60 supplies a regulated power supply voltage VREG1 to the oscillation circuit 30 as power, and the oscillation circuit 30 performs an oscillation operation that oscillates the oscillator 10 to generate an oscillation signal OSC. The temperature sensor circuit 40 detects the temperature while operating intermittently during repetitive operation and stop periods, and outputs the detection result as temperature data TSQ to the logic circuit 50. The logic circuit 50 performs temperature compensation processing based on the output of the temperature sensor circuit 40, i.e., the temperature data TSQ. For example, the logic circuit 50 performs temperature compensation processing to keep the oscillation frequency of the oscillation circuit 30 constant even when the ambient temperature changes. Specifically, based on the frequency adjustment data, i.e., the capacitance value adjustment data, obtained from the temperature data TSQ, the following... Figure 4 The capacitance values ​​of the variable capacitor circuits CV1 and CV2 in the oscillation circuit 30, as detailed in the description, are adjusted to achieve temperature compensation of the oscillation frequency. Variable capacitor circuit CV1 is the first variable capacitor circuit, and variable capacitor circuit CV2 is the second variable capacitor circuit.

[0053] Moreover, in this embodiment, such as Figure 2 , Figure 3As shown, a logic circuit 50 or a power supply circuit 60 is configured between the oscillation circuit 30 and the temperature sensor circuit 40.

[0054] For example, in Figure 2 In the layout example, a logic circuit 50 is arranged between the oscillation circuit 30 and the temperature sensor circuit 40. For example, if the direction from edge SD1 of the circuit device 20 to the opposite edge SD2 is DR1, the logic circuit 50 is arranged on the DR1 side of the oscillation circuit 30, and the temperature sensor circuit 40 is arranged on the DR1 side of the logic circuit 50. The temperature sensor circuit 40 is arranged, for example, along edge SD2. Furthermore, if the opposite direction of DR1 is DR2, a power supply circuit 60 is arranged on the DR2 side of the oscillation circuit 30. The power supply circuit 60 is arranged, for example, along edge SD1. In other words, in Figure 2 In this circuit, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 is greater than the distance between the oscillation circuit 30 and the logic circuit 50. That is, the temperature sensor circuit 40 is positioned further away from the oscillation circuit 30 than the logic circuit 50. Furthermore, configuring the third circuit between the first and second circuits means, for example, that the third circuit is located between the positions of the first and second circuits. Additionally, the distance between the first and second circuits can also be described as the distance between their respective positions. The position of a circuit can be, for example, a representative position of the circuit, such as the center or center of gravity of the circuit.

[0055] In addition, Figure 2 In this circuit, a temperature sensor circuit 40 or a logic circuit 50 is disposed in circuit region RG2, and a power supply circuit 60 is disposed in circuit region RG3. Furthermore, an oscillation circuit 30 is disposed in circuit region RG1, between circuit regions RG2 and RG3. Circuit regions RG1, RG2, and RG3 are respectively the first, second, and third circuit regions. For example, circuit region RG3 is the region along edge SD1, and circuit region RG2 is the region along the opposite edge of edge SD1, i.e., edge SD2. Moreover, circuit region RG1 is the region located between circuit regions RG3 and RG2. For example, the temperature sensor circuit 40 or the logic circuit 50 is disposed in circuit region RG2 on the DR1 side of circuit region RG1 where the oscillation circuit 30 is disposed, and the power supply circuit 60 is disposed in circuit region RG3 on the DR2 side of circuit region RG1. Here, a circuit region is a region where circuit elements constituting a circuit and wiring connecting circuit elements are disposed. Circuit elements are active elements such as transistors, or passive elements such as resistors and capacitors. For example, in... Figure 2In this diagram, circuit regions RG1, RG2, and RG3 are rectangular regions. Here, a rectangular region encompasses a roughly rectangular area. For example, circuit region RG3, which configures the power supply circuit 60, is a rectangular region with direction DR3 along edge SD1 as its long side. Circuit region RG1, which configures the oscillation circuit 30, is also a rectangular region with direction DR3 as its long side. Circuit region RG2, which configures the temperature sensor circuit 40 and the logic circuit 50, is a rectangular region with direction DR3 as its long side; however, it could also be a rectangular region with direction DR1 along edge SD3 as its long side. Figure 2 In the circuit, RG1, RG2, and RG3 are rectangular regions, but they can also be regions of shapes other than rectangles.

[0056] On the other hand, Figure 3 In one layout example, a power supply circuit 60 is arranged between the oscillation circuit 30 and the temperature sensor circuit 40. For example, in Figure 3 In this circuit, the temperature sensor circuit 40 is arranged along edge SD1 of the circuit device 20. Furthermore, if the direction from edge SD1 to edge SD2 is defined as DR1, a power supply circuit 60 is arranged on the DR1 side of the temperature sensor circuit 40, and an oscillation circuit 30 is arranged on the DR1 side of the power supply circuit 60. Additionally, a logic circuit 50 is arranged on the DR1 side of the oscillation circuit 30. The logic circuit 50 is arranged, for example, along edge SD2. In other words, in Figure 3 In this circuit, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 is greater than the distance between the oscillation circuit 30 and the power supply circuit 60. That is, the temperature sensor circuit 40 is located further away from the oscillation circuit 30 than the power supply circuit 60.

[0057] For example, in this embodiment, in order to reduce the current consumption of the circuit device 20, the temperature sensor circuit 40 is not operated continuously, but is operated intermittently. By operating the temperature sensor circuit 40 intermittently, the current consumption in the temperature sensor circuit 40 can be significantly reduced compared to the case of continuous operation, resulting in low power consumption of the circuit device 20.

[0058] However, when the temperature sensor circuit 40 operates intermittently in this way, as described later... Figure 10 As explained in the diagram, the current consumption varies in an AC manner, and this variation in the AC mode of the current consumption degrades the signal characteristics, such as the jitter characteristics, of the oscillation signal OSC. Specifically, the variation in the AC mode of the current consumption in the temperature sensor circuit 40 propagates as noise to the oscillation circuit 30, degrading the signal characteristics, such as the jitter characteristics, of the oscillation signal OSC. As a result, the signal characteristics of the clock signal CK based on the oscillation signal OSC degrade, and the degraded output clock signal CKQ is output from the circuit device 20 and the oscillator 4.

[0059] For example, in Patent Document 1, the degradation of the clock signal characteristics is prevented by separating the analog circuit region and the digital circuit region. However, the temperature sensor circuit is not mentioned, nor is the aforementioned problem caused by the intermittent operation of the temperature sensor circuit addressed. For example, in existing temperature-compensated oscillation circuits, temperature sensor circuits using analog voltages are mostly used, and there is almost no variation in the AC current consumption. However, as in this embodiment, when the temperature sensor circuit 40 is made into a digital structure and operates intermittently, the variation in AC current consumption increases, and the temperature sensor circuit 40 becomes a noise source. Therefore, the configuration of the temperature sensor circuit 40 also needs to be considered.

[0060] Therefore, in this embodiment, a layout configuration is adopted such that the space between the temperature sensor circuit 40, which becomes a noise source due to the fluctuation of current consumption caused by the intermittent operation of the AC mode, and the oscillation circuit 30, which consumes less current and is easily affected by noise, is separated. Specifically, as... Figure 2 , Figure 3 As shown, a logic circuit 50 or a power supply circuit 60 is configured between the oscillation circuit 30, which is susceptible to noise, and the temperature sensor circuit 40, which becomes a noise source. For example, between the oscillation circuit 30 and the temperature sensor circuit 40, in Figure 2 Logic circuit 50 is configured in the middle, in Figure 3 A power supply circuit 60 is configured in the middle. Thus, the logic circuit 50 or the power supply circuit 60 is positioned between the oscillation circuit 30 and the temperature sensor circuit 40. Furthermore, due to the presence of the logic circuit 50 or the power supply circuit 60, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 is at least equal to the distance between the logic circuit 50 or the power supply circuit 60. As a result, the following situation can be effectively suppressed: the fluctuation of the AC current consumption mode based on the intermittent operation of the temperature sensor circuit 40 becomes noise, adversely affecting the oscillation operation of the oscillation circuit 30, and degrading signal characteristics such as the jitter characteristics of the oscillation signal OSC.

[0061] Specifically, in this embodiment, by separating the areas of analog circuits such as the oscillation circuit 30, which consume relatively low current and are susceptible to noise, from the areas of digital circuits such as the temperature sensor circuit 40, logic circuit 50, and output buffer circuit 70, which consume relatively high current and generate noise, the impact of noise caused by interference between digital and analog circuits is reduced. For example, by separating the areas of analog circuits such as the oscillation circuit 30 or power supply circuit 60, which operate continuously, from the areas of digital circuits such as the temperature sensor circuit 40, which operate intermittently, the impact of noise caused by interference between circuits that operate continuously and circuits that operate intermittently is reduced.

[0062] For example, in digital circuits, a structure is adopted in which the output buffer circuit 70, which consumes the most current and thus becomes a noise source, is spaced as far apart as possible from the oscillation circuit 30, which consumes less current and is most susceptible to noise. This suppresses the adverse effects of noise intrusion from the oscillation circuit 30. Furthermore, the temperature sensor circuit 40 includes digital circuitry that converts temperature information into digital codes, and it operates intermittently to achieve low current consumption. Therefore, its current consumption during operation is close to that of the output buffer circuit 70, making it a noise source for the oscillation circuit 30. Therefore, by separating the oscillation circuit 30 from these noise sources—the temperature sensor circuit 40 or the output buffer circuit 70—and placing a logic circuit 50, which is less susceptible to noise than the oscillation circuit 30, or a DC-mode power supply circuit 60, which is less susceptible to noise, between these circuits, noise intrusion from the oscillation circuit 30 is suppressed.

[0063] Furthermore, the temperature sensor circuit 40 performs intermittent operation as follows: during the operating period, it calculates the temperature data TSQ corresponding to the temperature, and stops after outputting the calculated temperature data TSQ to the logic circuit 50. For example, the temperature sensor circuit 40 is in an enabled state during the operating period and calculates the temperature data TSQ. For example, the temperature sensor circuit 40, during its operating period, enables the following... Figure 5The ring oscillator 42, counter circuit 44, regulator 46, etc., are enabled to calculate the temperature data TSQ corresponding to the temperature. Specifically, a regulating power supply voltage VREG3 from the regulator 46 is supplied to each of these circuits, and the enable signal of each circuit (described later) becomes active, thereby turning on the operating current flowing through each circuit and enabling each circuit. Then, the temperature sensor circuit 40 outputs the calculated temperature data TSQ to the logic circuit 50. That is, it outputs the temperature data TSQ corresponding to the temperature measured during the operation to the logic circuit 50. Then, after outputting the temperature data TSQ to the logic circuit 50, the temperature sensor circuit 40, for example, becomes disabled and stops operating. For example, during the stop period of intermittent operation, the ring oscillator 42, counter circuit 44, regulator 46, etc., become disabled and stop operating. Specifically, the regulated power supply voltage VREG3 from the regulator 46 is not supplied to these circuits, and the enable signal of each circuit becomes invalid. As a result, the operating current flowing through each circuit is disconnected, and each circuit becomes disabled. Each circuit of the temperature sensor circuit 40 stops operating, thereby saving power in the temperature sensor circuit 40. In this way, the temperature sensor circuit 40 operates intermittently during repetitive operation and stop periods, thereby achieving low power consumption. The length of the operating period of the temperature sensor circuit 40 during intermittent operation is, for example, 50 ms or less, and the current consumption of the temperature sensor circuit 40 during the operating period is, for example, 10 μA or less.

[0064] Compared to the BGR (Band Gap Reference) circuit described later, the ring oscillator 42 requires a shorter start-up time, thus enabling proper oscillation even during shorter operating periods. Furthermore, by shortening the operating period of the temperature sensor circuit 40, low power consumption can be achieved. Specifically, the current consumption of the oscillation circuit 30 is, for example, approximately 100–200 nA, the current consumption of the logic circuit 50 is, for example, approximately 10–20 nA, and the current consumption of the power supply circuit 60 is, for example, approximately 100 nA. Moreover, even when the current consumption of the temperature sensor circuit 40 during its operating period is, for example, approximately 100 μA, by intermittently operating the temperature sensor circuit 40, the average current consumption per second of the temperature sensor circuit 40 can be reduced to approximately 2 nA.

[0065] However, during intermittent operation between repetitive and stop periods, variations in the AC current consumption pattern, as described above, can become noise and adversely affect the oscillation circuit 30. Regarding this, in this embodiment, as... Figure 2 , Figure 3As shown, a logic circuit 50 or a power supply circuit 60 is arranged between the oscillation circuit 30 and the temperature sensor circuit 40. This allows the oscillation circuit 30 and the temperature sensor circuit 40 to be separated. Therefore, even in the event of fluctuations in the AC mode that cause intermittent operation and current consumption, the noise caused by these fluctuations can be suppressed from being transmitted to the oscillation circuit 30, and the degradation of the signal characteristics of the oscillation signal OSC can be suppressed.

[0066] In addition, such as Figure 1 As shown, the logic circuit 50 includes a latch circuit 52 that latches the temperature data TSQ output by the temperature sensor circuit 40 during operation. This latch circuit 52 can be implemented, for example, using a holding circuit such as a trigger circuit. Furthermore, during the shutdown period of the temperature sensor circuit 40, the logic circuit 50 also performs temperature compensation processing based on the temperature data TSQ latched in the latch circuit 52. That is, the temperature sensor circuit 40 calculates the temperature data TSQ corresponding to the temperature during operation, but this calculated temperature data TSQ is latched in the latch circuit 52 of the logic circuit 50. Therefore, even when the temperature sensor circuit 40 stops operating after outputting the calculated temperature data TSQ, the calculated temperature data TSQ is still latched in the latch circuit 52 of the logic circuit 50. Thus, even during the shutdown period following an intermittent operating period, when the temperature sensor circuit 40 stops operating, the logic circuit 50 can still appropriately perform temperature compensation processing based on the temperature data TSQ latched in the latch circuit 52. That is, the always-operating power supply circuit 60 supplies the regulated power supply voltage VREG2 to the logic circuit 50, and the logic circuit 50 operates, thereby enabling the logic circuit 50 to perform temperature compensation processing.

[0067] In addition, Figure 2In the circuit device 20, between edge SD1 and its opposite edge SD2, the oscillation circuit 30, logic circuit 50, and temperature sensor circuit 40 are arranged in the order of oscillation circuit 30, logic circuit 50, and temperature sensor circuit 40. For example, if the direction from edge SD1 to edge SD2 is DR1, the logic circuit 50 is arranged on the DR1 side of the oscillation circuit 30, and the temperature sensor circuit 40 is arranged on the DR1 side of the logic circuit 50. As an example, the oscillation circuit 30 and the logic circuit 50 are arranged adjacent to each other along the DR1 direction, and the logic circuit 50 and the temperature sensor circuit 40 are arranged adjacent to each other along the DR1 direction. Moreover, the temperature sensor circuit 40 is arranged, for example, along edge SD2 of the circuit device 20. For example, the temperature sensor circuit 40 is arranged along the direction of edge SD2 as the length direction. If the oscillation circuit 30, logic circuit 50, and temperature sensor circuit 40 are arranged in this order, the relatively large circuit block, namely the logic circuit 50, is located between the oscillation circuit 30 and the temperature sensor circuit 40. This can suppress the transmission of noise caused by fluctuations in the AC current consumption mode of the intermittently operating temperature sensor circuit 40 to the oscillation circuit 30, and suppress the degradation of the signal characteristics of the oscillation signal OSC. Furthermore, the oscillation circuit 30, logic circuit 50, and temperature sensor circuit 40 can be efficiently arranged along the direction DR1 from side SD1 to side SD2 of the circuit device 20. Therefore, the length of the circuit device 20 along direction DR1 can be shortened, and the layout area of ​​the circuit device 20 can be reduced. Thus, it is possible to simultaneously suppress the degradation of the signal characteristics of the oscillation signal OSC and reduce the area of ​​the circuit device 20.

[0068] In addition, Figure 2 In this circuit, the power supply circuit 60 is positioned between edge SD1 and the oscillation circuit 30 of the circuit device 20. For example, along the direction DR1 from edge SD1 to edge SD2 of the circuit device 20, the power supply circuit 60 and the oscillation circuit 30 are arranged in the order of power supply circuit 60, oscillation circuit 30. For example, the power supply circuit 60 is arranged along edge SD1. Specifically, the power supply circuit 60 is arranged along the direction of edge SD1 as its length direction. Moreover, the power supply circuit 60 and the oscillation circuit 30 are arranged adjacent to each other, for example, along the direction DR1. In this way, the power supply circuit 60 and the oscillation circuit 30 can be efficiently arranged along the direction DR1 from edge SD1 to edge SD2 of the circuit device 20, thus shortening the length of the circuit device 20 in the direction DR1 and achieving a reduction in the circuit area of ​​the circuit device 20. For example, in Figure 2In this circuit, the power supply circuit 60, oscillation circuit 30, logic circuit 50, and temperature sensor circuit 40 are arranged adjacent to each other along direction DR1. Therefore, the length of the circuit device 20 along direction DR1 can be minimized, achieving a smaller area for the circuit device 20. Specifically, the power supply circuit 60, oscillation circuit 30, logic circuit 50, and temperature sensor circuit 40 are circuit blocks with direction DR3, which is orthogonal to direction DR1, as their long side. Therefore, by arranging these circuit blocks sequentially along direction DR1, a smaller area for the circuit device 20 can be achieved. Furthermore, the adjacent arrangement of the first and second circuit blocks means, for example, that the first and second circuit blocks are arranged such that no other circuit blocks are located between them.

[0069] On the other hand, Figure 3 In the circuit device 20, between sides SD1 and SD2, the temperature sensor circuit 40, the power supply circuit 60, and the oscillation circuit 30 are arranged in the order of temperature sensor circuit 40, power supply circuit 60, and oscillation circuit 30. For example, if the direction from side SD1 to side SD2 is DR1, the power supply circuit 60 is arranged on the DR1 side of the temperature sensor circuit 40, and the oscillation circuit 30 is arranged on the DR1 side of the power supply circuit 60. As an example, the temperature sensor circuit 40 and the power supply circuit 60 are arranged adjacent to each other along the DR1 direction, and the power supply circuit 60 and the oscillation circuit 30 are arranged adjacent to each other along the DR1 direction. Moreover, the temperature sensor circuit 40 is arranged, for example, along side SD1 of the circuit device 20. For example, the temperature sensor circuit 40 is arranged along the direction of side SD1 as the length direction. If the temperature sensor circuit 40, power supply circuit 60, and oscillation circuit 30 are arranged in this order, the larger circuit block, namely the power supply circuit 60, is located between the temperature sensor circuit 40 and the oscillation circuit 30. This can suppress the transmission of noise caused by fluctuations in the AC current consumption mode of the intermittently operating temperature sensor circuit 40 to the oscillation circuit 30, and suppress the degradation of the signal characteristics of the oscillation signal OSC. Furthermore, the temperature sensor circuit 40, power supply circuit 60, and oscillation circuit 30 can be efficiently arranged along the direction DR1 from side SD1 to side SD2 of the circuit device 20. Therefore, the length of the circuit device 20 along the direction DR1 can be shortened, and the layout area of ​​the circuit device 20 can be reduced. Thus, it is possible to simultaneously suppress the degradation of the signal characteristics of the oscillation signal OSC and reduce the area of ​​the circuit device 20.

[0070] In addition, Figure 3In this circuit, logic circuit 50 is positioned between oscillator circuit 30 and edge SD2. For example, along direction DR1 from edge SD1 to edge SD2 of circuit device 20, oscillator circuit 30 and logic circuit 50 are arranged in the order of oscillator circuit 30, logic circuit 50. For example, logic circuit 50 is arranged along edge SD2. Specifically, logic circuit 50 is arranged along the direction of edge SD2 as its length direction. Moreover, oscillator circuit 30 and logic circuit 50 are arranged adjacent to each other, for example, along direction DR1. In this way, oscillator circuit 30 and logic circuit 50 can be efficiently arranged along direction DR1 from edge SD1 to edge SD2 of circuit device 20, thus shortening the length in direction DR1 of circuit device 20 and achieving miniaturization of the circuit area of ​​circuit device 20. For example, in Figure 3 In this circuit, the temperature sensor circuit 40, power supply circuit 60, oscillation circuit 30, and logic circuit 50 are arranged adjacent to each other along direction DR1. Therefore, the length of the circuit device 20 along direction DR1 can be minimized, thus reducing the area of ​​the circuit device 20. In particular, the temperature sensor circuit 40, power supply circuit 60, oscillation circuit 30, and logic circuit 50 are circuit blocks with direction DR3, which is orthogonal to direction DR1, as their long side direction. Therefore, by arranging these circuit blocks sequentially along direction DR1, the area of ​​the circuit device 20 can be reduced.

[0071] In addition, Figure 2 , Figure 3 In this circuit, the circuit device 20 includes a terminal TX1 connected to one end of the oscillator 10 and a terminal TX2 connected to the other end of the oscillator 10. That is, the circuit device 20 includes a first terminal (TX1) and a second terminal (TX2) for electrically connecting the circuit device 20 to the oscillator 10. Furthermore, the circuit device 20 includes a power supply terminal TVDD for receiving an input power supply voltage and a ground terminal TGND for receiving an input ground voltage GND. That is, the circuit device 20 includes a power supply terminal TVDD for supplying an external power supply voltage (VDD) from an external power supply device and a ground terminal TGND for supplying GND, also known as VSS. Moreover, as... Figure 2 , Figure 3As shown, terminal TX1 and ground terminal TGND are arranged along side SD3, which intersects side SD1 and side SD2 of circuit device 20. For example, terminal TX1 is arranged near the center of side SD3, and ground terminal TGND is arranged on the DR1 side of terminal TX1. For example, terminal TX1 and ground terminal TGND are arranged such that a part of logic circuit 50 or electrostatic discharge protection circuit is sandwiched between them. Furthermore, power terminal TVDD and terminal TX2 are arranged along the opposite side of side SD3 of circuit device 20, i.e., side SD4. For example, terminal TX2 is arranged near the center of side SD4, and if the opposite direction of direction DR1 is DR2, power terminal TVDD is arranged on the DR2 side of terminal TX2. For example, terminal TX2 and power terminal TVDD are arranged such that a part of oscillation circuit 30 or electrostatic discharge protection circuit is sandwiched between them. Thus, for example, as... Figure 2 , Figure 3 In this layout, where the logic circuit 50 or power supply circuit 60 is arranged between the oscillation circuit 30 and the temperature sensor circuit 40, a terminal TX1 connected to one end of the oscillator 10 can be arranged near the oscillation circuit 30 in side SD3, and a terminal TX2 connected to the other end of the oscillator 10 can be arranged near the oscillation circuit 30 in side SD4. Furthermore, the ground terminal TGND can be arranged along side SD3 together with terminal TX1, and the power supply terminal TVDD can be arranged along side SD4 together with terminal TX2. Thus, for example, a layout suitable for the following description can be achieved. Figure 18 , Figure 19 , Figure 20 The terminal configuration of the circuit device 20 of the oscillator 4 in the first construction example shown.

[0072] In addition, Figure 2 , Figure 3 In the oscillation circuit 30, the region on the TX1 side of the terminal is configured as described later. Figure 4The variable capacitor circuit CV1 is located in the region on the side of terminal TX2 of the oscillation circuit 30. For example, the variable capacitor circuit CV1 and the terminal TX1 connected to the variable capacitor circuit CV1 are arranged adjacent to each other in the oscillation circuit 30, and the variable capacitor circuit CV2 and the terminal TX2 connected to the variable capacitor circuit CV2 are arranged adjacent to each other in the oscillation circuit 30. In this way, the terminals TX1 and TX2 and the variable capacitor circuits CV1 and CV2 can be connected using the shortest path, which can reduce the adverse effects caused by parasitic capacitance or parasitic resistance in this path. For example, the area of ​​the variable capacitor circuit CV1 composed of the first capacitor array or the like, or the area of ​​the variable capacitor circuit CV2 composed of the second capacitor array or the like, occupies most of the layout area of ​​the oscillation circuit 30. Therefore, by arranging the variable capacitor circuit CV1 close to the side SD3 in the oscillation circuit 30, the variable capacitor circuit CV1 and the terminal TX1 arranged on the side SD3 can be connected using the shortest path. Furthermore, by configuring the variable capacitor circuit CV2 close to the side SD4 in the oscillation circuit 30, the variable capacitor circuit CV2 and the terminal TX2 configured on the side SD4 can be connected using the shortest path.

[0073] In addition, Figure 2 , Figure 3 In the rectangular circuit device 20, the power supply terminal TVDD is located at the first corner where sides SD1 and SD4 intersect. Furthermore, the ground terminal TGND is located at the second corner where sides SD2 and SD3 intersect. That is, the power supply terminal TVDD is located at the first corner where sides SD1 and SD4 intersect, and the ground terminal TGND is located at the second corner opposite to the first corner where sides SD2 and SD3 intersect. In other words, in the semiconductor chip of the rectangular circuit device 20, the power supply terminal TVDD and the ground terminal TGND are arranged diagonally. Moreover, the ground terminal TGND located at the second corner and the terminal TX1 connected to one end of the oscillator 10 are arranged along side SD3. Furthermore, the power supply terminal TVDD located at the first corner and the terminal TX2 connected to the other end of the oscillator 10 are arranged along side SD4. Therefore, terminals TX1 and TGND can be efficiently configured along edge SD3, and terminals TX2 and TVDD can be efficiently configured along edge SD4. Thus, efficient layout configuration of the oscillation circuit 30, temperature sensor circuit 40, logic circuit 50, and power supply circuit 60 is also possible. Furthermore, it enables a layout suitable for later description. Figure 18 , Figure 19 , Figure 20 The terminal configuration of the circuit device 20 of the oscillator 4 in the first construction example shown.

[0074] Furthermore, circuit device 20 includes a clock terminal TCK, which outputs an output clock signal CKQ based on the oscillation signal OSC. Moreover, as... Figure 2 , Figure 3 As shown, the clock terminal TCK is located at the third corner where sides SD2 and SD4 intersect. That is, the clock terminal TCK is located in the area on the DR1 side of the first corner where the power supply terminal TVDD is located, and in the area on the DR3 side of the second corner where the ground terminal TGND is located, which is the third corner. Thus, the clock terminal TCK, which can become a noise source, and the output buffer circuit 70 that outputs the clock signal CKQ to the clock terminal TCK are located at the third corner where sides SD2 and SD4 intersect. Therefore, the distance between the noise source of the clock terminal TCK based on the output clock signal CKQ and the oscillation circuit 30 can be separated as much as possible, further suppressing the transmission of noise from this noise source to the oscillation circuit 30.

[0075] In addition, the circuit device 20 includes a power supply terminal TVDD that receives the input power supply voltage VDD, such as Figure 2 , Figure 3 As shown, the power supply circuit 60 is disposed between the power supply terminal TVDD and the oscillation circuit 30. For example, the power supply terminal TVDD, the power supply circuit 60, and the oscillation circuit 30 are arranged such that the power supply circuit 60 is located on the line connecting the power supply terminal TVDD and the oscillation circuit 30. Specifically, the power supply circuit 60 is disposed adjacent to the power supply terminal TVDD, and the oscillation circuit 30 is disposed adjacent to the power supply circuit 60. For example, in... Figure 2 In this configuration, a power supply circuit 60 is arranged on the DR4 side in the direction of the power supply terminal TVDD, and an oscillation circuit 30 is arranged on the DR1 side in the direction of the power supply circuit 60. Furthermore, in... Figure 3 In this configuration, if the direction from the power supply terminal TVDD to the ground terminal TGND is DR5, a power supply circuit 60 is configured on the DR5 side of the power supply terminal TVDD, and an oscillation circuit 30 is configured on either the DR5 side or the DR1 side of the power supply circuit 60. If the power supply circuit 60 is configured between the power supply terminal TVDD and the oscillation circuit 30 in this way, the power supply voltage VDD can be supplied to the power supply circuit 60 from the power supply terminal TVDD using the shortest path. The power supply circuit 60 then supplies power to the oscillation circuit 30 using the shortest path based on the supplied power supply voltage VDD. For example, Figure 1 The regulator 61 of the power supply circuit 60 can generate an regulated power supply voltage VREG1 based on the power supply voltage VDD supplied from the power supply terminal TVDD using the shortest path, and supply the generated regulated power supply voltage VREG1 to the oscillation circuit 30 using the shortest path. Therefore, it is possible to suppress the deterioration of power supply characteristics caused by parasitic resistance, etc., of the path, and supply an appropriate power supply based on the power supply voltage VDD from the power supply terminal TVDD to the oscillation circuit 30.

[0076] Furthermore, the circuit device 20 includes an output buffer circuit 70 that outputs an output clock signal CKQ based on the oscillation signal OSC, and a clock terminal TCK that outputs the output clock signal CKQ. For example, the output buffer circuit 70 outputs the buffered signal CK based on the oscillation signal OSC as the output clock signal CKQ to the clock terminal TCK. Moreover, as... Figure 2 , Figure 3 As shown, the output buffer circuit 70 is disposed between the clock terminal TCK and the logic circuit 50. For example, the clock terminal TCK, the output buffer circuit 70, and the logic circuit 50 are arranged such that the output buffer circuit 70 is located on the line connecting the clock terminal TCK and the logic circuit 50. Specifically, the output buffer circuit 70 is disposed adjacent to the logic circuit 50, and the clock terminal TCK is disposed adjacent to the output buffer circuit 70. In this way, the clock signal CK output by the logic circuit 50 according to the oscillation signal OSC is input to the output buffer circuit 70 via the shortest path and buffered, and output as the output clock signal CKQ from the clock terminal TCK. As a result, the degradation of the signal characteristics of the output clock signal CKQ caused by parasitic resistance or parasitic capacitance in this path can be suppressed.

[0077] 2. Oscillator circuit and temperature sensor circuit

[0078] Next, an example of the structure of the oscillation circuit 30 and the temperature sensor circuit 40 will be described. Figure 4 An example of the structure of the oscillation circuit 30 is shown. However, the oscillation circuit 30 of this embodiment is not limited to... Figure 4 The structure can be modified in various ways, such as omitting a part of the structural element, adding other structural elements, or changing the structural element to other types of structural elements.

[0079] like Figure 4 As shown, the oscillation circuit 30 includes inverter circuits DV1 and DV2 and variable capacitor circuits CV1 and CV2. Inverter circuit DV1 is the driving circuit for oscillator 10, with its input node connected to one end of oscillator 10 and its output node connected to the other end of oscillator 10. Inverter circuit DV2 buffers the output signal of inverter circuit DV1 and outputs it as the oscillation signal OSC. Inverter circuits DV1 and DV2 are supplied with VREG1 as the high-potential side power supply voltage and with GND as the low-potential side power supply voltage, thus operating in operation.

[0080] One end of the variable capacitor circuit CV1 is connected to one end of the oscillator 10, and the other end is connected to the GND node. Specifically, the variable capacitor circuit CV1 includes a first capacitor array connected to one end of the oscillator 10, and a first switch array connected to the other end of the first capacitor array and the GND node. Furthermore, the on / off state of multiple switches in the first switch array is controlled using frequency control data generated based on temperature data TSQ, thereby adjusting the capacitance value of the variable capacitor circuit CV1. Similarly, one end of the variable capacitor circuit CV2 is connected to the other end of the oscillator 10, and the other end is connected to the GND node. Specifically, the variable capacitor circuit CV2 includes a second capacitor array connected to the other end of the oscillator 10, and a second switch array connected to the other end of the second capacitor array and the GND node. Furthermore, the on / off state of multiple switches in the second switch array is controlled using frequency control data generated based on temperature data TSQ, thereby adjusting the capacitance value of the variable capacitor circuit CV2. Furthermore, by adjusting the capacitance values ​​of the variable capacitor circuits CV1 and CV2, the oscillation frequency of the oscillation signal OSC of the oscillation circuit 30 is controlled, thereby achieving temperature compensation processing of the oscillation frequency.

[0081] Figure 5 An example of the structure of the temperature sensor circuit 40 is shown. However, the temperature sensor circuit 40 of this embodiment is not limited to... Figure 5 The structure can be modified in various ways, such as omitting a part of the structural element, adding other structural elements, or changing the structural element to other types of structural elements.

[0082] The temperature sensor circuit 40 includes a ring oscillator 42, a counter circuit 44, and a regulator 46. The ring oscillator 42 is a circuit consisting of multiple delay elements connected in a ring. Specifically, for example, as described later... Figure 11 As shown, the ring oscillator 42 is a circuit formed by connecting an odd number of inverter circuits and other signal inversion circuits in a ring configuration. The output oscillation signal is the output pulse signal RCK. The counter circuit 44 uses a clock signal CK based on the oscillation signal OSC to count the number of pulses of the output pulse signal RCK from the ring oscillator 42. Then, it outputs temperature data TSQ based on the count value obtained through the counting process. For example, as... Figure 6 As shown, the counter circuit 44 calculates the count value of the output pulse signal RCK within the counting period TSENS specified by the clock signal CK, and thus calculates the temperature data TSQ. For example, in Figure 6In this process, the counting period TSENS is equivalent to m = 7 clock cycles of the clock signal CK. The counter circuit 44 counts the number of pulses of the output pulse signal RCK within this counting period TSENS. The regulator 46 supplies the regulating power supply voltage VREG3 to the ring oscillator 42. Figure 5 In this circuit, regulator 46 also supplies regulated power supply voltage VREG3 to current setting circuit 48 and counter circuit 44. For example, regulator 46 regulates power supply voltage VDD to generate regulated power supply voltage VREG3. Figure 5 As shown, the regulator 46 includes an operational amplifier OPB and resistors RB1 and RB2. Furthermore, a regulated power supply voltage VREG3 is generated using a reference voltage based on the work function difference WF of the operational amplifier OPB. Figure 5 The structure enables a low-power temperature sensor circuit 40 to operate at low voltage through a small-scale circuit.

[0083] In addition, such as Figure 5 As shown, the temperature sensor circuit 40 includes a current setting circuit 48. The current setting circuit 48 operates according to the regulating power supply voltage VREG3 generated by the regulator 46, setting the operating current of the ring oscillator 42. For example, the current setting circuit 48 generates bias voltages VBP2 and VBN2, which are used to set the current flowing through the ring oscillator 42 (described later). Figure 11 The inverter circuits IVA1, IVA2, IVA3, and IVA4 of the regulator 46 shown are operating currents. These operating currents can also be considered bias currents based on bias voltages VBP2 and VBN2. By setting this current setting circuit 48 and setting the operating current of the ring oscillator 42, the oscillation frequency of the ring oscillator 42 can be controlled. For example, the current setting circuit 48 sets the bias current, i.e., the operating current, of the regulator 46 in a manner that the current value increases as the temperature rises. In this way, frequency control can be achieved, whereby the oscillation frequency of the ring oscillator 42 increases as the temperature rises.

[0084] For example, Figure 7 This illustrates an example of the frequency deviation characteristics of the clock signal CK and the output pulse signal RCK relative to temperature. Figure 7 The result of magnifying the vertical axis of the characteristic example on the right becomes the characteristic example on the left. For example... Figure 7 As shown in the characteristic example on the right, as the temperature rises, the oscillation frequency of the ring oscillator 42, i.e., the frequency of the output pulse signal RCK, increases. This is achieved by controlling the operating current of the ring oscillator 42 through the current setting circuit 48.

[0085] For example, in oscillators with lower frequencies such as 32kHz, low power consumption, low voltage operation, and miniaturization are required for applications such as IoT (Internet of Things) sensor association. However, existing temperature sensor circuits present a challenge in simultaneously achieving low current consumption, low voltage operation, and a small size. For instance, high-precision oscillators with built-in temperature control require a temperature sensor circuit. However, when using a BGR (Band Gap Reference) circuit and an A / D conversion circuit to construct a temperature sensor circuit, achieving low current consumption and low voltage operation is difficult. For example, to generate a voltage proportional to temperature, a certain amount of current needs to flow through the bipolar transistor in the BGR circuit, making low power consumption difficult. Furthermore, to improve temperature detection resolution, a wide dynamic range of the voltage input to the A / D conversion circuit is required, making low-voltage operation challenging. Additionally, in capacitor-DAC type A / D conversion circuits, the large capacitor area makes miniaturization difficult to achieve while ensuring accuracy.

[0086] Therefore, in Figure 5 In this circuit, a frequency comparison type temperature sensor circuit 40 is used. Specifically, the temperature sensor circuit 40 is constructed using a built-in ring oscillator 42 whose oscillation frequency depends on temperature, and a counter circuit 44 that counts the output pulse signal RCK of the ring oscillator 42. Here, the ring oscillator 42 is an oscillation circuit controlled by a temperature-dependent bias current. Furthermore, the reference clock signal for the counter circuit 44 is the oscillation frequency of the oscillation circuit 30, for example, a clock signal CK of 32 kHz. Moreover, the temperature sensor circuit 40 operates intermittently, and during the counting period, the signal of the count value in the counter circuit 44 within the TSENS is not transmitted to the logic circuit 50, thereby suppressing current consumption.

[0087] Furthermore, to suppress noise from the temperature sensor circuit 40 circulating to circuits outside the temperature sensor circuit 40 due to its intermittent operation, the power supply voltage of the temperature sensor circuit 40 uses a regulated power supply voltage VREG3 generated by a dedicated regulator 46. For example, regulated power supply voltages VREG1 and VREG2, which are supplied to the oscillation circuit 30 and the logic circuit 50, are also generated. Figure 1 The regulators 61 and 62 are configured in Figure 2 , Figure 3 The power supply circuit 60 is located in this area. In contrast, it generates the regulated power supply voltage VREG3 supplied to the temperature sensor circuit 40. Figure 5 The regulator 46 is configured in Figure 2 , Figure 3 The temperature sensor circuit area 40.

[0088] also, Figure 6The counting period TSENS shown can vary, for example, according to the setting of the register in logic circuit 50, thus allowing the sensitivity, i.e., the resolution, of temperature detection to be customized according to specifications. Furthermore, in Figure 5 In this configuration, the frequency is compared using a counter circuit 44. Therefore, a BGR circuit or A / D conversion circuit is not required, reducing current consumption and circuit size. Furthermore, the ring oscillator 42 and the counter circuit 44 operate at a low supply voltage of approximately 1.2V, resulting in a low operating lower limit voltage. By extending the counting period (TSENS), temperature detection resolution can be ensured, thus maintaining high accuracy. Additionally, while the frequency of the ring oscillator 42 may vary slightly, it is adjusted by the logic circuit 50 following the counter circuit 44, thereby corresponding to the address range of the lookup table used for temperature compensation.

[0089] Figure 8 , Figure 9 This is a detailed diagram illustrating the operation of the temperature sensor circuit 40. Figure 8 The detailed structure of counter circuit 44 is schematically shown as an example. Figure 9 Showing the Figure 8 The signal waveform diagram is used to explain the operation of the circuit. First, in Figure 9 At time t1, the signal TSONVDD becomes active (high level), regulator 46 starts, and the regulating power supply voltage VREG3 rises. Simultaneously, the negative logic reset signal TSXRST becomes active (low level), counter circuit 44 is reset, and the count value CNT1 of counter CT becomes 0. The count value CNT2 output by the AND circuit AN1, which receives the count value CNT1, also becomes 0. Next, after a one-cycle delay from time t1, signals TSONROSC and TSONIREF become high, and ring oscillator 42 and current setting circuit 48 start. Then, signal TSONROSC becomes high, thereby fixing the output of the AND circuit AN1, which receives the inverted signal of this high-level signal (i.e., the count value CNT2), to a low level. Therefore, the count values ​​CNT1 and CNT2 within TSENS during the counting period of counter CT are not transmitted to logic circuit 50, achieving low power consumption.

[0090] Next, at time t2, after the TSRST period from time t1, the counting process of the counter CT begins. For example, after the ring oscillator 42 is started by the signal TSONROSC going high, a certain amount of time is required until the oscillation frequency stabilizes. Therefore, a period TSRST is set to ensure this time, and after the TSRST period from time t1, the counter CT begins counting the number of pulses of the output pulse signal RCK from the ring oscillator 42. The length of this TSRST period can be set by a register. Moreover, as... Figure 6 As explained, during the counting period TSENS, which is m clock cycles (m being an integer greater than or equal to 2) of the clock signal CK, the counter CT counts the number of pulses of the output pulse signal RCK, and outputs the result of the counting process as the count value CNT1. Then, at time t3, the counting process ends, and the count value CNT1 is output as temperature data TSQ via AND circuits AN1 and AN2 to logic circuit 50. Then, at time t4, the latch circuit 52 of logic circuit 50 latches the temperature data TSQ from the temperature sensor circuit 40. As a result, the temperature data TSDATA held in the latch circuit 52 is updated from the nth temperature data to the next (n+1)th temperature data. Then, logic circuit 50 performs temperature compensation processing of the oscillation frequency based on the temperature data TSDATA held in the latch circuit 52.

[0091] Figure 10 This diagram illustrates the degradation of the signal characteristics of the oscillation signal OSC caused by the intermittent operation of the temperature sensor circuit 40. When the temperature sensor circuit 40 operates intermittently, as... Figure 10 As shown in A1, the current consumption of the temperature sensor circuit 40 varies in an AC manner. Consequently, as shown in A2, noise is generated in the ground wire supplied to GND, and as shown in A3 and A4, this noise is superimposed on the signal in the oscillation circuit 30. As a result, as shown in A5, jitter occurs in the oscillation signal OSC output from the oscillation circuit 30, degrading the signal quality of the oscillation signal OSC and also degrading the signal characteristics of the clock signal CK. In this case, in this embodiment, as... Figure 2 , Figure 3 As shown, the temperature sensor circuit 40, which operates intermittently, can be separated from the oscillation circuit 30, thus reducing the generation of such jitter.

[0092] Figure 11This is an example of the structure of a ring oscillator 42. The ring oscillator 42 includes a ring-connected NAND circuit NAA and inverter circuits IVA1, IVA2, IVA3, and IVA4. It also includes a buffer circuit, i.e., inverter circuit IVA5. These odd-numbered signal inversion circuits are connected in a ring, thereby generating an oscillation signal, i.e., an output pulse signal RCK. Furthermore, an enable signal ENROSC is input to the NAND circuit NAA to enable or disable the operation of the ring oscillator 42. This enable signal ENROSC is enabled or disabled by logic circuit 50, thereby enabling intermittent operation of the ring oscillator 42 and realizing intermittent operation of the temperature sensor circuit 40. In addition, P-type transistors TA1, TA2, TA3, and TA4 for carrying operating current are provided on the VREG3 side of inverter circuits IVA1, IVA2, IVA3, and IVA4, and N-type transistors TA5, TA6, TA7, and TA8 are provided on the GND side. Furthermore, bias voltage VBP2 from the current setting circuit 48 is input to the gates of transistors TA1 to TA4, and bias voltage VBN2 from the current setting circuit 48 is input to the gates of transistors TA5 to TA8. This controls the operating current of the ring oscillator 42, enabling the ring oscillator 42 to output, for example, an output pulse signal RCK whose frequency increases with temperature.

[0093] Figure 12 An example of the structure of regulator 46 is shown. Additionally, Figure 1 The regulators 61 and 62 can also be connected with Figure 12 It is implemented using the same circuit structure. For example... Figure 12 As shown, the regulator 46 includes an operational amplifier OPB and resistors RB1 and RB2. The operational amplifier OPB has a differential section composed of transistors TB1, TB2, TB3, TB4, and TB5, and an output section composed of transistors TB6 and TB7. Additionally, an enable signal ENVREG3 is input to transistor TB8 to enable or disable the operation of the regulator 46. This enable signal ENVREG3 is enabled or disabled by logic circuit 50, thereby enabling intermittent operation of the regulator 46 and realizing intermittent operation of the temperature sensor circuit 40. Figure 12 In this process, the work function difference WF between the N-type transistors TB3 and TB4, which constitute a differential pair, is used to generate the regulated power supply voltage VREG3. For example, the voltage of VREG3 is set according to the voltage of the work function difference WF and the resistance values ​​of resistors RB1 and RB2.

[0094] Figure 13 An example of the structure of the current setting circuit 48 is shown. Figure 13In this circuit, a bias voltage VBN1 is generated by a bias voltage generation circuit consisting of transistors TC1, TC2, TC3, TC4, TC5, TC6, TC7, and TC8. Furthermore, a current mirror circuit consisting of transistors TC9, TC10, TC11, and TC12 generates bias voltages VBP2 and VBN2 corresponding to the bias voltage VBN1, which are then supplied to... Figure 11 The operating current of the ring oscillator 42 is set. Additionally, enable signals ENIREF and XENIREF are input to transistors TC13 and TC14 to enable or disable the operation of the current setting circuit 48. These enable signals ENIREF and XENIREF are enabled or disabled by logic circuit 50, thereby enabling intermittent operation of the current setting circuit 48 and realizing intermittent operation of the temperature sensor circuit 40.

[0095] 3. Wiring of power cords and grounding wires

[0096] Figure 14 This shows an example of the wiring of the power line and the ground line in the circuit device 20 of this embodiment. Figure 14 yes Figure 2 The wiring example for power lines and grounding wires in the layout configuration. Figure 3 In the layout configuration, the same wiring method can be used to route power lines and ground lines; therefore, detailed explanations are omitted. Figure 14 As described above, a power supply terminal TVDD is arranged at the first corner where sides SD1 and SD4 intersect, and a ground terminal TGND is arranged at the second corner where sides SD2 and SD3 intersect. That is, in the circuit device 20, the power supply terminal TVDD and the ground terminal TGND are arranged diagonally. Furthermore, a power line is routed from the power supply terminal TVDD at the first corner, and a ground line is routed from the ground terminal TGND at the second corner.

[0097] Specifically, such as Figure 14As shown, circuit device 20 includes a power supply line LV1 and a ground line LG1. LV1 is the first power supply line, and LG1 is the first ground line. Power supply line LV1 is connected to the power supply terminal TVDD, supplying power supply voltage VDD to the oscillation circuit 30. Ground line LG1 is connected to the ground terminal TGND, supplying ground voltage GND to the oscillation circuit 30. Furthermore, circuit device 20 includes power supply lines LV2A and LV2B, and ground lines LG2A and LG2B. LV2A and LV2B are second power supply lines, and LG2A and LG2B are second ground lines. Power supply lines LV2A and LV2B are connected to the power supply terminal TVDD and branch off from power supply terminal TVDD from power supply line LV1, supplying power supply voltage VDD to the temperature sensor circuit 40, logic circuit 50, etc. Specifically, power supply line LV2A supplies VDD to the temperature sensor circuit 40 and output buffer circuit 70, and power supply line LV2B supplies VDD to the logic circuit 50. Furthermore, grounding wires LG2A and LG2B are connected to the grounding terminal TGND, and grounding wire LG1 is branched from the grounding terminal TGND, supplying ground voltage GND to the temperature sensor circuit 40, logic circuit 50, etc. Specifically, grounding wire LG2A supplies GND to the temperature sensor circuit 40 and output buffer circuit 70, and grounding wire LG2B supplies GND to the logic circuit 50. Additionally, circuit device 20 may include power line LV3 and grounding wire LG3. LV3 is the third power line, and LG3 is the third grounding wire. Power line LV3 is connected to the power terminal TVDD, and power lines LV1, LV2A, and LV2B are branched from the power terminal TVDD, supplying power voltage VDD to the power circuit 60. Furthermore, grounding wire LG3 is connected to the grounding terminal TGND, and grounding wires LG1, LG2A, and LG2B are branched from the grounding terminal TGND, supplying ground voltage GND to the power circuit 60.

[0098] Thus, in Figure 14In the oscillation circuit 30, VDD is supplied via power line LV1, which is wired from the power supply terminal TVDD, and GND is supplied via ground line LG1, which is wired from the ground terminal TGND. On the other hand, VDD is supplied via power lines LV2A and LV2B, which are branched from the power supply terminal TVDD and power line LV1, and GND is supplied via ground lines LG2A and LG2B, which are branched from the ground terminal TGND and ground line LG1. That is, power lines LV1 and LV2A and LV2B are branched from the power supply terminal TVDD. Furthermore, VDD is supplied to the oscillation circuit 30 via power line LV1, and VDD is supplied to the temperature sensor circuit 40 and logic circuit 50 via power lines LV2A and LV2B. Additionally, ground lines LG1 and LG2A and LG2B are branched from the ground terminal TGND. Furthermore, the oscillation circuit 30 is supplied with GND via grounding line LG1, while the temperature sensor circuit 40, logic circuit 50, etc., are supplied with GND via grounding lines LG2A and LG2B. In this way, noise generated by the temperature sensor circuit 40, logic circuit 50, etc., is absorbed by the power supply terminal TVDD or the ground terminal TGND via power supply lines LV2A and LV2B or grounding lines LG2A and LG2B. Moreover, this noise is less likely to propagate to the power supply line LV1 or grounding line LG1, whose wiring impedance is higher than that of the power supply terminal TVDD or the ground terminal TGND. As a result, the degradation of the oscillation signal OSC signal characteristics caused by noise generated by the temperature sensor circuit 40, logic circuit 50, etc., being transmitted to the oscillation circuit 30 can be effectively suppressed.

[0099] In addition, Figure 14In this circuit device 20, the power terminal TVDD and the ground terminal TGND are arranged diagonally, with the power terminal TVDD located at the first corner and the ground terminal TGND located at the second corner. This diagonal arrangement of the power terminal TVDD and the ground terminal TGND facilitates branching wiring of the power lines LV1 and LV2A / LV2B at the power terminal TVDD location, and branching wiring of the ground lines LG1 and LG2A / LG2B at the ground terminal TGND location. For example, the power line LV2A and the ground line LG2A can be easily routed by passing near the temperature sensor circuit 40 or the output buffer circuit 70, for example, along the direction of side SD2 or side SD4. Furthermore, the power line LV2B and the ground line LG2B can be easily routed in a loop, for example, surrounding the logic circuit 50. On the other hand, the power line LV1 and the ground line LG1 can be easily branched relative to the oscillation circuit 30 by routing wiring from the diagonally arranged power terminal TVDD and ground terminal TGND in the circuit device 20 to the oscillation circuit 30. Therefore, it is possible to suppress the transmission of noise from noise sources such as the temperature sensor circuit 40 to the oscillation circuit 30, and to route the power lines or ground lines in an efficient layout configuration.

[0100] Noise from the temperature sensor circuit 40, etc., is sometimes transmitted to the area of ​​the oscillation circuit 30 via, for example, the P-type substrate of the circuit device 20. Regarding this, in Figure 2 , Figure 14 In this configuration, by employing a layout where the logic circuit 50 is positioned between the oscillation circuit 30 and the temperature sensor circuit 40, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 can be separated, and noise transmitted through the substrate can be effectively suppressed. Furthermore, in Figure 3 In this circuit, the power supply circuit 60 is positioned between the oscillation circuit 30 and the temperature sensor circuit 40. This allows the oscillation circuit 30 and the temperature sensor circuit 40 to be separated, and also effectively suppresses noise transmitted through the substrate.

[0101] 4. Another layout configuration example

[0102] Figure 15 , Figure 16 , Figure 17 Another layout configuration example of the circuit device 20 is shown. Figure 15 , Figure 16 , Figure 17 Layout configuration and Figure 2 , Figure 3 The difference lies in the terminal configuration of the circuit device 20.

[0103] For example, in Figure 2 , Figure 3In this configuration, the output enable terminal TOE, terminal TX1, and ground terminal TGND are arranged in this order along edge SD3, and the power supply terminal TVDD, terminal TX2, and clock terminal TCK are arranged in this order along edge SD4. This enables the implementation of a configuration suitable for later description. Figure 18 , Figure 19 , Figure 20 The terminal configuration of the circuit device 20 of the oscillator 4 in the first construction example shown.

[0104] On the other hand, Figure 15 , Figure 16 , Figure 17 In this configuration, terminals TX2, TVDD, and TCK are arranged in this order along edge SD3, and terminals TX1, TOE, and TGND are arranged in this order along edge SD4. This allows for the implementation of a configuration suitable for later description. Figure 21 , Figure 22 , Figure 23 The terminal configuration of the circuit device 20 of the oscillator 4 in the second construction example shown.

[0105] Specifically, in Figure 2 In the middle, the oscillation circuit 30 is disposed between the temperature sensor circuit 40, the logic circuit 50, and the power supply circuit 60. Figure 3 In this circuit, the oscillation circuit 30 is positioned between the temperature sensor circuit 40, the power supply circuit 60, and the logic circuit 50. Therefore, in Figure 2 , Figure 3 In this configuration, terminal TX1, connected to the oscillation circuit 30, is positioned near the center of side SD3, and terminal TX2, also connected to the oscillation circuit 30, is positioned near the center of side SD4. Therefore, in the following description... Figure 18 , Figure 19 , Figure 20 In the oscillator 4, conductive connecting parts CDC1 and CDC2, which are located near the center of the oscillator 10 when viewed from above, can be easily connected to terminals TX1 and TX2 located near the center of the circuit device 20.

[0106] On the other hand, Figure 15 , Figure 16 , Figure 17 In the middle, the oscillation circuit 30 is arranged along edge SD1, and the terminals TX1 and TX2 connected to the oscillation circuit 30 are also arranged along edge SD1. Therefore, in Figure 21 , Figure 22 , Figure 23 In the oscillator 4, the conductive connecting parts CDC1 and CDC2, which are located on the left side of the oscillator 10 when viewed from above, can be easily connected to the terminals TX1 and TX2 located on the left side of the circuit device 20.

[0107] In addition, Figure 2 , Figure 3 In the configuration, the output enable terminal TOE, terminal TX1, and ground terminal TGND are located on side SD3, while the power supply terminal TVDD, terminal TX2, and clock terminal TCK are located on side SD4. Therefore, as... Figure 18 , Figure 19 , Figure 20 As with oscillator 4, when circuit device 20 is mounted with its active surface facing upwards, these terminals of circuit device 20 can be connected to the internal electrode terminals of oscillator 4 via bumps (BMP). On the other hand, in Figure 15 , Figure 16 , Figure 17 In the middle, terminal TX2, power terminal TVDD, and clock terminal TCK are configured on side SD3, while terminal TX1, output enable terminal TOE, and ground terminal TGND are configured on side SD4. Therefore, as... Figure 21 , Figure 22 , Figure 23 In the case of the oscillator 4, when the circuit device 20 is mounted upside down with its active side facing down, these terminals of the circuit device 20 can be connected to the internal electrode terminals of the oscillator 4 via bumps BMP.

[0108] Moreover, in Figure 15 , Figure 16 , Figure 17 In this circuit, the circuit device 20 also includes an oscillation circuit 30, a temperature sensor circuit 40, a logic circuit 50, and a power supply circuit 60. The logic circuit 50 or the power supply circuit 60 is disposed between the oscillation circuit 30 and the temperature sensor circuit 40. For example, the logic circuit 50 or the power supply circuit 60 is located on a line connecting the oscillation circuit 30 and the temperature sensor circuit 40. In other words, in Figure 15 , Figure 16 , Figure 17 In this configuration, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 is greater than the distance between the oscillation circuit 30 and the logic circuit 50 or the power supply circuit 60. That is, the temperature sensor circuit 40 is positioned at a greater distance from the oscillation circuit 30 compared to the logic circuit 50 or the power supply circuit 60. Thus, the logic circuit 50 or the power supply circuit 60 is positioned between the oscillation circuit 30 and the temperature sensor circuit 40. Furthermore, the intervention of the logic circuit 50 or the power supply circuit 60 effectively separates the distance between the oscillation circuit 30 and the temperature sensor circuit 40. As a result, the following situation can be effectively suppressed: the fluctuation of the AC current consumption mode due to the intermittent operation of the temperature sensor circuit 40 becomes noise, adversely affecting the oscillation operation of the oscillation circuit 30, and degrading signal characteristics such as the jitter characteristics of the oscillation signal OSC.

[0109] In addition, Figure 15 , Figure 16, Figure 17 The location of the temperature sensor circuit 40 varies. For example, in... Figure 15 In the middle, the temperature sensor circuit 40 is configured along edge SD3, however, in Figure 16 In the middle, it is configured along the opposite edge of edge SD3, namely edge SD4. Furthermore, in... Figure 17 In the middle, the temperature sensor circuit 40 is configured along the opposite side of edge SD1, namely edge SD2.

[0110] Specifically, in Figure 15 In this circuit arrangement, the power supply terminal TVDD and the temperature sensor circuit 40 are arranged side-by-side along edge SD3 of the circuit device 20. For example, the power supply terminal TVDD and the temperature sensor circuit 40 are arranged side-by-side along edge SD3 in the order of power supply terminal TVDD and temperature sensor circuit 40. For example, the temperature sensor circuit 40 is arranged on the side of the direction DR1 of the power supply terminal TVDD. In this way, the power supply terminal TVDD and the temperature sensor circuit 40 are arranged side-by-side along edge SD3, thereby utilizing the shortest path to supply the power supply voltage VDD from the power supply terminal TVDD to the temperature sensor circuit 40, thus significantly reducing parasitic resistance and the like in this path. Therefore, in the event of fluctuations in the AC mode that consumes current due to the intermittent operation of the temperature sensor circuit 40, voltage fluctuations caused by parasitic resistance and the like in the path from the power supply terminal TVDD to the temperature sensor circuit 40 can be minimized, and noise caused by fluctuations in the AC mode that consumes current can also be reduced.

[0111] On the other hand, Figure 16 In this circuit, the temperature sensor circuit 40 and the ground terminal TGND are arranged side-by-side along edge SD4 of the circuit device 20. For example, the temperature sensor circuit 40 and the ground terminal TGND are arranged side-by-side along edge SD4 in the order of temperature sensor circuit 40 and ground terminal TGND. For example, the ground terminal TGND is arranged on the DR1 side of the temperature sensor circuit 40. Because the temperature sensor circuit 40 and the ground terminal TGND are arranged side-by-side along edge SD4, the ground voltage GND can be supplied from the ground terminal TGND to the temperature sensor circuit 40 using the shortest path, thus significantly reducing parasitic resistance in this path. Therefore, in the event of fluctuations in the AC current consumption mode due to the intermittent operation of the temperature sensor circuit 40, voltage fluctuations caused by parasitic resistance in the path from the temperature sensor circuit 40 to the ground terminal TGND can be minimized, and the noise level caused by fluctuations in the AC current consumption mode can also be reduced.

[0112] Thus, in Figure 15 , Figure 16In the middle, the power supply terminal TVDD or ground terminal TGND and the temperature sensor circuit 40 are arranged side by side along the side that intersects with side SD1 and side SD2, namely side SD3 or side SD4.

[0113] On the other hand, Figure 17 In the middle, the temperature sensor circuit 40 is configured along edge SD2. For example, in Figure 17 In this configuration, the oscillation circuit 30 is arranged along edge SD1, and the temperature sensor circuit 40 is arranged along the opposite edge SD1, i.e., edge SD2. For example, the oscillation circuit 30 is arranged along edge SD1 with edge SD1 as the longer side, and the temperature sensor circuit 40 is arranged along edge SD2 with edge SD2 as the longer side. If the temperature sensor circuit 40 is arranged along edge SD2, the opposite edge of edge SD1 where the oscillation circuit 30 is located, then... Figure 15 or Figure 16 In comparison, the distance between the oscillation circuit 30 and the temperature sensor circuit 40 can be increased. This further suppresses the transmission of noise from the intermittent operation of the temperature sensor circuit 40 to the oscillation circuit 30. Furthermore, the layout of the circuit device 20 in this embodiment is not limited to... Figure 2 , Figure 3 , Figure 15 , Figure 16 , Figure 17 The configuration example allows for various variations.

[0114] 5. Oscillator

[0115] Figure 18 , Figure 19 , Figure 20 The first construction example of the oscillator 4 in this embodiment is shown. Figure 18 , Figure 19 , Figure 20 These are, respectively, a side view, a top view, and a bottom view of the oscillator 4 in the first construction example. The oscillator 4 in this first construction example uses... Figure 2 , Figure 3The circuit arrangement 20 described herein is an oscillator. The oscillator 4 has an oscillator 10, a circuit arrangement 20, and a package 12 for housing the oscillator 10 and the circuit arrangement 20. The package 12 is formed, for example, of ceramic. The package 12 has a base 16 and a cover 17. The base 16 has an intermediate substrate, namely a first substrate 13, a second substrate 14 of a generally rectangular frame shape stacked on the upper surface side of the first substrate 13, and a third substrate 15 of a generally rectangular frame shape stacked on the bottom surface side of the first substrate 13. Moreover, the cover 17 is joined to the upper surface of the second substrate 14, and the oscillator 10 is housed in the receiving space S1 formed by the first substrate 13, the second substrate 14, and the cover 17. For example, the oscillator 10 is hermetically sealed in the receiving space S1, preferably in a near-vacuum state, i.e., a depressurized state. Thus, the oscillator 10 can be appropriately protected from the effects of impact, dust, heat, moisture, etc. Furthermore, a semiconductor chip, i.e., a circuit device 20, is housed in the receiving space S2 formed by the first substrate and the third substrate 15. In addition, electrode terminals for external connection of the oscillator 4, i.e., external terminals TEVDD, TECK, TEGND, and TEOE, are formed on the bottom surface of the third substrate 15.

[0116] Furthermore, within the housing space S1, the oscillator 10 is connected via conductive connecting portions CDC1 and CDC2 to a first electrode terminal (not shown) formed on the upper surface of the first substrate 13. The conductive connecting portions CDC1 and CDC2 can be implemented, for example, by conductive bumps such as metal bumps, or by conductive adhesives. Specifically, the oscillator 10 is connected to a first electrode terminal (not shown) and a second electrode terminal formed on the upper surface of the first substrate 13. Figure 19 A first electrode pad (not shown) at one end of the tuning fork-type oscillator 10 is connected to a first electrode terminal formed on the upper surface of the first substrate 13 via a conductive connection portion CDC1. Furthermore, the first electrode terminal is electrically connected to the terminal TX1 of the circuit device 20. Additionally, a second electrode pad (not shown) at the other end of the tuning fork-type oscillator 10 is connected to a second electrode terminal formed on the upper surface of the first substrate 13 via a conductive connection portion CDC2. Furthermore, the second electrode terminal is electrically connected to the terminal TX2 of the circuit device 20. Thus, one end and the other end of the oscillator 10 can be electrically connected to the terminals TX1 and TX2 of the circuit device 20 via conductive connection portions CDC1 and CDC2.

[0117] Furthermore, conductive bumps BMP are formed on the terminals of TVDD, TCK, TGND, TOE, TX1, and TX2 of the semiconductor chip, i.e., the circuit device 20. These conductive bumps BMP are connected to a plurality of electrode terminals formed on the bottom surface of the first substrate 13. Moreover, the electrode terminals connected to the terminals of TVDD, TCK, TGND, and TOE of the circuit device 20 are electrically connected to the external terminals TEVDD, TECK, TEGND, and TEOE of the oscillator 4 via internal wiring or the like. In addition, the electrode terminals connected to the terminals of TX1 and TX2 of the circuit device 20 are electrically connected to the oscillator 10 via conductive connection portions CDC1 and CDC2.

[0118] like Figure 20 As shown in the bottom view, the back side of the active surface of the circuit device 20 is exposed on the bottom surface of the oscillator 4. Furthermore, on the bottom surface of the third substrate 15, the external terminals TEVDD, TECK, TEGND, and TEOE of the oscillator 4 are formed with... Figure 2 , Figure 3 The positions corresponding to the terminals of the circuit device 20, namely TVDD, TCK, TGND, and TOE.

[0119] As mentioned above, according to Figure 2 , Figure 3 The circuit device 20 with its layout configuration is capable of achieving a suitable... Figure 18 , Figure 19 , Figure 20 The circuit device 20 with terminals arranged in the oscillator 4 of the first construction example shown.

[0120] Figure 21 , Figure 22 , Figure 23 The second construction example of the oscillator 4 in this embodiment is shown. Figure 21 , Figure 22 , Figure 23 These are, respectively, a side view, a top view, and a bottom view of the oscillator 4 in the second construction example. The oscillator 4 in this second construction example uses... Figure 15 , Figure 16 , Figure 17 The circuit arrangement 20 described herein is an oscillator. The oscillator 4 includes an oscillator 10, a circuit arrangement 20, and a package 12 housing the oscillator 10 and the circuit arrangement 20. The package 12 is formed, for example, of ceramic, and has an inner housing space S in which the oscillator 10 and the circuit arrangement 20 are housed. The housing space S is hermetically sealed, preferably in a near-vacuum state, i.e., a depressurized state. The package 12 can appropriately protect the oscillator 10 and the circuit arrangement 20 from impacts, dust, heat, moisture, etc.

[0121] Package 12 has a base 16 and a cover 17. Specifically, package 12 consists of a base 16 supporting the oscillator 10 and the circuit device 20, and a cover 17 engaged with the upper surface of the base 16 to form a receiving space S between the cover and the base 16. The oscillator 10 is supported by conductive connecting portions CDC1 and CDC2 on a stepped portion disposed inside the base 16. The circuit device 20 is disposed on the inner bottom surface of the base 16. Specifically, the circuit device 20 is flip-mounted with its active surface facing the inner bottom surface of the base 16. The active surface is the surface of the circuit device 20 on which circuit elements are formed. Furthermore, conductive bumps BMP are formed on the terminals of the circuit device 20, namely TVDD, TCK, TGND, TOE, TX1, and TX2. The circuit device 20 is supported on the inner bottom surface of the base 16 by the conductive bumps BMP. The conductive bumps BMP are, for example, metal bumps. The terminals TVDD, TCK, TGND, and TOE of the circuit device 20 are electrically connected to the external terminals TEVDD, TECK, TEGND, and TEOE of the oscillator 4 via bumps (BMP) or internal wiring of the package 12. Furthermore, TX1 and TX2 of the circuit device 20 are electrically connected to the oscillator 10 via bumps (BMP), internal wiring of the package 12, or conductive connection points (CDC1 and CDC2).

[0122] like Figure 22 As shown in the top view, the conductive connecting parts CDC1 and CDC2 are connected to the root side of the tuning fork-type oscillator 10. Therefore, in Figure 15 , Figure 16 , Figure 17 In the layout configuration, the terminals TX1 and TX2, which are electrically connected to the connecting parts CDC1 and CDC2, are also arranged along the edge SD1 of the circuit device 20.

[0123] In addition, such as Figure 23 As shown in the bottom view, the external terminals TEVDD, TECK, TEGND, and TEOE of the oscillator 4 are formed on the bottom surface of the base 16. That is, the external terminals TEVDD, TECK, TEGND, and TEOE are formed on the base 16. Figure 15 , Figure 16 , Figure 17 The positions corresponding to the terminals of the circuit device 20, namely TVDD, TCK, TGND, and TOE.

[0124] As mentioned above, according to Figure 15 , Figure 16 , Figure 17 The circuit device 20 with its layout configuration is capable of achieving a suitable... Figure 21 , Figure 22 , Figure 23 The circuit device 20 with terminals arranged in the oscillator 4 of the second construction example shown.

[0125] In addition, Figure 21 , Figure 22 , Figure 23 In this case, the circuit device 20 is mounted upside down with its active surface facing down. However, it can also be mounted with its active surface facing up. That is, the circuit device 20 is mounted with its active surface facing the oscillator 10, and the terminals are connected using a connecting wire or the like.

[0126] As described above, the circuit arrangement of this embodiment includes: an oscillation circuit that causes an oscillator to oscillate and generate an oscillation signal; a temperature sensor circuit that operates intermittently; a logic circuit that performs temperature compensation processing based on the output of the temperature sensor circuit; and a power supply circuit that supplies power to the oscillation circuit. The logic circuit or the power supply circuit is disposed between the oscillation circuit and the temperature sensor circuit.

[0127] According to this embodiment, the oscillation circuit is supplied with power from the power supply circuit and performs an oscillation operation to cause the oscillator to oscillate, generating an oscillation signal. The temperature sensor circuit detects the temperature while operating intermittently, and the logic circuit performs temperature compensation processing based on the output of the temperature sensor circuit. Furthermore, in this embodiment, a logic circuit or a power supply circuit is arranged between the oscillation circuit and the temperature sensor circuit. Thus, the logic circuit or power supply circuit is positioned between the oscillation circuit and the temperature sensor circuit. The presence of the logic circuit or power supply circuit ensures that the distance between the oscillation circuit and the temperature sensor circuit is at least equal to the amount of the logic circuit or power supply circuit. Therefore, it is possible to effectively suppress the situation where fluctuations in the AC current consumption due to the intermittent operation of the temperature sensor circuit become noise, adversely affecting the oscillation operation of the oscillation circuit and degrading the signal characteristics of the oscillation signal.

[0128] Furthermore, in this embodiment, the temperature sensor circuit performs intermittent operation as follows: during the operation period, it calculates the temperature data corresponding to the temperature, and stops after outputting the temperature data to the logic circuit.

[0129] In this way, the temperature sensor circuit operates intermittently during repetitive operation and during periods of inactivity, thereby achieving low power consumption of the circuit device.

[0130] Furthermore, in this embodiment, the logic circuit has a latch circuit that latches the temperature data output by the temperature sensor circuit during operation, and the logic circuit also performs temperature compensation processing based on the latched temperature data during the shutdown period of the temperature sensor circuit.

[0131] In this way, even if the temperature sensor circuit stops working during the downtime after the working period, the logic circuit can still perform appropriate temperature compensation processing based on the temperature data latched in the latch circuit.

[0132] Furthermore, in this embodiment, the temperature sensor circuit includes: a ring oscillator; a counter circuit that uses a clock signal based on the oscillation signal to count the output pulse signal of the ring oscillator and outputs temperature data based on the count value obtained through the counting process; and a regulator that supplies a regulating power supply voltage to the ring oscillator. The regulator supplies the regulating power supply voltage to the ring oscillator during intermittent operation.

[0133] Based on this structure, a low-power temperature sensor circuit that can operate at low voltage can be realized with a small-scale circuit.

[0134] Furthermore, in this embodiment, the temperature sensor circuit includes a current setting circuit, which operates according to the adjusted power supply voltage to set the operating current of the ring oscillator.

[0135] By setting this current setting circuit and setting the operating current of the ring oscillator, frequency control can be achieved to change the oscillation frequency of the ring oscillator according to the temperature.

[0136] Furthermore, in this embodiment, between the first side of the circuit device and the second side which is the opposite side of the first side, the oscillation circuit, the logic circuit, and the temperature sensor circuit are arranged in the order of oscillation circuit, logic circuit, and temperature sensor circuit.

[0137] In this way, the logic circuit is positioned between the oscillator circuit and the temperature sensor circuit, thus suppressing noise from the temperature sensor circuit from being transmitted to the oscillator circuit. Furthermore, the oscillator circuit, logic circuit, and temperature sensor circuit can be efficiently arranged along the direction from the first side of the circuit device to the second side, thereby enabling the miniaturization of the circuit device.

[0138] Furthermore, in this embodiment, the power supply circuit is positioned between the first side and the oscillation circuit.

[0139] In this way, the power supply circuit and the oscillation circuit can be efficiently arranged along the direction from the first side of the circuit device to the second side, thus enabling the circuit device to be miniaturized.

[0140] Furthermore, in this embodiment, the temperature sensor circuit, the power supply circuit, and the oscillation circuit are arranged in the order of temperature sensor circuit, power supply circuit, and oscillation circuit between the first side of the circuit device and the second side which is the opposite side of the first side.

[0141] In this way, the power supply circuit is positioned between the oscillation circuit and the temperature sensor circuit, thus suppressing noise from the temperature sensor circuit from being transmitted to the oscillation circuit. Furthermore, the temperature sensor circuit, power supply circuit, and oscillation circuit can be efficiently arranged along the direction from the first side of the circuit device to the second side, thereby enabling the miniaturization of the circuit device.

[0142] Furthermore, in this embodiment, the logic circuit is positioned between the oscillation circuit and the second side.

[0143] In this way, the oscillator circuit and logic circuit can be efficiently arranged along the direction from the first side of the circuit device to the second side, thus enabling the miniaturization of the circuit device.

[0144] In addition, this embodiment may also include: a first terminal connected to one end of the oscillator; a second terminal connected to the other end of the oscillator; a power supply terminal into which a power supply voltage is input; and a ground terminal into which a ground voltage is input. The first terminal and the ground terminal are arranged along a third side that intersects the first side and the second side of the circuit device, and the power supply terminal and the second terminal are arranged along a fourth side of the circuit device that is opposite to the third side.

[0145] In this layout configuration, where a logic circuit or a power supply circuit is arranged between the oscillation circuit and the temperature sensor circuit, a first terminal connected to one end of the oscillator can be arranged on the third side of the circuit device at a position corresponding to the oscillation circuit, and a ground terminal can also be arranged along the third side together with the first terminal. Furthermore, a second terminal connected to the other end of the oscillator can be arranged on the fourth side of the circuit device at a position corresponding to the oscillation circuit, and a power supply terminal can also be arranged along the fourth side together with the second terminal.

[0146] Furthermore, in this embodiment, the power supply terminal is located at the first corner where the first side and the fourth side intersect, and the grounding terminal is located at the second corner where the second side and the third side intersect.

[0147] In this way, the grounding terminal located at the second corner and the first terminal connected to one end of the oscillator can be efficiently configured along the third side. Furthermore, the power supply terminal located at the first corner and the second terminal connected to the other end of the oscillator can be efficiently configured along the fourth side.

[0148] Furthermore, in this embodiment, the circuit device includes a clock terminal that outputs an output clock signal based on an oscillation signal, and the clock terminal is disposed at the third corner where the second and fourth sides intersect.

[0149] In this way, the clock terminal, which could become a noise source, is positioned at the third corner where the second and fourth sides intersect, which can suppress the noise of the output clock signal in the clock terminal from being transmitted to the oscillation circuit.

[0150] Furthermore, in this embodiment, the circuit device includes a power supply terminal that receives a power supply voltage, and a power supply circuit is disposed between the power supply terminal and the oscillation circuit.

[0151] In this way, a power supply voltage can be supplied to the power supply circuit from the power supply terminal using the shortest path, and the power supply circuit, based on the supplied power supply voltage, supplies power to the oscillation circuit using the shortest path. Therefore, an appropriate power supply based on the power supply voltage from the power supply terminal can be supplied to the oscillation circuit.

[0152] Furthermore, in this embodiment, the circuit device includes: an output buffer circuit that outputs an output clock signal based on an oscillation signal; and a clock terminal that outputs an output clock signal, wherein the output buffer circuit is disposed between the clock terminal and the logic circuit.

[0153] In this way, the clock signal output by the logic circuit based on the oscillation signal is input to the output buffer circuit via the shortest path and buffered, and then output as the output clock signal from the clock terminal. This suppresses the degradation of the output clock signal characteristics caused by parasitic resistance or capacitance in this path.

[0154] Furthermore, this embodiment relates to an oscillator that includes the circuitry and oscillator described above.

[0155] Furthermore, while this embodiment has been described in detail above, those skilled in the art will readily understand that various modifications can be made without substantially departing from the novel aspects and effects of this disclosure. Therefore, all such modifications are included within the scope of this disclosure. For example, in the specification or drawings, a term described at least once with a different term that is more general or synonymous can be replaced with that different term at any point in the specification or drawings. Moreover, all combinations of this embodiment and its modifications are also included within the scope of this disclosure. Furthermore, the structure and operation of the circuit device, oscillator, etc., are not limited to the structure and operation described in this embodiment, and various modifications can be implemented.

Claims

1. A circuit device, characterized in that, It includes: An oscillating circuit, which causes an oscillator to oscillate and generates an oscillating signal; The first terminal is connected to one end of the oscillator; The second terminal is connected to the other end of the oscillator; The temperature sensor circuit operates intermittently. A logic circuit that performs temperature compensation processing on the oscillation frequency of the oscillation circuit based on the output of the temperature sensor circuit; as well as The power supply circuit supplies power to the oscillation circuit. The temperature sensor circuit is located further away from the oscillation circuit than the first terminal and the second terminal. The logic circuit or the power supply circuit is arranged between the oscillation circuit and the temperature sensor circuit. A first regulator that supplies a first regulating power supply voltage to the oscillation circuit is arranged in the region of the power supply circuit. A second regulator that supplies a second regulating power supply voltage to the temperature sensor circuit is arranged in the region of the temperature sensor circuit.

2. The circuit device according to claim 1, characterized in that, The oscillation circuit includes: A first variable capacitor circuit, which controls the capacitor value based on frequency adjustment data obtained by the logic circuit through the temperature compensation process, is connected at one end to one end of the oscillator; and The second variable capacitor circuit, which controls the capacitance value according to the frequency adjustment data, has one end connected to the other end of the oscillator. The first terminal is configured adjacent to the first variable capacitor circuit, and the second terminal is configured adjacent to the second variable capacitor circuit.

3. The circuit device according to claim 1 or 2, characterized in that, The temperature sensor circuit performs the following intermittent operation: during the operation period, it calculates the temperature data corresponding to the temperature, and stops after outputting the temperature data to the logic circuit.

4. The circuit device according to claim 3, characterized in that, The logic circuit has a latch circuit that latches the temperature data output by the temperature sensor circuit during the operating period. The logic circuit also performs temperature compensation processing based on the latched temperature data during the stopping period of the temperature sensor circuit.

5. The circuit device according to claim 1 or 2, characterized in that, The temperature sensor circuit includes: Ring oscillator; A counter circuit that uses a clock signal based on the oscillation signal to count the output pulse signal of the ring oscillator, and outputs temperature data based on the count value obtained through the counting process; as well as A regulator that supplies a regulated power supply voltage to the ring oscillator. The regulator supplies the regulated power supply voltage to the ring oscillator during the intermittent operation period.

6. The circuit device according to claim 5, characterized in that, The temperature sensor circuit includes a current setting circuit, which operates according to the adjustable power supply voltage to set the operating current of the ring oscillator.

7. The circuit device according to claim 1 or 2, characterized in that, Between the first side of the circuit device and the second side, which is the opposite side of the first side, the oscillation circuit, the logic circuit, and the temperature sensor circuit are arranged in the order of the oscillation circuit, the logic circuit, and the temperature sensor circuit, and the temperature sensor circuit is arranged along the second side with the direction along the second side as its length direction.

8. The circuit device according to claim 7, characterized in that, The power supply circuit is positioned between the first side and the oscillation circuit.

9. The circuit device according to claim 1 or 2, characterized in that, Between the first side of the circuit device and the second side, which is the opposite side of the first side, the temperature sensor circuit, the power supply circuit, and the oscillation circuit are arranged in the order of the temperature sensor circuit, the power supply circuit, and the oscillation circuit, with the temperature sensor circuit arranged along the first side with the direction along the first side as the length direction.

10. The circuit device according to claim 9, characterized in that, The logic circuit is configured between the oscillation circuit and the second side.

11. The circuit device according to claim 7, characterized in that, The circuit device includes: Power supply terminals, which receive the input power supply voltage; and The grounding terminal is supplied with a grounding voltage. The first terminal and the ground terminal are arranged along a third side that intersects the first side and the second side of the circuit arrangement. The power terminal and the second terminal are arranged along the fourth side of the circuit arrangement, which is the opposite side of the third side.

12. The circuit device according to claim 11, characterized in that, The power terminal is located at the first corner where the first side and the fourth side intersect, and the grounding terminal is located at the second corner where the second side and the third side intersect.

13. The circuit device according to claim 12, characterized in that, The circuit device includes a clock terminal that outputs an output clock signal based on the oscillation signal. The clock terminal is located at the third corner where the second side and the fourth side intersect.

14. The circuit device according to claim 1 or 2, characterized in that, The circuit device includes a power supply terminal that receives a power supply voltage. The power supply circuit is positioned between the power supply terminal and the oscillation circuit.

15. The circuit device according to claim 1 or 2, characterized in that, The circuit device includes: An output buffer circuit that outputs an output clock signal based on the oscillation signal; and The clock terminal outputs the clock signal. The output buffer circuit is configured between the clock terminal and the logic circuit.

16. An oscillator, characterized in that, It includes: The circuit device according to any one of claims 1 to 15; and The oscillator.

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