Diode preparation method and semiconductor device

Abstract

The present application relates to a method for preparing a diode and a semiconductor device. The method comprises: providing a substrate, growing a first oxide layer on the front and back sides of the substrate; etching away a portion of the first oxide layer on the front side of the substrate by dry etching; performing ion implantation on the front side of the substrate and the front and side surfaces of the first oxide layer to generate a first doped region; performing high-temperature push-up on the front and back sides of the substrate and the front and side surfaces of the first oxide layer, and growing a second oxide layer on the front and back sides of the first oxide layer and the front side of the first doped region; etching away the first and second oxide layers on the back side of the substrate and a portion of the first oxide layer and a portion of the second oxide layer on the front side of the substrate by wet etching; and performing diffusion treatment on the front and back sides of the substrate and the front and side surfaces of the second oxide layer to generate a second doped region. The first oxide layer can protect the back side of the substrate, and the substrate is not damaged during ion implantation, and there is no need to thin the substrate, thus saving steps.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor devices, and in particular to a method for preparing a diode and a semiconductor device. Background Art

[0002] Among electronic components, a diode is a device with two electrodes that allows current to flow in only one direction. Therefore, a diode has a rectifying function.

[0003] For the preparation of diode doping regions, including the preparation of P+ doping regions and N+ doping regions, the existing technology usually adopts the method of preparing the P+ doping region first and then preparing the N+ doping region. For wafers that need to generate P+ doping regions on both the front and back sides, double-sided ion implantation is often used for production. When processing one side, the other side is inevitably damaged, so the thickness of the substrate needs to be set thicker. After ion implantation on one side, the thickness of the other side is thinned. This not only causes material loss, but also increases the process steps. Summary of the Invention

[0004] The present application aims to provide a method for preparing a diode and a semiconductor device to solve problems such as the cumbersome double-sided ion implantation process.

[0005] In a first aspect, an embodiment of the present application provides a method for preparing a diode, comprising:

[0006] Providing a substrate, and growing a first oxide layer on the front side and the back side of the substrate respectively;

[0007] etching away a portion of the first oxide layer on the front side of the substrate by dry etching;

[0008] Performing ion implantation on the front surface of the substrate and the front surface and side surfaces of the first oxide layer to generate a first doped region;

[0009] Performing high-temperature push-bonding on the front and back sides of the substrate and the front and side surfaces of the first oxide layer, and growing second oxide layers on the front and back sides of the first oxide layer and the front side of the first doped region;

[0010] Etching away the first oxide layer and the second oxide layer on the back side of the substrate and part of the first oxide layer and part of the second oxide layer on the front side of the substrate by wet etching;

[0011] Diffusion treatment is performed on the front and back surfaces of the substrate and the front and side surfaces of the second oxide layer to generate a second doping region.

[0012] The first doping region is an N+ doping region, and the second doping region is a P+ doping region.

[0013] In addition, the thickness of the substrate is 300 μm.

[0014] The step of etching away a portion of the first oxide layer on the front surface of the substrate by dry etching includes: anisotropically etching the first oxide layer on the front surface of the substrate.

[0015] In the step of performing ion implantation on the front surface of the substrate and the front surface and side surfaces of the first oxide layer to generate the first doped region, the energy of the ion implanter is 30Kev-50Kev, and the implanted ion dose is 3e15-4e15.

[0016] The step of performing diffusion treatment on the front and back sides of the substrate and the front and side surfaces of the second oxide layer to generate the second doped region includes: placing the substrate in a high-temperature furnace, introducing phosphorus oxychloride into the high-temperature furnace, and performing phosphorus oxychloride diffusion treatment on the center position of the front side of the substrate.

[0017] The step of placing the substrate in a high-temperature furnace, introducing phosphorus oxychloride into the high-temperature furnace, and performing phosphorus oxychloride diffusion treatment on the center position of the front surface of the substrate includes: introducing 0.5L±0.1L of phosphorus oxychloride, 10L±2L of nitrogen, and 0.2L±0.05L of oxygen into the high-temperature furnace at 950°C±50°C, and the process time is 16min±2min.

[0018] After the step of performing diffusion treatment on the front and back sides of the substrate and the front and side surfaces of the second oxide layer to generate the second doped region, the method further includes: performing high-temperature push-bonding in a high-temperature furnace to grow sacrificial layers on the front and back sides of the second doped region and on the front side of the second oxide layer, respectively, and then removing the sacrificial layer, part of the second oxide layer, and residual organic matter on the surface of the second oxide layer by acid bleaching.

[0019] After the steps of performing high-temperature push-bonding in a high-temperature furnace, growing sacrificial layers on the front and back sides of the second doped region and the front side of the second oxide layer, and then removing the sacrificial layers, part of the second oxide layer, and residual organic matter on the surface of the second oxide layer by acid bleaching, the method further includes: forming an anti-reflection layer by chemical vapor deposition on the front side of the second doped region and the front side of the second oxide layer, etching a lead hole on the anti-reflection layer by wet etching, growing a first electrode on the lead hole, and growing a second electrode on the back side of the second doped region.

[0020] In a second aspect, an embodiment of the present application further provides a semiconductor device, which is manufactured using the diode preparation method described above, and the semiconductor device includes: a substrate; a first doped region, doped at the center position of the front side of the substrate; a second doped region, doped on the back side of the substrate and the peripheral side of the front side of the substrate, the first doped region and the second doped region being isolated from each other; a first oxide layer, formed on the front side of the substrate; and a second oxide layer, formed on the side of the first oxide layer facing away from the substrate.

[0021] According to an embodiment of the present application, a method for preparing a diode and a semiconductor device are provided. In the method for preparing the diode, on the one hand, a first oxide layer is formed, and after etching the first oxide layer forming a first doped region, a first doped region is formed by single-sided ion implantation, so that the first oxide layer can protect other positions of the substrate from damage during the ion implantation stage. There is no need to etch it when selecting the substrate, and the substrate does not need to be thinned, which saves raw materials and process steps. On the other hand, the area occupied by the first oxide layer that needs to be etched during the first photolithography is very small, so dry etching is used to etch the center position of the front side of the substrate, which can achieve anisotropy in the etching profile, prevent side etching, reduce photoresist shedding or adhesion, have good etching uniformity, reduce the use of chemicals during etching, have good safety and low cost, and the area occupied by the first oxide layer and the second oxide layer that need to be etched during the second photolithography is very large, so wet etching is used to achieve large-area rapid etching, improve efficiency and product yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The features, advantages, and technical effects of exemplary embodiments of the present application will be described below with reference to the accompanying drawings. In the drawings, identical components are denoted by the same reference numerals. The drawings are not drawn to scale and are intended only to illustrate relative positions. Layer thicknesses in certain locations are exaggerated for ease of understanding, and the layer thicknesses depicted in the drawings do not necessarily represent actual layer thickness proportions.

[0023] Figure 1 A flow chart showing a method for preparing a diode provided by the present application;

[0024] FIG2( a ) is a schematic diagram showing a state after the first oxide layer is grown on the front and back sides of a substrate in a method for manufacturing a diode provided by the present application;

[0025] FIG2( b ) is a schematic diagram showing a state in which the first oxide layer at the center of the front surface of the substrate is etched away after the first oxide layer is subjected to one photolithography step in a method for manufacturing a diode provided by the present application;

[0026] FIG2( c ) is a schematic diagram showing a state of ion implantation on the front side of a substrate in a method for fabricating a diode provided by the present application;

[0027] FIG2( d ) is a schematic diagram showing a state where a first doped region is formed on a substrate in a method for manufacturing a diode provided by the present application;

[0028] FIG2(e) is a schematic diagram showing a state in which a first doped region is generated on a substrate and then a second oxide layer is grown by high-temperature push-junction growth in a method for manufacturing a diode provided by the present application;

[0029] FIG2( f ) is a schematic diagram showing a state where a substrate is subjected to a second photolithography step and then to diffusion in a method for fabricating a diode provided by the present application;

[0030] FIG2( g ) is a schematic diagram showing a state of a substrate after a second doping region is generated in a method for manufacturing a diode provided by the present application;

[0031] FIG2(h) is a schematic diagram showing a state of generating a sacrificial layer by high-temperature push-junction in a method for manufacturing a diode provided by the present application;

[0032] FIG2(i) is a schematic diagram showing a state in which a substrate undergoes a third photolithography step to remove a sacrificial layer and grow an anti-reflection layer in a method for manufacturing a diode provided by the present application;

[0033] FIG2(j) is a schematic diagram showing a state in which the anti-reflection layer of a substrate is subjected to a fourth photolithography process to form lead holes in a method for manufacturing a diode provided by the present application;

[0034] Figure 3 A cross-sectional view of a semiconductor device provided by the present application is shown.

[0035] Description of reference numerals:

[0036] 1. Substrate; 21. First doped region; 22. Second doped region; 31. First electrode; 32. Second electrode; 4. First oxide layer; 5. Second oxide layer; 6. Sacrificial layer; 7. Anti-reflection layer; 71. Lead hole. DETAILED DESCRIPTION

[0037] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In the detailed description below, many specific details are set forth in order to provide a comprehensive understanding of the present application. However, it will be apparent to those skilled in the art that the present application can be implemented without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples of the present application. In the accompanying drawings and the following description, at least some of the well-known structures and techniques are not shown in order to avoid unnecessary ambiguity in the present application; and, for clarity, the sizes of regional structures may be exaggerated. In addition, the features, structures, or characteristics described below may be combined in any suitable manner in one or more embodiments.

[0038] The directional words that appear in the following description refer to the directions shown in the figures and do not limit the specific structure of this application. In the description of this application, it should also be noted that, unless otherwise clearly specified and limited, the terms "installation" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to the specific circumstances.

[0039] Semiconductor devices are electronic devices with conductivity between good conductors and insulators, which use the special electrical properties of semiconductor materials to perform specific functions.

[0040] Specifically, semiconductor devices mainly include P-type photosensitive products and N-type photosensitive products. The main body region of the P-type photosensitive product comprises a substrate and a P-type epitaxial layer, with P+ and N+ doped regions formed within the P-type epitaxial layer. The main body region of the N-type photosensitive product comprises a substrate and an N-type epitaxial layer, with P+ and N+ doped regions formed within the N-type epitaxial layer.

[0041] The following takes a P-type photosensitive product as an example to illustrate the preparation method and layered structure of its doping region.

[0042] First embodiment

[0043] Figure 1 A flow chart of a method for preparing a diode provided in the present application is shown.

[0044] See Figure 1 As shown, the embodiment of the present application provides a method for preparing a diode, comprising the following steps:

[0045] S001, providing a substrate 1, and growing a first oxide layer 4 on the front and back sides of the substrate 1;

[0046] S002, etching away a portion of the first oxide layer on the front side of the substrate by dry etching;

[0047] S003, performing ion implantation on the front surface of the substrate and the front surface and side surfaces of the first oxide layer to generate a first doped region;

[0048] S004, performing high-temperature push-bonding on the front and back sides of the substrate and the front and side surfaces of the first oxide layer, and growing a second oxide layer on the front and back sides of the first oxide layer and the front side of the first doped region;

[0049] S005, etching away the first oxide layer and the second oxide layer on the back side of the substrate and a portion of the first oxide layer and a portion of the second oxide layer on the front side of the substrate by wet etching;

[0050] S006. Perform diffusion treatment on the front and back surfaces of the substrate and the front and side surfaces of the second oxide layer to generate a second doped region.

[0051] On the one hand, a first oxide layer is formed, and after the first oxide layer forming the first doped region is etched away, the first doped region is formed by single-sided ion implantation, so that the first oxide layer can protect other positions of the substrate from being damaged during the ion implantation stage. There is no need to etch it when selecting the substrate, and the substrate does not need to be thinned, which saves raw materials and process steps; on the other hand, the area occupied by the first oxide layer that needs to be etched away during the first photolithography is very small, so dry etching is used to etch the center position of the front side of the substrate, which can achieve anisotropy in the etching profile, prevent side etching, reduce photoresist shedding or adhesion, have good etching uniformity, reduce the use of chemicals during etching, have good safety and low cost, and the area occupied by the first oxide layer and the second oxide layer that need to be etched away during the second photolithography is very large, so wet etching is used to achieve large-area rapid etching, improve efficiency and product yield.

[0052] Among them, the first doped region is the N+ doped region, and the second doped region is the P+ doped region. Since the N+ doped region is only located on the front side of the substrate and occupies a smaller area, and the P+ doped region is located on the front and back sides of the substrate and occupies a larger area, the first oxide layer is first generated, and the first oxide layer of the N+ doped region is accurately etched away through ion implantation, which is more damaging, while protecting other substrate locations from damage. Then, the P+ doped region is formed through diffusion, which is less damaging to the substrate. This step does not affect other layered structures. By first preparing the N+ doped region and then the P+ doped region, damage to the substrate and other layered structures can be minimized, reducing process steps and improving yield.

[0053] In addition, the material of the substrate 1 is polycrystalline silicon or single crystal silicon, specifically a P-type zone fuse. The thickness of the substrate 1 is 300 μm. Compared with the 600 μm in the prior art, the thickness of the substrate 1 in this application is thinner. During the preparation process, since the first oxide layer 4 protects the substrate 1 during single-sided ion implantation, the diffusion process does not cause scratches or other damage to the substrate 1. Therefore, the substrate 1 does not need to be thinned during the preparation process. Therefore, a substrate 1 with a thickness of 300 μm can be selected. Compared with the prior art, the process steps are reduced and the work efficiency is improved.

[0054] FIG2( a ) is a schematic diagram showing a state after the first oxide layer 4 is grown on the front and back sides of a substrate 1 in a method for manufacturing a diode provided in the present application.

[0055] Referring to FIG. 2( a ), in step S001, the thickness of the first oxide layer 4 on both the front and back sides of the substrate 1 is 6300 Å ± 500 Å. By introducing nitrogen and oxygen into a high-temperature furnace for diffusion, the first oxide layer 4 is grown on both the front and back sides of the substrate 1. The first oxide layer 4 is typically made of silicon oxide.

[0056] FIG2( b ) shows a schematic diagram of the state of the first oxide layer 4 after one photolithography step in a method for manufacturing a diode provided by the present application.

[0057] Referring to FIG. 2( b ), in step S002 , the portion of the first oxide layer 4 corresponding to the first doped region 21 is etched away by dry etching, specifically, the first oxide layer 4 at the center of the front surface of the substrate 1 is etched away. Because the first doped region 21 occupies a relatively small area, dry etching is employed to ensure precise etching and prevent side etching. The portion of the first oxide layer referred to herein is the first oxide layer located at the center of the front surface of the substrate 1 .

[0058] During the dry etching process, a portion of the first oxide layer 4 on the front surface of the substrate 1 is anisotropically etched to precisely meet the required etching depth. Specifically, the dry etching profile is anisotropic, which prevents side etching and provides good etching uniformity. Dry etching also avoids issues with photoresist peeling or adhesion. Compared to wet etching, dry etching uses fewer chemicals, is safer, and has lower costs.

[0059] FIG2( c ) is a schematic diagram showing a state of single-side ion implantation of a substrate 1 in a method for manufacturing a diode provided in the present application.

[0060] Referring to FIG. 2( c ), in step S003 , single-side ion implantation is performed at the center of the front surface of the substrate 1 , and the other positions of the substrate 1 are protected from damage by the first oxide layer.

[0061] FIG2( d ) is a schematic diagram showing a state where a first doping region 21 is generated on a substrate 1 in a method for manufacturing a diode provided in the present application.

[0062] Referring to FIG. 2( d ), in step S003 , after single-sided ion implantation, ions are doped into the shallower portion of substrate 1 , thereby forming a first doped region 21 . The substrate is then placed in a diffusion furnace for deposition at a temperature of 1000°C, resulting in a junction depth of 1.7 μm in first doped region 21 .

[0063] The energy of the ion implanter is 30Kev-50Kev, and the implanted ion dose is 3e15-4e15. The energy and implanted ion dose of the ion implanter can ensure that the first doped region 21 is formed by ion doping under low temperature conditions, with low process requirements and precise depth control.

[0064] FIG2( e ) is a schematic diagram showing a state in which a second oxide layer 5 is grown by high-temperature push-junction growth after a first doping region 21 is generated on a substrate 1 in a method for manufacturing a diode provided by the present application.

[0065] Referring to Figure 2(e), in step S004, substrate 1 undergoes high-temperature push-bonding at 1100°C, forming a second oxide layer 5 with a thickness of 3000 Å to 5000 Å. Second oxide layer 5 is typically made of silicon oxide. Specifically, the high-temperature push-bonding process lasts for 125 minutes at a temperature of 900°C ± 200°C. During the push-bonding process, 2 L of wet oxygen and 10 L of dry oxygen are introduced, and the push-bonding time is 10 minutes.

[0066] FIG2( f ) is a schematic diagram showing a state in which a substrate 1 is subjected to a second photolithography and then diffused to form a second doped region 22 in a method for manufacturing a diode provided by the present application.

[0067] Please refer to Figure 2(f). In step S005, the first oxide layer 4 and the second oxide layer 5 on the back side of the substrate 1 and part of the first oxide layer 4 and part of the second oxide layer 5 on the front side of the substrate 1 are etched away by wet etching, and then the substrate is placed in a diffusion furnace and phosphorus oxychloride is introduced for high-temperature diffusion.

[0068] The portion of the first oxide layer 4 and the portion of the second oxide layer 5 refer to the first oxide layer 4 and the second oxide layer 5 located on the peripheral side of the substrate 1 .

[0069] Furthermore, during the diffusion of phosphorus oxychloride, 0.5L±0.1L of phosphorus oxychloride, 10L±2L of nitrogen, and 0.2L±0.05L of oxygen are introduced into a high-temperature furnace at 950°C±50°C. The process time is 16min±2min. The introduction of nitrogen and oxygen facilitates rapid diffusion while ensuring appropriate diffusion temperature and process time. These temperature and process time are intended to prevent impurities from entering substrate 1.

[0070] FIG2( g ) is a schematic diagram showing a state of a substrate after a second doping region is generated in a method for manufacturing a diode provided in the present application.

[0071] Referring to FIG. 2( g ), in step S006 , B30 is doped at a relatively shallow position of the substrate 1 to form a second doping region 22 . The junction depth of the second doping region 22 is 3 μm.

[0072] FIG2(h) is a schematic diagram showing a state in which a second doping region 22 is generated on a substrate 1 and a sacrificial layer 6 is generated by high-temperature push-junction in a method for manufacturing a diode provided by the present application.

[0073] As shown in FIG2(h), after the second doped region 22 is formed, a sacrificial layer 6 is grown on the front and back surfaces of the second doped region 22 and on the front surface of the second oxide layer 5 through high-temperature push-through bonding using nitrogen as a raw material in a high-temperature furnace. Specifically, the thickness of the sacrificial layer 6 is 300 Å to 600 Å.

[0074] FIG2( i ) is a schematic diagram showing a state in which the substrate 1 of the diode manufacturing method provided in the present application undergoes a third photolithography process to remove the sacrificial layer 6 and grow the anti-reflection layer 7 .

[0075] As shown in FIG2(i), after the step of growing the sacrificial layer 6, the process further includes removing the sacrificial layer 6, a portion of the second oxide layer 5, and any organic matter remaining on the surface of the second oxide layer 5 by acid bleaching. An anti-reflection layer 7 is deposited on the front surface of the second doped region 22 and the front surface of the second oxide layer 5. The thickness of the anti-reflection layer 7 is 1000 Å to 1600 Å. The function of the anti-reflection layer 7 is to reduce light reflection and increase the light absorption rate of the diode.

[0076] Specifically, the anti-reflection layer 7 is formed by chemical vapor deposition (CVD). Chemical vapor deposition (CVD) involves a high-temperature vapor phase reaction, such as the thermal decomposition of metal halides, organometallic compounds, hydrocarbons, hydrogen reduction, or a high-temperature chemical reaction involving mixed gases to precipitate inorganic materials such as metals, oxides, and carbides. The formation of the anti-reflection layer 7 eliminates the need for photolithography, reducing manufacturing costs, shortening the manufacturing cycle, and saving time and effort.

[0077] FIG2( j ) is a schematic diagram showing a state in which the anti-reflection layer 7 of the substrate 1 is subjected to the fourth photolithography to form lead holes in a method for manufacturing a diode provided by the present application.

[0078] Please refer to FIG. 2( j ), after the step of depositing the anti-reflection layer 7 , the process further includes: etching lead holes 71 on the anti-reflection layer 7 by wet etching.

[0079] Figure 3 A cross-sectional view of a semiconductor device provided by the present application is shown.

[0080] See also Figure 3 As shown, after etching a lead hole 71 in the anti-reflection layer 7 by photolithography, the process further includes growing a first electrode 31 on the lead hole 71 and growing a second electrode 32 on the back surface of the second doped region 22. The first electrode 31 is a positive electrode, formed by depositing aluminum, and has a thickness of 2 μm to 2.4 μm. The second electrode 32 is a negative electrode, formed by depositing silver. The negative electrode is formed by depositing titanium, nickel, and silver in order from bottom to top.

[0081] In summary, the present application only requires four steps of photolithography to form, and there is no need to thin the substrate 1. The process steps are few, the process is simple, the cost is low, the output and product yield are high, and it is suitable for voltage divider diodes.

[0082] It should be noted that in the above-mentioned photolithography steps: first selecting the material layer, applying the photoresist, exposing, removing the photoresist during development, dry etching or wet etching, and finally removing the remaining photoresist, this is a complete photolithography process.

[0083] In addition, the above-mentioned high-temperature furnaces are all atmospheric pressure diffusion furnace tubes. Atmospheric pressure diffusion furnace tubes are one of the important process equipment in the front process of semiconductor production lines. They are used for diffusion, oxidation, annealing, alloying and sintering processes in industries such as large-scale integrated circuits, discrete devices, power electronics, optoelectronic devices and optical fibers.

[0084] The process steps not described in detail in the flow are conventional process steps, such as lead hole lithography, lead hole corrosion, acid bleaching, diffusion, lithography, wet etching, etc., and will not be described in detail in this application.

[0085] Second embodiment

[0086] Please continue reading Figure 3 As shown, this embodiment provides a semiconductor device, which is manufactured using the diode manufacturing method described above, and the semiconductor device includes: a substrate; a first doping region, doped at the center position of the front side of the substrate; a second doping region, doped on the back side of the substrate and the peripheral side of the front side of the substrate, the first doping region and the second doping region are isolated from each other; a first oxide layer, formed on the front side of the substrate; and a second oxide layer, formed on the side of the first oxide layer facing away from the substrate.

[0087] The first doped region 21 is an N+ doped region, and the second doped region 22 is a P+ doped region. A P+ doped region is formed by doping on the back side of the substrate 1, and an N+ doped region is formed at the center of the front side of the substrate 1. The periphery of the N+ doped region is a P+ doped region, that is, the P+ doped region surrounds the N+ doped region. Thus, when the semiconductor device is operating, the P+ doped region can achieve a good voltage dividing effect.

[0088] Furthermore, the semiconductor device also includes: an oxide layer, an anti-reflection layer 7, a first electrode 31 and a second electrode 32. The anti-reflection layer 7 is formed on the front side of the substrate 1, and a lead hole is opened on the anti-reflection layer 7. The first electrode 31 is located in the lead hole, and the second electrode 32 is located on the back side of the first doping region 21. The oxide layer is located on the front side of the substrate 1, and includes a first oxide layer 4 located on the front side of the substrate 1 and a second oxide layer 5 formed on the side of the first oxide layer 4 facing away from the substrate 1.

[0089] It should be noted that the semiconductor device in this embodiment may also include other layer structures, such as a barrier, an epitaxial layer, etc., which will not be described in detail here.

[0090] The technical solution of the present application can be widely used in the preparation of various diodes, such as Schottky Barrier Diode (SBD), Fast Recovery Diode (FRD), Transient Voltage Suppressor (TVS), Switch Diode (switch diode), Rectifier Diode (Rectifier Diode), light source transistor, thyristor rectifier element, small signal transistor and other discrete device categories, all of which are applicable to the above solution.

[0091] It should be readily understood that “on,” “above,” and “over” in this application should be interpreted in the broadest manner, such that “on” means not only “directly on something,” but also includes “on something” with intervening features or layers therebetween, and “above” or “over” includes not only the meaning of “above” or “over,” but also includes the meaning of “above” or “over” with no intervening features or layers therebetween (i.e., directly on something).

[0092] As used herein, the term "layer" may refer to a portion of a material comprising an area having a certain thickness. A layer may extend over the entire underlying structure or overlying structure, or may have an extent that is smaller than the extent of the underlying or overlying structure. In addition, a layer may be an area of ​​a continuous structure that is homogeneous or inhomogeneous, and whose thickness is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of the continuous structure or between any pairs of lateral planes at the top and bottom surfaces. A layer may extend laterally, vertically, and / or along a tapered surface. A semiconductor device may be a layer, may include one or more layers therein, and / or may have one or more layers located above, above, and / or below it. A layer may include multiple layers. For example, an interconnect layer may include one or more conductors and contact layers (in which contacts, interconnects, and / or vias are formed) and one or more dielectric layers.

[0093] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some or all of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for preparing a diode, characterized in that: include: Providing a substrate, and growing a first oxide layer on the front side and the back side of the substrate respectively; etching away a portion of the first oxide layer on the front side of the substrate by dry etching; Ion implantation is performed on the front surface of the substrate and the front surface and side surfaces of the first oxide layer to generate a first doped region at the center of the front surface of the substrate; Performing high-temperature push-bonding on the front and back sides of the substrate and the front and side surfaces of the first oxide layer, and growing second oxide layers on the front and back sides of the first oxide layer and the front side of the first doped region; Etching away the first oxide layer and the second oxide layer on the back side of the substrate and part of the first oxide layer and part of the second oxide layer on the front side of the substrate by wet etching; Performing diffusion processing on the front and back surfaces of the substrate and the front and side surfaces of the second oxide layer to generate a second doped region; The first doping region is an N+ doping region, and the second doping region is a P+ doping region; The step of etching away a portion of the first oxide layer on the front surface of the substrate by dry etching includes: anisotropically etching the first oxide layer on the front surface of the substrate.

2. The method for preparing a diode according to claim 1, wherein: The thickness of the substrate is 300 μm.

3. The method for preparing a diode according to claim 1, wherein: In the step of performing ion implantation on the front surface of the substrate and the front surface and side surfaces of the first oxide layer to generate the first doped region, the energy of the ion implanter is 30Kev-50Kev, and the implanted ion dose is 3e15-4e15.

4. The method for preparing a diode according to claim 1, wherein: The step of performing diffusion treatment on the front and back sides of the substrate and the front and side surfaces of the second oxide layer to generate the second doped region includes: placing the substrate in a high-temperature furnace, introducing phosphorus oxychloride into the high-temperature furnace, and performing phosphorus oxychloride diffusion treatment on the center position of the front side of the substrate.

5. The method for preparing a diode according to claim 4, wherein: The step of placing the substrate in a high-temperature furnace, introducing phosphorus oxychloride into the high-temperature furnace, and performing phosphorus oxychloride diffusion treatment on the center position of the front surface of the substrate includes: introducing 0.5L±0.1L of phosphorus oxychloride, 10L±2L of nitrogen, and 0.2L±0.05L of oxygen into the high-temperature furnace at 950°C±50°C, and the process time is 16min±2min.

6. The method for preparing a diode according to claim 1, wherein: After the step of performing diffusion treatment on the front and back sides of the substrate and the front and side surfaces of the second oxide layer to generate the second doped region, the method further includes: performing high-temperature push-bonding in a high-temperature furnace to grow sacrificial layers on the front and back sides of the second doped region and on the front side of the second oxide layer, respectively, and then removing the sacrificial layer, part of the second oxide layer, and residual organic matter on the surface of the second oxide layer by acid bleaching.

7. The method for preparing a diode according to claim 6, wherein: After the steps of performing high-temperature push-bonding in a high-temperature furnace, growing sacrificial layers on the front and back sides of the second doped region and the front side of the second oxide layer, and then removing the sacrificial layers, part of the second oxide layer, and residual organic matter on the surface of the second oxide layer by acid bleaching, the method further includes: forming an anti-reflection layer by chemical vapor deposition on the front side of the second doped region and the front side of the second oxide layer, etching a lead hole on the anti-reflection layer by wet etching, growing a first electrode on the lead hole, and growing a second electrode on the back side of the second doped region.

8. A semiconductor device manufactured by the method for manufacturing a diode according to any one of claims 1 to 7, characterized in that: The semiconductor device comprises: substrate; A first doping region, doped at the center of the front surface of the substrate; a second doping region, doped on the back surface of the substrate and the peripheral side of the front surface of the substrate, wherein the first doping region and the second doping region are isolated from each other; A first oxide layer is formed on the front surface of the substrate; and A second oxide layer is formed on a side of the first oxide layer facing away from the substrate.

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