semiconductor devices

Abstract

The present invention provides a semiconductor device. A first component includes a first electronic circuit partially constituted by a semiconductor element of a single semiconductor system. A first conductor protrusion is provided on the first component. A second component is joined to the first component. The second component is smaller than the first component when viewed from above and includes a second electronic circuit partially constituted by a semiconductor element of a compound semiconductor system. A second conductor protrusion is provided on the second component. A power amplifier includes a preamplifier circuit and a postamplifier circuit. The second electronic circuit includes a postamplifier circuit. One of the first electronic circuit and the second electronic circuit includes a preamplifier circuit. The first electronic circuit includes a first switch that inputs a high-frequency signal input to a contact selected from a plurality of contacts to the preamplifier circuit, a control circuit that controls the operation of the preamplifier circuit and the postamplifier circuit, and a second switch that outputs a high-frequency signal output from the postamplifier circuit from a contact selected from a plurality of contacts.

Description

Technical Field

[0001] The present invention relates to semiconductor devices. Background Art

[0002] Electronic devices used in mobile communications, satellite communications, and other applications incorporate RF front-end modules that integrate high-frequency signal transmission and reception functions. These modules include a monolithic microwave integrated circuit (MMIC) with high-frequency amplification, a control IC that controls the high-frequency amplifier circuit, a switch IC, and a duplexer.

[0003] Patent Document 1 below discloses a structure that achieves miniaturization by stacking a control IC on top of an MMIC. The module disclosed in Patent Document 1 includes an MMIC mounted on a module substrate and a control IC stacked thereon. Electrodes on the MMIC, the control IC, and the module substrate are electrically connected via wire bonding.

[0004] Patent Document 1: U.S. Patent Application Publication No. 2015 / 0303971

[0005] High-frequency amplifier circuits, for example, use heterojunction bipolar transistors (HBTs). HBTs generate heat due to collector losses during operation. The resulting temperature rise in the HBT acts to further increase the collector current. If this positive feedback condition is met, the HBT will experience thermal runaway. To prevent thermal runaway, the HBT's output power is capped.

[0006] To achieve higher output of high-frequency amplifier circuits, it is desirable to improve the heat dissipation characteristics of semiconductor elements such as HBTs constituting MMICs. The module structure disclosed in Patent Document 1 is difficult to meet the recent demand for higher output of high-frequency amplifier circuits. Summary of the Invention

[0007] An object of the present invention is to provide a semiconductor device capable of improving heat dissipation characteristics from a semiconductor element.

[0008] According to one aspect of the present invention, there is provided a semiconductor device comprising:

[0009] The first component includes a first electronic circuit, a portion of which is composed of a single semiconductor-based semiconductor element disposed on a surface portion;

[0010] at least one first conductive protrusion, provided on one surface of the first component and connected to the first electronic circuit;

[0011] a second member joined to the surface of the first member on which the first conductive protrusion is provided, smaller than the first member in plan view, and including a second electronic circuit, a portion of which is formed of a compound semiconductor-based semiconductor element; and

[0012] At least one second conductor protrusion is provided on the second component, connected to the second electronic circuit, and protrudes in the same direction as the first conductor protrusion.

[0013] The second electronic circuit includes a post-amplifier circuit.

[0014] One of the first electronic circuit and the second electronic circuit includes a pre-amplifier circuit, and the high-frequency signal amplified by the pre-amplifier circuit is input to the post-amplifier circuit.

[0015] The first electronic circuit comprises:

[0016] a first switch for inputting a high-frequency signal input to a contact selected from a plurality of contacts into the pre-amplifier circuit;

[0017] a control circuit for controlling the operations of the pre-stage amplifier circuit and the post-stage amplifier circuit; and

[0018] The second switch allows the high-frequency signal output from the post-amplifier circuit to be output from one contact point selected from a plurality of contacts.

[0019] Heat generated by the semiconductor element in the second component is conducted through the second conductor protrusion and also conducted to the first component. Since heat is conducted from the second component in both directions, toward the second conductor protrusion and toward the first component, the excellent effect of improving the heat dissipation characteristics of the second component can be achieved. Generally speaking, the main material of the first component forming a semiconductor element of a single semiconductor system has a higher thermal conductivity than the main material of the second component forming a semiconductor element of a compound semiconductor system. Therefore, the heat conducted from the second component to the first component diffuses within the first component, which is larger than the second component. The heat diffused within the first component is dissipated to the outside. Therefore, the excellent effect of further improving the heat dissipation characteristics of the second component can be achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a schematic plan view of a high-frequency module equipped with the semiconductor device according to the first embodiment.

[0021] Figure 2A yes Figure 1 The cross-sectional view at the dashed line 2A-2A of FIG. Figure 2B This is an enlarged cross-sectional view of a semiconductor device and its surroundings.

[0022] Figure 3This is an enlarged cross-sectional view of one of the semiconductor elements included in the second component.

[0023] Figure 4 is a cross-sectional view of the semiconductor device according to the first embodiment.

[0024] Figure 5 This is a block diagram showing the circuit configuration of a high-frequency module incorporating the semiconductor device of the first embodiment.

[0025] Figures 6A to 6F The accompanying drawing is a schematic cross-sectional view of a semiconductor device at an intermediate stage in the manufacture of the semiconductor device.

[0026] Figure 7A as well as Figure 7B is a schematic cross-sectional view of a semiconductor device at an intermediate stage in the manufacture of the semiconductor device. Figure 7C is a schematic cross-sectional view of a completed semiconductor device.

[0027] Figure 8 This is a cross-sectional view showing a state where the high-frequency module equipped with the semiconductor device according to the first embodiment is mounted on a motherboard.

[0028] Figure 9 This is a block diagram showing the circuit configuration of a high-frequency module equipped with a semiconductor device according to a modified example of the first embodiment.

[0029] Figure 10 This is a block diagram showing the circuit configuration of a high-frequency module equipped with a semiconductor device according to another modified example of the first embodiment.

[0030] Figure 11 This is a block diagram showing the circuit configuration of a high-frequency module equipped with the semiconductor device according to the second embodiment.

[0031] Figure 12 This is a block diagram showing the circuit configuration of a high-frequency module equipped with the semiconductor device according to the third embodiment.

[0032] Figure 13 This is a block diagram showing the circuit configuration of a high-frequency module equipped with the semiconductor device according to the fourth embodiment.

[0033] Figure 14 This is a block diagram showing the circuit configuration of a high-frequency module equipped with the semiconductor device according to the fifth embodiment.

[0034] Figure 15 This is a block diagram showing the circuit configuration of a high-frequency module equipped with a semiconductor device according to a modified example of the fifth embodiment.

[0035] Figure 16 This is a block diagram showing the circuit configuration of a high-frequency module equipped with a semiconductor device according to another modified example of the fifth embodiment.

[0036] Figure 17 This is a block diagram showing the circuit configuration of a high-frequency module equipped with a semiconductor device according to another modified example of the fifth embodiment.

[0037] Figure 18 This is a block diagram showing the circuit configuration of a semiconductor device according to a sixth embodiment.

[0038] Explanation of Reference Numerals: 20…high-frequency module, 21…module substrate, 22…semiconductor device, 23…surface-mounted component, 24…pad, 25…solder, 26…ground plane, 27…connecting terminal, 28…via, 30…first component, 30L…lower surface, 30U…top surface, 31…pad, 32…first conductor protrusion, 33…substrate, 34…multilayer wiring structure, 34L…inner-layer pad, 34P…pad, 34V…via, 34W…wiring, 35…semiconductor element, 36…passive element, 39…first electronic circuit, 40… Second component, 41…pad, 42…second conductor protrusion, 44…semiconductor thin film, 44A…subcollector layer, 44B…element isolation region, 45…semiconductor element, 45B…base layer, 45BM…base mesa, 45C…collector layer, 45E…emitter layer, 45EM…emitter mesa, 45P…cap layer, 45T…contact layer, 46…emitter electrode, 46A…alloyed region, 46B…base electrode, 46C…collector electrode, 46E…emitter electrode, 47C…collector wiring, 47E…emitter wiring, 48A… Pad, 48E…emitter wiring, 49…second electronic circuit, 50…interlayer insulating film, 51…inter-component connection wiring, 52…protective film, 52A…opening, 53…solder, 80…sealing material, 81…metal film, 83…motherboard, 84…pad, 85…solder, 91…first thermal path, 92…second thermal path, 101…input switch (first switch), 102…preamplifier circuit, 103…postamplifier circuit, 104…power amplifier, 105…transmission band selector switch (second switch), 106…duplexer, 10 7…antenna switch (fourth switch), 108…frequency band selection switch for reception (fifth switch), 109…low-noise amplifier, 110…power amplifier control circuit, 111…output terminal selection switch for reception (sixth switch), 112…low-noise amplifier control circuit, 115…transmit / receive switching switch (third switch), 116…band-pass filter, 120…transmit-side matching circuit, 121…receive-side matching circuit, 200…motherboard, 201…peeling layer, 202…element formation layer, 203…protective film, 204…connection support. DETAILED DESCRIPTION

[0039] [First embodiment]

[0040] Reference Figures 1 to 8 The semiconductor device of the first embodiment is described with reference to the accompanying drawings.

[0041] Figure 1 This is a schematic top view of a high-frequency module 20 equipped with the semiconductor device 22 of the first embodiment. The semiconductor device 22, a low-noise amplifier 109, an antenna switch (fourth switch) 107, and multiple other surface-mount components 23 are mounted on the module substrate 21. The low-noise amplifier 109 and the antenna switch 107 are composed of single-chip semiconductor-based integrated circuit elements, such as silicon-based or germanium-based integrated circuit elements. Surface-mount components 23 are passive components such as inductors, capacitors, and resistors. The semiconductor device 22 includes a first component 30 and a second component 40 bonded to the lower surface of the first component 30 (the surface facing the module substrate 21). When viewed from above, the second component 40 is smaller than the first component 30 and is contained within the first component 30. For example, the first component 30 is composed of a single-chip semiconductor system, and the second component 40 is composed of a compound semiconductor.

[0042] Figure 2A yes Figure 1 The cross-sectional view at the dashed line 2A-2A of FIG. Figure 2B 2 is an enlarged cross-sectional view of the semiconductor device 22 and its surroundings. Figure 2A The high-frequency module 20 is shown in a state mounted on the motherboard 83 .

[0043] First, refer to Figure 2B The structure of the semiconductor device 22 will be described. The semiconductor device 22 includes a plate-shaped first component 30 and a film-shaped second component 40 bonded to the first component 30. Of the two surfaces of the first component 30 perpendicular to the thickness direction, the surface facing the module substrate 21 is referred to as the lower surface 30L, and the surface facing the opposite direction from the lower surface is referred to as the top surface 30U. The second component 40 is bonded to the lower surface 30L of the first component 30 and is thermally coupled to the first component 30. The second component 40 internally includes a plurality of semiconductor elements 45. Each of the plurality of semiconductor elements 45 is a compound semiconductor element, such as an HBT.

[0044] Multiple pads 31 are arranged in an area of ​​the lower surface 30L of the first component 30 that does not overlap with the second component 40. A first conductive protrusion 32 is arranged on each of the multiple pads 31 (the surface facing the same direction as the lower surface 30L). Furthermore, multiple pads 41 are arranged on the surface of the second component 40 that faces the module substrate 21 (the surface facing the same direction as the lower surface 30L of the first component 30). A second conductive protrusion 42 is arranged on each of the multiple pads 41. The first conductive protrusion 32 provided on the first component 30 and the second conductive protrusion 42 provided on the second component 40 protrude in the same direction from the first component 30 or the second component 40. At least one of the second conductive protrusions 42 overlaps with the multiple semiconductor elements 45 when viewed from above.

[0045] A plurality of pads 24 are arranged on the upper surface of the module substrate 21. The first conductive protrusions 32 of the first component 30 and the second conductive protrusions 42 of the second component 40 are connected to the pads 24 of the module substrate 21 via solder 25. In this manner, the semiconductor device 22 including the first component 30 and the second component 40 is mounted on the module substrate 21 by flip-chip bonding.

[0046] like Figure 2A As shown, in addition to the semiconductor device 22, a plurality of surface mount components 23 are mounted on the module substrate 21. At least one ground plane 26 is arranged on the inner layer of the module substrate 21. The second conductor protrusion 42 ( Figure 2B ) is overlapped with the semiconductor element 45 in a plan view via the conductor protrusion 25 ( Figure 2B )、pad 24( Figure 2B ) and the vias 28 in the module substrate 21 are electrically connected and thermally coupled to the ground plane 26.

[0047] A plurality of connection terminals 27 are arranged on the lower surface (the surface opposite to the surface on which the semiconductor device 22 is mounted) of the module substrate 21. At least one connection terminal 27 is connected to the ground plane 26 via a via 28.

[0048] The upper surface of the module substrate 21, the semiconductor device 22 mounted on the module substrate 21, and the plurality of surface-mount components 23 are covered with a sealing material 80. The surface of the sealing material 80 that faces the same direction as the top surface of the first component 30 is referred to as the top surface, and the surface extending from the edge of the top surface to the module substrate 21 is referred to as the side surface. The side surfaces of the sealing material 80 are continuous with the side surfaces of the module substrate 21 without any step difference.

[0049] The top and side surfaces of the sealing material 80, as well as the side surfaces of the module substrate 21, are covered with a metal film 81. Metal film 81 can be made of, for example, Cu or Al, and can be formed by, for example, sputtering. Metal film 81 is connected to the ground plane 26 on the side surfaces of the module substrate 21. Metal film 81 functions as a shielding film, shielding the electronic circuit composed of the semiconductor device 22 and the plurality of surface-mount components 23 mounted on the module substrate 21 from external electromagnetic fields.

[0050] A plurality of pads 84 are arranged on the upper surface of the motherboard 83 . The high-frequency module 20 is mounted on the motherboard 83 by connecting the plurality of connection terminals 27 of the module substrate 21 to the pads 84 of the motherboard 83 with solder 85 .

[0051] Figure 3 4 is a cross-sectional view of one of the semiconductor elements 45 included in the second component 40. The second component 40 includes a semiconductor film 44, a semiconductor element 45, various electrodes and wirings. The semiconductor film 44 and the first component 30 ( Figure 2B ) join. Figure 3 The cross-sectional view shown is relative to Figure 2A as well as Figure 2B The cross-section shown is reversed. Figure 3 In the description of Figure 2A as well as Figure 2B The side of the lower middle side is called the upper side.

[0052] The semiconductor thin film 44 is formed of a compound semiconductor, such as GaAs, and is divided into an n-type conductive subcollector layer 44A and an insulating element isolation region 44B. The semiconductor element 45 is formed on the subcollector layer 44A.

[0053] The semiconductor element 45 includes a base mesa 45BM formed on the subcollector layer 44A and an emitter mesa 45EM formed in a region of a portion of the upper surface of the base mesa 45BM. The base mesa 45BM includes a collector layer 45C, a base layer 45B, and an emitter layer 45E stacked in this order from the subcollector layer 44A. That is, from the first component 30 ( Figure 4 ) is stacked in this order from one side of the emitter layer 45C. The emitter mesa 45EM includes a cap layer 45P and a contact layer 45T disposed thereon.

[0054] As an example, collector layer 45C is formed of n-type GaAs, base layer 45B is formed of p-type GaAs, and emitter layer 45E is formed of n-type InGaP. Cap layer 45P is formed of n-type GaAs, and contact layer 45T is formed of n-type InGaAs. Semiconductor element 45, consisting of base mesa 45BM and emitter mesa 45EM, is an HBT. During operation of semiconductor element 45, heat is primarily generated in collector layer 45C, directly beneath emitter mesa 45EM.

[0055] A collector electrode 46C is arranged on a region of the sub-collector layer 44A where the base mesa 45BM is not arranged. A first-layer collector wiring 47C is arranged on the collector electrode 46C. Figure 3 The specific structure of the interlayer insulating film between the wiring layers is omitted in the drawings. The collector wiring 47C is electrically connected to the collector layer 45C via the collector electrode 46C and the sub-collector layer 44A.

[0056] A base electrode 46B is disposed on a region of the emitter layer 45E where the emitter mesa 45EM is not disposed. The base electrode 46B is electrically connected to the base layer 45B via an alloyed region 46A that penetrates the emitter layer 45E in the thickness direction and reaches the base layer 45B.

[0057] An emitter electrode 46E is disposed on the emitter mesa 45EM. The emitter electrode 46E is electrically connected to the emitter layer 45E via the contact layer 45T and the cap layer 45P. The emitter layer 45E located directly below the emitter mesa 45EM actually functions as an emitter region.

[0058] A first-layer emitter wiring 47E is arranged on the emitter electrode 46E, and a second-layer emitter wiring 48E is arranged thereon. The second-layer emitter wiring 48E is electrically connected to the emitter electrode 46E via the first-layer emitter wiring 47E. At least one pad 41 ( Figure 2B The pad 41 is electrically connected to the emitter layer 45E of the semiconductor element 45 .

[0059] Figure 4 1 is a cross-sectional view of the semiconductor device 22 according to the first embodiment. First, the structure of the first member 30 will be described.

[0060] The first component 30 includes a substrate 33 and a Figure 4A multilayer wiring structure 34 is provided (above the surface facing downward in the figure). As substrate 33, for example, a silicon-on-insulator (SOI) substrate is used. Alternatively, a conventional silicon substrate or the like may be used as substrate 33. When viewed from the side of substrate 33, multilayer wiring structure 34 is provided on the lower surface 30L. A plurality of silicon-based semiconductor elements 35 and the like are formed on the surface of substrate 33. A CMOS circuit, for example, is formed by the plurality of semiconductor elements 35.

[0061] The multilayer wiring structure 34 includes a plurality of wirings 34W, a plurality of inner layer pads 34L, a plurality of vias 34V for connecting layers, and a plurality of pads 34P arranged on the lower surface side. Figure 4 In the figure, the structure of the multiple interlayer insulating films within the multilayer wiring structure 34 is omitted. Multiple passive components 36 are arranged on the downward-facing surface of the substrate 33 or in the inner layers of the multilayer wiring structure 34. The semiconductor element 35, the passive components 36, and the wiring 34W, vias 34V, and inner pads 34L within the multilayer wiring structure 34 form a first electronic circuit 39. In other words, the first component 30 includes the first electronic circuit 39. Multiple pads 34P are connected to the first electronic circuit 39.

[0062] The second component 40 is bonded to a portion of the lower surface 30L of the first component 30. The second electronic circuit 49 is formed by a plurality of semiconductor elements 45 included in the second component 40. In other words, the second component 40 includes the second electronic circuit 49. The second component 40 includes an emitter wiring 48E ( Figure 3 ) and pad 48A.

[0063] On the first component 30 and the second component 40 ( Figure 4 A redistribution layer is disposed on the lower middle side of the first component 30 via an interlayer insulating film. The structure of the interlayer insulating film between the redistribution layer and the first component 30 and the second component 40 is omitted. The redistribution layer includes a plurality of pads 31 and 41, each formed of a metal pattern, and inter-component connection wiring 51. The inter-component connection wiring 51 connects the first electronic circuit 39 included in the first component 30 with the second electronic circuit 49 included in the second component 40.

[0064] The protective film 52 covers the plurality of pads 31, pads 41 and inter-component connection wiring 51 included in the rewiring layer. The protective film 52 is provided with a plurality of openings 52A that are respectively included in the plurality of pads 31 and pads 41 when viewed from above. The second conductor protrusions 42 are respectively arranged on the plurality of pads 41, and the first conductor protrusions 32 are respectively arranged on the plurality of pads 31. The first conductor protrusions 32 and the second conductor protrusions 42 protrude downward from the lower surface of the protective film 52. Solder 53 is placed on the downward facing surface of each of these first conductor protrusions 32 and the second conductor protrusions 42. For example, Cu is used as the first conductor protrusion 32 and the second conductor protrusion 42. In this case, the first conductor protrusion 32 and the solder 53 thereon, and the second conductor protrusion 42 and the solder 53 thereon are respectively referred to as Cu column bumps.

[0065] Figure 5 The semiconductor device 22 ( Figure 4 ) is a block diagram of the circuit configuration of a high-frequency module 20. High-frequency module 20 includes an input switch (first switch) 101, a power amplifier 104, a transmission band selector switch (second switch) 105, multiple duplexers 106, an antenna switch (fourth switch) 107, two reception band selector switches (fifth switch) 108, two low-noise amplifiers 109, a power amplifier control circuit 110, a reception output terminal selector switch (sixth switch) 111, and a low-noise amplifier control circuit 112. Power amplifier 104 includes a pre-amplifier circuit 102 and a post-amplifier circuit 103. This high-frequency module 20 has the function of transmitting and receiving using a frequency division duplexing (FDD) method. There can be one or more power amplifiers 104. Power amplifier 104 can also include a PA in addition to 102 and 103, resulting in a three-stage or higher configuration.

[0066] The pre-amplifier circuit 102 and the post-amplifier circuit 103 of the power amplifier 104 are included in the second component 40 ( Figure 4 ) of the second electronic circuit 49. The input switch 101, the frequency band selection switch 105 and the power amplifier control circuit 110 are included in the first component 30 ( Figure 4 ) of the first electronic circuit 39. Other functions are implemented by mounting on the module substrate 21 ( Figure 2A ) is realized by electronic components. Figure 5 In the figure, relatively light hatching is added to the electronic components included in the first electronic circuit 39, and relatively dark hatching is added to the electronic components included in the second electronic circuit 49. Figures 9 to 18 In the block diagram of FIG, the electronic components included in the first electronic circuit 39 and the electronic components included in the second electronic circuit 49 are also given the same hatching.

[0067] Next, the configuration and function of the high-frequency module 20 will be described.

[0068] The two input side contacts of the input switch 101 are connected via the first conductor protrusion 32 ( Figure 2B ) is connected to the high-frequency signal input terminals IN1 and IN2 of the module substrate 21. Figure 5 In FIG, the first conductor protrusion 32 is shown as a hollow square. A high-frequency signal is input from two high-frequency signal input terminals IN1 and IN2. The input switch 101 selects one of the two contacts on the input side and inputs the high-frequency signal input to the selected contact to the pre-amplifier circuit 102. The connection between the input switch 101 and the input port of the pre-amplifier circuit 102 is made using an inter-component connection wiring 51 ( Figure 4 ).exist Figure 5 In FIG, the locations connected by the component connection wiring 51 are shown with relatively thick solid lines. Figures 9 to 18 In the block diagram, the inter-component connection wiring 51 is also shown by a relatively thick solid line.

[0069] The high-frequency signal amplified by the pre-amplifier circuit 102 is input to the post-amplifier circuit 103. The high-frequency signal amplified by the post-amplifier circuit 103 is input to one input-side contact of the frequency band selection switch 105 via the transmission-side matching circuit 120. The output port of the post-amplifier circuit 103 and the transmission-side matching circuit 120 are connected via the second conductor protrusion 42 ( Figure 2B ) connection. Figure 5 In the figure, the second conductor protrusion 42 is shown as a black square. The transmission-side matching circuit 120 is connected to the input-side contact of the band selection switch 105 via the first conductor protrusion 32. The band selection switch 105 selects one contact from a plurality of output-side contacts and outputs the high-frequency signal amplified by the post-stage amplifier circuit 103 from the selected contact.

[0070] Two of the multiple contacts on the output side of the frequency band selection switch 105 are connected via the first conductor protrusion 32 ( Figure 2B ) are connected to the auxiliary output terminals PAAUX1 and PAAUX2. The other six contacts are connected via the first conductor protrusion 32 ( Figure 2B ) is connected to the transmission input ports of the plurality of duplexers 106 prepared for each frequency band. The frequency band selection switch 105 has a function of selecting one duplexer 106 from the plurality of duplexers 106 prepared for each frequency band.

[0071] Antenna switch 107 has multiple circuit-side contacts and two antenna-side contacts. Two of the multiple circuit-side contacts of antenna switch 107 are connected to transmit signal input terminals TRX1 and TRX2, respectively. The remaining six circuit-side contacts are connected to the multiple duplexer 106's shared input and output ports. The two antenna-side contacts are connected to antenna terminals ANT1 and ANT2, respectively. Antenna terminals ANT1 and ANT2 are each connected to an antenna. While the embodiment shows two antenna terminals, three or more antenna terminals are also possible.

[0072] Antenna switch 107 connects the two antenna-side contacts to two contacts selected from a plurality of circuit-side contacts. When communicating using a single frequency band, antenna switch 107 connects one circuit-side contact to one antenna-side contact. The high-frequency signal, amplified by power amplifier 104 and passed through duplexer 106 for the corresponding frequency band, is transmitted from the antenna connected to the selected antenna-side contact.

[0073] Each of the two receiving band select switches 108 has four input contacts. Three of the four input contacts of each of the two band select switches 108 are connected to the receiving output port of the duplexer 106. The remaining contact of each of the two band select switches 108 is connected to the auxiliary input terminals LNAAUX1 and LNAAUX2, respectively.

[0074] Two low noise amplifiers 109 are provided corresponding to the two receiving band selection switches 108. The two receiving band selection switches 108 input the reception signals passed through the duplexer 106 to the corresponding low noise amplifiers 109. The number of LNAs may be one or three or more.

[0075] The two circuit-side contacts of output terminal selection switch 111 are connected to the output ports of two low-noise amplifiers 109, respectively. The three terminal-side contacts of output terminal selection switch 111 are connected to received signal output terminals LNAOUT1, LNAOUT2, and LNAOUT3, respectively. The received signal amplified by low-noise amplifier 109 is output from the received signal output terminal selected by output terminal selection switch 111. While this embodiment employs three received signal output terminals, four or more may be used.

[0076] Power supply voltages are applied to the pre-amplifier circuit 102 and the post-amplifier circuit 103 from power supply terminals VCC1 and VCC2, respectively. The power supply terminals VCC1 and VCC2 are connected to the second conductor protrusion 42 ( Figure 2B) is connected to the power amplifier 104. At least one of the second conductor protrusions 42 provided on the second component 40 is connected to the ground plane 26 ( Figure 2A ) connection, but in Figure 5 Not shown.

[0077] The power amplifier control circuit 110 is connected to the first conductor protrusion 32 ( Figure 2B ) is connected to the power supply terminal VIO1, the control signal terminal SDATA1, and the clock terminal SCLK1. The power amplifier control circuit 110 controls the power amplifier 104 based on the control signal given to the control signal terminal SDATA1. The power amplifier control circuit 110 and the power amplifier 104 are connected using the inter-component connection wiring 51 ( Figure 4 ).

[0078] The low-noise amplifier control circuit 112 is connected to the power supply terminal VIO2, the control signal terminal SDATA2, and the clock terminal SCLK2. The low-noise amplifier control circuit 112 controls the low-noise amplifier 109 based on a control signal given to the control signal terminal SDATA2.

[0079] The module substrate 21 is also provided with a power supply terminal VBAT and a drain voltage terminal VDD2. Power is supplied from the power supply terminal VBAT to the bias circuit of the power amplifier 104 and the power amplifier control circuit 110. The drain voltage terminal VDD2 applies a power supply voltage to the low-noise amplifier control circuit 112, the low-noise amplifier 109, and other components mounted on the module substrate 21.

[0080] Next, refer to Figures 6A to 7C FIG, semiconductor device 22 ( Figure 4 ) is described in detail. Figures 6A to 7B FIG. 2 is a schematic cross-sectional view of a semiconductor device 22 during manufacture. Figure 7C 2 is a schematic cross-sectional view of the completed semiconductor device 22 .

[0081] like Figure 6A As shown, a peeling layer 201 is epitaxially grown on a mother substrate 200 of a single crystal compound semiconductor such as GaAs, and an element formation layer 202 is formed on the peeling layer 201. Figure 3 The semiconductor element 45, emitter electrode 46E, collector electrode 46C, base electrode 46B, emitter wiring 47E, collector wiring 47C, second-layer emitter wiring 48E, and other element structures are shown. These element structures are formed by general semiconductor processes. Figure 6AIn the embodiment, the element structure formed in the element formation layer 202 is omitted. At this stage, a plurality of second components 40 ( Figure 2A ) is not separated into individual second components 40. An insulating protective film 203 is formed on the element formation layer 202.

[0082] Next, if Figure 6B As shown, the resist pattern (not shown) is used as an etching mask to pattern the protective film 203, the element formation layer 202 and the peeling layer 201. At this stage, the element formation layer 202 is separated into the individual second components 40 ( Figure 2A ).

[0083] Next, if Figure 6C As shown in FIG. 2 , a connecting support 204 is attached to the separated protective films 203. Thus, a plurality of protective films 203 are connected to each other via the connecting support 204. Figure 6B The resist pattern used as an etching mask in the patterning step remains, so that the resist pattern is sandwiched between the protective film 203 and the connection support body 204.

[0084] Next, if Figure 6D As shown, the release layer 201 is selectively etched with respect to the mother substrate 200 and the element formation layer 202. As a result, the element formation layer 202, the protective film 203, and the connection support 204 are peeled off from the mother substrate 200. In order to selectively etch the release layer 201, a compound semiconductor having an etching resistance different from that of either the mother substrate 200 or the element formation layer 202 is used as the release layer 201.

[0085] Next, if Figure 6E As shown, the element forming layer 202 is bonded to the first component 30. At this stage, the first component 30 is not separated. Figure 2A as well as Figure 2B As shown in the figure, one wafer includes a plurality of first components 30. In addition, a Figure 4 The first electronic circuit 39 and the multilayer wiring structure 34 are shown, but in Figure 6E In the figure, illustration of these structures is omitted.

[0086] The bonding between the element formation layer 202 and the first member 30 is based on van der Waals bonds or hydrogen bonds. Alternatively, the element formation layer 202 and the first member 30 may be bonded together by electrostatic forces, covalent bonds, eutectic alloy bonds, or the like. For example, an Au film may be formed on a portion of the surface of the first member 30, and the element formation layer 202 and the Au film may be brought into close contact and pressurized to bond them together.

[0087] Next, if Figure 6FAs shown, the connection support 204 is peeled off from the protective film 203. Through the steps so far, a structure is obtained in which the second members 40, which are singulated, are bonded to the wafer including the plurality of first members 30.

[0088] After the connection support 204 is peeled off, Figure 7A As shown, an interlayer insulating film 50 and a rewiring layer are formed on the first component 30 and the second component 40. The rewiring layer includes inter-component connection wiring 51 ( Figure 4 ) etc. In addition, although Figure 7A Although not shown, the redistribution layer also includes a pad 31 ( Figure 4 ).

[0089] Next, if Figure 7B As shown in FIG. 1 , a protective film 52 is formed on the rewiring layer, and a plurality of openings 52A are formed in the protective film 52. The plurality of openings 52A are respectively included in the pads 41 and 31 ( Figure 4 The second conductor protrusion 42 and the first conductor protrusion 32 are formed in the opening 52A and on the protective film 52 ( Figure 4 ). Then, solder 53 is placed on the top surfaces of the first conductive protrusion 32 and the second conductive protrusion 42 and a reflow process is performed.

[0090] Finally, if Figure 7C As shown, a wafer including a plurality of first components 30 is cut. Thus, a wafer including the first component 30, the second component 40, the redistribution layer thereon, and the second conductor protrusion 42, the first conductor protrusion 32 ( Figure 4 ) etc., a monolithic semiconductor device 22.

[0091] Next, refer to Figure 8 The excellent effects of the first embodiment will be described.

[0092] Figure 8 1 is a cross-sectional view of a state where the high-frequency module 20 equipped with the semiconductor device 22 of the first embodiment is mounted on a motherboard 83. The semiconductor element 45 ( Figure 2B ) is generated by the second conductor protrusion 42 ( Figure 2B ) reaches the module substrate 21, and a second heat conduction path 92 reaches the first component 30 via the bonding surface between the first component 30 and the second component 40.

[0093] The heat conducted to the first component 30 is diffused within the first component 30. Generally, the semiconductor element 35 ( Figure 4 The thermal conductivity of the main material of the substrate 33 of the first component 30 is higher than the thermal conductivity of the main material of the second component 40 forming the compound semiconductor-based semiconductor element 45. Therefore, the heat conducted to the first component 30 is easily diffused within the first component 30. The heat diffused into the first component 30 is conducted to the metal film 81 through the sealing material 80. The heat diffused into the first component 30 is mainly conducted from the top surface of the first component 30 to the metal film 81 directly above it.

[0094] The thermal conductivity of the metal film 81 is greater than that of the sealing material 80, which is typically made of a resin or the like. Therefore, heat reaching the metal film 81 via the second thermal path 92 is conducted through the metal film 81 covering the top surface of the sealing material 80 to the metal film 81 covering the side surfaces of the sealing material 80 and the module substrate 21. Heat is dissipated to the outside from substantially the entire area of ​​the metal film 81, thereby improving the efficiency of heat dissipation from the metal film 81 conducted via the second thermal path 92.

[0095] Thus, heat generated by the semiconductor element 45 of the second member 40 is dissipated through both the first heat transfer path 91 directed downward and the second heat transfer path 92 directed upward when viewed from the second member 40. Therefore, a temperature rise in the semiconductor element 45 can be suppressed.

[0096] The electron mobility of compound semiconductors such as GaAs is higher than that of silicon. Figure 3 ) constitutes the power amplifier 104, thereby enabling the operating frequency of the power amplifier 104 to be increased.

[0097] In the first embodiment, the second member 40 is formed on the mother substrate 200 ( Figure 6D ) is attached to the first component 30 in a state of being peeled off, so the thickness dimension can be reduced compared to a structure in which the second component 40 and the motherboard 200 are attached to the first component 30. For example, the thickness of the second component 40 peeled off from the motherboard 200 is at most a few μm. Because the second component 40 is sufficiently thin, a rewiring layer can be formed on the lower surfaces of both components using a semiconductor process while the second component 40 is attached to the first component 30. Therefore, compared to a structure in which the first electronic circuit 39 included in the first component 30 and the second electronic circuit 49 included in the second component 40 are connected by wire bonding, the wiring can be miniaturized and the cost can be reduced.

[0098] In the embodiment of the present invention, the second electronic circuit 49 ( Figure 4 ) of the MMIC, and comprising a first electronic circuit 39 ( Figure 4) is mounted on different positions of the module substrate, the first electronic circuit 39 and the second electronic circuit 49 must be connected by wiring on the module substrate. In the first embodiment, the inter-component connection wiring 51 ( Figure 4 ) connects the first electronic circuit 39 and the second electronic circuit 49, thereby shortening the length of the wiring connecting the two. This reduces the transmission loss of high-frequency signals and enables miniaturization of the high-frequency module 20.

[0099] Next, refer to Figure 9 as well as Figure 10 , a modified example of the first embodiment is described.

[0100] Figure 9 as well as Figure 10 These are block diagrams showing the circuit configuration of a high-frequency module 20 equipped with semiconductor devices 22 according to two modified examples of the first embodiment.

[0101] In the first embodiment ( Figure 5 ), the input switch 101, the frequency band selection switch 105 and the power amplifier control circuit 110 are included in the first electronic circuit 39 ( Figure 4 ), but in Figure 9 In the modified example shown, only the power amplifier control circuit 110 is included in the first electronic circuit 39, and the input switch 101 and the band selection switch 105 are mounted separately from the semiconductor device 22 on the module substrate 21 ( Figure 2A ).

[0102] The input switch 101 and the pre-amplifier circuit 102 are connected via the second conductor protrusion 42 provided on the second component 40. The transmission side matching circuit 120 and the frequency band selection switch 105 are connected via the module substrate 21 ( Figure 2A ) within the wiring connections.

[0103] exist Figure 10 In the modified example shown, the input switch 101 and the power amplifier control circuit 110 are included in the first component 30 ( Figure 4 ) of the first electronic circuit 39, the band selection switch 105 is mounted separately from the semiconductor device 22 on the module substrate 21 ( Figure 2A ). The post-amplifier circuit 103 and the transmitting side matching circuit 120 are connected to Figure 9 The same modification example is shown, via the module substrate 21 ( Figure 2A ) within the wiring connections.

[0104] Next, other modified examples of the first embodiment will be described.

[0105] The high-frequency module 20 equipped with the semiconductor device 22 of the first embodiment includes six duplexers 106 ( Figure 5 ), but the number of duplexers 106 is not limited to six, and other numbers of duplexers 106 may be provided. In addition, the reception signal output terminals LNAOUT1, LNAOUT2, and LNAOUT3 ( Figure 5 ) is not limited to three. The number of antenna terminals, such as antenna terminals ANT1 and ANT2, is not limited to two. Any of the auxiliary output terminals PAAUX1 and PAAUX2, the transmit signal input terminals TRX1 and TRX2, and the auxiliary input terminals LNAAUX1 and LNAAUX2 may be omitted, or the number of these terminals may be increased.

[0106] like Figure 9 as well as Figure 10 As in the modified example shown, at least one of the input switch 101 and the band selection switch 105 may be mounted on the module substrate 21 separately from the semiconductor device 22. Conversely, at least one of the antenna switch 107, the receiving band selection switch 108, the low-noise amplifier 109, the output terminal selection switch 111, and the low-noise amplifier control circuit 112 may be included in the first electronic circuit 39.

[0107] Although GaAs is used as the semiconductor thin film 44 ( Figure 3 ), other compound semiconductors may also be used. Examples of compound semiconductors used for the semiconductor thin film 44 include AlAs, InAs, InP, GaP, InSb, GaN, InN, AlN, SiGe, SiC, Ga2O3, GaBi, or mixed crystal semiconductor materials containing elements of these materials. In addition, although in the first embodiment, a silicon-based semiconductor element is used as the semiconductor element 35 ( Figure 4 ), but other single semiconductor systems, such as germanium-based semiconductor elements, can also be used.

[0108] In the first embodiment, the electrodes used to mount the semiconductor device 22 on the module substrate 21 include the first conductive protrusion 32 and the solder 53 thereon, and the second conductive protrusion 42 and the solder 53 thereon. However, various other conductive protrusions may be used. For example, conductive posts, pillars, or ball bumps may be used as conductive protrusions for external connection.

[0109] [Second embodiment]

[0110] Next, refer to Figure 11 The semiconductor device of the second embodiment is described below. Figures 1 to 8 The same configurations as those of the semiconductor device of the first embodiment described in the accompanying drawings will be omitted.

[0111] Figure 11 The semiconductor device 22 ( Figure 4 ) is a block diagram of the circuit structure of the high frequency module 20. In the first embodiment, two frequency band selection switches 108 for reception and two low noise amplifiers 109 are mounted on the module substrate 21 ( Figure 5 ). In contrast, in the second embodiment, one band selection switch 108 and one low-noise amplifier 109 for reception are mounted.

[0112] Band select switch 108 has eight contacts on its input side. Six of the eight contacts are connected to the six receive output ports of duplexer 106. The remaining two contacts are connected to auxiliary input terminals LNAAUX1 and LNAAUX2, respectively. Band select switch 108 selects one of the eight input contacts and inputs the received signal to low-noise amplifier 109.

[0113] The circuit-side contact of the output terminal selection switch 111 is connected to the low noise amplifier 109. The reception signal amplified by the low noise amplifier 109 is output from one terminal selected by the output terminal selection switch 111 from among the three reception signal output terminals LNAOUT1, LNAOUT2, and LNAOUT3.

[0114] Next, the excellent effects of the second embodiment will be described.

[0115] In the second embodiment, as in the first embodiment, the semiconductor element 45 ( Figure 4 ) improves the heat dissipation characteristics and achieves miniaturization of the high-frequency module 20. The high-frequency module 20 of the first embodiment can process received signals of two frequency bands in parallel. However, if the function of processing received signals of two frequency bands in parallel is not required, the configuration of the second embodiment can also be adopted.

[0116] [Third embodiment]

[0117] Next, refer to Figure 12 The semiconductor device of the third embodiment is described below. Figures 1 to 8 The same configurations as those of the semiconductor device of the first embodiment described in the accompanying drawings will be omitted.

[0118] Figure 12 1 is a block diagram showing the circuit configuration of a high-frequency module 20 equipped with a semiconductor device according to the third embodiment. Figure 4) includes a power amplifier 104 ( Figure 5 ). In contrast, in the third embodiment, the second electronic circuit 49 ( Figure 9 ) includes two systems of power amplifiers 104. Each power amplifier 104 includes a pre-stage amplifier circuit 102 and a post-stage amplifier circuit 103.

[0119] In addition, although in the first embodiment, the input switch 101 ( Figure 5 ) included in the first electronic circuit 39 of the first component 30 ( Figure 4 ), but in the third embodiment, the input switch 101 and the semiconductor device 22 ( Figure 2A ) is independently mounted on the module substrate 21.

[0120] The input switch 101 has two contacts on the circuit side. These contacts are connected to the two pre-amplifier circuits 102 via the second conductor protrusion 42 provided on the second member 40. The input switch 101 switches the connection between the two high-frequency signal input terminals IN1 and IN2 and the two pre-amplifier circuits 102. Specifically, a high-frequency signal input to one high-frequency signal input terminal IN1 is input to one pre-amplifier circuit 102, while a high-frequency signal input to the other high-frequency signal input terminal IN2 is input to the other pre-amplifier circuit 102.

[0121] The transmission band selector switch 105 has two contacts on the input side. These two contacts are connected to the two post-amplifier circuits 103 via two transmission-side matching circuits 120. The band selector switch 105 connects one of the input contacts to one of the multiple output contacts, and the other of the input contacts to another of the multiple output contacts.

[0122] Power is supplied from the power supply terminal VCC1 to the two front-stage amplifier circuits 102, and power is supplied from the power supply terminal VCC2 to the two rear-stage amplifier circuits 103. The power amplifier control circuit 110 controls the power amplifiers 104 of the two systems.

[0123] Next, the excellent effects of the third embodiment will be described.

[0124] In the third embodiment, as in the first embodiment, the semiconductor element 45 ( Figure 4 ) improves the heat dissipation characteristics and realizes miniaturization of the high-frequency module 20. Furthermore, in the third embodiment, it is possible to cope with carrier aggregation for simultaneously transmitting high-frequency signals in two frequency bands.

[0125] Next, a modification of the third embodiment will be described.

[0126] In the third embodiment, the input switch 101 and the semiconductor device 22 ( Figure 2A ) are separately mounted on the module substrate 21 ( Figure 2A ), but it is also possible to make the first part 30 ( Figure 4 ) includes an input switch 101.

[0127] [Fourth embodiment]

[0128] Next, refer to Figure 13 The semiconductor device of the fourth embodiment is described below. Figures 1 to 8 The same configurations as those of the semiconductor device of the first embodiment described in the accompanying drawings will be omitted.

[0129] Figure 13 The semiconductor device 22 ( Figure 4 ) is a block diagram of the circuit structure of the high frequency module 20. In the first embodiment ( Figure 5 ), the pre-amplifier circuit 102 is included in the second component 40 ( Figure 4 ) of the second electronic circuit 49. In contrast, in the fourth embodiment, the preamplifier circuit 102 is included in the first component 30 ( Figure 4 The output port of the pre-amplifier circuit 102 and the input port of the post-amplifier circuit 103 are connected via the inter-component connection wiring 51 ( Figure 4 )connect.

[0130] From the power supply terminal VCC1 through the first conductor protrusion 32 ( Figure 4 ) supplies power to the pre-amplifier circuit 102. The power amplifier control circuit 110 and the pre-amplifier circuit 102 are connected via the wiring 34W ( Figure 4 )connect.

[0131] Next, the excellent effect of the fourth embodiment will be described. In the fourth embodiment, as in the first embodiment, the semiconductor element 45 ( Figure 4 ) improves the heat dissipation characteristics and realizes the miniaturization of the high-frequency module 20. Since the output power of the pre-amplifier circuit 102 is lower than that of the post-amplifier circuit 103, it can be realized by a silicon-based semiconductor element. Therefore, the pre-amplifier circuit 102 can be included in the first component 30 ( Figure 4 ) of the first electronic circuit 39. In addition, by including the pre-amplifier circuit 102 in the first electronic circuit 39, the compatibility between the pre-amplifier circuit 102 and the input switch 101 can be improved, thereby improving the noise characteristics.

[0132] [Fifth embodiment]

[0133] Next, refer to Figure 14 The semiconductor device of the fifth embodiment will be described. Figures 1 to 8 The same configurations as those of the semiconductor device of the first embodiment described in the accompanying drawings will be omitted.

[0134] Figure 14 The semiconductor device 22 ( Figure 4 ) is a block diagram of the circuit configuration of a high-frequency module 20. The high-frequency module 20 of the first embodiment has the function of transmitting and receiving using the FDD method. In contrast, the high-frequency module 20 of the fifth embodiment has the function of transmitting and receiving using the time division duplexing (TDD) method.

[0135] The high-frequency module 20 of the fifth embodiment includes two transmit / receive circuits for processing transmit / receive signals in different frequency bands. Each of these circuits includes a power amplifier 104, a transmit-side matching circuit 120, a transmit / receive switch (third switch) 115, a bandpass filter 116, a receive-side matching circuit 121, and a low-noise amplifier 109. The power amplifier 104 has a two-stage structure consisting of a pre-amplifier circuit 102 and a post-amplifier circuit 103.

[0136] The two input-side contacts of input switch 101 are connected to the two high-frequency signal input terminals IN1 and IN2, respectively. The two output-side contacts of input switch 101 are connected to the input ports of two pre-amplifier circuits 102, respectively. Input switch 101 switches the connection between the two high-frequency signal input terminals IN1 and IN2 and the two pre-amplifier circuits 102.

[0137] The output port of post-amplifier circuit 103 is connected to the transmit signal input contact of transmit / receive selector switch 115 via transmit-side matching circuit 120. The receive signal output contact of transmit / receive selector switch 115 is connected to the input port of low-noise amplifier 109 via receive-side matching circuit 121. Transmit / receive selector switch 115 also has a transmit / receive common contact, and switching between transmission and reception is achieved by selectively connecting the transmit / receive common contact to either the transmit signal input contact or the receive signal output contact.

[0138] The transmission and reception common contacts of the two transmission and reception changeover switches 115 are connected to two circuit-side contacts of the antenna switch 107 via bandpass filters 116. The two antenna-side contacts of the antenna switch 107 are connected to antenna terminals ANT1 and ANT2, respectively.

[0139] The configuration of the output terminal selection switch 111 connecting the two low noise amplifiers 109 and the three reception signal output terminals LNAOUT1, LNAOUT2, and LNAOUT3 is similar to the configuration of the output terminal selection switch 111 of the high frequency module 20 of the first embodiment ( Figure 5 )same.

[0140] The input switch 101, two pre-amplifier circuits 102, a power amplifier control circuit 110, and two transmit / receive switching switches 115 are included in the first component 30 ( Figure 4 ) of the first electronic circuit 39. The two post-amplifier circuits 103 are included in the second component 40 ( Figure 4 )'s second electronic circuit 49.

[0141] The first electronic circuit 39 and the second electronic circuit 49 are connected via an inter-component connection wiring 51 ( Figure 4 ) is connected. The first electronic circuit 39 is connected to the module substrate 21 ( Figure 4 ) is connected to the first conductor protrusion 32 ( Figure 2B ) is connected. The second electronic circuit 49 is connected to the module substrate 21 ( Figure 4 ) is connected to the second conductor protrusion 42 ( Figure 2B )connect.

[0142] Next, the excellent effects of the fifth embodiment will be described.

[0143] In the fifth embodiment, as in the first embodiment, the semiconductor element 45 ( Figure 4 ) is improved in heat dissipation characteristics and miniaturization of the high-frequency module 20 is achieved.

[0144] Next, refer to Figure 15 、 Figure 16 、 Figure 17 A semiconductor device according to a modified example of the fifth embodiment will be described. Figure 15 、 Figure 16 、 Figure 17 Each of them is a block diagram showing a circuit configuration of a high-frequency module 20 equipped with a semiconductor device 22 according to a modification of the fifth embodiment.

[0145] exist Figure 15 In the modified example shown, the first electronic circuit 39 of the first component 30 includes two bandpass filters 116 in addition to the first electronic circuit 39 of the semiconductor device 22 of the fifth embodiment. Figure 4 ) or arranged on a multilayer wiring structure 34 ( Figure 4 ) implements the bandpass filter 116 by the passive components in the inner layer.

[0146] The transmission and reception common contact of the transmission and reception switching switch 115 and the bandpass filter 116 are connected through the multilayer wiring structure 34 ( Figure 4 ) is connected to the wiring 34W in the first component 30. The contact point of the circuit side of the bandpass filter 116 and the antenna switch 107 is connected via the first conductor protrusion 32 ( Figure 2B )connect.

[0147] exist Figure 16 In the modified example shown, the first electronic circuit 39 of the first component 30 has Figure 15 The semiconductor device 22 of the modified example shown in FIG. 1 further includes an antenna switch 107 in addition to the first electronic circuit 39. The contact point between the bandpass filter 116 and the circuit side of the antenna switch 107 is connected via the multilayer wiring structure 34 ( Figure 4 ) is connected to the wiring 34W in the antenna switch 107. The antenna side contact of the antenna switch 107 is connected to the antenna switch 107 via the first conductor protrusion 32 ( Figure 2B ) to connect.

[0148] exist Figure 17 In the modified example shown, the first electronic circuit 39 of the first component 30 has Figure 16 The semiconductor device 22 of the modified example shown in the figure further includes a low-noise amplifier control circuit 112, two low-noise amplifiers 109, and an output terminal selection switch 111. The input port of the low-noise amplifier 109 is connected to the receiving-side matching circuit 121 via the first conductor protrusion 32 ( Figure 2B ) is connected. Furthermore, the terminal-side contact of the output terminal selection switch 111 is connected to the reception signal output terminals LNAOUT1, LNAOUT2, and LNAOUT3 via the first conductor protrusion 32 (Figure B) provided on the first component 30. The low noise amplifier control circuit 112 is connected via the first conductor protrusion 32 ( Figure 2B ) is connected to the power supply terminal VIO2, the control signal terminal SDATA2 and the clock terminal SCLK2.

[0149] like Figure 15 、 Figure 16 、 Figure 17 As shown in the modified example, by increasing the number of circuit components constituting the first electronic circuit 39 included in the first component 30 among the plurality of circuit components constituting the high-frequency module 20, the number of components to be mounted on the module substrate 21 ( Figure 2A ) The number of components is reduced. Thus, the high-frequency module 20 can be miniaturized.

[0150] [Sixth embodiment]

[0151] Next, refer to Figure 18 The semiconductor device of the sixth embodiment is described below. Figure 14 Description of the same configurations as those of the semiconductor device of the fifth embodiment will be omitted.

[0152] Figure 18 The semiconductor device 22 ( Figure 4 ) is a block diagram of the circuit configuration. The high-frequency module 20 equipped with the semiconductor device 22 of the fifth embodiment has two systems of transmitting and receiving circuits, but the semiconductor device 22 of the sixth embodiment has only one system of transmitting and receiving circuits. Since the transmitting and receiving circuits are one system, the semiconductor device 22 of the sixth embodiment does not have the input switch 101 ( Figure 14 ).

[0153] All functions except for the post-amplifier circuit 103 of the power amplifier 104 are implemented by the first electronic circuit 39 included in the first component 30. Specifically, the first electronic circuit 39 includes the pre-amplifier circuit 102, the power amplifier control circuit 110, the low-noise amplifier control circuit 112, the transmission-side matching circuit 120, the reception-side matching circuit 121, the transmission / reception switch 115, the bandpass filter 116, the antenna switch 107, the low-noise amplifier 109, and the output terminal selection switch 111. The transmission-side matching circuit 120 and the reception-side matching circuit 121 use passive components such as capacitors and inductors.

[0154] The first conductor protrusion 32 ( Figure 2B ) is used to connect the first electronic circuit 39 with the second component 40 ( Figure 4 ) is connected to an external circuit other than the second electronic circuit 49 included in the second component 40. The second conductor protrusion 42 ( Figure 2B ) constitutes the power supply terminal VCC2 for the post-stage amplifier circuit 103.

[0155] Next, the excellent effects of the sixth embodiment will be described. If the semiconductor device 22 of the sixth embodiment is used, it is not necessary to mount it on the module substrate 21 ( Figure 2A ) surface mount component 23. That is, the high-frequency module 20 can be realized with the semiconductor device 22 alone. Therefore, the high-frequency module 20 can be further miniaturized. In addition, the semiconductor device 22 of the sixth embodiment can also be mounted on the module substrate 21.

[0156] In addition, in the semiconductor device 22 of the sixth embodiment, a first heat conduction path 91 ( Figure 8 ), and conducts it to the second heat conduction path 92 ( Figure 8 ). Therefore, similarly to the first embodiment, the heat dissipation characteristics can be improved.

[0157] Next, a modification of the sixth embodiment will be described. The semiconductor device 22 of the sixth embodiment includes a single system of transmitting and receiving circuits, but may also be a high-frequency module 20 ( Figure 14 ) or more than three systems of transmitting and receiving circuits. In this case, all functions other than the post-amplifier circuit 103 included in the plurality of transmitting and receiving circuits are realized by the first electronic circuit 39. In the case of a plurality of transmitting and receiving circuits, as in the semiconductor device 22 ( Figure 14 ) as described above, the first electronic circuit 39 may include an input switch 101.

[0158] The above-described embodiments are intended to be illustrative. It is naturally possible to substitute or combine components shown in different embodiments. The same functions and effects resulting from the same components in multiple embodiments are not mentioned sequentially for each embodiment. Furthermore, the present invention is not limited to the above-described embodiments. For example, it is clear that those skilled in the art can make various modifications, improvements, and combinations.

Claims

1. A semiconductor device comprising: The first component includes a first electronic circuit, a portion of which is composed of a single semiconductor-based semiconductor element disposed on a surface portion; at least one first conductive protrusion, provided on one surface of the first component and connected to the first electronic circuit; A second component (40) is joined to the surface of the first component provided with the first conductor protrusion, is smaller than the first component in a plan view, and includes a second electronic circuit, a portion of which is composed of a compound semiconductor-based semiconductor element; at least one second conductive protrusion, provided on the second component, connected to the second electronic circuit, and protruding in the same direction as the first conductive protrusion; as well as The power amplifier includes a pre-amplifier circuit and a post-amplifier circuit. The second electronic circuit includes a post-amplifier circuit. One of the first electronic circuit and the second electronic circuit includes a pre-amplifier circuit, and the high-frequency signal amplified by the pre-amplifier circuit is input to the post-amplifier circuit. The first electronic circuit comprises: a first switch for inputting a high-frequency signal input to a contact selected from a plurality of contacts into the pre-amplifier circuit; a control circuit for controlling the operations of the pre-stage amplifier circuit and the post-stage amplifier circuit; and The second switch allows the high-frequency signal output from the post-amplifier circuit to be output from one contact point selected from a plurality of contacts.

2. The semiconductor device according to claim 1, wherein The semiconductor device further includes a redistribution layer, the redistribution layer being arranged on the surface of the first member on which the first conductive protrusion is provided and on the surface of the second member on which the second conductive protrusion is provided. The rewiring layer includes inter-component connection wiring that electrically connects the first electronic circuit and the second electronic circuit, and a plurality of pads that serve as bases for the first conductive protrusion and the second conductive protrusion.

3. The semiconductor device according to claim 1 or 2, wherein: The pre-stage amplifier circuit is included in the second electronic circuit.

4. The semiconductor device according to claim 1 or 2, wherein The pre-stage amplifier circuit is included in the first electronic circuit.

5. The semiconductor device according to any one of claims 1 to 4, wherein The first electronic circuit further includes a third switch, the third switch including a transmitting signal input contact to which the high-frequency signal output from the post-amplifier circuit is input, a receiving signal output contact connected to other circuits, and a transmitting-receiving common contact selectively connected to one of the transmitting signal input contact and the receiving signal output contact. The semiconductor device according to claim 5 , wherein: The first electronic circuit further includes a transmission-side matching circuit composed of passive elements connected between the post-stage amplifier circuit and the transmission signal input contact of the third switch.

7. The semiconductor device according to claim 5 or 6, wherein: The first electronic circuit further includes a bandpass filter connected to the common contact point for transmission and reception of the third switch.

8. The semiconductor device according to claim 7, wherein The first electronic circuit further includes a fourth switch having a plurality of antenna-side contacts connected to the antenna. The fourth switch selects one of the plurality of antenna-side contacts and connects the selected contact to the bandpass filter.

9. The semiconductor device according to any one of claims 5 to 8, wherein The first electronic circuit further includes a low noise amplifier connected to the reception signal output contact of the third switch.

10. The semiconductor device according to claim 9, wherein The first electronic circuit further includes a receiving-side matching circuit composed of passive elements connected between the reception signal output contact of the third switch and the low-noise amplifier.

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