A control circuit for regulating the multiplication factor of a charge pump output voltage

Abstract

The application provides a control circuit for regulating the output voltage multiplication of a charge pump, which controls the opening and closing of a first switch group, a second switch group, a third switch group, a fourth switch group and a phi 3 switch through switch period control, the first switch group at least includes phi 11 and phi 12, the second switch group at least includes phi 13 and phi 14, the third switch group at least includes phi 21 and phi 22, the fourth switch group at least includes phi 23 and phi 24, and the control timing sequence is as follows: the first switch group, the third switch group and the phi 3 switch are closed when the first switch group, the third switch group and the phi 3 switch are high; the first switch group, the third switch group and the phi 3 switch are opened when the first switch group, the third switch group and the phi 3 switch are low; the second switch group and the fourth switch group are closed when the second switch group and the fourth switch group are high; the second switch group and the fourth switch group are opened when the second switch group and the fourth switch group are low; T3 is the switch on time of the phi 3 switch, and the output voltage multiplication of the charge pump is regulated by controlling T3. The application has simple structure, convenient use and high value.

Description

Technical Field

[0001] This invention relates to the field of charge pump technology, and in particular to a control circuit for adjusting the output voltage ratio of a charge pump. Background Technology

[0002] A charge pump, also known as a switched-capacitor voltage converter, is a DC-DC converter that uses a capacitor (rather than an inductor or transformer) to store energy, either "flying" or "pumping." A charge pump is a DC-DC converter that uses capacitors as energy storage elements, often to generate an output voltage higher than the input voltage or a negative output voltage. Charge pump circuits are highly efficient, around 90-95%, and the circuitry is quite simple. Charge pumps use switching elements to control the voltage connected to the capacitor. For example, a two-stage cycle can be used to generate a higher pulse voltage output from a lower input voltage. In the first stage of the cycle, the capacitor is connected to the power supply and thus charged to the same voltage. In the second stage, the circuit configuration is adjusted so that the capacitor and the power supply voltage are connected in series. Ignoring leakage current effects and assuming no load, the output voltage will be twice the input voltage.

[0003] Because Cfly1 and Cfly2 are integrated into the IC, their sizes are fixed in actual layout implementation due to IC area constraints. The charge pump, through timing control, obtains two different VSP voltage values: 2*VDD and 3*VDD. When the application requires a voltage between 2*VDD and 3*VDD, this can only be achieved by clamping the VSP output voltage in the 3*VDD mode using a feedback loop. This approach sacrifices the charge pump's efficiency, thus increasing the current demand on the input power supply.

[0004] Currently, there is no technical solution to solve the above-mentioned technical problems; specifically, there is no control circuit for adjusting the output voltage ratio of the charge pump. Summary of the Invention

[0005] To address the technical deficiencies of existing capacitor circuits under heavy load conditions, this invention provides a control circuit for adjusting the output voltage ratio of a charge pump. The circuit includes at least a first switch group, a second switch group, a third switch group, a fourth switch group, and a φ3 switch. The opening and closing of the first switch group, the second switch group, the third switch group, the fourth switch group, and the φ3 switch are controlled by a switching cycle, which includes at least timings T1, T2, T3, T4, and T5. The first switch group includes at least φ11 and φ12, the second switch group includes at least φ13 and φ14, the third switch group includes at least φ21 and φ22, and the fourth switch group includes at least φ23 and φ24. The control timing relationship is as follows:

[0006] The first switch group, the third switch group, and φ3 are closed when the level is high.

[0007] The first switch group, the third switch group, and φ3 are disconnected when the level is low.

[0008] The second and fourth switch groups are closed when the level is high;

[0009] The second and fourth switch groups are disconnected when the level is low;

[0010] T1 is the non-overlapping time between the first and third switch groups, and T1 is the sum of T2, T3, T4, and T5;

[0011] Among them, T2, T4, and T5 are fixed and identical non-overlapping times, which include the non-overlapping switching times of the third switch group and φ3, the fourth switch group and φ3, the fourth switch group and the third switch group, the first switch group and φ3, the third switch group and φ3, and the fourth switch group and the second switch group.

[0012] T3 is the on-time of the switch φ3. The output voltage ratio of the charge pump can be adjusted by controlling T3.

[0013] Furthermore, the first switch group includes a first capacitor Cfly1, and the two ends of the first capacitor Cfly1 are respectively provided with a C1 P node and a C1 N node. The C1 P node is connected to the input voltage VDD through a φ11 switch and connected to the output voltage VSP through a φ21 switch; the C1 N node is connected to ground through a φ13 switch and connected to the input voltage VDD through a φ23 switch.

[0014] The second switch group includes a second capacitor Cfly2. The two ends of the second capacitor Cfly2 are respectively provided with a C2P node and a C2N node. The C2P node is connected to the input voltage VDD through a φ22 switch and connected to the output voltage VSP through a φ12 switch. The C2N node is connected to ground through a φ24 switch and connected to the input voltage VDD through a φ14 switch.

[0015] The C1P node and the C2P node are connected by a φ3 switch.

[0016] Furthermore, when switch φ3 is turned off, Cfly1 and Cfly2 will not redistribute their charges;

[0017] When switch φ3 is turned on, Cfly1 and Cfly2 will redistribute their charges.

[0018] As the on-time T of switch φ3 increases, the output voltage multiplier of the charge pump increases.

[0019] Furthermore, the range for adjusting the output voltage multiplier of the charge pump is 2*VDD to 3*VDD.

[0020] Furthermore, the conduction time range of the φ3 switch is 0 to 31*R*C, where R is the conduction impedance of the φ3 switch, and C is the first capacitor Cfly1 or the second capacitor Cfly2.

[0021] Based on existing technology, the charge pump of this invention controls the opening and closing of the first, second, third, and fourth switch groups, as well as the φ3 switch, through switching cycles. The switching cycles include at least timing sequences T1, T2, T3, T4, and T5. As the on-time T of the φ3 switch increases, the output voltage multiplier of the charge pump increases. By designing a reasonable timing sequence to control the first and second switch groups of the charge pump, and by making the on-time of the φ3 switch adjustable via a register, the continuously adjustable VSP multiplier can be achieved. This also significantly improves the reduction of the charge pump's input current and enhances its conversion efficiency. This design concept can be applied to any circuit topology employing a complementary charge pump structure. This invention has a simple structure, powerful functionality, and significant commercial value. Attached Figure Description

[0022] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0023] Figure 1A connection diagram of a control timing diagram for adjusting the output voltage multiplier of a charge pump, illustrating a specific embodiment of the present invention;

[0024] Figure 2 A schematic diagram of the connection of a control circuit for adjusting the output voltage ratio of a charge pump according to a first embodiment of the present invention is shown.

[0025] Figure 3 The equivalent circuit diagram of the second embodiment of the present invention when the φ3 switch is open is shown;

[0026] Figure 4 The equivalent circuit diagram of the third embodiment of the present invention when the φ3 switch is turned on for the first time is shown.

[0027] Figure 5 An equivalent circuit diagram of the fourth embodiment of the present invention is shown when the φ3 switch is opened again; and

[0028] Figure 6 The equivalent circuit diagram of the fifth embodiment of the present invention when the φ3 switch is turned on for the second time is shown. Detailed Implementation

[0029] To better illustrate the technical solution of the present invention, the present invention will be further described below with reference to the accompanying drawings.

[0030] Figure 1 This diagram illustrates a control timing sequence of a control circuit for adjusting the output voltage multiplier of a charge pump, according to a specific embodiment of the present invention. Specifically, the present invention discloses a control circuit for adjusting the output voltage multiplier of a charge pump, comprising at least a first switch group, a second switch group, a third switch group, a fourth switch group, and a φ3 switch. The opening and closing of the first switch group, the second switch group, the third switch group, the fourth switch group, and the φ3 switch are controlled by a switching cycle, which includes at least timings T1, T2, T3, T4, and T5. The first switch group includes at least φ11 and φ12, the second switch group includes at least φ13 and φ14, the third switch group includes at least φ21 and φ22, and the fourth switch group includes at least φ23 and φ24. The control timing relationship is as follows:

[0031] When the first switch group, the third switch group and φ3 are at a high level, the first switch group, the third switch group and φ3 are closed.

[0032] When the first switch group, the third switch group and φ3 are at a low level, the first switch group, the third switch group and φ3 are disconnected;

[0033] When the second and fourth switch groups are at a high level, the second and fourth switch groups are closed.

[0034] When the second and fourth switch groups are at a low level, the second and fourth switch groups are disconnected.

[0035] T1 is the non-overlapping time between the first and third switch groups, and T1 is the sum of T2, T3, T4, and T5;

[0036] Among them, T2, T4, and T5 are fixed and identical non-overlapping times, which include the non-overlapping switching times of the third switch group and φ3, the fourth switch group and φ3, the fourth switch group and the third switch group, the first switch group and φ3, the third switch group and φ3, and the fourth switch group and the second switch group.

[0037] T3 represents the on-time of switch φ3. Controlling T3 adjusts the output voltage multiplier of the charge pump. By designing a reasonable timing sequence, the first and second switching groups of the charge pump can be controlled, and the on-time of switch φ3 is designed to be adjustable via a register, enabling continuously adjustable VSP multiplier. This also significantly improves the reduction of the charge pump's input current and enhances its conversion efficiency. This design concept can be applied to any circuit topology employing a complementary charge pump structure.

[0038] Compared with the prior art, this application subdivides the two sets of switches into four sets of switches. Although there is no change in structure, the control method is adjusted. That is, the control of the original two sets of switches is changed to the control of four sets of switches. By changing the control timing of the four sets of switches and coordinating with the conduction time of the newly added switch φ3, the output voltage ratio of the charge pump can be controlled.

[0039] Figure 2 The diagram illustrates a connection schematic of a control circuit for adjusting the output voltage multiplier of a charge pump according to a first embodiment of the present invention. The first switch group includes a first capacitor Cfly1, with a C1P node and a C1N node at its two ends. The C1P node is connected to the input voltage VDD via a φ11 switch and to the output voltage VSP via a φ21 switch. The C1N node is connected to ground via a φ13 switch and to the input voltage VDD via a φ23 switch. The second switch group includes a second capacitor Cfly2, with a C2P node and a C2N node at its two ends. The C2P node is connected to the input voltage VDD via a φ22 switch and to the output voltage VSP via a φ12 switch. The C2N node is connected to ground via a φ24 switch and to the input voltage VDD via a φ14 switch. The C1P node and the C2P node are connected via a φ3 switch.

[0040] Furthermore, the first switch group is located in Figure 1 On the left, the second switch group is located Figure 1 On the right side, the first switch group includes at least φ11 and φ12, the second switch group includes at least φ13 and φ14, the third switch group includes at least φ21 and φ22, and the fourth switch group includes at least φ23 and φ24. The first switch group controls the linkage of φ11 and φ12, the second switch group controls the linkage of φ13 and φ14, the third switch group controls the linkage of φ21 and φ22, and the fourth switch group controls the linkage of φ23 and φ24.

[0041] Those skilled in the art will understand that, in this application Figure 2 There are two C1 P nodes and two C2 P nodes in the diagram. The two C1 P nodes on the left are equivalent nodes, and the two C2 P nodes on the right are also equivalent nodes. To avoid ambiguity for those skilled in the art, they are all labeled the same. That is, two C1 P nodes can be equivalent to one node, and two C2 P nodes can also be equivalent to one node. For better understanding of the connection structure of the φ3 switch in the diagram, this is marked and will not be elaborated further here.

[0042] The basic principle of a charge pump is that capacitors are charged and discharged using different connection methods, such as parallel charging and series discharging, or series charging and parallel discharging, to achieve voltage conversion functions such as boosting, bucking, and negative voltage. (This is in conjunction with the present application.) Figure 1 as well as Figure 2 Currently, there is no φ3 in the existing technology. The current charge pump adopts a complementary topology structure technology, using a non-overlapping switching clock to control the switching of the first and second switch groups, charging and discharging different capacitors to obtain a smaller output voltage (VSP) ripple. To reduce the ripple on the output voltage, the first and second switch groups are designed with the same size. The only difference between the two switch groups is the control timing. Specifically, when the first and second switch groups are at a high level, the switch is closed; when the first and second switch groups are at a low level, the switch is open. In the first switch group phase, Cfly1 is in the charging state and Cfly2 is in the discharging state; in the second switch group phase, Cfly1 is in the discharging state and Cfly2 is in the charging state; the cycle repeats from first switch group → second switch group → first switch group → second switch group →… After several cycles, VSP eventually rises to a voltage of 2*VDD.

[0043] Figure 3 The equivalent circuit diagram of the second embodiment of the present invention when switch φ3 is open is shown. Figure 4The equivalent circuit diagram of the third embodiment of the present invention when the φ3 switch is turned on for the first time is shown. Figure 5 The equivalent circuit diagram of the fourth embodiment of the present invention when the φ3 switch is opened again is shown. Figure 6 The equivalent circuit diagram of the fifth embodiment of the present invention when the φ3 switch is turned on for the second time is shown.

[0044] Furthermore, when switch φ3 is off, Cfly1 and Cfly2 will not redistribute charge; when switch φ3 is on, Cfly1 and Cfly2 will redistribute charge; as the on-time T of switch φ3 increases, the output voltage multiplier of the charge pump increases.

[0045] Furthermore, the range for adjusting the output voltage multiplier of the charge pump is 2*VDD to 3*VDD.

[0046] Furthermore, the conduction time range of the φ3 switch is 0 to 31*R*C, where R is the conduction impedance of the φ3 switch, and C is the first capacitor Cfly1 or the second capacitor Cfly2.

[0047] Those skilled in the art will understand that the present invention can achieve VSP adjustment within the range of 2*VDD to 3*VDD. Chargepump, based on existing technology, combines... Figure 2 The first and second switch groups shown are modified by adding control timing for the second and fourth switch groups. The working principle of the control timing circuit is as follows:

[0048] When the charging phase of the first switch group ends and the discharging phase of the second switch group ends, that is, after the first switch group is opened and before the second switch group is opened, the third and fourth switch groups are in the open state and before the φ3 switch is opened; assuming that the first switch group has completed charging capacitor Cfly1, the voltage of the C1P node is VDD, and the voltage of the C1N node is GND; the second switch group has completed discharging capacitor Cfly2, the voltage of the C2P node is approximately 2*VDD, and the voltage of the C2N node is VDD.

[0049] Furthermore, the equivalent circuit at this time is as follows: Figure 3 As shown, the charge on capacitor Cfly1 is Cfly1*VDD, and the charge on capacitor Cfly2 is Cfly2*VDD. Since the first switch group and the second switch group are identical, Cfly1 = Cfly2. When... Figure 4After the equivalent circuit switch φ3 is turned on, capacitors Cfly1 and Cfly2 will redistribute their charges. By controlling the on-time of switch φ3, the ratio of charge redistribution between capacitors Cfly1 and Cfly2 can be controlled, thereby achieving the desired charge pump rate. The specific process derivation is as follows:

[0050] Assuming the φ3 switch has an open time of 0 seconds; capacitors Cfly1 and Cfly2 will not redistribute charge, and VSP = 2 * VDD; assuming the φ3 switch has an open time long enough; capacitors Cfly1 and Cfly2 complete charge redistribution, the equivalent circuit after the first charge redistribution upon φ3's opening is as follows: Figure 4 It can be concluded that during the discharge phase, the lower plate of capacitor Cfly1 becomes VDD, and the upper plate becomes (2+0.5)*VDD.

[0051] When the discharge phase of the first switch group ends and the charging phase of the second switch group ends, that is, after the third switch group is opened and before the fourth switch group is opened, the first and second switch groups are in the open state, and before switch φ3 is opened; assuming that the first switch group has completed discharging capacitor Cfly1, the voltage at the C1P node is approximately (2+0.5)*VDD, and the voltage at the C1N node is VDD; the second switch group has completed charging capacitor Cfly2, the voltage at the C2P node is VDD, and the voltage at the C2N node is GND. The equivalent circuit at this time is as follows: Figure 5 As shown.

[0052] Furthermore, assuming the second switch of φ3 opens for a sufficiently long time; the equivalent circuit after charge redistribution is as follows: Figure 6 As shown: After several switching cycles, the voltage on VSP becomes:

[0053]

[0054] In the above formula, n represents the number of times φ3 is switched.

[0055] From the above formula, we can see that there exists a geometric sequence, and as long as n is large enough, the sum of this geometric sequence can be obtained.

[0056]

[0057] The final VSP = 3 * VDD.

[0058] Based on the above analysis and derivation, the output voltage of VSP will be between 2*VDD and 3*VDD. We control the opening time of switch φ3 to control the charge redistribution ratio of capacitors Cfly1 and Cfly2 to adjust the output rate of VSP. Because the third switch group and switch φ3 in the actual circuit have impedance, assuming the conduction impedance is R, the time required for the charge to redistribute to 99% of the target value is:

[0059] -ln(1-0.99)*3*R*0.5*Cfly=4.6*1.5*R*Cfly=6.9*R*C;

[0060] Therefore, we can design the on-time of the φ3 switch to be continuously adjustable by the register. The adjustable range can be designed between 0 and 31*R*C, with each increment being 0.25*R*C, which can achieve the adjustment of the VSP multiplier and control the output of the VSP.

[0061] The specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various modifications or variations within the scope of the claims, which do not affect the essence of the present invention.

Claims

1. A control circuit for regulating the multiplication factor of an output voltage of a charge pump, characterized by At least comprising a first switch group, a second switch group, a third switch group, a fourth switch group and a φ3 switch, wherein the opening and closing of the first switch group, the second switch group, the third switch group, the fourth switch group and the φ3 switch are controlled by a switch period, the switch period at least comprises time sequences T1, T2, T3, T4 and T5, wherein the first switch group at least comprises φ11 and φ12, the second switch group at least comprises φ13 and φ14, the third switch group at least comprises φ21 and φ22, and the fourth switch group at least comprises φ23 and φ24, wherein the control time sequence relationship is as follows: The first switch group, the third switch group and the φ3 are closed when the first switch group, the third switch group and the φ3 are high level; The first switch group, the third switch group and the φ3 are opened when the first switch group, the third switch group and the φ3 are low level; The second switch group and the fourth switch group are closed when the second switch group and the fourth switch group are high level; The second switch group and the fourth switch group are opened when the second switch group and the fourth switch group are low level; T1 is the non-overlapping time of the first switch group and the third switch group, and T1 is the sum of T2, T3, T4 and T5; T2, T4 and T5 are fixed and same non-overlapping time, which includes the non-overlapping time of the third switch group and the φ3, the fourth switch group and the φ3, the fourth switch group and the third switch group, the first switch group and the φ3, the third switch group and the φ3, and the fourth switch group and the second switch group; T3 is the switch on time of the φ3, and the adjustment of the output voltage multiplication of the charge pump is realized by controlling T3.

2. The control circuit of claim 1, wherein, The first switch group comprises a first capacitor Cfly1, and the two ends of the first capacitor Cfly1 are respectively provided with a C1 P node and a C1 N node, wherein the C1 P node is connected to an input voltage VDD through a φ11 switch and connected to an output voltage VSP through a φ21 switch; and the C1 N node is connected to ground through a φ13 switch and connected to the input voltage VDD through a φ23 switch; The second switch group comprises a second capacitor Cfly2, and the two ends of the second capacitor Cfly2 are respectively provided with a C2 P node and a C2 N node, wherein the C2 P node is connected to the input voltage VDD through a φ22 switch and connected to the output voltage VSP through a φ12 switch; and the C2 N node is connected to ground through a φ24 switch and connected to the input voltage VDD through a φ14 switch; The C1 P node and the C2 P node are connected through a φ3 switch.

3. The control circuit of claim 2, wherein, When the φ3 switch is opened, Cfly1 and Cfly2 will not perform charge redistribution; When the φ3 switch is turned on, Cfly1 and Cfly2 will perform charge redistribution again; With the increase of the on time T of the φ3 switch, the output voltage multiplication of the charge pump becomes larger.

4. The control circuit of claim 3, wherein, The adjustment range of the output voltage multiplication of the charge pump is 2*VDD-3*VDD.

5. The control circuit of claim 3, wherein, The on time range of the φ3 switch is 0-31*R*C, wherein R is the on impedance of the φ3 switch, and C is the first capacitor Cfly1 or the second capacitor Cfly2.

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