Light-emitting elements for display and display devices having the same.

By employing a multi-layer LED stack and floating reflective layer design in the LED display device, the problems of sub-pixel area and RGB mixing ratio are solved, achieving efficient mounting and high-quality white light display.

CN114303240BActive Publication Date: 2026-05-26SEOUL VIOSYS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SEOUL VIOSYS CO LTD
Filing Date
2020-07-31
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

In existing LED display devices, the arrangement of sub-pixels on a two-dimensional plane increases the occupied area, making it difficult to reduce the size of LED chips, affecting the mounting process time and the control of RGB mixing ratio, and making it difficult to achieve high-quality white light display within a limited area.

Method used

The system employs a stacked structure of a first LED stack, a second LED stack, and a third LED stack, combined with a floating reflective layer, to generate light with different peak wavelengths. Electrical connections are achieved through transparent electrodes and electrode pads. The floating reflective layer reflects the light with the first peak wavelength to improve luminance and ensure the stability of the RGB mixing ratio.

Benefits of technology

Without increasing the pixel area, the light-emitting area of ​​the sub-pixels was increased, the mounting process time was shortened, the control precision of the RGB mixing ratio was improved, and high-quality white light display was achieved.

✦ Generated by Eureka AI based on patent content.

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Abstract

A display light-emitting element according to one embodiment includes: a first LED stack that generates light with a first peak wavelength; a second LED stack located below the first LED stack and generating light with a second peak wavelength; a third LED stack located below the second LED stack and generating light with a third peak wavelength; and a floating reflective layer located above the first LED stack and reflecting light with the first peak wavelength, wherein the first peak wavelength is a longer wavelength than the second and third peak wavelengths.
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Description

Technical Field

[0001] This invention relates to a light-emitting element for display and a display device, and more particularly to a light-emitting element for display having a stacked structure of a plurality of light-emitting diodes and a display device having the same. Background Technology

[0002] Light-emitting diodes (LEDs), as inorganic light sources, are widely used in various fields such as display devices, vehicle lighting, and general lighting. LEDs have advantages such as long lifespan, low power consumption, and fast response speed, and are therefore rapidly replacing existing light sources.

[0003] In addition, existing light-emitting diodes (LEDs) are mainly used as backlights in display devices. However, LED displays that directly display images using LEDs are currently being developed.

[0004] Display devices typically utilize a mixture of blue, green, and red to achieve a variety of colors. To realize diverse images, display devices include multiple pixels, each pixel equipped with blue, green, and red sub-pixels. The color of a specific pixel is determined by the colors of these sub-pixels, and the image is realized through the combination of these pixels.

[0005] LEDs can emit a variety of colors of light depending on their material, thus providing a display device by arranging individual LED chips that emit blue, green, and red light on a two-dimensional plane. However, with one LED chip arranged for each sub-pixel, the increased number of LED chips leads to a significant increase in the mounting process time.

[0006] Because subpixels are arranged on a two-dimensional plane, the area occupied by a single pixel, including blue, green, and red subpixels, becomes relatively larger. Therefore, in order to arrange subpixels within a limited area, the area of ​​each LED chip must be reduced. However, reducing the size of the LED chips may make it difficult to mount them, resulting in a reduction in the light-emitting area.

[0007] Furthermore, display devices capable of displaying multiple colors require consistently high-quality white light. Existing televisions use a 3:6:1 RGB mixing ratio to achieve the standard white light of the D65. That is, the luminance of red is relatively higher than that of blue, and the luminance of green is relatively the highest. However, for the LED chips currently in use, the luminance of blue LEDs is typically very high compared to other LEDs, thus presenting a challenge in matching the RGB mixing ratio in display devices using LED chips. Summary of the Invention

[0008] Technical issues

[0009] The technical problem to be solved by the present invention is to provide a light-emitting element and a display device that can increase the area of ​​each sub-pixel within a limited pixel area.

[0010] Another technical problem to be solved by the present invention is to provide a light-emitting element for display and a display device that can shorten the mounting process time.

[0011] Another technical problem to be solved by the present invention is to provide a light-emitting element and a display device that can increase the yield of the process.

[0012] Another technical problem to be solved by the present invention is to provide a light-emitting element and a display device that can easily control the RGB mixing ratio.

[0013] Technical solution

[0014] A light-emitting element for display according to an embodiment of the present invention includes: a first LED stack that generates light with a first peak wavelength; a second LED stack located below the first LED stack and generating light with a second peak wavelength; a third LED stack located below the second LED stack and generating light with a third peak wavelength; and a floating reflective layer located above the first LED stack and reflecting light with the first peak wavelength, wherein the first peak wavelength is a longer wavelength than the second and third peak wavelengths.

[0015] A display device according to an embodiment of the present invention includes: a circuit board; and a plurality of light-emitting elements arranged on the circuit board, wherein the light-emitting elements are the aforementioned light-emitting elements. Attached Figure Description

[0016] Figure 1 This is a schematic perspective view illustrating a display device according to an embodiment of the present invention.

[0017] Figure 2 This is a schematic plan view illustrating a display panel according to an embodiment of the present invention.

[0018] Figure 3 This is a schematic plan view illustrating a light-emitting element according to an embodiment of the present invention.

[0019] Figure 4a , Figure 4b and Figure 4c respectively along Figure 3 A schematic cross-sectional view of the sections cut by the intercept lines A-A', B-B', and C-C'.

[0020] Figure 5a , Figure 5b and Figure 5cThis is a schematic cross-sectional view used to illustrate a first LED stack, a second LED stack, and a third LED stack grown on a growth substrate according to an embodiment of the present invention.

[0021] Figure 6a , Figure 6b , Figure 7a , Figure 7b , Figure 8a , Figure 8b , Figure 9a , Figure 9b , Figure 10a , Figure 10b , Figure 11a and Figure 11b These are schematic plan views and cross-sectional views illustrating a method for manufacturing a light-emitting element for display according to an embodiment of the present invention.

[0022] Figure 12 It is a schematic cross-sectional view used to illustrate a light-emitting element mounted on a circuit board.

[0023] Figure 13a , Figure 13b and Figure 13c This is a schematic cross-sectional view illustrating a method for transferring a light-emitting element onto a circuit board according to an embodiment.

[0024] Figure 14 This is a schematic cross-sectional view illustrating a method for transferring a light-emitting element onto a circuit board according to another embodiment of the present invention.

[0025] Optimal Implementation

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. To fully convey the spirit of the present invention to those skilled in the art, the following embodiments are provided as examples. Therefore, the present invention is not limited to the embodiments described below, and may be embodied in other forms. Furthermore, in the drawings, the width, length, thickness, etc., of the constituent elements may be exaggerated for convenience. Also, when described as one constituent element being "above" or "on top of" another constituent element, this includes not only cases where each part is "directly" located "above" or "on top" other parts, but also cases where another constituent element is sandwiched between each constituent element and another constituent element. Throughout the specification, the same reference numerals denote the same constituent elements.

[0027] A light-emitting element for display according to an embodiment of the present invention includes: a first LED stack that generates light with a first peak wavelength; a second LED stack located below the first LED stack and generating light with a second peak wavelength; a third LED stack located below the second LED stack and generating light with a third peak wavelength; and a floating reflective layer located above the first LED stack and reflecting light with the first peak wavelength, wherein the first peak wavelength is a longer wavelength than the second and third peak wavelengths.

[0028] In this specification, for ease of explanation, the second LED stack is arranged below the first LED stack, and the third LED stack is arranged below the second LED stack. However, it should be noted that the light-emitting elements can be flip-chip bonded, so the vertical positions of the first LED stack, the second LED stack, and the third LED stack can be changed.

[0029] In this specification, the term "floating reflective layer" refers to a reflective layer that is separated from the first LED stack. In particular, the floating reflective layer is not directly electrically connected to the first LED stack.

[0030] By stacking the first LED stack, the second LED stack, and the third LED stack together, the light-emitting area of ​​each sub-pixel can be increased without increasing the pixel area. Furthermore, by employing the floating reflective layer, the luminous intensity of the first LED stack emitting relatively long wavelength light can be selectively increased.

[0031] For example, the first LED stack, the second LED stack, and the third LED stack can emit red light, green light, and blue light, respectively.

[0032] In addition, the first LED stack, the second LED stack, and the third LED stack can be driven independently. The light generated by the first LED stack can be transmitted through the second LED stack and the third LED stack to be emitted to the outside, and the light generated by the second LED stack can be transmitted through the third LED stack to be emitted to the outside.

[0033] The floating reflective layer may include, for example, Au, Al, Ag, Pt, or alloys thereof. For instance, Au alloys may include AuGe, AuBe, AuTe, AuZn, etc.

[0034] Alternatively, the floating reflective layer may also include a distributed Bragg reflector.

[0035] The light-emitting element for display may further include: a first intermediate insulating layer sandwiched between the first LED stack and the floating reflective layer. The first intermediate insulating layer can insulate the floating reflective layer from the first LED stack.

[0036] Additionally, the light-emitting element for display may further include a second intermediate insulating layer covering the floating reflective layer. The second intermediate insulating layer insulates the floating reflective layer from the upper connector disposed above the floating reflective layer.

[0037] The light-emitting element for display may further include: an upper connector disposed on the second intermediate insulating layer, wherein the upper connector may be electrically connected to at least one of the first LED stack, the second LED stack, and the third LED stack.

[0038] Furthermore, the light-emitting element for display may further include: a first bonding layer sandwiched between the second LED stack and the third LED stack; a second bonding layer sandwiched between the first LED stack and the second LED stack; a lower insulating layer sandwiched between the second bonding layer and the second LED stack; a lower embedded layer penetrating the lower insulating layer and the second LED stack and electrically connected to the first conductive semiconductor layer and the second conductive semiconductor layer of the third LED stack, respectively; and an upper embedded layer penetrating the first LED stack and the second bonding layer and electrically connected to the lower embedded layer, wherein the upper connector may include an upper connector that covers the upper embedded layer and is electrically connected to the upper embedded layer.

[0039] The light-emitting element for display may further include: an n-electrode pad electrically connected to the first conductive semiconductor layer of the third LED stack; and a lower p-electrode pad disposed on the second conductive semiconductor layer of the third LED stack, wherein the lower buried layer may be electrically connected to the n-electrode pad and the lower p-electrode pad respectively.

[0040] The light-emitting element for display may further include: a lower embedded layer, a first conductive semiconductor layer that penetrates the lower insulating layer and is electrically connected to the second LED stack; and an upper embedded layer that penetrates the first LED stack and the second bonding layer and is electrically connected to the lower embedded layer, wherein one of the upper connectors can be electrically connected to the first conductive semiconductor layer of the second LED stack through the upper embedded layer and the lower embedded layer.

[0041] In addition, one of the upper connectors may be an upper common connector that is electrically connected to the first conductive semiconductor layer of the first LED stack, the second LED stack, and the third LED stack.

[0042] The light-emitting element for display may further include: an upper embedded layer, and a second conductive semiconductor layer that penetrates the first LED stack, the first bonding layer, and the lower insulating layer and is electrically connected to the second LED stack, wherein one of the upper connectors is connected to the upper embedded layer and electrically connected to the second conductive semiconductor layer of the second LED stack.

[0043] Furthermore, one of the upper connectors can be electrically connected to the second conductive semiconductor layer of the first LED stack.

[0044] Additionally, the light-emitting element for display may also include: a raised pad disposed on the upper connector, wherein the raised pad may include a first raised pad, a second raised pad, a third raised pad, and a common raised pad, the common raised pad being electrically connected together to the first LED stack, the second LED stack, and the third LED stack, and the first raised pad, the second raised pad, and the third raised pad being electrically connected to the first LED stack, the second LED stack, and the third LED stack, respectively.

[0045] The light-emitting element for display may further include: a first transparent electrode sandwiched between the first LED stack and the second LED stack, and ohmically contacting the lower surface of the first LED stack; a second transparent electrode sandwiched between the first LED stack and the second LED stack, and ohmically contacting the upper surface of the second LED stack; and a third transparent electrode sandwiched between the second LED stack and the third LED stack, and ohmically contacting the upper surface of the third LED stack.

[0046] In addition, the first LED stack can be textured to have a rough surface, and the second LED stack can be textured to have a rough surface.

[0047] Furthermore, the upper and lower surfaces of the third LED stack may not be textured and have a flat surface.

[0048] The first LED stack, the second LED stack, and the third LED stack can be separated from the growth substrate.

[0049] A display device according to an embodiment of the present invention includes: a circuit board; and a plurality of light-emitting elements arranged on the circuit board, wherein the light-emitting elements are the aforementioned light-emitting elements.

[0050] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0051] Figure 1 This is a schematic perspective view illustrating a display device according to an embodiment of the present invention.

[0052] The light-emitting element of the present invention is not particularly limited, but in particular, it can be used in smartwatches 1000a, VR display devices such as virtual reality headsets 1000b, or AR display devices such as augmented reality glasses 1000c.

[0053] The display device contains a display panel for displaying images. Figure 2 This is a schematic plan view illustrating a display panel according to an embodiment of the present invention.

[0054] Reference Figure 2 The display panel includes a circuit board 101 and a light-emitting element 100.

[0055] The circuit board 101 may include circuitry for passive or active matrix driving. In one embodiment, the circuit board 101 may internally include wiring and resistors. In another embodiment, the circuit board 101 may include wiring, transistors, and capacitors. The circuit board 101 may also have pads on its upper surface for allowing electrical connections to the internally disposed circuitry.

[0056] Multiple light-emitting elements 100 are neatly arranged on a circuit board 101. Each light-emitting element 100 constitutes a pixel. Each light-emitting element 100 has a raised pad 73, which is electrically connected to the circuit board 101. For example, the raised pad 73 may be bonded to a pad exposed on the circuit board 101.

[0057] The spacing between the light-emitting elements 100 can be at least greater than the width of the light-emitting elements.

[0058] Reference Figure 3 , Figure 4a , Figure 4b and Figure 4c The specific structure of the light-emitting element 100 will be explained. Figure 3 This is a schematic plan view illustrating a light-emitting element 100 according to an embodiment of the present invention. Figure 4a , Figure 4b and Figure 4c These are respectively for illustrating the light-emitting element 100 according to an embodiment of the present invention. Figure 3 A schematic cross-sectional view of the sections cut by the intercept lines A-A', B-B', and C-C'.

[0059] For ease of explanation, the diagram illustrates the arrangement of raised pads 73r, 73b, 73g, and 73c on the upper side, but the light-emitting element 100 is as follows: Figure 2As shown, the circuit is flip-bonded onto the circuit board 101, in which case the raised pads 73r, 73b, 73g, and 73c are arranged on the underside. Furthermore, in a particular embodiment, the raised pads 73r, 73b, 73g, and 73c may be omitted.

[0060] Reference Figure 3 , Figure 4a , Figure 4b and Figure 4c The light-emitting element 100 may include a first LED stack 23, a second LED stack 33, a third LED stack 43, a first transparent electrode 25, a second transparent electrode 35, a third transparent electrode 45, an n electrode pad 47a, a lower p electrode pad 47b, an upper p electrode pad 37b, lower embedded layers 55b, 55cb, 55cg, upper embedded layers 65r, 65b, 65g, 65cr, 65cg, 65cb, a first sidewall insulating layer 53, an upper common connector 67c, a first upper connector 67r, a second upper connector 67g, a third upper connector 67b, a first bonding layer 49, a second bonding layer 59, a lower insulating layer 51, a first intermediate insulating layer 61, a floating reflective layer 62, a second intermediate insulating layer 63, an upper insulating layer 71, and raised pads 73r, 73b, 73g, 73c. Furthermore, the light-emitting element 100 may include through holes 23h1, 23h2, 23h3, 23h4, and 23h5 penetrating the first LED stack 23, and through holes 33h1 and 33h2 penetrating the second LED stack 33.

[0061] like Figure 4a , Figure 4b and Figure 4c As shown, in an embodiment of the present invention, the first LED stack 23, the second LED stack 33, and the third LED stack 43 are stacked vertically. Furthermore, although the individual LED stacks 23, 33, and 43 are grown on different growth substrates, in this embodiment, the growth substrates are ultimately not retained in the light-emitting element 100 and are completely removed. Therefore, the light-emitting element 100 does not include a growth substrate. However, the present invention is not necessarily limited to this and may also include at least one growth substrate.

[0062] The first LED stack 23, the second LED stack 33, and the third LED stack 43 each include a first conductive semiconductor layer 23a, 33a, or 43a, a second conductive semiconductor layer 23b, 33b, or 43b, and an active layer (not shown) disposed therebetween. The active layer may in particular have a multi-quantum-well structure.

[0063] In one embodiment, a second LED stack 33 is arranged below the first LED stack 23, and a third LED stack 43 is arranged below the second LED stack 33. The light generated by the first LED stack 23, the second LED stack 33, and the third LED stack 43 can ultimately be emitted outward through the third LED stack 43. For example, the first LED stack 23 can emit red light, the second LED stack 33 can emit green light, and the third LED stack 43 can emit blue light. Therefore, the first LED stack 23, the second LED stack 33, and the third LED stack 43 can be stacked to emit light in the order of red light / green light / blue light, starting from the top. In another embodiment, the second LED stack 33 and the third LED stack 43 can also change their order. That is, the first LED stack 23, the second LED stack 33, and the third LED stack 43 can be stacked to emit light in the order of red light / blue light / green light, starting from the top. In this case, the light generated by the first LED stack 23, the second LED stack 33 and the third LED stack 43 can eventually be emitted to the outside through the second LED stack 33.

[0064] The first LED stack 23 emits light with a first peak wavelength that is longer than the second LED stack 33 and the third LED stack 43. The second LED stack 33 emits light with a second peak wavelength that is longer than the third LED stack 43. The third LED stack 43 emits light with a third peak wavelength that is shorter than the first and second peak wavelengths. For example, the first LED stack 23 may be an inorganic light-emitting diode that emits red light, the second LED stack 33 may be an inorganic light-emitting diode that emits green light, and the third LED stack 43 may be an inorganic light-emitting diode that emits blue light. The first LED stack 23 may include a well layer of the AlGaInP series, the second LED stack 33 may include a well layer of the AlGaInP series or the AlGaInN series, and the third LED stack 43 may include a well layer of the AlGaInN series.

[0065] Because the first LED stack 23 emits light with a longer wavelength than the second LED stack 33 and the third LED stack 43, the light generated by the first LED stack 23 can pass through the second LED stack 33 and the third LED stack 43 and be emitted outwards. Furthermore, because the second LED stack 33 emits light with a longer wavelength than the third LED stack 43, the light generated by the second LED stack 33 can pass through the third LED stack 43 and be emitted outwards. If the second LED stack 33 and the third LED stack 43 are arranged in an interchangeable order, a portion of the light generated by the third LED stack 43 may be absorbed and lost in the second LED stack 33.

[0066] Furthermore, the first conductive semiconductor layers 23a, 33a, and 43a of each LED stack 23, 33, or 43 are n-type semiconductor layers, and the second conductive semiconductor layers 23b, 33b, and 43b are p-type semiconductor layers. In this embodiment, the upper surface of the first LED stack 23 is an n-type semiconductor layer 23a, the upper surface of the second LED stack 33 is a p-type semiconductor layer 33b, and the upper surface of the third LED stack 43 is a p-type semiconductor layer 43b. That is, the stacking order of the first LED stack 23 is the reverse of the stacking order of the second LED stack 33 and the third LED stack 43. By arranging the semiconductor layers of the second LED stack 33 in the same order as those of the third LED stack 43, process stability can be ensured, which will be explained in detail later when describing the manufacturing method. However, the stacking order of the semiconductor layers of the first LED stack 23, the second LED stack 33, and the third LED stack 43 is not necessarily limited to this.

[0067] The second LED stack 33 includes a mesa etched region that exposes the upper surface of the first conductive semiconductor layer 33a by removing the second conductive semiconductor layer 33b. For example... Figure 3 and Figure 4a As shown, a lower buried layer 55b and 55cb are formed in the mesa etching area penetrating the second LED stack 33, and a lower buried layer 55cg is formed on the mesa etching area of ​​the second LED stack 33.

[0068] The third LED stack 43 also includes a mesa etched region that exposes the upper surface of the first conductive semiconductor layer 43a by removing the second conductive semiconductor layer 43b. In contrast, the first LED stack 23 may not include a mesa etched region.

[0069] Additionally, the first LED stack 23 may have a rough surface 23r. The rough surface 23r may be formed on the surface of the first conductive semiconductor layer 23a, but is not necessarily limited to this. The rough surface 23r improves the light extraction efficiency of the first LED stack 23, thereby increasing the luminous intensity of the light generated by the first LED stack 23. The rough surface 23r may be formed on the entire surface of the first conductive semiconductor layer 23a, but is not necessarily limited to this; a portion of the surface, such as around the region forming a through-hole or the region forming an electrical connection, may be a flat surface.

[0070] Furthermore, the second LED stack 33 may have a rough surface 33r. The rough surface 33r may be formed on the surface of the first conductive semiconductor layer 33a. The rough surface 33r improves the light extraction efficiency of the second LED stack 33, thereby increasing the luminous intensity of the light generated by the second LED stack 33. The rough surface 33r may be formed on the entire surface of the first conductive semiconductor layer 33a, but it is not necessarily limited to this; some areas, such as the area around the through-hole or the area where the electrical connection is formed, may be flat surfaces.

[0071] Through-holes 33h1 and 33h2 can be formed to penetrate the first conductive semiconductor layer 33a exposed in the mesa etching area. In addition, through-holes 23h1, 23h2, 23h3, 23h4, and 23h5 can penetrate the first LED stack 23, and in particular, can penetrate the first conductive semiconductor layer 23a and the second conductive semiconductor layer 23b.

[0072] Furthermore, unlike the first LED stack 23 and the second LED stack 33, the third LED stack 43 may not have a rough surface formed by surface texturing. Therefore, the luminance of the first LED stack 23 and the second LED stack 33 can be adjusted to be relatively higher than that of the third LED stack 43.

[0073] Furthermore, in this embodiment, the first LED stack 23, the second LED stack 33, and the third LED stack 43 can overlap each other and have approximately the same light-emitting area. However, due to the through holes 23h1, 23h2, 23h3, 23h4, 23h5 and 33h1, 33h2, the light-emitting area of ​​the first LED stack 23 can be smaller than that of the second LED stack 33, and the light-emitting area of ​​the second LED stack 33 can be smaller than that of the third LED stack 43. Moreover, the side surface of the light-emitting element 100 can be tilted such that its width increases from the first LED stack 23 towards the third LED stack 43, thus the light-emitting area of ​​the third LED stack 43 can be larger than that of the first LED stack 23. The tilt angle formed by the side surface of the light-emitting element 100 relative to the upper surface of the third LED stack 43 can be approximately 75 degrees to 90 degrees. If the tilt angle is less than 75 degrees, the light-emitting area of ​​the first LED stack 23 is too small, making it difficult to reduce the size of the light-emitting element 100.

[0074] A first transparent electrode 25 is disposed between the first LED stack 23 and the second LED stack 33. The first transparent electrode 25 has an ohmic contact with the second conductive semiconductor layer 23b of the first LED stack 23 and transmits light generated by the first LED stack 23. The first transparent electrode 25 can be formed using a transparent oxide layer such as indium tin oxide (ITO) or a metal layer. The first transparent electrode 25 can cover the front surface of the second conductive semiconductor layer 23b of the first LED stack 23, and its side surface can be aligned with the side surface of the first LED stack 23. That is, the side surface of the first transparent electrode 25 may not be covered by the second bonding layer 59. Furthermore, through-holes 23h1, 23h2, 23h3, and 23h4 can penetrate the first transparent electrode 25, thus exposing the first transparent electrode 25 to the sidewalls of these through-holes. Additionally, through-hole 23h5 exposes the upper surface of the first transparent electrode 25. However, the present invention is not limited thereto. The first transparent electrode 25 is partially removed along the edge of the first LED stack 23, so that the side surface of the first transparent electrode 25 can be covered by the second bonding layer 59. Furthermore, by pre-patterning the regions where through holes 23h1, 23h2, 23h3, and 23h4 are formed before removing the first transparent electrode 25, it is possible to prevent the first transparent electrode 25 from being exposed on the sidewalls of the through holes 23h1, 23h2, 23h3, and 23h4.

[0075] Furthermore, the second transparent electrode 35 makes an ohmic contact with the second conductive semiconductor layer 33b of the second LED stack 33. As shown in the figure, the second transparent electrode 35 contacts the upper surface of the second LED stack 33 between the first LED stack 23 and the second LED stack 33. The second transparent electrode 35 can be formed using a metal layer or a conductive oxide layer that is transparent to red light. The conductive oxide layer can be, for example, SnO2, InO2, ITO, ZnO, IZO, etc. In particular, the second transparent electrode 35 can be formed using ZnO, which can be formed as a single crystal on the second LED stack 33, thus exhibiting superior electrical and optical properties compared to metal layers or other conductive oxide layers. Especially, ZnO has a strong adhesion to the second LED stack 33, so it remains intact even when the growth substrate is separated using laser lift-off.

[0076] Additionally, the second transparent electrode 35 can be partially removed along the edge of the second LED stack 33, so that the outer side of the second transparent electrode 35 is not exposed to the outside and is covered by the lower insulating layer 51. That is, the side of the second transparent electrode 35 is recessed inward compared to the side of the second LED stack 33, and the recessed area of ​​the second transparent electrode 35 is filled by the lower insulating layer 51 and / or the second bonding layer 59. Furthermore, the second transparent electrode 35 can also be recessed near the mesa etching area of ​​the second LED stack 33, and the recessed area is filled by the lower insulating layer 51 or the second bonding layer 59.

[0077] Furthermore, the third transparent electrode 45 is in ohmic contact with the second conductive semiconductor layer 43b of the third LED stack 43. The third transparent electrode 45 can be located between the second LED stack 33 and the third LED stack 43, and is in contact with the upper surface of the third LED stack 43. The third transparent electrode 45 can be formed using a metal layer or a conductive oxide layer that is transparent to red and green light. The conductive oxide layer can be, for example, SnO2, InO2, ITO, ZnO, IZO, etc. In particular, the third transparent electrode 45 can be formed using ZnO, which can be formed as a single crystal on the third LED stack 43, thus exhibiting superior electrical and optical properties compared to metal layers or other conductive oxide layers. In particular, the bonding force between ZnO and the third LED stack 43 is strong, so even when the growth substrate is separated using laser lift-off, it will not be damaged and will remain intact.

[0078] The third transparent electrode 45 can be partially removed along the edge of the third LED stack 43, so that the outer side of the third transparent electrode 45 is not exposed to the outside and is covered by the first bonding layer 49. That is, the side of the third transparent electrode 45 is recessed inward compared to the side of the third LED stack 43, and the recessed area of ​​the third transparent electrode 45 is filled by the first bonding layer 49. In addition, the third transparent electrode 45 can also be recessed near the mesa etching area of ​​the third LED stack 43, and the recessed area is filled by the first bonding layer 49.

[0079] By recessing the second transparent electrode 35 and the third transparent electrode 45 as described above, their sides can be prevented from being exposed to etching gas, thereby improving the process yield of the light-emitting element 100.

[0080] In this embodiment, the second transparent electrode 35 and the third transparent electrode 45 can be formed using the same type of conductive oxide layer (e.g., ZnO), and the first transparent electrode 25 can be formed using a different type of conductive oxide layer (e.g., ITO) than the second transparent electrode 35 and the third transparent electrode 45. However, the present invention is not limited thereto; the first transparent electrode 25, the second transparent electrode 35, and the third transparent electrode 45 can all be of the same type, or at least one can be of a different type.

[0081] The n-electrode pad 47a makes an ohmic contact with the first conductive semiconductor layer 43a of the third LED stack 43. The n-electrode pad 47a can be disposed on the first conductive semiconductor layer 43a exposed through the second conductive semiconductor layer 43b, i.e., disposed in the mesa etching region. The n-electrode pad 47a can be formed, for example, using Cr / Au / Ti. The upper surface of the n-electrode pad 47a can be higher than the upper surface of the second conductive semiconductor layer 43b, and consequently higher than the upper surface of the third transparent electrode 45. For example, the thickness of the n-electrode pad 47a can be approximately 2 μm or more. The n-electrode pad 47a can be frustum-shaped, but is not limited to this, and can have various shapes such as pyramidal, cylindrical, and prism.

[0082] The lower p-electrode pad 47b can be formed using the same material as the n-electrode pad 47a. However, the upper surface of the lower p-electrode pad 47b can be at the same height as the n-electrode pad 47a, therefore, the thickness of the lower p-electrode pad 47b can be less than the thickness of the n-electrode pad 47a. That is, the thickness of the lower p-electrode pad 47b can be approximately equal to the thickness of the portion of the n-electrode pad 47a protruding above the third transparent electrode 45. For example, the thickness of the lower p-electrode pad 47b can be about 1.2 μm or less. By making the upper surface of the lower p-electrode pad 47b at the same height as the upper surface of the n-electrode pad 47a, when forming the through holes 33h1 and 33h2, the lower p-electrode pad 47b and the n-electrode pad 47a can be exposed simultaneously. When the heights of the n-electrode pad 47a and the lower p-electrode pad 47b are different, either electrode pad may be severely damaged during the etching process. Therefore, by aligning the n electrode pad 47a and the lower p electrode pad 47b at approximately the same height, it is possible to prevent either electrode pad from being severely damaged.

[0083] The first bonding layer 49 bonds the second LED stack 33 to the third LED stack 43. The first bonding layer 49 can bond the first conductive semiconductor layer 33a and the third transparent electrode 45. The first bonding layer 49 can be partially bonded to the second conductive semiconductor layer 43b and can also be partially bonded to the first conductive semiconductor layer 43a exposed in the mesa etching area. Furthermore, the first bonding layer 49 can cover the n-electrode pad 47a and the lower p-electrode pad 47b.

[0084] The first bonding layer 49 can be formed using a transparent organic layer or a transparent inorganic layer. Examples of organic layers include SU8, polymethyl methacrylate (PMMA), polyimide, poly(p-xylene), and benzocyclobutene (BCB), while examples of inorganic layers include Al2O3, SiO2, and SiN. xFurthermore, the first bonding layer 49 can also be formed using spin-coated glass (SOG).

[0085] The upper p-electrode pad 37b can be arranged on the second transparent electrode 35. For example... Figure 3 and Figure 4b As shown, the upper p-electrode pad 37b can be covered by the lower insulating layer 51. The upper p-electrode pad 37b can be formed, for example, using Ni / Au / Ti, and can be formed to a thickness of about 2 μm.

[0086] A lower insulating layer 51 is formed on the second LED stack 33 and covers the second transparent electrode 35. The lower insulating layer 51 may also cover the mesa etching area of ​​the second LED stack 33 to provide a flat upper surface. The lower insulating layer 51 may be formed using SiO2, for example.

[0087] Through-holes 33h1 and 33h2 penetrate the lower insulating layer 51, the second LED stack 33, and the first bonding layer 49, respectively exposing the n-electrode pad 47a and the lower p-electrode pad 47b. As described above, through-holes 33h1 and 33h2 can be formed within the mesa etching area of ​​the second LED stack 33. Additionally, as... Figure 4b As shown, the through hole 51h penetrates the lower insulating layer 51, thereby exposing the first conductive semiconductor layer 33a.

[0088] The first sidewall insulating layer 53 covers the sidewalls of the through holes 33h1, 33h2, and 51h, and has an opening that exposes the bottom of the through holes. The first sidewall insulating layer 53 can be formed, for example, using chemical vapor deposition or atomic layer deposition techniques, and can be formed using materials such as Al2O3, SiO2, and Si3N4.

[0089] The lower embedded layers 55cb, 55b, and 55cg can fill the through holes 33h1, 33h2, and 51h, respectively. The lower embedded layers 55cb and 55b are insulated from the second LED stack 33 by the first sidewall insulating layer 53. The lower embedded layer 55cb can be electrically connected to the n electrode pad 47a, the lower embedded layer 55b is electrically connected to the lower p electrode pad 47b, and the lower embedded layer 55cg is electrically connected to the first conductive semiconductor layer 33a of the second LED stack 33.

[0090] The lower embedded layers 55cb, 55b, and 55cg can be formed using chemical mechanical polishing (CMP). For example, after forming a seed layer and filling the through holes 33h1, 33h2, and 51h using plating, the metal layer on the lower insulating layer 51 can be removed using CMP, thereby forming the lower embedded layers 55cb, 55b, and 55cg. Alternatively, a metal barrier layer can be formed before forming the seed layer.

[0091] The lower embedded layers 55cb, 55b, and 55cg can be formed together using the same process. Accordingly, the upper surfaces of the lower embedded layers 55cb, 55b, and 55cg can be substantially aligned with the lower insulating layer 51. However, the present invention is not limited to this embodiment and can also be formed using different processes.

[0092] The second bonding layer 59 bonds the first LED stack 23 to the second LED stack 33. As shown, the second bonding layer 59 can be disposed between the first transparent electrode 25 and the lower insulating layer 51. The second bonding layer 59 can be formed using the same material as described above for the first bonding layer 49; to avoid repetition, detailed description is omitted.

[0093] A first intermediate insulating layer 61 covers the first LED stack 23. The first intermediate insulating layer 61 may be formed using an aluminum oxide film, a silicon oxide film, or a silicon nitride film.

[0094] A floating reflective layer 62 is disposed on the first intermediate insulating layer 61 and is therefore spaced apart from the first LED stack 23. Furthermore, the floating reflective layer 62 can also be electrically isolated from the first LED stack 23. The floating reflective layer 62 is formed using a reflective material that reflects light generated from the first LED stack 23. For example, the floating reflective layer 62 can be formed using a reflective metal layer that reflects red light, Au, Al, Ag, Pt, or alloys thereof (e.g., Au alloys). The floating reflective layer 62 can also be formed as a distributed Bragg reflector. In particular, when the floating reflective layer 62 is formed as a distributed Bragg reflector, it can be formed to have a high reflectivity for the red light generated by the first LED stack 23. For example, considering the angle of incidence of light from the first LED stack 23 to the floating reflective layer 62, the distributed Bragg reflector can be formed to have a high reflectivity of 80% or more, and further, 90% or more, in the wavelength range of approximately 600 nm to 650 nm.

[0095] The light generated in the second LED stack 33 and the third LED stack 43 is usually absorbed by the first LED stack 23. Therefore, the floating reflective layer 62 can selectively reflect the light generated in the first LED stack 23, thereby making the luminous intensity of the light generated in the first LED stack 23 relatively higher than that of the light generated in the second LED stack 33 or the third LED stack 43.

[0096] The floating reflective layer 62 may have an opening 62a. The opening 62a may be located in the region where the through holes 23h1, 23h2, 23h3, 23h4, 23h5, and 61h are formed. However, the invention is not limited thereto; the floating reflective layer 62 may be formed within the region surrounded by the through holes 23h1, 23h2, 23h3, 23h4, 23h5, and 61h, and therefore the opening 62a may be omitted. The area of ​​the floating reflective layer 62 may be approximately 60% or more of the area of ​​the first LED stack 23.

[0097] The second intermediate insulating layer 63 covers the floating reflective layer 62. The second intermediate insulating layer 63 may be formed, for example, using an aluminum oxide film, a silicon oxide film, or a silicon nitride film.

[0098] Furthermore, through holes 23h1, 23h2, 23h3, 23h4, and 23h5 penetrate the first LED stack 23. Through hole 23h1 is formed to provide a pathway for allowing electrical connection to the lower embedded layer 55cb. Through hole 23h2 is formed to provide a pathway for allowing electrical connection to the lower embedded layer 55b, through hole 23h3 is formed to provide a pathway for allowing electrical connection to the upper p-electrode pad 37b, and through hole 23h4 is formed to provide a pathway for allowing electrical connection to the lower embedded layer 55cg.

[0099] In this embodiment, the through hole 23h1 can expose the upper surface of the lower buried layer 55cb, the through hole 23h2 can expose the upper surface of the lower buried layer 55b, the through hole 23h3 can expose the upper p electrode pad 37b, and the through hole 23h4 can expose the upper surface of the lower buried layer 55cg.

[0100] Furthermore, the through hole 23h5 is formed to provide a passage for allowing electrical connection to the first transparent electrode 25. The through hole 23h5 does not penetrate the first transparent electrode 25. However, the present invention is not limited thereto; the through hole 23h5 may penetrate the first transparent electrode 25 as long as it can provide a passage for electrical connection to the first transparent electrode 25.

[0101] Through holes 23h1, 23h2, 23h3, and 23h4 can penetrate the first LED stack 23, and also penetrate the first intermediate insulating layer 61, the second intermediate insulating layer 63, the first transparent electrode 25, and the second bonding layer 59. In addition, through hole 23h3 can penetrate the lower insulating layer 51.

[0102] In addition, the through hole 61h can penetrate the first intermediate insulating layer 61 and the second intermediate insulating layer 63 to expose the first conductive semiconductor layer 23a of the first LED stack 23.

[0103] The second sidewall insulating layer 64 covers the sidewalls of the through holes 23h1, 23h2, 23h3, 23h4, 23h5, and 61h, and has an opening that exposes the bottom of the through holes. The second sidewall insulating layer 64 can be formed, for example, using chemical vapor deposition or atomic layer deposition techniques, and can be formed using materials such as Al2O3, SiO2, and Si3N4.

[0104] The upper embedded layers 65cb, 65b, 65g, 65cg, 65r, and 65cr can respectively fill the through holes 23h1, 23h2, 23h3, 23h4, 23h5, and 61h. The upper embedded layers 65cb, 65b, 65g, 65cg, and 65r are electrically insulated from the first LED stack 23 through the second sidewall insulating layer 64.

[0105] Furthermore, the upper buried layer 65cb is electrically connected to the lower buried layer 55cb, the upper buried layer 65b is electrically connected to the lower buried layer 55b, the upper buried layer 65g is electrically connected to the upper p-electrode pad 37b, and the upper buried layer 65cg is electrically connected to the lower buried layer 55cg. Additionally, the upper buried layer 65r can be electrically connected to the first transparent electrode 25, and the upper buried layer 65cr can be electrically connected to the first conductive semiconductor layer 23a of the first LED stack 23.

[0106] The upper embedded layers 65cb, 65b, 65g, 65cg, 65r, and 65cr can be formed using chemical mechanical polishing (CMP). For example, after forming a seed layer and filling the through holes 23h1, 23h2, 23h3, 23h4, 23h5, and 61h using plating technology, the metal layer on the second intermediate insulating layer 63 can be removed using CMP, thereby forming the upper embedded layers 65cb, 65b, 65g, 65cg, 65r, and 65cr. Alternatively, a metal barrier layer can be formed before forming the seed layer.

[0107] The upper embedded layers 65cb, 65b, 65g, 65cg, 65r, and 65cr can be formed together using the same process. Accordingly, the upper surfaces of the upper embedded layers 65cb, 65b, 65g, 65cg, 65r, and 65cr can be substantially aligned with the second intermediate insulating layer 63. However, the invention is not limited to this embodiment and can also be formed using different processes.

[0108] The first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c are arranged on the second intermediate insulating layer 63. The first upper connector 67r is electrically connected to the upper buried layer 65r, the second upper connector 67g is electrically connected to the upper buried layer 65g, and the third upper connector 67b is electrically connected to the upper buried layer 65b. In addition, the upper common connector 67c is electrically connected to the upper buried layers 65cb, 65cg, and 65cr. That is, the upper buried layers 65cb, 65cg, and 65cr are electrically connected to each other through the upper common connector 67c. Therefore, the first conductive semiconductor layers 23a, 33a, and 43a of the first LED stack 23, the second LED stack 33, and the third LED stack 43 are electrically connected to each other.

[0109] The first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c can be formed in the same process using the same materials, for example, AuGe / Ni / Au / Ti. AuGe can make ohmic contacts with the first conductive semiconductor layer 23a. AuGe can be formed to a thickness of about 100 nm, and Ni / Au / Ti can be formed to a thickness of about 2 μm. AuTe can also be used instead of AuGe.

[0110] The upper insulating layer 71 covers the second intermediate insulating layer 63 and also covers the first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c. The upper insulating layer 71 may also cover the sides of the first LED stack 23, the second LED stack 33, and the third LED stack 43. The upper insulating layer 71 may have an opening 71a that exposes the first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c. The opening 71a of the upper insulating layer 71 may be generally disposed on the flat surfaces of the first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c. The upper insulating layer 71 may be formed using a silicon oxide film or a silicon nitride film, for example, it may be formed to a thickness of approximately 400 nm.

[0111] The raised pads 73r, 73b, 73g, and 73c can be arranged in the opening 71a of the upper insulating layer 71 on the first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c, respectively, and are electrically connected to the first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c.

[0112] The first raised pad 73r can be electrically connected to the second conductive semiconductor layer 23b of the first LED stack 23 via the first upper connector 67r and the first transparent electrode 25.

[0113] The second raised pad 73g can be electrically connected to the second conductive semiconductor layer 33b of the second LED stack 33 through the second upper connector 67g, the upper embedded layer 65g, the upper p electrode pad 37b and the second transparent electrode 35.

[0114] The third raised pad 73b can be electrically connected to the second conductive semiconductor layer 43b of the third LED stack 43 through the third upper connector 67b, the upper embedded layer 65b, the lower embedded layer 55b, the lower p electrode pad 47b and the third transparent electrode 45.

[0115] The common raised pad 73c can be electrically connected to the upper embedded layers 65cb, 65cg, and 65cr via the upper common connector 67c, thereby electrically connecting to the first conductive semiconductor layers 23a, 33a, and 43a of the first LED stack 23, the second LED stack 33, and the third LED stack 43.

[0116] That is, the first raised pad 73r, the second raised pad 73g, and the third raised pad 73b are electrically connected to the second conductive semiconductor layers 23b, 33b, and 43b of the first LED stack 23, the second LED stack 33, and the third LED stack 43, respectively, and the common raised pad 73c is electrically connected to the first conductive semiconductor layers 23a, 33a, and 43a of the first LED stack 23, the second LED stack 33, and the third LED stack 43.

[0117] The raised pads 73r, 73b, 73g, and 73c can be arranged within the opening 71a of the upper insulating layer 71, and the upper surface of the raised pads can be a flat surface. The raised pads 73r, 73b, 73g, and 73c can be located on the flat surfaces of the first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c. The raised pads 73r, 73b, 73g, and 73c can be formed using Au / In; for example, Au can be formed to a thickness of 3 μm, and In can be formed to a thickness of approximately 1 μm. The light-emitting element 100 can be bonded to the pads on the circuit board 101 using In. In this embodiment, although the case of bonding the raised pads using In has been described, it is not limited to In; Pb or AuSn can also be used for bonding.

[0118] In this embodiment, the upper surfaces of the raised pads 73r, 73b, 73g, and 73c are described and illustrated as flat, but the present invention is not limited thereto. For example, the upper surfaces of the raised pads 73r, 73b, 73g, and 73c may also be irregular, and a portion of the raised pad may be located on the upper insulating layer 71.

[0119] According to this embodiment, the first LED stack 23 is electrically connected to the raised pads 73r and 73c, the second LED stack 33 is electrically connected to the raised pads 73g and 73c, and the third LED stack 43 is electrically connected to the raised pads 73b and 73c. ​​Accordingly, the cathodes of the first LED stack 23, the second LED stack 33, and the third LED stack 43 are all electrically connected to a common raised pad 73c, and the anodes are respectively electrically connected to the first raised pad 73r, the second raised pad 73g, and the third raised pad 73b. Therefore, the first LED stack 23, the second LED stack 33, and the third LED stack 43 can be driven independently.

[0120] In this embodiment, although the case with raised pads 73r, 73b, 73g, and 73c is illustrated, the raised pads can be omitted. In particular, when anisotropic conductive films or anisotropic conductive pastes are used to bond to the circuit board, the raised pads can be omitted, and the upper connectors 67r, 67g, 67b, and 67c can be directly bonded. Accordingly, the bonding area can be increased.

[0121] The manufacturing method of the light-emitting element 100 will be described in detail below. The structure of the light-emitting element 100 will be understood in more detail through the manufacturing method described below. Figure 5a , Figure 5b and Figure 5c This is a schematic cross-sectional view illustrating a first LED stack 23, a second LED stack 33, and a third LED stack 43 grown on a growth substrate according to an embodiment of the present invention.

[0122] First, refer to Figure 5a A first LED stack 23, comprising a first conductive semiconductor layer 23a and a second conductive semiconductor layer 23b, is grown on the first substrate 21. An active layer (not shown) may be sandwiched between the first conductive semiconductor layer 23a and the second conductive semiconductor layer 23b.

[0123] The first substrate 21 may be a substrate used for growing the first LED stack 23, such as a GaAs substrate. The first conductive semiconductor layer 23a and the second conductive semiconductor layer 23b may be formed using AlGaInAs or AlGaInP series semiconductor layers, and the active layer may include, for example, an AlGaInP series well layer. The first LED stack 23 may have a specific AlGaInP composition ratio to emit, for example, red light.

[0124] A first transparent electrode 25 may be formed on the second conductive semiconductor layer 23b. As described above, the first transparent electrode 25 may be formed using a metal layer or a conductive oxide layer that transmits light (e.g., red light) generated in the first LED stack 23. For example, the first transparent electrode 25 may be formed using indium-tin oxide (ITO).

[0125] Reference Figure 5b A second LED stack 33, comprising a first conductive semiconductor layer 33a and a second conductive semiconductor layer 33b, is grown on the second substrate 31. An active layer (not shown) may be sandwiched between the first conductive semiconductor layer 33a and the second conductive semiconductor layer 33b.

[0126] The second substrate 31 can be a substrate used for growing the second LED stack 33, such as a sapphire substrate, a GaN substrate, or a GaAs substrate. The first conductivity semiconductor layer 33a and the second conductivity semiconductor layer 33b can be formed using AlGaInAs series, AlGaInP series, or AlGaInN series semiconductor layers. The active layer can include, for example, an AlGaInP series well layer or an AlGaInN series well layer. The second LED stack 33 can be configured with a specific AlGaInP or AlGaInN composition ratio to emit, for example, green light.

[0127] A second transparent electrode 35 can be formed on the second conductive semiconductor layer 33b. As described above, the second transparent electrode 35 can be formed using a metal layer or a conductive oxide layer that transmits light (e.g., red light) generated in the first LED stack 23. In particular, the second transparent electrode 35 can be formed using ZnO.

[0128] Reference Figure 5c A third LED stack 43, comprising a first conductive semiconductor layer 43a and a second conductive semiconductor layer 43b, is grown on the third substrate 41. An active layer (not shown) may be sandwiched between the first conductive semiconductor layer 43a and the second conductive semiconductor layer 43b.

[0129] The third substrate 41 can be a substrate used for growing the third LED stack 43, such as a sapphire substrate, a SiC substrate, or a GaN substrate. In one embodiment, the third substrate 41 can be a planar sapphire substrate, but it can also be a patterned sapphire substrate. The first conductivity semiconductor layer 43a and the second conductivity semiconductor layer 43b can be formed using AlGaInN series semiconductor layers, and the active layer can, for example, include an AlGaInN series well layer. The third LED stack 43 can determine the AlGaInN composition ratio to emit, for example, blue light.

[0130] A third transparent electrode 45 can be formed on the second conductive semiconductor layer 43b. As described above, the third transparent electrode 45 can be formed using a metal layer or a conductive oxide layer that transmits light (e.g., red light and green light) generated in the first LED stack 23 and the second LED stack 33. In particular, the third transparent electrode 45 can be formed using ZnO.

[0131] The first LED stack 23, the second LED stack 33, and the third LED stack 43 are grown on different growth substrates 21, 31, and 41, respectively, so the order of their manufacturing processes is not restricted.

[0132] The following describes a method for manufacturing a light-emitting element 100 using a first LED stack 23, a second LED stack 33, and a third LED stack 43 grown on growth substrates 21, 31, and 41. Although the following illustrations and descriptions primarily focus on one region of the light-emitting element 100, those skilled in the art will understand that multiple light-emitting elements 100 can be manufactured simultaneously in the same manufacturing process using the first LED stack 23, the second LED stack 33, and the third LED stack 43 grown on growth substrates 21, 31, and 41.

[0133] Figure 6a , Figure 6b , Figure 7a , Figure 7b , Figure 8a , Figure 8b , Figure 9a , Figure 9b , Figure 10a , Figure 10b , Figure 11a and Figure 11b These are schematic plan views and cross-sectional views illustrating a method for manufacturing a display light-emitting element 100 according to an embodiment of the present invention. Here, the cross-sectional view corresponds to... Figure 3 The intercept line A-A'.

[0134] First, refer to Figure 6a and Figure 6b The first conductive semiconductor layer 43a can be exposed by patterning the third transparent electrode 45 and the second conductive semiconductor layer 43b using photolithography and etching techniques. This process is, for example, equivalent to a mesa etching process. A photoresist pattern can be used as an etching mask to perform the process. For example, after forming the etching mask, the third transparent electrode 45 can first be etched using a wet etching technique, and then the second conductive semiconductor layer 43b can be etched using a dry etching technique with the same etching mask. Therefore, the third transparent electrode 45 can be recessed from the mesa etching area. Figure 6aFor simplicity, the edge of the mesa is shown in the illustration, but the edge of the third transparent electrode 45 is not shown. However, since the third transparent electrode 45 is wet-etched using the same etching mask, it is easy to understand that the edge of the third transparent electrode 45 is recessed from the edge of the mesa towards the inside of the mesa. Because the same etching mask is used, process costs can be saved without increasing the number of photolithography steps. However, the invention is not limited to this; an etching mask for the mesa etching process and an etching mask for etching the third transparent electrode 45 can also be used separately.

[0135] Next, an n-electrode pad 47a and a lower p-electrode pad 47b are formed on the first conductive semiconductor layer 43a and the third transparent electrode 45, respectively. The n-electrode pad 47a and the lower p-electrode pad 47b can be formed to have different thicknesses. In particular, the upper surfaces of the n-electrode pad 47a and the lower p-electrode pad 47b can be at the same height.

[0136] Reference Figure 7a and Figure 7b In reference Figure 6a and Figure 6b The bonding reference on the third LED stack 43 Figure 5b The second LED stack 33 is bonded to a temporary substrate using a temporary bonding / debonding (TBDB) technique, and the second substrate 31 is first removed from the second LED stack 33. The second substrate 31 can be removed, for example, using laser lift-off technology. After removing the second substrate 31, a rough surface 33r can be formed on the surface of the first conductive semiconductor layer 33a. Then, the first conductive semiconductor layer 33a of the second LED stack 33, bonded to the temporary substrate, can be arranged facing the third LED stack 43 and bonded to it. The second LED stack 33 and the third LED stack 43 are bonded to each other through a first bonding layer 49. After bonding the second LED stack 33, the temporary substrate can also be removed using laser lift-off technology. Therefore, the second LED stack 33 can be arranged on the third LED stack 43 with the second transparent electrode 35 disposed on the upper surface.

[0137] When the second substrate 31 is separated using laser lift-off technology, ITO can be peeled off from the second LED stack 33. Therefore, when the second substrate 31 is removed using laser lift-off technology, it is advantageous to form the second transparent electrode 35 using ZnO with strong bonding strength.

[0138] Next, the second transparent electrode 35 and the second conductive semiconductor layer 33b are patterned to expose the first conductive semiconductor layer 33a. The second transparent electrode 35 and the second conductive semiconductor layer 33b can be patterned using photolithography and etching techniques. This process can be performed using wet etching and dry etching techniques in the same way as the mesa etching process described above for etching the third transparent electrode 45 and the second conductive semiconductor layer 43b.

[0139] For example, after forming the etching mask, the second transparent electrode 35 can first be etched using a wet etching technique, and then the second conductive semiconductor layer 33b can be etched using a dry etching technique with the same etching mask. Therefore, the second transparent electrode 35 can be recessed from the mesa etching area. Figure 7a For simplicity, the edge of the mesa is shown in the illustration, but the edge of the second transparent electrode 35 is not shown. However, since the second transparent electrode 35 is wet-etched using the same etching mask, it is easy to understand that the edge of the second transparent electrode 35 is recessed from the edge of the mesa towards the inside of the mesa. Because the same etching mask is used, process costs can be saved without increasing the number of photolithography steps. However, the invention is not limited to this; an etching mask for the mesa etching process and an etching mask for etching the second transparent electrode 35 can also be used separately.

[0140] like Figure 7a As shown, the mesa etching region of the second LED stack 33 may partially overlap with the mesa etching region of the third LED stack 43. For example, a portion of the mesa etching region of the second LED stack 33 may be formed on the upper part of the n electrode pad 47a. Furthermore, another portion of the mesa etching region may be located on the upper part of the lower p electrode pad 47b.

[0141] And, as Figure 7a As shown, the upper p-electrode pad 37b can be formed on the second transparent electrode 35.

[0142] In addition, such as Figure 7b As shown, the lower insulating layer 51 can be formed to cover the second LED stack 33 and the second transparent electrode 35. The lower insulating layer 51 can also cover the upper p electrode pad 37b, and can thus be formed to have a flat upper surface.

[0143] Reference Figure 8a and Figure 8b Through-holes 33h1 and 33h2 are formed to penetrate the second LED stack 33. Through-holes 33h1 and 33h2 penetrate the first bonding layer 49, exposing the n electrode pad 47a and the lower p electrode pad 47b. Through-holes 33h1 and 33h2 can be formed within the mesa etching area.

[0144] Additionally, a via 51h can be formed to expose the first conductive semiconductor layer 33a of the second LED stack 33. The via 51h can be located within the mesa etching region of the second conductive semiconductor layer 33. The via 51h can be formed after or before the formation of vias 33h1 and 33h2.

[0145] Next, a first sidewall insulating layer 53 is formed. The first sidewall insulating layer 53 can be formed, for example, using atomic layer deposition (ALD). The first sidewall insulating layer 53 can cover the upper surface of the lower insulating layer 51, and further cover the sidewalls and bottom surfaces of the through holes 33h1, 33h2, and 51h. The first sidewall insulating layer 53 formed on the bottom surface of the through holes 33h1, 33h2, and 51h can be removed by an etching process, thus exposing the n-electrode pad 47a, the lower p-electrode pad 47b, and the first conductive semiconductor layer 33a.

[0146] Next, after forming a seed layer and forming a metal layer using plating technology, the metal layer formed on the upper surface of the lower insulating layer 51 is removed by chemical mechanical polishing technology, thereby completing the lower buried layers 55cb, 55b, and 55cg for embedding through holes 33h1, 33h2, and 51h.

[0147] After that, Figure 5a The first LED stack 23 described herein is bonded to the second LED stack 33. The first LED stack 23 and the second LED stack 33 can be bonded using the second LED stack 33 such that the first transparent electrode 25 faces the second LED stack 33. Accordingly, the second bonding layer 59 can be bonded to the first transparent electrode 25, and also to the lower insulating layer 51 and the lower buried layers 55cb, 55b, 55cg.

[0148] Additionally, the first substrate 21 is removed from the first LED stack 23. The first substrate 21 can be removed, for example, using an etching technique. After removing the first substrate 21, a rough surface 23r can be formed on the surface of the first conductive semiconductor layer 23a.

[0149] Additionally, a first intermediate insulating layer 61 is formed covering the first conductive semiconductor layer 23a, and a floating reflective layer 62 is formed on the first intermediate insulating layer 61. The floating reflective layer 62 may also be patterned to have an opening 62a. Next, a second intermediate insulating layer 63 is formed to cover the floating reflective layer 62.

[0150] like Figure 9a and Figure 9bAs shown, through holes 23h1, 23h2, 23h3, and 23h4 are formed to penetrate the first LED stack 23 and the first transparent electrode 25. Through hole 23h1 exposes the lower buried layer 55cb, through hole 23h2 exposes the lower buried layer 55b, through hole 23h3 exposes the upper p-electrode pad 37b, and through hole 23h4 exposes the lower buried layer 55cg.

[0151] Additionally, a through-hole 25h5 is formed. The through-hole 25h5 penetrates the first LED stack 23 and exposes the first transparent electrode 25. Furthermore, a through-hole 61h can be formed that penetrates the first intermediate insulating layer 61 and the second intermediate insulating layer 63. The through-hole 61h exposes the first conductive semiconductor layer 23a.

[0152] Through holes 23h1, 23h2, 23h3, and 23h4 can be formed together in the same process. These through holes 23h1, 23h2, 23h3, and 23h4 can penetrate the first intermediate insulating layer 61 and the second intermediate insulating layer 63, the first LED stack 23, the first transparent electrode 25, and the second bonding layer 59. In addition, through hole 23h3 can penetrate the lower insulating layer 51.

[0153] In contrast, the etching depths of through holes 61h and 23h5 differ from those of through holes 23h1, 23h2, 23h3, and 23h4, allowing them to be formed through different processes. Through holes 61h and 23h5 can also be formed through mutually different processes.

[0154] Next, upper embedded layers 65cb, 65b, 65g, 65cg, 65r, and 65cr are formed to embed the through holes 23h1, 23h2, 23h3, 23h4, 23h5, and 61h. To form the upper embedded layers, the second sidewall insulating layer 64 can be formed to cover the sidewalls of the through holes 23h1, 23h2, 23h3, 23h4, 23h5, and 61h, and a seed layer and a metal plating layer are formed. The metal layer on the second intermediate insulating layer 63 can be removed using chemical mechanical polishing. A metal barrier layer can also be formed before forming the seed layer. Since the process of forming the upper embedded layers 65cb, 65b, 65g, 65cg, 65r, and 65cr is substantially similar to the process of forming the lower embedded layers 55cb, 55b, and 55cg, its detailed description is omitted.

[0155] Reference Figure 10a and Figure 10bA first upper connector 67r, a second upper connector 67g, a third upper connector 67b, and an upper common connector 67c are formed on the second intermediate insulating layer 63. The first upper connector 67r is electrically connected to the upper embedded layer 65r, the second upper connector 67g is electrically connected to the upper embedded layer 65g, and the third upper connector 67b is electrically connected to the upper embedded layer 65b. Additionally, the upper common connector 67c is electrically connected to the upper embedded layers 65cb, 65cg, and 65cr.

[0156] Therefore, the first upper connector 67r, the second upper connector 67g, and the third upper connector 67b are electrically connected to the second conductive semiconductor layers 23b, 33b, and 43b of the first LED stack 23, the second LED stack 33, and the third LED stack 43, respectively, and the upper common connector 67c is electrically connected to the first conductive semiconductor layers 23a, 33a, and 43a of the first LED stack 23, the second LED stack 33, and the third LED stack 43.

[0157] Reference Figure 11a and Figure 11b A separation groove for defining the region of the light-emitting element 100 is formed through an isolation process. The separation groove can expose the third substrate 41 along the periphery of the first LED stack 23, the second LED stack 33, and the third LED stack 43. The separation groove can be formed by sequentially removing the first LED stack 23, the first transparent electrode 25, the second bonding layer 59, the lower insulating layer 51, the second LED stack 33, the first bonding layer 49, and the third LED stack 43 between the light-emitting element regions. The second transparent electrode 35 and the third transparent electrode 45 are not exposed during the isolation process and are therefore not damaged by the etching gas. In the case where the second transparent electrode 35 and the third transparent electrode 45 are formed using ZnO, ZnO may be easily damaged by the etching gas. However, the present invention can prevent the second transparent electrode 35 and the third transparent electrode 45 from being exposed to the etching gas by pre-recessing them.

[0158] In this embodiment, although the patterning of the first LED stack 23, the second LED stack 33, and the third LED stack 43 is described sequentially through an isolation process, the present invention is not necessarily limited thereto. The third LED stack 43 can be removed in the area where the separation groove is to be formed before bonding the second LED stack 33, or the second LED stack 33 can be removed in the area where the separation groove is to be formed before bonding the first LED stack 23. In this case, the area where the third LED stack 43 has been removed can be filled by the first bonding layer 49, and the area where the second LED stack 33 has been removed can be filled by the second bonding layer 59. Therefore, the second LED stack 33 and the third LED stack 43 can be kept unexposed during the isolation process.

[0159] The isolation process can also be performed before the formation of the upper connectors 67r, 67g, 67b, and 67c. In this case, to protect the sidewalls exposed due to the isolation process, an additional protective insulating layer covering the second intermediate insulating layer 63 can be added. The protective insulating layer can have openings that expose the upper buried layers 65b, 65cb, 65g, 65cg, 65r, and 65cr, and is formed such that the upper connectors 67r, 67g, 67b, and 67c are electrically connected to the upper buried layers.

[0160] Additionally, an upper insulating layer 71 is formed covering the upper connectors 67r, 67g, 67b, and 67c. The upper insulating layer 71 may cover the second intermediate insulating layer 63 or a protective insulating layer.

[0161] The upper insulating layer 71 may cover the sides of the first LED stack 23, the second LED stack 33, and the third LED stack 43. The upper insulating layer 71 may be patterned to have an opening 71a that exposes the first upper connector 67r, the second upper connector 67g, the third upper connector 67b, and the upper common connector 67c.

[0162] Next, raised pads 73r, 73b, 73g, and 73c can be formed in the opening 71a. The first raised pad 73r is arranged on the first upper connector 67r, the second raised pad 73g is arranged on the second upper connector 67g, the third raised pad 73b is arranged on the third upper connector 67b, and the common raised pad 73c is placed on the upper common connector 67c.

[0163] Next, by bonding the light-emitting element 100 to the circuit board 101 and separating the third board 41, the light-emitting element 100 separated from the third board 41 is completed. Figure 12 The figure shows a schematic cross-sectional view of a light-emitting element 100 bonded to a circuit board 101.

[0164] Figure 12 The illustration shows a single light-emitting element 100 arranged on a circuit board 101, but multiple light-emitting elements 100 are mounted on the circuit board 101. Each light-emitting element 100 constitutes a pixel capable of emitting blue light, green light, and red light, and multiple pixels are arranged on the circuit board 101 to provide a display panel.

[0165] In addition, multiple light-emitting elements 100 can be formed on the third substrate 41, and these light-emitting elements 100 are not transferred to the circuit board 101 one by one, but can be transferred to the circuit board 101 collectively. Figure 13a , Figure 13b and Figure 13cThis is a schematic cross-sectional view illustrating a method for transferring light-emitting elements onto a circuit board according to an embodiment. Here, a method for collectively transferring light-emitting elements 100 formed on a third substrate 41 onto a circuit board 101 is described.

[0166] Reference Figure 13a If Figure 11a and Figure 11b If the manufacturing process of the light-emitting element 100 is completed on the third substrate 41, then multiple light-emitting elements 100 are separated by a separation tank and arranged on the third substrate 41.

[0167] Additionally, a circuit board 101 with pads on its upper surface is provided. The pads are arranged on the circuit board 101 in a manner corresponding to the arrangement positions of the pixels for display. Typically, the spacing between the light-emitting elements 100 arranged on the third substrate 41 is more compact than the spacing between the pixels within the circuit board 101.

[0168] Reference Figure 13b The raised pads of the light-emitting element 100 are bonded to the pads on the circuit board 101. The raised pads and the pads can be bonded using In bonding. In addition, since the light-emitting element 100 located between pixel regions does not have pads to be bonded, it remains in a state away from the circuit board 101.

[0169] Next, a laser is irradiated onto the third substrate 41. The laser is selectively irradiated onto the light-emitting element 100 bonded to the pad. For this purpose, a mask having an opening that selectively exposes the light-emitting element 100 can also be formed on the third substrate 41.

[0170] Subsequently, the light-emitting element 100, which has been irradiated by the laser, is separated from the third substrate 41, thereby transferring the light-emitting element 100 onto the circuit board 101. Accordingly, as Figure 13c As shown, a display panel is provided in which light-emitting elements 100 are arranged on a circuit board 101. (See reference...) Figure 1 The display panel can be mounted on various display devices.

[0171] Figure 14 This is a schematic cross-sectional view used to illustrate a light-emitting element transfer method according to yet another embodiment.

[0172] Reference Figure 14 The difference in the light-emitting element transfer method according to this embodiment lies in the use of anisotropic conductive adhesive film or anisotropic conductive adhesive paste to bond the light-emitting element to the pad. That is, anisotropic conductive adhesive film or adhesive paste 121 can be provided on the pad, and the light-emitting element 100 can be bonded to the pad through the anisotropic conductive adhesive film or adhesive paste 121. The light-emitting element 100 is electrically connected to the pad through the conductive material in the anisotropic conductive adhesive film or adhesive paste 121.

[0173] In this embodiment, the raised pads 73r, 73b, 73g, and 73c can be omitted, and the upper connectors 67r, 67g, 67b, and 67c can be electrically connected to the pads using a conductive material.

[0174] Various embodiments of the present invention have been described above; however, the present invention is not limited to these embodiments. Furthermore, matters or elements described in one embodiment may be applied to other embodiments without departing from the technical spirit of the present invention.

Claims

1. A light-emitting element for display, comprising: The first LED stack generates light with the first peak wavelength; The second LED stack is located below the first LED stack and generates light with a second peak wavelength; The third LED stack is located below the second LED stack and generates light with a third peak wavelength; as well as A floating reflective layer is positioned above the first LED stack and reflects light of the first peak wavelength. The floating reflective layer is separated from the first LED stack by a first intermediate insulating layer located between the first LED stack and the floating reflective layer. The floating reflective layer is insulated by a second intermediate insulating layer disposed on the upper surface of the floating reflective layer. The first peak wavelength is longer than the second and third peak wavelengths.

2. The light-emitting element for display according to claim 1, wherein, The first LED stack, the second LED stack, and the third LED stack emit red light, green light, and blue light, respectively.

3. The light-emitting element for display according to claim 1, wherein, The floating reflective layer includes Au, Al, Ag, Pt, or alloys thereof.

4. The light-emitting element for display according to claim 1, wherein, The floating reflective layer includes a distributed Bragg reflector.

5. The light-emitting element according to claim 1, wherein Also includes: The upper connector is disposed on the second intermediate insulating layer. The upper connector is electrically connected to at least one of the first LED stack, the second LED stack, and the third LED stack.

6. The light-emitting element according to claim 5, wherein Also includes: A first bonding layer is sandwiched between the second LED stack and the third LED stack; The second bonding layer is sandwiched between the first LED stack and the second LED stack; The lower insulating layer is sandwiched between the second bonding layer and the second LED stack; The lower embedded layer penetrates the lower insulating layer and the second LED stack, and is electrically connected to the first conductive semiconductor layer and the second conductive semiconductor layer of the third LED stack, respectively; and The first upper embedded layer penetrates the first LED stack and the second bonding layer and is electrically connected to the lower embedded layer. The upper connector includes an upper connector that covers the first upper embedded layer and is electrically connected to the upper embedded layer.

7. The light-emitting element for display according to claim 6, wherein, Also includes: n-electrode pads are electrically connected to the first conductive semiconductor layer of the third LED stack; as well as The lower p-electrode pad is disposed on the second conductive semiconductor layer of the third LED stack. The lower embedded layer is electrically connected to the n electrode pad and the lower p electrode pad, respectively.

8. The light-emitting element for display according to claim 7, wherein, Also includes: The second lower embedded layer penetrates the lower insulating layer and is electrically connected to the first conductive semiconductor layer of the second LED stack; as well as The second upper embedded layer penetrates the first LED stack and the second bonding layer and is electrically connected to the second lower embedded layer. In this embodiment, one of the first upper connectors is electrically connected to the first conductive semiconductor layer of the second LED stack through the second upper embedded layer and the second lower embedded layer.

9. The light-emitting element for display according to claim 8, wherein, One of the first upper connectors is an upper common connector that is electrically connected to the first conductive semiconductor layer of the first LED stack, the second LED stack, and the third LED stack.

10. The light-emitting element for display according to claim 9, wherein, Also includes: The third upper embedded layer penetrates the first LED stack, the second bonding layer, and the lower insulating layer, and is electrically connected to the second conductive semiconductor layer of the second LED stack. In this embodiment, one of the second upper connectors is connected to the third upper buried layer and electrically connected to the second conductive semiconductor layer of the second LED stack.

11. The light-emitting element for display according to claim 10, wherein, One of the third upper connectors is electrically connected to the second conductive semiconductor layer of the first LED stack.

12. The light-emitting element for display according to claim 5, wherein, Also includes: Raised pads are arranged on the upper connector. The raised pad includes a first raised pad, a second raised pad, a third raised pad, and a common raised pad. The common raised pads are electrically connected to the first LED stack, the second LED stack, and the third LED stack. The first raised pad, the second raised pad, and the third raised pad are electrically connected to the first LED stack, the second LED stack, and the third LED stack, respectively.

13. The light-emitting element for display according to claim 1, wherein, Also includes: A first transparent electrode is sandwiched between the first LED stack and the second LED stack, and makes ohmic contact with the lower surface of the first LED stack; The second transparent electrode is sandwiched between the first LED stack and the second LED stack, and is in ohmic contact with the upper surface of the second LED stack; as well as A third transparent electrode is sandwiched between the second LED stack and the third LED stack, and makes ohmic contact with the upper surface of the third LED stack.

14. The light-emitting element for display according to claim 1, wherein, The first LED stack has a rough surface through texturing. The second LED stack has a rough surface through texturing.

15. The light-emitting element for display according to claim 14, wherein, The upper and lower surfaces of the third LED stack are not textured and have flat surfaces.

16. The light-emitting element for display according to claim 1, wherein, The first LED stack, the second LED stack, and the third LED stack are separated from the growth substrate.

17. The light-emitting element for display according to claim 1, wherein, The first LED stack, the second LED stack, and the third LED stack can be driven independently. The light generated by the first LED stack is emitted outwards after passing through the second LED stack and the third LED stack. The light generated in the second LED stack is transmitted through the third LED stack and emitted to the outside.

18. A display device, comprising: Circuit board; as well as Multiple light-emitting elements are arranged on the circuit board. The light-emitting elements include: The first LED stack generates light with the first peak wavelength; The second LED stack is located below the first LED stack and generates light with a second peak wavelength; A third LED stack, located below the second LED stack, generates light with a third peak wavelength; and A floating reflective layer is positioned above the first LED stack and reflects light of the first peak wavelength. The floating reflective layer is separated from the first LED stack by a first intermediate insulating layer located between the first LED stack and the floating reflective layer. The floating reflective layer is insulated by a second intermediate insulating layer disposed on the upper surface of the floating reflective layer. The first peak wavelength is longer than the second and third peak wavelengths.