Encryption accelerator and system and method for encryption

Abstract

Disclosed are a cryptographic accelerator and a system and method for encryption. The cryptographic accelerator may include an input buffer for storing an additional authentication data (AAD) portion of a message and a plaintext portion of the message. The cryptographic accelerator may include an encryption engine configured to generate ciphertext using the plaintext portion of the message, generate a message authentication code (MAC) using either the plaintext portion or the ciphertext and the AAD portion, determine a configuration for creating an assembled message in an output buffer of the cryptographic accelerator, and provide at least the ciphertext to the output buffer to create the assembled message in the output buffer according to the configuration. The cryptographic accelerator may include an output buffer for providing the assembled message.

Description

Technical Field

[0001] The present invention relates to the field of cryptography, and in particular to automatic message assembly during cryptographic operations. Background Art

[0002] In some cases, a message in a secure communication environment consists of at least two parts: an additional authentication data part (AAD) that is only authenticated, and a plaintext part that is both authenticated and encrypted. The encryption operation that performs this authenticated encryption is called authenticated encryption with associated data (AEAD). AEAD can be used to ensure both confidentiality and authenticity of data. Typically, the AAD part includes message header information, while the plaintext part includes the message payload.

[0003] In some cases, a message may also include a message authentication code (MAC). A MAC (also called a tag) is used to authenticate a message. Specifically, a MAC can be used to confirm the authenticity of the message (i.e., that it originated from the intended sender) and that it has not been altered. The MAC value protects the integrity of the message data and the authenticity of the message by allowing a verifier to detect any changes to the message. Summary of the Invention

[0004] In some implementations, the cryptographic accelerator includes an input buffer for storing an AAD portion of a message and a plaintext portion of the message; an encryption engine for generating ciphertext using the plaintext portion of the message, generating a MAC using one of the plaintext portion or the ciphertext and the AAD portion, determining a configuration for creating an assembled message in an output buffer of the cryptographic accelerator, and providing at least the ciphertext to the output buffer to create the assembled message in the output buffer according to the configuration; and an output buffer for providing the assembled message.

[0005] In some implementations, the system includes a cryptographic accelerator that stores an AAD portion of a message and a plaintext portion of the message in an input buffer, generates ciphertext using the plaintext portion of the message, generates a MAC using one of the plaintext portion or the ciphertext and the AAD portion, creates an assembled message in an output buffer of the cryptographic accelerator, the assembled message being created based on a configuration and including at least the ciphertext, and provides the assembled message for transmission; and a communication component that receives the assembled message and transmits the assembled message.

[0006] In some implementations, the method includes: storing an AAD portion of a message and a plaintext portion of the message in an input buffer; generating ciphertext using the plaintext portion of the message; generating a MAC using one of the plaintext portion or the ciphertext and the AAD portion; assembling a secure message in an output buffer of a cryptographic accelerator, the secure message being assembled based on a configuration associated with a communication protocol to be used to transmit the secure message, wherein assembling the secure message in the output buffer includes providing at least the ciphertext to the output buffer; and providing the secure message for transmission.

[0007] In some implementations, the cryptographic accelerator includes an input buffer for storing an AAD portion of a message and a plaintext portion of the message; an encryption engine for generating a MAC using the AAD portion and the plaintext portion, determining a configuration for creating an assembled message in an output buffer of the cryptographic accelerator, and providing the AAD portion, the plaintext portion, and the MAC to create the assembled message in the output buffer according to the configuration; and an output buffer for providing the assembled message. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figures 1A to 1E is a diagram illustrating examples associated with automatic message assembly during cryptographic operations in accordance with various aspects of the present disclosure.

[0009] Figure 2A and Figure 2B is a diagram illustrating another example associated with automatic message assembly during cryptographic operations in accordance with various aspects of the present disclosure.

[0010] Figure 3 is a diagram of an example system in which the cryptographic accelerator described herein may be implemented.

[0011] Figure 4 is a flow diagram of an example process related to automatic message assembly during cryptographic operations in accordance with various aspects of the present disclosure. DETAILED DESCRIPTION

[0012] The following detailed description of example implementations refers to the accompanying drawings, in which the same reference numerals in different drawings may identify the same or similar elements.

[0013] The encryption accelerator typically uses the AAD portion of the message and the plaintext portion of the message to generate a secure message. Typically, the AAD portion of the message is consumed by the encryption operation performed using the AAD portion, and the output of the encryption operation includes a ciphertext and a MAC. For transmission, the AAD portion, the ciphertext, and the MAC should be assembled (to form an assembled message) to send the secure message to, for example, a communication component. In some cases, the message can be assembled in a memory (e.g., a random access memory (RAM) of a system including the encryption accelerator). However, such assembly requires multiple data transfers in the system and therefore consumes system resources (e.g., a bus, direct memory access (DMA), etc.).

[0014] A technique for solving this problem is to use the central processing unit (CPU) of the system to transmit the message part by executing a copy routine, so that AAD is transferred from the memory to the communication component, and ciphertext and MAC are transferred to the communication component from the encryption accelerator. However, this technique will increase the load of the CPU. Another technique for solving this problem is to use scatter-gather DMA to copy the message part from different locations or to link the message part in the memory before DMA transfers the message from the memory to the communication component. However, such a technique increases the complexity of DMA. For example, DMA may require a relatively complex linked list configuration.

[0015] Some implementations described herein implement automatic message assembly during cryptographic operations. In some implementations, the cryptographic accelerator includes an input buffer for storing the AAD portion of the message and the plaintext portion of the message. The cryptographic accelerator also includes a cryptographic engine for generating ciphertext using the plaintext portion of the message and using one of the plaintext portion or the ciphertext and the AAD portion to generate a MAC. In some implementations, the cryptographic engine determines the configuration for creating an assembled message in the output buffer of the cryptographic accelerator, and then provides one or more message parts (e.g., at least ciphertext) to the output buffer to create an assembled message in the output buffer according to the configuration. The output buffer can then provide the assembled message (e.g., provided to a communication component).

[0016] In this way, the cryptographic accelerator described herein enables secure messages to be assembled in a flexible manner in the output buffer of the cryptographic accelerator. By providing flexible assembly of messages in the output buffer, the cryptographic accelerator enables relatively simple non-scatter-gather DMA to be used to transfer messages directly from the cryptographic accelerator to the communication component. In addition, the cryptographic accelerator described herein reduces the number of data transfers required to generate the message (e.g., by reducing the load on the CPU and / or by reducing the complexity of the DMA configuration) while increasing the throughput of the system bus. In addition, the cryptographic accelerator described herein improves the flexibility of software processing.

[0017] Figures 1A to 1E is a diagram illustrating an example of automatic message assembly during cryptographic operations in accordance with various aspects of the present disclosure.

[0018] like Figures 1A to 1E As shown in , example 100 includes a cryptographic accelerator 102. In some implementations, the cryptographic accelerator 102 may be a component in a system, such as a system on a chip (SoC). Figure 1A As shown, cryptographic accelerator 102 may include input buffer 104, cryptographic engine 108, and output buffer 110. A description of cryptographic accelerator 102 and components of cryptographic accelerator 102 is provided below, followed by a description of an example of operation of cryptographic accelerator 102.

[0019] The cryptographic accelerator 102 is a component of the system that performs cryptographic operations. In some embodiments, the cryptographic accelerator 102 may be a coprocessor of the system. In some implementations, the cryptographic accelerator 102 improves system performance by providing hardware for performing cryptographic operations (rather than having software and / or the system's general-purpose central processing unit (CPU) perform the cryptographic operations).

[0020] The input buffer 104 is a component of the cryptographic accelerator 102 that holds data received by the cryptographic accelerator 102 before it is processed by one or more other components of the cryptographic accelerator 102. For example, the input buffer 104 may store one or more portions of a message, such as an AAD portion and a plaintext portion, before the portions are used by the cryptographic engine 108 of the cryptographic accelerator 102 to perform a cryptographic operation. In some implementations, the input buffer 104 may be a FIFO-based buffer.

[0021] The cryptographic engine 108 is a component of the cryptographic accelerator 102 that is used to perform cryptographic operations using the data portion held by the input buffer 104 and create an assembled message in the output buffer 110 of the cryptographic accelerator 102, as described herein. In some implementations, the cryptographic engine 108 may include an Advanced Encryption Standard (AES) engine.

[0022] The output buffer 110 is a component of the cryptographic accelerator 102 that holds data to be transmitted by the cryptographic accelerator 102 after the data has been processed by one or more other components of the cryptographic accelerator 102. For example, the output buffer 110 may store assembled messages created by the cryptographic engine 108. In some implementations, the output buffer 110 may be a first-in, first-out (FIFO) based buffer.

[0023] In exemplary operation, starting at reference numeral 150, the input buffer 104 may store the AAD portion of the message. For example, the cryptographic accelerator 102 may receive the AAD portion of the message via a DMA component (not shown) of the system, and the input buffer 104 may store the AAD portion.

[0024] The input buffer 104 may also store the plaintext (PT) portion of the message, as indicated by reference numeral 152. For example, the cryptographic accelerator 102 may receive the plaintext portion of the message via a DMA component (not shown) of the system, and the input buffer 104 may store the plaintext portion.

[0025] As indicated by reference numeral 154, the cryptographic engine 108 may obtain the AAD portion of the message and the plaintext portion of the message. For example, the cryptographic engine 108 may read the AAD portion of the message from the input buffer 104 and may read the plaintext portion of the message from the input buffer 104. As another example, another component of the cryptographic accelerator 102 may read the AAD portion of the message and / or the plaintext portion of the message and may provide the AAD portion of the message and / or the plaintext portion of the message to the cryptographic engine 108 (e.g., after some processing of the AAD portion of the message and / or the plaintext portion of the message).

[0026] As indicated by reference numeral 156, the encryption engine 108 may generate ciphertext using the plaintext portion of the message. For example, the encryption engine 108 may provide the plaintext portion of the message as input to an encryption algorithm configured on the encryption engine 108 and may obtain ciphertext as output of the encryption algorithm, the ciphertext being an encrypted version of the plaintext. In some implementations, the encryption engine 108 may generate the ciphertext based on a set of encryption configuration parameters configured for the encryption engine 108. For example, software associated with the encryption accelerator 102 may configure the encryption accelerator 102 with a set of parameters to be used in association with performing an encryption operation based on the AAD portion of the message and the plaintext portion of the message. In some implementations, the parameter set includes one or more parameters associated with performing the encryption operation, such as an indication of the type of encryption to be used, an indication of a key to be used, etc.

[0027] As shown by reference numeral 158, the encryption engine 108 can use one of the plaintext portion or the ciphertext of the message and the AAD portion of the message to generate a MAC. For example, the encryption engine 108 can provide the plaintext portion of the message and the AAD portion of the message as inputs to a MAC algorithm configured on the encryption engine 108, and can obtain a MAC as an output of the MAC algorithm. As another example, the encryption engine 108 can provide the ciphertext and the AAD portion of the message as inputs to a MAC algorithm configured on the encryption engine 108, and can obtain a MAC as an output of the MAC algorithm. In some implementations, as described above, the MAC is generated according to a set of encryption configuration parameters configured for the encryption engine 108.

[0028] As indicated by reference numeral 160, the cryptographic engine 108 may determine a configuration for creating an assembled message in the output buffer 110 of the cryptographic accelerator 102. The configuration for creating the assembled message in the output buffer 110 (referred to herein as a message assembly configuration) is a configuration that includes a message identifying one or more parts to be included in the message assembled in the output buffer 110. In some implementations, the cryptographic engine 108 may determine the message assembly configuration based on the communication protocol to be used to transmit the assembled message. For example, the cryptographic engine 108 may access information that maps each of a set of communication protocols to a corresponding message assembly configuration. Here, the cryptographic engine 108 may identify the communication protocol to be used to transmit the assembled message (e.g., based on an explicit or implicit indication in a cryptographic configuration parameter set) and may determine the configuration for creating the assembled message based on the identified communication protocol. In some implementations, the cryptographic engine 108 may determine the message assembly configuration based on the cryptographic configuration parameter set (e.g., when the cryptographic configuration parameter set includes a message assembly configuration).

[0029] In some implementations, the message assembly configuration indicates that the assembled message will consist of an AAD part, a ciphertext, and a MAC. Figure 1B Message assembly is shown in example 100b, where the message assembly configuration indicates that the assembled message will consist of an AAD part, a ciphertext, and a MAC.

[0030] As indicated by reference numeral 162b, based on the message assembly configuration indicating that the assembled message will consist of the AAD portion, the ciphertext, and the MAC, the cryptographic engine 108 may copy the AAD portion to the output buffer 110, or cause the AAD portion to be copied to the output buffer 110. As indicated by reference numeral 164b, the cryptographic engine 108 may then provide the ciphertext to the output buffer 110. Here, the cryptographic engine 108 provides the ciphertext to the output buffer 110, such that the ciphertext is concatenated to the AAD portion in the output buffer 110. As indicated by reference numeral 166b, the cryptographic engine 108 may then provide the MAC to the output buffer 110. Here, the cryptographic engine 108 provides the MAC to the output buffer 110, such that the MAC is concatenated to the ciphertext in the output buffer 110. In this manner, the cryptographic engine 108 can create an assembled message in the output buffer 110, such that the assembled message consists of the AAD portion, the ciphertext, and the MAC, wherein the ciphertext is concatenated to the AAD portion, and the MAC is concatenated to the ciphertext.

[0031] In some implementations, the message assembly configuration indicates that the assembled message will consist of a ciphertext and a MAC. Figure 1C Message assembly is shown in example 100c where the message assembly configuration indicates that the assembled message will consist of a ciphertext and a MAC.

[0032] As indicated by reference numeral 164c, the cryptographic engine 108 may provide the ciphertext to the output buffer 110. As indicated by reference numeral 166c, the cryptographic engine 108 may then provide the MAC to the output buffer 110. Here, the cryptographic engine 108 provides the MAC to the output buffer 110 such that the MAC is concatenated to the ciphertext in the output buffer 110. In this manner, the cryptographic engine 108 may create an assembled message in the output buffer 110 such that the assembled message consists of the ciphertext and the MAC, wherein the MAC is concatenated to the ciphertext.

[0033] In some implementations, the message assembly configuration indicates that the assembled message will consist of an AAD part and a ciphertext. Figure 1D Message assembly is shown in example 100d, where the message assembly configuration indicates that the assembled message will consist of an AAD part and a ciphertext.

[0034] As indicated by reference numeral 162d, based on the message assembly configuration indicating that the assembled message will be composed of the AAD portion and the ciphertext, the cryptographic engine 108 may copy the AAD portion to the output buffer 110, or cause the AAD portion to be copied to the output buffer 110. As indicated by reference numeral 164d, the cryptographic engine 108 may then provide the ciphertext to the output buffer 110. Here, the cryptographic engine 108 provides the ciphertext to the output buffer 110 such that the ciphertext is concatenated to the AAD portion in the output buffer 110. In this manner, the cryptographic engine 108 can create an assembled message in the output buffer 110 such that the assembled message is composed of the AAD portion and the ciphertext, wherein the ciphertext is concatenated to the AAD portion.

[0035] In some implementations, the message assembly configuration indicates that the assembled message will consist only of ciphertext. Figure 1E The message assembly is shown in example 100e where the message assembly configuration indicates that the assembled message will consist solely of ciphertext. As shown by reference numeral 164e, the encryption engine 108 may provide the ciphertext to the output buffer 110.

[0036] In this manner, the cryptographic engine 108 may create an assembled message in the output buffer 110 such that the assembled message consists solely of ciphertext.

[0037] In some implementations, after the assembled message is created in the output buffer 110 by the encryption engine 108, the output buffer 110 can provide the assembled message. For example, the output buffer 110 can provide the assembled message to a communication component of the system. Here, the communication component can receive the assembled message and can transmit the assembled message (e.g., to another device or system). Notably, when the assembled message is read from the output buffer 110 (e.g., via DMA, via software, etc.), a fully assembled message is provided due to the concatenation of the message portions within the output buffer 110.

[0038] As mentioned above, providing Figures 1A to 1E As an example. Other examples may be related to Figures 1A to 1E The examples described are different. Figures 1A to 1E The number and arrangement of components shown are examples. In practice, Figures 1A to 1E There may be additional components, fewer components, different components, or differently arranged components than those shown. Figures 1A to 1E Two or more components shown may be implemented in a single component, or Figures 1A to 1E The single component shown may be implemented as multiple distributed components. Additionally or alternatively, Figures 1A to 1E The illustrated set of components (e.g., one or more components) may perform the operations described as being performed by Figures 1A to 1EAnother group of components is shown performing one or more functions.

[0039] Figure 2A and Figure 2B is a diagram illustrating an example 200 of automatic message assembly during cryptographic operations in accordance with various aspects of the present disclosure.

[0040] like Figure 2A and Figure 2B As shown, example 200 includes cryptographic accelerator 102, which includes input buffer 104, cryptographic engine 108, and output buffer 110. Cryptographic accelerator 102 and various components of cryptographic accelerator 102 are provided below, followed by a description of an example of the operation of cryptographic accelerator 102.

[0041] In an exemplary operation, from Figure 2A Starting with reference numeral 250 in FIG, the input buffer 104 may store the AAD portion of the message. For example, the cryptographic accelerator 102 may receive the AAD portion of the message via a DMA component (not shown) of the system, and the input buffer 104 may store the AAD portion.

[0042] The input buffer 104 may also store the plaintext (PT) portion of the message, as indicated by reference numeral 252. For example, the cryptographic accelerator 102 may receive the plaintext portion of the message via a DMA component (not shown) of the system, and the input buffer 104 may store the plaintext portion.

[0043] As indicated by reference numeral 254, the cryptographic engine 108 may obtain the AAD portion of the message and the plaintext portion of the message. For example, the cryptographic engine 108 may read the AAD portion of the message from the input buffer 104 and may read the plaintext portion of the message from the input buffer 104. As another example, another component of the cryptographic accelerator 102 may read the AAD portion of the message and / or the plaintext portion of the message and may provide the AAD portion of the message and / or the plaintext portion of the message to the cryptographic engine 108 (e.g., after some processing of the AAD portion of the message and / or the plaintext portion of the message).

[0044] As indicated by reference numeral 256, the encryption engine 108 may generate a MAC using one of the plaintext portion or the ciphertext of the message and the AAD portion of the message. For example, the encryption engine 108 may provide the plaintext portion of the message and the AAD portion of the message as inputs to a MAC algorithm configured on the encryption engine 108, and may obtain a MAC as an output of the MAC algorithm. As another example, the encryption engine 108 may provide the ciphertext and the AAD portion of the message as inputs to a MAC algorithm configured on the encryption engine 108, and may obtain a MAC as an output of the MAC algorithm. In some implementations, as described above, the MAC is generated based on a set of encryption configuration parameters configured for the encryption engine 108.

[0045] As indicated by reference numeral 258, the cryptographic engine 108 may determine a configuration for creating an assembled message in the output buffer 110 of the cryptographic accelerator 102. The configuration for creating the assembled message in the output buffer 110 (referred to herein as a message assembly configuration) is a configuration that includes information identifying one or more parts to be included in the message assembled in the output buffer 110, as described above. In some implementations, the cryptographic engine 108 may determine the message assembly configuration based on a communication protocol to be used to transmit the assembled message and / or based on a set of cryptographic configuration parameters, as described above.

[0046] As indicated by reference numeral 258, in example 200, the message assembly configuration indicates that the assembled message will consist of an AAD portion, a plaintext portion, and a MAC (ie, only authenticated mode is valid).

[0047] As Figure 2B As shown by reference numeral 260 in FIG, based on the message assembly configuration indicating that the assembled message will be composed of the AAD portion, the plaintext portion, and the MAC, the cryptographic engine 108 may copy the AAD portion and the plaintext portion to the output buffer 110, or cause the AAD portion and the plaintext portion to be copied to the output buffer 110. As shown by reference numeral 262, the cryptographic engine 108 may then provide the MAC to the output buffer 110. Here, the cryptographic engine 108 provides the MAC to the output buffer 110 such that the MAC is concatenated to the plaintext portion in the output buffer 110. In this manner, the cryptographic engine 108 can create an assembled message in the output buffer 110 such that the assembled message is composed of the AAD portion, the plaintext portion, and the MAC, wherein the plaintext portion is concatenated to the AAD portion, and the MAC is concatenated to the plaintext portion.

[0048] As indicated above, provide Figure 2A and Figure 2B As an example. Other examples may be related to Figure 2A and Figure 2B The examples described are different. Figure 2A and Figure 2B The number and arrangement of the components shown in the figure are given as examples. In practice, Figure 2A and Figure 2B There may be additional components, fewer components, different components, or differently arranged components than those shown in FIG. Figure 2A and Figure 2B Two or more components shown in FIG may be implemented in a single component, or Figure 2A and Figure 2B The single component shown in can be implemented as multiple distributed components. Additionally or alternatively, Figure 2A and Figure 2B A set of components (e.g., one or more components) shown in FIG may perform the operations described as being performed by Figure 2A and Figure 2B Another group of components shown in FIG. 1 performs one or more functions.

[0049] Figure 3 is a diagram of an example system 300 in which the cryptographic accelerator 102 may be implemented. In some implementations, the system 300 may be a SoC. Figure 3 As shown, system 300 may include cryptographic accelerator 102 as well as bus 112 , memory 114 , DMA 116 , CPU 118 , and communication component 120 .

[0050] The cryptographic accelerator 102 is a component for performing cryptographic operations associated with the system 300, as described herein. Figures 1A to 1E Additional details regarding the cryptographic accelerator 102 are provided.

[0051] Bus 112 is a component that enables communication between components of system 300. For example, bus 112 may enable cryptographic accelerator 102 to receive data from memory 114 and / or DMA 116. As another example, bus 112 may enable cryptographic accelerator 102 to transmit data to communication component 120.

[0052] The memory 114 is a component for storing and providing portions of a message to be processed by the cryptographic accelerator 102. For example, the memory 114 may store an AAD portion of a message, a plaintext portion of a message, etc., as described herein. In some implementations, the memory 114 may include RAM, read-only memory (ROM), and / or another type of memory (e.g., flash memory, magnetic memory, and / or optical memory).

[0053] DMA 116 is a component for providing data stored by memory 114 to cryptographic accelerator 102 (e.g., data comprising a portion of a message stored by memory 114). In some implementations, DMA 116 provides data stored by memory 114 to cryptographic accelerator 102 independently of CPU 118 (i.e., DMA 116 provides direct memory access).

[0054] The CPU 118 includes a central processing unit, a graphics processing unit, a microprocessor, a controller, a microcontroller, a digital signal processor, a field programmable gate array, an application specific integrated circuit, and / or other types of processing components. In some implementations, the CPU 118 is implemented in hardware, firmware, or a combination of hardware and software. In some implementations, the CPU 118 includes one or more processors that can be programmed to perform functions.

[0055] supply Figure 3 The number and arrangement of the components shown in the figure are given as examples. In practice, Figure 3 There may be additional components, fewer components, different components, or differently arranged components than those shown in . For example, system 300 may include communication components (e.g., receivers, transmitters, transceivers, modems, etc.) that enable system 300 to communicate with other devices or systems. In addition, Figure 3 Two or more components shown in FIG may be implemented in a single component, or Figure 3 A single component shown in can be implemented as multiple distributed components. Additionally or alternatively, one or more components of system 300 (eg, one or more components) can perform one or more functions described as being performed by another set of components of system 300.

[0056] Figure 4 is a flow chart of an example process 400 related to automatic message assembly during cryptographic operations. In some implementations, Figure 4 One or more process blocks of may be performed by a cryptographic accelerator (eg, cryptographic accelerator 102).

[0057] like Figure 4 As shown, process 400 may include storing the AAD portion of the message and the plaintext portion of the message in an input buffer (block 410). For example, the cryptographic accelerator may store the AAD portion of the message and the plaintext portion of the message in an input buffer (e.g., using input buffer 104), as described above.

[0058] like Figure 4As further shown in FIG, process 400 may include generating ciphertext using the plaintext portion of the message (block 420). For example, an encryption engine may (eg, using encryption engine 108) generate ciphertext using the plaintext portion of the message, as described above.

[0059] like Figure 4 As further shown in FIG4 , process 400 may include generating a MAC using one of the plaintext portion or the ciphertext and the AAD portion (block 430). For example, the cryptographic accelerator may (e.g., using cryptographic engine 108) generate a MAC using one of the plaintext portion or the ciphertext and the AAD portion, as described above.

[0060] like Figure 4 As further shown in FIG4 , process 400 may include assembling a secure message in an output buffer of the cryptographic accelerator, the secure message assembled based on a configuration associated with a communication protocol for transmitting the secure message (block 440). For example, the cryptographic accelerator (e.g., using cryptographic engine 108) may assemble the secure message in an output buffer of the cryptographic accelerator (e.g., output buffer 110), the secure message assembled based on a configuration associated with a communication protocol for transmitting the secure message, as described above. In some implementations, assembling the secure message in the output buffer includes providing at least the ciphertext to the output buffer.

[0061] like Figure 4 As further shown in FIG. 4 , process 400 may include providing a secure message for transmission (block 450 ). For example, a cryptographic accelerator (eg, using output buffer 110 ) may provide a secure message for transmission, as described above.

[0062] Process 400 may include additional implementations, such as any single implementation or any combination of implementations described below and / or in combination with one or more other processes described elsewhere herein.

[0063] In a first implementation, assembling the secure message in the output buffer further includes copying the AAD portion to the output buffer, wherein the ciphertext is provided to the output buffer such that the ciphertext is concatenated to the AAD portion in the output buffer.

[0064] In a second implementation, alone or in combination with the first implementation, assembling the secure message in the output buffer further comprises providing the MAC to the output buffer such that the MAC is concatenated to the ciphertext in the output buffer.

[0065] In a third implementation, alone or in combination with one or more of the first and second implementations, process 400 includes determining a configuration based on a communication protocol to be used to transmit safety messages.

[0066] although Figure 4Example blocks of process 400 are shown, but in some implementations, Figure 4 Process 400 may include additional blocks, fewer blocks, different blocks, or differently arranged blocks than those depicted in . Additionally or alternatively, two or more blocks of process 400 may be performed in parallel.

[0067] The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementations to the precise forms disclosed. Modifications and variations are possible in light of the above disclosure or may be acquired from practice of the implementations.

[0068] As used herein, the term "component" is intended to be broadly interpreted as hardware, firmware, and / or a combination of hardware and software.

[0069] It will be apparent that the systems and / or methods described herein can be implemented in various forms of hardware, firmware, or a combination of hardware and software. The actual dedicated control hardware or software code used to implement these systems and / or methods does not limit the implementation. Therefore, the operation and behavior of the systems and / or methods are described herein without reference to specific software code - it being understood that software and hardware can be designed to implement the systems and / or methods based on the description herein.

[0070] Although particular combinations of features are recited in the claims and / or disclosed in the specification, these combinations are not intended to limit the disclosure of the various implementations. In fact, many of these features can be combined in ways not specifically recited in the claims and / or disclosed in the specification. Although each dependent claim listed below may directly depend on only one claim, the disclosure of the various implementations includes each dependent claim in combination with every other claim in the claim set.

[0071] Any element, action or instruction used herein should not be interpreted as key or necessary unless clearly described as such. In addition, as used herein, the articles "one" and "an" are intended to include one or more items and can be used interchangeably with "one or more". In addition, as used herein, the article "the" is intended to include one or more items quoted in conjunction with the article "the", and can be used interchangeably with "one or more". In addition, as used herein, the term "set" is intended to include one or more items (for example, related items, unrelated items, the combination of related items and unrelated items, etc.), and can be used interchangeably with "one or more". In the case of only meaning one item, phrase "only one item" or similar language is used. In addition, as used herein, the terms "having", "with", "containing" etc. are intended to be open terms. In addition, unless otherwise clearly stated, phrase "based on" is intended to mean "at least partially based on". Furthermore, as used herein, the term "or" when used in conjunction is intended to be inclusive and can be used interchangeably with "and / or" unless expressly stated otherwise (e.g., if used in conjunction with "either" or "only one of").

Claims

1. An encryption accelerator, comprising: An input buffer for storing an additional authentication data AAD portion of a message and a plaintext portion of the message; Cryptographic engine for: generating ciphertext using the plaintext portion of the message, Generate a message authentication code MAC using any one of the plaintext part and the ciphertext and the AAD part, identifying a communication protocol from among a plurality of communication protocols for sending the assembled message, determining a configuration of a plurality of configurations for creating the assembled message based on the communication protocol, wherein each of the plurality of configurations indicates creating the assembled message based on a corresponding combination of the ciphertext, the AAD portion, or the MAC, the assembled message including at least the ciphertext, and providing the combination corresponding to the determined configuration to an output buffer; and The output buffer is configured to: receiving a combination corresponding to the determined configuration, wherein the assembled message is created in the output buffer by the cryptographic engine using the combination corresponding to the determined configuration, and Provides the assembly message that was created.

2. The encryption accelerator according to claim 1, wherein: The determined configuration indicates that the assembled message includes the AAD part, the ciphertext, and the MAC.

3. The encryption accelerator according to claim 2, wherein: The encryption engine is used to: Copy the AAD portion to the output buffer, providing the ciphertext to the output buffer such that the ciphertext is concatenated to the AAD portion in the output buffer, and The MAC is provided to the output buffer such that the MAC is concatenated to the ciphertext in the output buffer. The encryption accelerator according to claim 1 , wherein: The determined configuration indicates that the assembled message includes the ciphertext and the MAC. The encryption accelerator according to claim 4 , wherein: The encryption engine is used to: providing the ciphertext to the output buffer, and The MAC is provided to the output buffer such that the MAC is concatenated to the ciphertext in the output buffer. The encryption accelerator according to claim 1 , wherein: The determined configuration indicates that the assembled message includes the AAD part and the ciphertext.

7. The encryption accelerator according to claim 6, wherein: The encryption engine is used to: copying the AAD portion to the output buffer, and The ciphertext is provided to the output buffer such that the ciphertext is concatenated to the AAD portion in the output buffer.

8. The encryption accelerator according to claim 1, wherein: The determined configuration indicates that the assembled message includes the ciphertext.

9. The encryption accelerator according to claim 8, wherein: The encryption engine is configured to provide only the ciphertext to the output buffer.

10. The encryption accelerator according to claim 1, wherein: Each of the plurality of configurations maps to a particular communication protocol of the plurality of communication protocols.

11. A system for encryption, comprising: Cryptographic accelerators, including: An input buffer for storing an additional authentication data AAD portion of a message and a plaintext portion of the message; Cryptographic engine for: generating ciphertext using the plaintext portion of the message, Generate a message authentication code MAC using any one of the plaintext part and the ciphertext and the AAD part, identifying a communication protocol from among a plurality of communication protocols for sending the assembled message, determining a configuration of a plurality of configurations for creating the assembled message based on the communication protocol, wherein each of the plurality of configurations indicates creating the assembled message based on a corresponding combination of the ciphertext, the AAD portion, or the MAC, and providing the combination corresponding to the determined configuration to an output buffer; Output buffers for: receiving a combination corresponding to the determined configuration, wherein the cryptographic engine uses the combination corresponding to the determined configuration to create the assembled message in the output buffer, the assembled message including at least the ciphertext, and providing the created assembled message for transmission; and Communication components for: receiving the assembly message, and The assemble message is sent.

12. The system according to claim 11, wherein When the assembled message includes the ciphertext, the AAD part, and the MAC, the cryptographic accelerator is configured to: Copy the AAD portion to the output buffer, providing the ciphertext to the output buffer such that the ciphertext is concatenated to the AAD portion in the output buffer, and The MAC is provided to the output buffer such that the MAC is concatenated to the ciphertext in the output buffer.

13. The system according to claim 11, wherein: When the assembled message includes the ciphertext and the MAC, the encryption accelerator is configured to: providing the ciphertext to the output buffer, and The MAC is provided to the output buffer such that the MAC is concatenated to the ciphertext in the output buffer.

14. The system according to claim 11, wherein: When the assembled message includes the AAD part and the ciphertext, the encryption accelerator is configured to: copying the AAD portion to the output buffer, and The ciphertext is provided to the output buffer such that the ciphertext is concatenated to the AAD portion in the output buffer.

15. The system according to claim 11, wherein In a case where the assembled message includes the ciphertext, the cryptographic accelerator is configured to provide only the ciphertext to the output buffer.

16. The system according to claim 11, wherein Each of the plurality of configurations maps to a particular communication protocol of the plurality of communication protocols.

17. A method for encryption, comprising: storing the additional authentication data AAD portion of the message and the plaintext portion of the message in an input buffer of the cryptographic accelerator; generating ciphertext in an encryption engine of the encryption accelerator using the plaintext portion of the message; In the encryption engine, a message authentication code MAC is generated using any one of the plaintext part and the ciphertext and the AAD part; In the cryptographic engine, identifying a communication protocol for sending an assembled message from among a plurality of communication protocols; In the cryptographic engine, determining a configuration of a plurality of configurations for creating the assembled message based on the communication protocol, wherein each of the plurality of configurations indicates creating the assembled message based on a corresponding combination of the ciphertext, the AAD portion, or the MAC, the assembled message including at least the ciphertext; The cryptographic engine provides a combination corresponding to the determined configuration to an output buffer of the cryptographic accelerator; creating, by the cryptographic engine, the assembled message in the output buffer using a combination corresponding to the determined configuration; and Provide the created assembled message for transmission.

18. The method according to claim 17, wherein Creating the assembled message in the output buffer further comprises copying the AAD portion to the output buffer, The ciphertext is provided to the output buffer such that the ciphertext is concatenated to the AAD portion in the output buffer.

19. The method according to claim 17, wherein Creating the assembled message in the output buffer further includes providing the MAC to the output buffer such that the MAC is concatenated to the ciphertext in the output buffer.

20. The method according to claim 17, wherein Each of the plurality of configurations maps to a particular communication protocol of the plurality of communication protocols.

21. An encryption accelerator, comprising: An input buffer for storing an additional authentication data AAD portion of a message and a plaintext portion of the message; Cryptographic engine for: generating ciphertext using the plaintext portion of the message, Generate a message authentication code MAC using the AAD part and the plaintext part, identifying a communication protocol from among a plurality of communication protocols for sending the assembled message, determining a configuration of a plurality of configurations for creating the assembled message based on the communication protocol, wherein each of the plurality of configurations indicates creating the assembled message based on a corresponding combination of the ciphertext, the AAD portion, or the MAC, the assembled message including at least the ciphertext, and providing the combination corresponding to the determined configuration to an output buffer; and The output buffer is configured to: receiving a combination corresponding to the determined configuration, wherein the assembled message is created in the output buffer by the cryptographic engine using the combination corresponding to the determined configuration, and Provides the assembly message that was created.

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