Electro-optic modulator

Abstract

Disclosed is an electro-optic modulator for a waveguide. The electro-optic modulator includes: a first semiconductor layer; a second semiconductor layer; a dielectric layer inserted between the second semiconductor layer and the first semiconductor layer; and a coupling layer for coupling a guided mode of the waveguide to at least one of the first semiconductor layer and the second semiconductor layer. The electro-optic modulator is configured to induce modulation of the guided mode of the waveguide by changing a refractive index in response to a voltage applied between the first semiconductor layer and the second semiconductor layer.

Description

Technical Field

[0001] This specification relates to an electro - optic modulator. Background Art

[0002] In recent years, a large number of applications based on photonic integrated circuits (PICs) have emerged, including data center communication, coherent telecommunications, filters, super - continuum generation, spectroscopy, biosensing, quantum optics, and microwave photonics. With the increasing interest in emerging photonic circuits, a successful photonic platform requires an electro - optic modulator. Summary of the Invention

[0003] According to one aspect of the present invention, there is provided an electro - optic modulator for a waveguide. The electro - optic modulator includes: a first semiconductor layer; a second semiconductor layer; a dielectric layer inserted between the second semiconductor layer and the first semiconductor layer; and a coupling layer for coupling a guided mode of the waveguide to at least one of the first semiconductor layer and the second semiconductor layer. The electro - optic modulator is configured to initiate modulation of the guided mode of the waveguide by changing the refractive index in response to a voltage applied between the first semiconductor layer and the second semiconductor layer.

[0004] In some implementations, the first semiconductor layer and the second semiconductor layer include dopings of opposite types such that when the first semiconductor layer exhibits n - type behavior, the second semiconductor layer exhibits p - type behavior, and when the first semiconductor layer exhibits p - type behavior, the second semiconductor layer exhibits n - type behavior.

[0005] In some implementations, at least one of the first semiconductor layer and the second semiconductor layer includes a non - degenerate semiconductor.

[0006] In some implementations, at least one of the first semiconductor layer and the second semiconductor layer includes a III - V semiconductor.

[0007] In some implementations, at least one of the first semiconductor layer and the second semiconductor layer includes one or more of silicon, germanium, and SiGe alloys.

[0008] In some implementations, the structure of at least one of the first semiconductor layer and the second semiconductor layer is one of the following: amorphous, hydrogenated amorphous, polycrystalline, nanocrystalline, or crystalline.

[0009] In some implementations, at least one of the first semiconductor layer and the second semiconductor layer includes an alloy, and the alloy includes one or more of NiSi, Ni2Si, NiSi2, TiSi, TiSi2, CoSi, CO2Si, PtSi, or germanide thin films.

[0010] In some implementations, at least one of the first semiconductor layer and the second semiconductor layer includes an intrinsic semiconductor.

[0011] In some implementations, at least one of the first semiconductor layer and the second semiconductor layer includes a half-metal layer.

[0012] In some implementations, the thickness of the dielectric layer is between 0.1 nm and 40 nm.

[0013] In some implementations, the thicknesses of the semiconductor layer and the second semiconductor layer are less than 500 nm.

[0014] In some implementations, the coupling layer includes one or more of silicon dioxide (SiO2), silicon oxynitride (SiON), aluminum oxide (Al2O3), aluminum nitride (AlN), benzocyclobutene (BCB), polymethyl methacrylate (PMMA), or parylene.

[0015] In some implementations, the dielectric layer includes one or more of silicon dioxide (SiO2), silicon oxynitride (SiON), benzocyclobutene (BCB), polymethyl methacrylate (PMMA), or parylene.

[0016] In some implementations, there is provided a device including a waveguide, the waveguide including a core and the electro-optic modulator described above. The cross-section of the core has a polygonal shape at at least one position along the propagation direction of the guided mode, and at the at least one position, the electro-optic modulator is formed to be substantially parallel to and cover one side of the cross-section of the core.

[0017] In some implementations, at the at least one position, the electro-optic modulator is formed to be substantially parallel to and cover two or more consecutive sides of the cross-section of the core.

[0018] In some implementations, the range of the first semiconductor layer along the propagation direction of the guided mode is greater than the range of the dielectric layer along the same direction. The range of the dielectric layer along the propagation direction of the guided mode is greater than the range of the second semiconductor layer along the same direction.

[0019] In some implementations, a Mach-Zehnder modulator is provided, including: an input port; an output port; a first beam splitter and a second beam splitter, respectively connected to the input port and the output port, and configured to divide the optical waveguide modes received from the input port and the output port into two optical waveguide modes; and a first arm and a second arm, disposed between the first beam splitter and the second beam splitter and connecting the first beam splitter and the second beam splitter, thereby forming a Mach-Zehnder interferometer. The first arm includes a waveguide and a first electro-optic modulator, and the first electro-optic modulator is the electro-optic modulator described above.

[0020] In some implementations, the second arm includes a waveguide and a second electro-optic modulator, and the second electro-optic modulator is the electro-optic modulator described above.

[0021] In some implementations, a ring resonator is provided, including: a bus waveguide, including an input port and an output port; a ring resonator, coupled to the bus waveguide. The ring resonator includes a waveguide and the electro-optic modulator described above.

[0022] According to another aspect of the present invention, a method for fabricating an electro-optic modulator on a waveguide is provided, the method including: depositing a coupling layer on the waveguide; depositing a first semiconductor layer on the coupling layer; depositing a dielectric layer on the first semiconductor layer; and depositing a second semiconductor layer on the dielectric layer.

[0023] In some implementations, the depositing the coupling layer includes one or more of PECVD, LPCVD, atomic layer deposition (ALD), and thermal oxidation.

[0024] In some implementations, the depositing the first silicon layer or the second silicon layer includes LPCVD, PECVD, ALD, sputtering, or PVD techniques, wherein the doping level is less than 2×10 20 at / cm 3 .

[0025] In some implementations, the depositing the dielectric layer includes one or more of oxidation of the first semiconductor layer, atomic layer deposition (ALD), thermal oxidation, or nitridation. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Certain embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, wherein:

[0027] Figure 1 is a cross-sectional schematic view of an electro-optic modulator on a waveguide.

[0028] Figure 2a is a cross-sectional schematic view of an electro-optic modulator on a waveguide.

[0029] Figure 2b and Figure 2c are diagrams showing the numerical simulation results of an electro-optic modulator.

[0030] Figure 3 is a schematic cross-sectional view of an electro-optic modulator on a waveguide.

[0031] Figure 4a is a schematic cross-sectional view of an electro-optic modulator on a waveguide.

[0032] Figure 4b is a schematic three-dimensional view of an electro-optic modulator on a waveguide.

[0033] Figure 5a and Figure 5b are schematic diagrams showing exemplary embodiments of a Mach-Zehnder modulator. Figure 5a and Figure 5b is a schematic top view of a Mach-Zehnder modulator.

[0034] Figure 6 is a schematic top view of a ring resonator modulator.

[0035] Figure 7 is a flowchart showing an exemplary method of manufacturing an electro-optic modulator. Detailed Description

[0036] An electro-optic modulator is an optical device in which the physical properties of a light beam or a light guiding mode are modulated in response to an electrical signal. Examples of the physical properties of light include phase, amplitude, or polarization.

[0037] The electro-optic effects on which an electro-optic modulator operates include the electro-refractive effect and the electro-absorption effect.

[0038] Phase modulation of light can be achieved through the electro-refractive effect of a material, in which the real part of the refractive index of the material changes in response to an electric field. When a light beam passes through a material with electro-optic properties, the path length experienced by the light beam changes with the electric field strength applied to the material. Modulation of polarization can also be achieved through the electro-refractive effect, for example, using a non-centrosymmetric material.

[0039] Amplitude modulation of light can be achieved through the electro-absorption effect of a material, in which the imaginary part of the refractive index of the material changes in response to an electric field. When a light beam passes through a material with electro-optic properties, the attenuation experienced by the light beam changes with the electric field strength applied to the material.

[0040] The electrorefractive effect and the electroabsorption effect as described above are inherent properties of the material. The state-of-the-art electro-optic modulators that operate based on the electro-optic effect use materials such as PZT (lead zirconate titanate), BaTiO3 (barium titanate), and LiNbO3 (lithium niobate).

[0041] The electrorefractive effect and the electroabsorption effect as defined above are known to be relatively weak in pure silicon at the communication wavelengths of 1.3 μm and 1.55 μm. Optical modulation in silicon devices can be achieved through the plasma dispersion effect, where a change in the charge density leads to an effective change in the real and imaginary parts of the refractive index.

[0042] The charge density within a silicon device can be manipulated with an electric field through carrier injection, accumulation, or depletion. Therefore, modulation of the phase and amplitude of light can be achieved using silicon devices through the plasma dispersion effect.

[0043] In this specification, the term 'electro-optic modulator' will be understood to encompass all the mechanisms discussed above, namely the electro-optic effect and the plasma dispersion effect, as well as other possible mechanisms for inducing modulation of the phase, amplitude, or polarization of light in response to an electric field. Thus, the term "electro-optic modulator" in this specification is used to denote any optical device that modulates a light beam or a light guiding mode in response to an electrical signal.

[0044] For some time, lithium niobate modulators have been the gold standard for modulators in terms of electrical bandwidth and extinction ratio, even though they are affected by multiple limiting factors such as large size and an insertion loss of several dB. In the past few years, various integrated forms of electro-optic modulators have been demonstrated using different materials such as Si, InP, and thin-film LiNbO3, and have been shown to be attractive for high symbol rate modulation. Although all of these integration concepts offer a wide modulation bandwidth greater than 20 GHz, they have different drawbacks such as complex manufacturing processes (3D Si doping), high propagation losses (InP-on-Si, 16 dB / cm), or large footprint (greater than 3 mm), which hinder integration with other photonic components. Integration of a light source with these modulators can be achieved by means of hybrid integration, for example by integrating a III-V light source with an SOI chip or through monolithic integration, but all the explored solutions face industrial challenges.

[0045] One solution to address these issues is to use a Fabry-Perot etalon to minimize the size of the device and thus increase the maximum operating speed. However, this solution is obtained by designing multiple quantum well structures in III-V materials, which requires expensive processing to fabricate such devices with the required quality. Additionally, the structure cannot be laterally integrated, which is another limitation that hinders its implementation in on-chip photonics.

[0046] Alternative solutions to the above limitations include carrier injection-based solutions, i.e., forming a p / n junction around the Si waveguide such that a local modulation of the complex refractive index is obtained by electrically biasing the p / n junction. Another solution that has been proposed and demonstrated in the literature is to utilize carrier depletion in a p-i-n junction. Unfortunately, this method is prone to generating a large amount of optical loss of approximately 3 dB / cm in Si at 1550 nm, resulting in high electrical RF loss due to large currents, significant heat dissipation, and large footprint.

[0047] This specification relates to an electro-optic modulator that can solve some of these problems.

[0048] Figure 1 is a schematic diagram showing an exemplary embodiment of the electro-optic modulator 100.

[0049] Figure 1 shows a cross-sectional view of a waveguide including a core 10 and an electro-optic modulator or EO modulator 100. The core 10 and the EO modulator 100 are embedded within or at least in contact with the surrounding material 30.

[0050] The waveguide can be formed by the core 10 and a cladding, where at least a portion of the cladding can be formed by the surrounding material 30.

[0051] The core 10 has a refractive index different from that of the surrounding material 30 such that it supports a guided mode 20. Equivalently, the region surrounding the center of the guided mode 20 with a refractive index different from that of the surrounding material 30 can be considered as the core 10. The shape of the cross-section of the core 10 in the yz plane is shown as a square in the Figure 1 example. However, the shape of the cross-section of the core 10 is not limited to a square. In some implementations, the shape of the cross-section of the core 10 can be polygonal.

[0052] The guided mode 20 can reside in the core 10 and the cladding. In some implementations, one or more surfaces of the core 10 can be in contact with the cladding. In some implementations, the core 10 can be fully embedded within the cladding. The configuration of the waveguide is not limited to these examples as long as the core 10 supports the propagation of the guided mode 20 along the core 10.

[0053] In some implementations, the surrounding material 30 around the core 10 that forms the cladding of the waveguide can be uniform throughout the transverse distribution of the mode 20.

[0054] In some implementations, the surrounding material 30 around the core 10 that forms the cladding of the waveguide can include one or more additional interfaces at which the refractive index changes such that the transverse distribution of the guided mode 20 can extend beyond one or more interfaces within the surrounding material 30.

[0055] In some implementations, the core 10 can be embedded in the surrounding material 30 without any surface being exposed to air or vacuum.

[0056] In some implementations, at least one surface of the core 10 may be exposed to air or vacuum. For example, for a rib waveguide formed with the core 10, at least one surface is completely exposed to air or vacuum and is not covered by the surrounding material 30. In this case, the cladding may be formed by the surrounding material 30 in contact with the core 10 and the space around the exposed portion of the core 10, which may be air or vacuum.

[0057] The guided mode 20 travels in the x direction, i.e., in a direction perpendicular to the cross-section of the core 10, and is guided by a waveguide formed by the core 10 and the cladding material surrounding the core, and is formed within the surrounding material 30.

[0058] The transverse mode distribution, i.e., the power or intensity distribution of the guided mode 20 in the yz plane, is parallel to the cross-section of the core 10, is substantially located within the cross-section of the core 10, but extends beyond the boundary defined by the cross-section of the core 10 in the yz plane.

[0059] In some implementations, the transverse mode distribution of the guided mode 20 may have the highest intensity at the center of the core 10. In some implementations, the center of the core 10 and the center of the guided mode 20 may coincide and have the highest intensity within the transverse mode distribution of the guided mode 20 in the yz plane.

[0060] As Figure 1 shown, the overall shape of the guided mode 20 is shown by a dashed line. Figure 1 The dashed line depicting the guided mode 20 in the figure is a visual guide and is only used to show the approximate extent of the guided mode 20. For example, the dashed line 20 may represent a line following the same intensity, such as the peak intensity of 1 / e at the center of the guided mode 20 in the surrounding material 30 having a uniform refractive index around the core 10 2 . As Figure 1 shown by the dashed line representing the guided mode 20 in the figure, at least a portion of the power of the guided mode 20 may reside outside the core 10.

[0061] In some implementations, the portion of the power residing outside the core 10 may include an evanescent field on the core surface.

[0062] The EO modulator 100 is configured to induce attenuation and / or a phase shift on the guided mode 20. This is achieved by a change in the refractive index induced in the EO modulator 100 in response to an electric field applied to the EO modulator.

[0063] In some implementations, the EO modulator 100 is configured to induce a phase shift on the guided mode 20. This is achieved by a change in the real part of the refractive index induced in the EO modulator 100 in response to an electric field applied to the EO modulator.

[0064] In some implementations, the EO modulator 100 is configured to induce attenuation on the guided mode 20. This is achieved by a change in the imaginary part of the refractive index induced in the EO modulator 100 in response to an electric field applied to the EO modulator.

[0065] In some implementations, the EO modulator 100 may be positioned away from the center of the guided mode 20.

[0066] In some implementations, in the case where the core 10 has a different refractive index compared to the surrounding material 30, the EO modulator 100 may be placed outside the core 10.

[0067] In some implementations, when the core 10 does not exhibit a step-like refractive index change with respect to the surrounding material 30 and the refractive index gradually changes towards the center of the guided mode 20 such that the boundary of the core 10 is not well-defined in the yz plane parallel to the cross-section of the core 10, the EO modulator 100 may be placed such that the range of the EO modulator 100 does not overlap with the center of the guided mode 20. In this case, as will be discussed later, the position of the EO modulator 100 can be determined to provide a balance between the modulation depth and the degree of loss.

[0068] Also in the later examples, although for illustrative purposes the core 10 and the surrounding material may have distinct boundaries, in reality, the change in refractive index at these boundaries may not be step-like but may vary gradually around the interface. It should be understood that in these cases, the EO modulator 100 can also be placed such that the range of the EO modulator 100 does not overlap with the center of the guided mode 20.

[0069] The balance between the modulation depth and the degree of loss may vary for each application. In other words, the modulation depth and the degree of loss can be determined for each application. For example, the tolerable degree of loss can be specified for a particular application. Then the position of the EO modulator 100 can be determined to maximize the operating bandwidth within the specified tolerable optical loss.

[0070] In some implementations, the waveguide can be designed such that the modification of the effective refractive index of the waveguide by the EO modulator 100 is taken into account. For example, the position of the guided mode 20 relative to the EO modulator 100 and the lateral extent of the material composition can be determined a priori at the design stage.

[0071] In some implementations, the EO modulator 100 can be disposed within the cladding, thereby forming a part of the surrounding material 30 that embeds the core 10.

[0072] In some implementations, the EO modulator 100 may be disposed outside an interface formed within the surrounding material 30 but close enough to the core 10 to induce phase modulation of the guided mode 20. For example, an interface formed within the surrounding material 30 may support an evanescent field that is part of the guided mode 20, and the EO modulator 100 may be positioned such that the EO modulator 100 interacts with the evanescent field of the guided mode 20. As another example, the guided mode 20 may extend beyond an interface formed within the surrounding material 30. The power portion of the guided mode 20 beyond this interface may be sufficient such that the EO modulator 100 positioned beyond this interface may impose phase modulation or amplitude modulation on the guided mode 20.

[0073] In some implementations, the refractive index of the material forming the EO modulator 100 may be different from the refractive index of the surrounding material 30 with which the EO modulator 100 is in direct contact. This may be the case independent of the voltage or electric field applied to the EO modulator 100. In other words, within the voltage operating range of the EO modulator 100, the refractive index of the EO modulator 100 may be different from the refractive index of the surrounding material 30.

[0074] When the refractive index of the material forming the EO modulator 100 is different from the refractive index of the contacting surrounding material 30, the guided mode 30 may be scattered due to this refractive index mismatch, resulting in attenuation of the guided mode 30.

[0075] When the refractive index of the material forming the EO modulator 100 has an imaginary part at the operating wavelength, the inherent dissipation or absorption of the EO modulator 100 causes attenuation of the guided mode 20.

[0076] Since the EO modulator 100 is disposed closer to the core 10 or the center of the guided mode 20, the degree of scattering or attenuation will be greater and the loss will also be higher because the EO modulator 100 is placed at a position of higher intensity within the transverse mode distribution of the guided mode 20. However, the degree of modulation or modulation depth per applied voltage is also higher because the EO modulator can be placed at a position of higher intensity within the transverse mode distribution of the guided mode 20.

[0077] At a given position of the EO modulator 100 and a given region in the yz plane of the EO modulator 100, both the modulation depth and the degree of scattering or attenuation (and thus the loss) are proportional to the extent of the EO modulator 100 along the length of the waveguide (i.e., the x - direction).

[0078] The balance between the loss due to scattering or absorption and the modulation depth can be found by adjusting one or more of the following parameters: the position of the EO modulator 100 in the transverse yz plane parallel to the cross-section of the guiding mode 20 with respect to the core 10, the extent of the EO modulator 100 in the x direction perpendicular to the cross-section of the core 10, the volume of the material used for the EO modulator 100, the shape of the cross-section of the EO modulator 100 in the transverse yz plane, and the refractive index of the material used for the EO modulator 100.

[0079] In some implementations, the loss due to scattering or absorption can be reduced by reducing the volume of the material (such as silicon or any electro-optic material) used for the EO modulator 100. For example, if the EO modulator 100 is in the form of a thin film, the thickness of the thin film can be made as thin as possible as long as the modulation efficiency is maintained. This will be discussed in more detail in Figures 2a - 2c more detail.

[0080] In some implementations, the loss due to scattering can be reduced by selecting a material for the EO modulator 100 that has a refractive index closer to the refractive index of the surrounding material 30 at the operating wavelength.

[0081] The parameters for adjusting the balance between loss and modulation depth are not limited to these. The balance between loss and modulation depth can be determined based on design parameters (such as the required modulation depth or the specification of the loss per unit length) to determine the required operation.

[0082] Since the modulation efficiency is higher if the EO modulator 100 is located closer to the center of the guiding mode 20, in some examples of the prior art, the material of the core 10 itself is made of a material with an electro-optic effect (such as lithium niobate), so that refractive index modulation occurs in the middle of the mode and most of the transverse region of the mode. In some other examples of the prior art, the electro-optic modulator is arranged with a silicon waveguide so that a plasma dispersion effect or a change in charge concentration is induced in the middle of the guiding mode or within the core of the silicon waveguide. However, in these cases, the design of the electro-optic modulator may have to be specific to the material of the waveguide.

[0083] As long as the fabrication of the EO modulator 100 is compatible with the surrounding material 30, Figure 1 the concept of the illustrated embodiment can be applied to the waveguide core 10 made of any material. For example, the material of the core 10 can be a centrosymmetric material with a negligible electro-optic effect, or a material that cannot produce plasma dispersion. The choice of the material of the waveguide core 10 may not have to be related to the electro-optic ability or modulation ability of the EO modulator 100. For example, the core 10 of the waveguide can be made of Si3N4 (silicon nitride).

[0084] Silicon nitride does not exhibit any significant electro-optic effect and is not suitable for generating plasma dispersion. However, the silicon nitride as the core 10 enables low-loss propagation of the guided mode 20.

[0085] In the remainder of this specification, the concepts will be further described by way of examples, which include a waveguide made of Si3N4 (silicon nitride) as the core 10 and a capacitor structure made of semiconductor layers as the EO modulator 100.

[0086] Figure 2a is a schematic diagram showing an exemplary embodiment of an electro-optic modulator with reference Figure 1 thereto.

[0087] The electro-optic modulator 200 or EO modulator 200 is positioned near the waveguide, which includes a core 30 embedded in a surrounding material 40. The refractive index of the surrounding material 40 is lower than that of the core 30. Specifically, the EO modulator 200 is positioned such that amplitude modulation and / or phase modulation can be applied to the guided mode 20 supported by the waveguide.

[0088] In Figure 2a the example, the cross-section of the core 30 has a rectangular shape and is positioned near an interface 41 formed by the end face of the surrounding material 40. The core 30 is embedded in the surrounding material 40 such that three sides of the cross-section of the core 30 are embedded in the surrounding material 40, and one side (i.e., the first side 31) of the cross-section of the core 30 is parallel or flush with the interface 41 of the surrounding material 40. Thus, the interface formed by the surrounding material 40 and the first side 31 of the core 30 forms a flat surface in the xy plane. The transverse distribution of the guided mode 20 of the waveguide can thus extend beyond the plane formed by the first side 31 and the interface 41 in the positive z direction.

[0089] The thickness of the core 30 perpendicular to the interface 41 and the first side 31 in the z direction can be between 10 nm and 2.5 μm. Examples of materials for the core 30 can include silicon nitride (Si x N y ) with different stoichiometries and hydrogenated silicon nitride. One or more of the PECVD, sputtering, or LPCVD techniques can be used to deposit the core 30.

[0090] Examples of materials for the surrounding material 40 include one or more of silicon dioxide (SiO2), silicon oxynitride (SiON), or aluminum oxide (Al2O3). One or more of the PECVD, LPCVD, or thermal oxidation of a silicon substrate can be used to deposit the surrounding material 40.

[0091] The guided mode 20 travels in the x direction perpendicular to the cross-section of the core 30 and is guided by the waveguide formed by the core 30 and the surrounding material 40.

[0092] The EO modulator 200 includes a first semiconductor layer 210, a second semiconductor layer 220, and a dielectric layer 230 between the semiconductor layer 210 and the second semiconductor layer 220. The first semiconductor layer 210 is closer to the core 30 than the second semiconductor layer 220.

[0093] In some implementations, the first semiconductor layer 210 may be a silicon layer.

[0094] In some implementations, the second semiconductor layer 220 may be a silicon layer.

[0095] In some implementations, the second semiconductor layer 220 may include a germanium layer.

[0096] In some implementations, the second semiconductor layer 220 may include a graphene layer.

[0097] In some implementations, the first semiconductor layer 210 may be deposited with a doping level less than 2×10 20 at / cm 3 using LPCVD, PECVD, sputtering, PVD, or ALD techniques.

[0098] In some implementations, the second semiconductor layer 220 may be deposited with a doping level less than 2×10 20 at / cm 3 using LPCVD, PECVD, MOCVD, MBE, evaporation, sputtering, or ALD techniques.

[0099] In some implementations, the second semiconductor layer 220 may be lightly doped p-type polycrystalline germanium or lightly doped n-type silicon, which behaves as a non-degenerate semiconductor. When the first semiconductor layer 210 is n-type silicon, the second semiconductor layer 220 may be lightly doped, non-degenerate p-type polycrystalline silicon or polycrystalline germanium. When the first semiconductor layer 210 is p-type silicon, the second semiconductor layer 220 may be lightly doped n-type polycrystalline silicon. By heavily doping and lightly doping the semiconductor layers, the semiconductor layers are rendered as a degenerate silicon layer and a non-degenerate silicon layer, respectively. The non-degenerate semiconductor layer does not create a "free charge band" at the conduction or valence band of the semiconductor. These free charges are the cause of metallic behavior and optical losses.

[0100] Specifically, when the highly doped or metal-semiconductor alloy layer is considered a metal, the EO modulator 200 may correspond to a MOS capacitor as traditionally defined. A MOS capacitor typically includes a capacitor-like structure that includes layers that act as a metal that does not exhibit a distinct bandgap and a semiconductor material that exhibits a finite bandgap. The MOS capacitor allows band structure bending, leading to charge inversion and accumulation.

[0101] In some implementations, the second semiconductor layer 220 includes a degenerate semiconductor layer. Using a degenerate semiconductor layer can alleviate problems that may occur when using a metal layer as the second semiconductor layer, such as losses generated at the interface due to plasma effects.

[0102] In some other implementations, the second semiconductor layer 220 includes a semimetal layer or a 2D material, which is a single-layer material with 2D electron behavior having a high carrier mobility, such as graphene or silicene. These semimetal layers may include group-IV elements. Using such a semimetal layer for the second semiconductor layer 220 can alleviate problems that may occur when using a metal layer as the second semiconductor layer 220, such as losses generated at the interface due to thickness.

[0103] In some implementations, when the first semiconductor layer 210 is a silicon layer and the second semiconductor layer 220 is a silicon layer, the first semiconductor layer 210 and the second semiconductor layer 220 are doped with opposite types of doping. For example, when the second semiconductor layer 220 is p-doped, the first semiconductor layer 210 is n-doped, and vice versa.

[0104] In some implementations, when the first semiconductor layer 210 is a silicon layer and the second semiconductor layer 220 is a germanium layer, both the first semiconductor layer 210 and the second semiconductor layer 220 can be non-degenerate semiconductor layers.

[0105] In some implementations, the first semiconductor layer 210 and the second semiconductor layer 220 include group-IV semiconductors.

[0106] In some implementations, when the first semiconductor layer 210 and the second semiconductor layer 220 include group-IV semiconductors and when the first semiconductor layer 210 and the second semiconductor layer 220 are doped with opposite types of doping, the doping levels can be such that the first semiconductor layer 210 and the second semiconductor layer 220 are non-degenerate semiconductors. For example, the non-degenerate concentration level may be about 10 19 , but it depends on the exact dopant type and the microstructure of the semiconductor (e.g., single crystal, polycrystal, amorphous) and the material of the semiconductor (e.g., Si, Ge, or III-V structure).

[0107] In some implementations, when the first semiconductor layer 210 or the second semiconductor layer 220 is an intrinsic semiconductor layer, the resistivity and Schottky barrier height of one or more of the first semiconductor layer 210 or the second semiconductor layer 220 for electrical contacts can be adjusted by alloying with a transition metal, thereby forming a NiSi, Ni2Si, NiSi2, TiSi, TiSi2, CoSi, CO2Si, PtSi, Ni5Ge3, NiGe, or other transition metal group-IV semiconductor thin film portion.

[0108] In some implementations, the materials of the first semiconductor layer 210 and the second semiconductor layer 220 may be group-IV semiconductors, such as amorphous silicon, hydrogenated amorphous silicon, polycrystalline silicon, or crystalline silicon.

[0109] In some implementations, the materials of the first semiconductor layer 210 and the second semiconductor layer 220 may be group-IV semiconductors, such as germanium and SiGe alloys.

[0110] In some implementations, the materials of the semiconductor layer 210 and the second semiconductor layer 220 may be III-V semiconductors, such as GaAs, AlGaAs, InGaP.

[0111] In some implementations, the thicknesses of the semiconductor layer 210 and the second semiconductor layer 220 perpendicular to the interface 41 and the first side 31 in the z direction may be between 5 nm and 100 nm.

[0112] In some implementations, when one or both of the semiconductor layer 210 and the second semiconductor layer 220 include group-IV semiconductors, they can be processed using thermal recrystallization techniques.

[0113] The first distance 240 is defined as the distance between the first side 31 of the core 30 and the closer one of the two surfaces of the first semiconductor layer 210 to the core 30. The first distance 240 represents the size of the gap formed between the semiconductor layer 210 and the core 30.

[0114] The first distance 240 may be less than 500 nm.

[0115] The gap between the first semiconductor layer 210 and the core 30 may be filled with one or more of silicon dioxide (SiO2), silicon oxynitride (SiON), aluminum oxide (Al2O3), or aluminum nitride (AlN). One or more of PECVD, LPCVD, atomic layer deposition (ALD), or by thermal oxidation of a silicon or aluminum substrate, or by nitridation of a silicon or aluminum substrate can be used to deposit the layer forming the gap between the first semiconductor layer 210 and the core 30.

[0116] By controlling the first distance 240, the position of the EO modulator 200 relative to the guided mode 20 and the core 30 can be determined. Therefore, the first distance 240 is one of the parameters related to the balance between loss and modulation depth. In the following examples, the layer providing the first distance 240 will be referred to as the coupling layer.

[0117] The second distance 250 is defined as the distance between the semiconductor layer 210 and the second semiconductor layer 220. The second distance 250 is the distance between one of the two surfaces of the first semiconductor layer 210 away from the core 30 and the one of the two surfaces of the second semiconductor layer 220 closer to the core 30. The second distance 250 represents the size of the gap formed between the silicon layer 210 and the second semiconductor layer 220. The second distance 250 corresponds to the thickness of the dielectric layer 230 forming part of the EO modulator 200.

[0118] The second distance can be between 1 nm and 30 nm.

[0119] In some implementations, the gap between the first semiconductor layer 210 and the second semiconductor layer 220 may include one or more of silicon dioxide (SiO2), silicon oxynitride (SiON). The gap between the first semiconductor layer 210 and the second semiconductor layer 220 can be deposited by oxidation of the silicon substrate or by atomic layer deposition (ALD).

[0120] In some implementations, when the waveguide and the EO modulator 200 can be fabricated below 350 °C, the gap between the first semiconductor layer 210 and the second semiconductor layer 220 or the gap between the core 30 and the semiconductor layer 210 may include one or more of benzocyclobutene (BCB), polymethyl methacrylate (PMMA), or parylene.

[0121] The first semiconductor layer 210 and the second semiconductor layer 220 are respectively connected to electrical contacts. In some implementations, one or both of the corresponding electrical contacts may form a Schottky junction. In some implementations, the position of the electrical contacts can be positioned such that the closest surface to the core 30 in the x or y direction is greater than 1 μm, so as to reduce optical loss due to scattering of the guided mode 20 by these electrical contacts.

[0122] In some implementations, the electrical contacts include an alloy and the composition of the alloy contact is such that its refractive index is lower than that of the core 30, thereby allowing the electrical contacts to be positioned such that the closest surface to the core 30 in the x or y direction is less than 1.5 μm while minimizing optical loss.

[0123] The first semiconductor layer 210, the second semiconductor layer 220, and the dielectric layer 230 form a capacitor structure, where the silicon layer 210 and the second semiconductor layer 220 are separated by the dielectric layer 230.

[0124] In some implementations, when an electric field is applied through two electrical contacts made of the first semiconductor layer 210 and the second semiconductor layer 220, the refractive index of the semiconductor layer 210 can be changed. For example, carriers can accumulate in the first semiconductor layer 210 near the dielectric layer 230.

[0125] Alternatively, in some implementations, the first semiconductor layer 210 may include an ultra-thin silicon layer such that when an electric field is applied through two electrical contacts made with the semiconductor layer 210 and the second semiconductor layer 220, carriers may accumulate near the dielectric layer 230, causing the semiconductor layer to be fully depleted or fully accumulated. In some implementations, when an electric field is applied through two electrical contacts made with the semiconductor layer 210 and the second semiconductor layer 220, the refractive indices of the first semiconductor layer 210 and the second semiconductor layer 220 may change.

[0126] In some implementations, when an electric field is applied through two electrical contacts made with the semiconductor layer 210 and the second semiconductor layer 220, the refractive index of the second semiconductor layer 220 may change.

[0127] The overlap length 260 is defined as the lateral width in the y direction over which the semiconductor layer 210 and the second semiconductor layer 220 overlap to form a capacitor structure.

[0128] For example, as Figure 2a shown, the first semiconductor layer 210 may extend in the negative y direction while the second semiconductor layer 220 may extend in the positive y direction to allow electrical contacts to be formed at a sufficient distance from the core 30. The first semiconductor layer 210 and the second semiconductor layer 220 may be arranged to overlap directly above the core 30 above the first side 31 when looking down on the xy plane. This enables the EO modulator 200 to interact with the guided mode 20 extending beyond the first side 31 of the core as discussed above.

[0129] In Figure 2a the transverse mode of the guided mode 20 is represented by a dashed line. As discussed above, this line is merely a guide to the eye, indicating that at least part of the power of the guided mode 20 resides outside the core 30 and above the first side 31, such that it is at least coupled to the first semiconductor layer 210.

[0130] In Figure 2a the example of, the first semiconductor layer 210 and the second semiconductor layer 220 are embedded in the same material as the dielectric layer 230. The gaps between the core 30 and the first semiconductor layer 210 and between the first semiconductor layer 210 and the second semiconductor layer 220 are filled with the material for the dielectric layer 230. The second semiconductor layer 220 is covered with the material of the dielectric layer 230 such that neither the first semiconductor layer 210 nor the second semiconductor layer 220 is exposed to air or vacuum.

[0131] Figure 2b and Figure 2c show graphs representing the results of numerical simulations referring to Figure 1 and Figure 2a respectively.

[0132] For Figure 2aNumerical simulations were performed on the configuration of the EO modulator 200 as shown in the example. For the simulation, the following parameters were fixed: the material of the dielectric layer 230 was set to silicon dioxide. The width of the core 30 in the y direction was set to 800 nm, and the thickness of the core in the z direction was set to 150 nm. The first distance 240 was set to 5 nm, and the second distance 250 was set to 2.5 nm. The wavelength of the simulation was 1.55 μm. The first distance 240 and the second distance 250 can be determined by the minimum thickness of the layers that can be reliably and reproducibly fabricated during the manufacturing process.

[0133] Figure 2b Shows a graph 270 that presents an evaluation of L π Simulation results as the thickness of the first semiconductor layer 210 and the second semiconductor layer 220 change. L π Is defined as the length of the EO modulator in the x direction along the core 30 required to achieve a phase shift of π when the voltage applied to the EO modulator 200 is 1 V.

[0134] Graph 270 shows L on the y-axis 272 π As a function of the thickness in the x-axis 271. In this simulation, the overlap length 260 was set to 2 μm, which is 800 nm wider than the width of the core 30. It is assumed that both the semiconductor layer 210 and the second semiconductor layer 220 are silicon layers, and the thicknesses of these layers change simultaneously from 10 nm to 30 nm.

[0135] Graph 270 shows L π Decreases rapidly as the thickness increases from 10 nm to 20 nm. From 20 nm to 30 nm, the decrease in L π Is not as fast. As the thickness of the first semiconductor layer 210 and the second semiconductor layer 220 increases, the more power the guided mode 20 interacts with the EO modulator 200, and the smaller the length of the EO modulator 200 required to achieve the same degree of phase shift. In other words, the change in the effective refractive index for each applied voltage increases with the thickness of the first semiconductor layer 210 and the second semiconductor layer 220 to produce the same degree of phase shift.

[0136] As the thickness increases, the loss due to scattering or absorption also increases. The loss was also evaluated from the simulation, and from a thickness of 10 nm to 30 nm, the loss increased more or less linearly from 3.1 dB to 3.6 dB. This indicates that at this position of the EO modulator 200 defined by the first distance 240 and within the thickness range, the loss is proportional to the volume of the material of the EO modulator 200.

[0137] The capacitance of the EO modulator 200 related to the operating bandwidth was also simulated and evaluated. The capacitance does not vary with the thickness and depends largely on the length of the device, and varies from 8000 fF to 13000 fF for the lengths of 220 μm to 130 μm of the EO modulator 200, respectively.

[0138] Therefore, according to Chart 270, for a given waveguide geometry, the thicknesses of the first semiconductor layer 210 and the second semiconductor layer 220 can be selected to be a thickness of about 20 nm so that optimal operation can be obtained considering the modulation depth and loss.

[0139] Figure 2c Chart 280 is shown, which presents the simulation results of evaluating L π as it varies with the overlap length 260 of the first semiconductor layer 210 and the second semiconductor layer 220.

[0140] Chart 280 shows L π on the y-axis 282 as a function of the overlap length 260 in the x-axis 281. In this simulation, it is assumed that the first semiconductor layer 210 and the second semiconductor layer 220 are silicon layers and their thicknesses are 20 nm. The overlap length 260 varies from 400 nm to 2800 nm.

[0141] Chart 280 shows L π rapidly decreases as the overlap length 260 increases to about 800 nm. As the overlap length 260 further increases, the decrease of L π is not so fast.

[0142] When the capacitor formed by the first semiconductor layer 210 and the second semiconductor layer 220 has a lateral range on the y-axis smaller than the width 800 nm of the core 30, the modulation efficiency decreases, so the total length of the EO modulator 200 can be made longer to achieve the same degree of phase modulation.

[0143] In Figure 2c this specific configuration and size of the EO modulator 200 simulated below, when the lateral range of the capacitor formed by the first semiconductor layer 210 and the second semiconductor layer 220 on the y-axis exceeds the width of the core 30, the modulation degree may not increase significantly. This can be attributed to the fact that the guided mode 20 of the core 30 may be mainly confined around the cross-section of the core 30 and as the overlap length 260 increases beyond the range covering the guided mode 20, the modulation efficiency does not increase significantly. For example, when the EO modulator 200 is used in a waveguide where the guided mode 20 is not so tightly confined, this behavior may change.

[0144] The losses generated by the EO modulator 200 are also evaluated by simulation. The losses also follow a trend similar to that of Chart 280, i.e., the losses rapidly decrease from 400 nm to the overlap length 260 at 900 nm, but do not further significantly decrease from the overlap length 260 at 900 nm. At Figure 2c In this particular configuration and size of the EO modulator 200 simulated below, this can also be attributed to the fact that the guided mode 20 of the core 30 may be mainly confined around the cross-section of the core 30 and as the overlap length 260 increases beyond the range covering the guided mode 20, the losses do not increase significantly.

[0145] The capacitance of the EO modulator 200 is also evaluated by simulation. The capacitance is minimized to approximately 4500 fF near an overlap length of 800 nm and increases rapidly and monotonically to approximately 12000 fF as the overlap length increases to 2800 nm. The capacitance of the EO modulator at an overlap length of 400 nm is approximately 5500 fF. At Figure 2c In this particular configuration and size of the EO modulator 200 simulated below, the decrease in capacitance as the overlap length 260 varies from 400 nm to 800 nm can be mainly attributed to the decrease in the required length L of the EO modulator 200 π . As the overlap length 260 varies from 800 nm, the rapid and monotonic increase in capacitance can be attributed to the linear increase in the capacitor size.

[0146] The capacitance can also be considered to determine the design of the EO modulator 200, because the operating bandwidth of the EO modulator 200 highly depends on the capacitance. According to the simulation of the particular configuration and size of the EO modulator 200 simulated at Figure 2c below, the capacitance is minimized around an overlap length 260 of 800 nm.

[0147] Therefore, according to Chart 280, a balance among the modulation depth, losses, and operating bandwidth can be provided at an overlap length 260 of approximately 800 nm (which corresponds to the width of the core 30).

[0148] In some implementations, the lateral range of the capacitor formed by the first semiconductor layer 210 and the second semiconductor layer 220 can be comparable to the width of the core 30 to reduce losses.

[0149] Although not shown as a chart here, simulations are performed to evaluate the effect of the second distance 250 (i.e., the distance between the first semiconductor layer 210 and the second semiconductor layer 220). In this simulation, the thicknesses of the semiconductor layer 210 and the second semiconductor layer 220 are set to 20 nm and the overlap length is set to 2 μm. When the second distance 250 varies from 2 nm to 5 nm, L πIt changes basically monotonically from 140 μm to 260 μm, and the loss also changes basically monotonically from 3.25 dB to 3.5 dB. As expected, the simulation shows that the second distance 250 can be made as small as possible to reduce the optical loss and enhance the modulation depth. The second distance 250 can be determined by the minimum thickness of the layer that can be manufactured reliably and reproducibly during manufacturing.

[0150] The initial goal of the design may be to achieve a π phase shift when a voltage of 1 V is applied to the EO modulator 200. Then the design parameters can be changed to optimize the operation of the EO modulator 200. For example, to reduce the optical loss caused by the EO modulator, the first distance 240 can be changed or the thickness of the first semiconductor layer 210 and / or the second semiconductor layer 220 can be changed. The final voltage range required to achieve a π phase shift can be from 1.5 V to 3 V.

[0151] Figure 3 is a schematic diagram showing an exemplary embodiment of an electro-optic modulator of reference Figure 1

[0152] The electro-optic modulator 300 or the EO modulator 300 is positioned near a waveguide that includes a core 60 embedded in a surrounding material 70. The refractive index of the surrounding material 70 is lower than that of the core 60. Specifically, the EO modulator 300 is positioned such that amplitude modulation and / or phase modulation can be applied to the guided mode 20 supported by the waveguide. As described above, the dashed line representing the transverse mode distribution of the guided mode 20 is only a guide to the eye.

[0153] In Figure 3 the example, the cross-section of the core 60 has a rectangular shape and is positioned near an interface 71 formed by the end face of the surrounding material 70. The core 60 is embedded in the surrounding material 70 such that three sides of the cross-section of the core 60 are embedded in and in contact with the surrounding material 70, and one side (the first side 61) of the cross-section of the core 60 is parallel or flush with the interface 71 of the surrounding material 70. Thus, the interface 71 formed by the surrounding material 70 and the first side 61 of the core 60 forms a flat surface in the x-y plane. The transverse distribution of the guided mode 20 of the waveguide can thus extend in the positive z direction beyond the plane formed by the first side 61 and the interface 71.

[0154] The thickness of the core 60 in the z direction (i.e., perpendicular to the interface 71 and the first side 61) can be between 10 nm and 2.5 μm. Examples of the material of the core 60 are as discussed for the core 30 presented in the example of Figure 2a The core 60 can be deposited in the same manner as the core 30 presented in the example of Figure 2a

[0155] Examples of the material of the surrounding material 70 are as discussed for the surrounding material 40 presented in the example of Figure 2a ​

[0156] The guided mode 20 travels in the x direction of a cross-section perpendicular to the core 60 and is guided by a waveguide formed by the core 60 and a cladding formed within the surrounding material 70.

[0157] The EO modulator 300 includes a first semiconductor layer 310, a second semiconductor layer 320, a dielectric layer 330, and a coupling layer 340. The first semiconductor layer 310 is closer to the core 60 than the second semiconductor layer 320. The dielectric layer 330 is disposed between the first semiconductor layer 310 and the second semiconductor layer 320. The coupling layer 340 is disposed between the core 60 and the first semiconductor layer 310. The coupling layer 340 is configured to couple at least the guided mode 20 of the waveguide to the first semiconductor layer 310. The coupling layer 340 can be configured such that when the EO modulator 300 is coupled to the waveguide, the coupling layer 340 is disposed between the core 60 and the first semiconductor layer 310.

[0158] It can be deposited and processed for the first semiconductor layer 310 and the second semiconductor layer 320 as discussed for the first semiconductor layer 210 and the second semiconductor layer 220 in the example for Figure 2a .

[0159] The material composition, doping, and thickness of the first semiconductor layer 310 and the second semiconductor layer 320 are as discussed for the first semiconductor layer 210 and the second semiconductor layer 220 in the example for Figure 2a .

[0160] The thickness of the coupling layer 340 in the z direction can be less than 500 nm.

[0161] In some implementations, the coupling layer 340 can include one or more of silicon dioxide (SiO2), silicon oxynitride (SiON), aluminum oxide (Al2O3), or aluminum nitride (AlN).

[0162] In some implementations, one or more of PECVD, LPCVD, atomic layer deposition (ALD), or by thermal oxidation of a silicon or aluminum substrate, or by nitridation of a silicon or aluminum substrate can be used to deposit the coupling layer 340.

[0163] By controlling the thickness of the coupling layer 340, the position of the EO modulator 300 relative to the guided mode 20 and the core 60 can be determined. Thus, the thickness of the coupling layer 340 is one of the parameters related to the optimal value between loss and modulation depth.

[0164] The thickness of the dielectric layer 330 in the z direction can be between 1 nm and 30 nm.

[0165] In some implementations, the dielectric layer 330 can include one or more of silicon dioxide (SiO2), silicon oxynitride (SiON).

[0166] In some implementations, the dielectric layer 330 may be deposited by oxidizing a silicon substrate or by atomic layer deposition (ALD).

[0167] In some implementations, when the waveguide and the EO modulator 300 can be fabricated at temperatures below 350 °C, the dielectric layer 330 and / or the coupling layer 340 may include one or more of benzocyclobutene (BCB), polymethyl methacrylate (PMMA), or parylene.

[0168] The first semiconductor layer 310 and the second semiconductor layer 320 are respectively connected to electrical contacts, as Figure 2a described in the example of.

[0169] Examples of the materials of the first semiconductor layer 310 and the second semiconductor layer 320 are as discussed in the example of. Figure 2a In the example of, the first semiconductor layer 310 is deposited on the coupling layer 340 such that when looking down at the xy plane, the first semiconductor layer 310 covers the first side 61 of the core 60. As discussed above in Figure 3 , the extent to which the first semiconductor layer 310 covers the first side 61 of the core 60 is related to the overlap length 260, and the overlap length 260 can be determined depending on the tightness defined by the guided mode 20. In some implementations, the first semiconductor layer 310 may be deposited to completely cover the core 60. In some implementations, the first semiconductor layer 310 may be deposited to partially cover the core 60. A similar concept applies to the second semiconductor layer 320 and the dielectric layer 330. Figure 2c For example, if the guided mode 20 supported by the waveguide formed by the core 60 and the cladding formed within the surrounding material 70 is only loosely defined due to a small refractive index difference between the core 60 and the surrounding material 70, the semiconductor layer 310 may be deposited such that it completely covers the first side 61 of the core 60 and extends away from the core 60 in the positive y direction, so that the EO modulator 300 interacts efficiently with the guided mode 20.

[0170] For another example, if the guided mode 20 supported by the waveguide formed by the core 60 and the cladding formed within the surrounding material 70 is tightly defined due to a large refractive index difference between the core 60 and the surrounding material 70, such as in the case where silicon nitride is the core and silicon dioxide is the cladding, the semiconductor layer 310 may be deposited such that the semiconductor layer 310 terminates around the region defined by the first side 61, as

[0171] shown and as Figure 3 indicated by the simulation results of. Figure 2c

[0172] ​Starting from a region near the first side 61 of the core 60, the semiconductor layer 310 extends in the transverse plane and parallel to the plane of the substrate in the negative y-direction such that electrical contacts can be formed on the semiconductor layer. The electrical contacts can be positioned at least 1 μm from the center of the core 60.

[0173] The dielectric layer 330 is disposed on top of the first semiconductor layer 310 such that when looking down at the xy-plane, the dielectric layer 330 covers the core 60 and a portion of the first semiconductor layer 310 is between the core 60 and the dielectric layer 330.

[0174] The dielectric layer 330 can be deposited to extend in the transverse plane and parallel to the plane of the substrate in the positive y-direction starting from a region near the core 60 in a direction opposite to the first semiconductor layer 310. The second semiconductor layer 320 extends in the positive y-direction starting from a region near the core 60 such that electrical contacts can be formed on the second semiconductor layer 320. The electrical contacts can be positioned at least 1 μm from the center of the core 60.

[0175] The second semiconductor layer 320 can be deposited on the dielectric layer 330. The second semiconductor layer 320 can be deposited such that when looking down at the xy-plane, the second semiconductor layer 320 covers the first side 61 of the core 60. As mentioned before, the extent to which the dielectric layer 330 covers the core can depend on the waveguide formed by the core 60 and the surrounding material 70. Specifically, the second semiconductor layer 320 can be deposited such that it does not extend beyond the position where the dielectric layer 330 terminates in the negative y-direction. Since the second semiconductor layer 320 and the first semiconductor layer 310 form a capacitor structure, the first semiconductor layer 310 and the second semiconductor layer 320 must not be in electrical contact with each other in any way.

[0176] Since the dielectric layer 330 is formed at different heights in the z-direction, namely on top of the semiconductor layer 310 near the first side 61 of the core 60 and on top of the coupling layer 340 in the positive y-direction away from the core 60 in the z-direction, the second semiconductor layer 320 deposited on top of the dielectric layer 330 largely follows the distribution of the dielectric layer 330 and is at two different heights in the z-direction.

[0177] In Figure 3 the example, the first semiconductor layer 310 and the second semiconductor layer 320 are deposited to form a capacitor-type structure, where the dielectric layer 330 is between the first semiconductor layer 310 and the second semiconductor layer 320. The capacitor-type structure completely covers the transverse extent of the core 60 in the y-direction. The first semiconductor layer 310 and the second semiconductor layer 320 are arranged to overlap directly above the core 60 above the first side 61 when looking down at the xy-plane. This enables the EO modulator 300 to interact with the guided mode 20 extending beyond the first side 61 of the core.

[0178] Figure 4ais a schematic diagram showing an exemplary embodiment of an electro-optic modulator with reference Figure 1 thereof.

[0179] The electro-optic modulator 400 or EO modulator 400 is located near a waveguide that includes a core 80 in contact with a surrounding material 90. The refractive index of the surrounding material 90 is lower than that of the core 80. The EO modulator 400 is positioned such that amplitude modulation and / or phase modulation can be applied to the guided mode 20 supported by the waveguide.

[0180] In Figure 4a the example, the cross-section of the core 80 has a rectangular shape and is positioned near an interface 91 formed by the end face of the surrounding material 90. The core 80 is fabricated such that one side (i.e., the first side 81) of the cross-section of the core 80 is parallel or flush with the interface 91 of the surrounding material 90. Thus, the interface formed by the surrounding material 90 and the first side 81 of the core 80 forms a flat surface in the x-y plane.

[0181] In some implementations, in a region without the EO modulator 400, the core 80 and the surrounding material 90 can form a rib waveguide, where three sides of the cross-section of the core 80 can be exposed to air or vacuum and these three sides are not in contact with the surrounding material 90.

[0182] Alternatively, in some implementations, in a region without the EO modulator 400, the core 80 can be embedded in the surrounding material 90 on all four sides of the cross-section of the core 80 such that the waveguide and the surrounding material 90 together form a cladding.

[0183] In both cases, the lateral distribution of the guided mode 20 of the waveguide can thus extend beyond the sides of the cross-section of the core 80.

[0184] The thickness of the core 80 in the z direction (i.e., perpendicular to the plane of the substrate on which the EO modulator 400 and the waveguide are deposited) can be between 10 nm and 2.5 μm. Examples of the material of the core 80 are the same as those described for the cores 10, 30, 60 in the examples of Figure 1 , Figure 2a and Figure 3 . The core 80 can be deposited in the same manner as the core 30 presented in the example of Figure 2a .

[0185] Examples of the material of the surrounding material 90 are as discussed for the surrounding materials 30, 40, 70 presented in the examples of Figure 1 , Figure 2a and Figure 3 . The guided mode 20 travels in the x direction perpendicular to the cross-section of the core 80 and is guided by the waveguide formed by the core 80 and the cladding formed within the surrounding material 90.

[0186] The EO modulator 400 includes a first semiconductor layer 410, a second semiconductor layer 420, a dielectric layer 430, and a coupling layer 440. The first semiconductor layer 410 is closer to the core 80 than the second semiconductor layer 420. The dielectric layer 430 is located between the first semiconductor layer 410 and the second semiconductor layer 420. The coupling layer 440 is located between the core 80 and the semiconductor layer 410. The coupling layer 440 is configured to couple at least the guided mode 20 of the waveguide to the semiconductor layer 410. The coupling layer 440 may be configured such that when the EO modulator 400 is coupled to the waveguide, the coupling layer 440 is disposed between the core 80 and the silicon layer 410.

[0187] It may be deposited and processed as discussed for the first semiconductor layers 210, 310 and the second semiconductor layers 220, 320 in the examples for Figure 2a and Figure 3 .

[0188] The material composition, doping, and thickness of the first semiconductor layer 410 and the second semiconductor layer 420 are as discussed for the semiconductor layers 210, 310 and the second semiconductor layers 220, 320 in the examples for Figure 2a and Figure 3 .

[0189] The thickness of the coupling layer 440 in the z direction may be less than 500 nm.

[0190] An example of the material composition of the coupling layer 440 is as discussed for the coupling layer 340 in the example of Figure 3 .

[0191] The coupling layer 440 may be deposited in the same manner as the coupling layer 340, as discussed in the example of Figure 3 .

[0192] By controlling the thickness of the coupling layer 440, the position of the EO modulator 400 relative to the guided mode 20 and the core 80 can be determined. Thus, the thickness of the coupling layer 440 is one of the parameters related to the optimal value between loss and modulation depth.

[0193] The thickness of the dielectric layer 430 in the z direction may be between 1 nm and 30 nm.

[0194] An example of the material composition of the dielectric layer 430 is as discussed for the dielectric layer 330 in the example of Figure 3 .

[0195] The dielectric layer 430 may be deposited in the same manner as the Figure 3 dielectric layer 330 in the example.

[0196] The working principle and configuration of the EO modulator 400, including electrical contacts and a capacitor-like structure formed by a first semiconductor layer 410, a second semiconductor layer 420, and a dielectric layer 430, as discussed herein for the EO modulator 300 in the example for Figure 3 as described.

[0197] In Figure 4a the example, the coupling layer 440 is deposited on three sides of the cross-section of the core 80 that do not contact the surrounding material 90. The first semiconductor layer 410 is disposed on the coupling layer 440 such that the first semiconductor layer 410 covers three sides of the cross-section of the core 80, thus largely following the distribution of the coupling layer 440. In Figure 2a and Figure 3 for the EO modulators 200, 300, the first semiconductor layers 210, 310 are parallel to the first sides 31, 61 of the cores 30, 60, thus covering the regions around the first sides 31, 61. In Figure 4a the example, the first semiconductor layer 410 is deposited such that it covers three sides of the cross-section of the core 80. Compared with the EO modulators 200, 300 shown in Figure 2a and Figure 3 , this can provide more efficient modulation of the guided mode 20, where only one side of the cross-section of the cores 30, 60 is covered by the semiconductor layers 210, 310. Moreover, the modulation is insensitive to the polarization of the guided mode 20 in the waveguide. In contrast, in Figure 3 the example, when the guided mode 20 is a TE mode, the guided mode 20 can be modulated.

[0198] Starting from the region near the first side 81 of the core 80, the first semiconductor layer 410 extends in the negative y direction such that electrical contacts can be formed on the first semiconductor layer 410. The electrical contacts can be positioned at least 1 μm away from the center of the core 80.

[0199] The dielectric layer 430 is disposed on top of the first semiconductor layer 410. The distribution of the dielectric layer 430 in the yz plane can follow the distribution of the first semiconductor layer 410 in the yz plane.

[0200] In some implementations, the dielectric layer 430 can be deposited to extend in the positive y direction starting from the region near the core 80.

[0201] The second semiconductor layer 420 may then be deposited on the dielectric layer 430. The distribution of the second semiconductor layer 420 in the yz plane may follow the distribution of the dielectric layer 430 in the yz plane. Specifically, the second semiconductor layer 420 may be deposited such that it does not extend beyond the position where the dielectric layer 430 terminates in the negative y direction. Since the second semiconductor layer 420 and the first semiconductor layer 410 form a capacitor structure, the first semiconductor layer 410 and the second semiconductor layer 420 shall not be in electrical contact with each other in any way. The coverage range of the dielectric layer 430 over the core 80 may also be determined in view of this aspect.

[0202] In some implementations, the second semiconductor layer 420 may start extending in the positive y direction from a region near the core 80 such that electrical contacts may be formed on the second semiconductor layer 420. The electrical contacts may be positioned at least 1 μm away from the core 80.

[0203] In Figure 4a the example of, the first semiconductor layer 410 and the second semiconductor layer 420 are deposited to form a capacitor-type structure, where the dielectric layer 430 is located between the first semiconductor layer 410 and the second semiconductor layer 420. The capacitor-type structure completely covers three sides of the cross-section of the core 80 in the yz plane. This enables the EO modulator 400 to interact with the guided mode 20 that extends beyond the three sides of the cross-section of the core.

[0204] Figure 4b is a schematic diagram showing an exemplary embodiment of an electro-optic modulator with reference to Figure 4a to.

[0205] Figure 4b shows the EO modulator 400 disposed on a waveguide including the core 80. Specifically, Figure 4b shows the extent of the EO modulator 400 in the x direction (which is also the propagation direction of the guided wave 20) perpendicular to the cross-section of the core 80.

[0206] The surrounding material 90 on the xy plane below the first surface 81 of the core 80 is as Figure 4a discussed in.

[0207] In some implementations, the waveguide including the core 80 may be a rib waveguide such that the core 80 only contacts the flat surface of the surrounding material 90 on the xy plane. In the absence of the EO modulator 400, the core 80 may be exposed to vacuum or air.

[0208] In some implementations, the waveguide and the EO modulator 400 are embedded in the surrounding material 90. This arrangement may be achieved by depositing the surrounding material 90 after depositing the EO modulator 400 such that neither the core 80 nor the EO modulator 400 is exposed to air or vacuum.

[0209] In some implementations, the coupling layer 440 may be deposited on the core 80 on three sides of the core 90 that are not in contact with the surrounding material 90. Thus, the outermost surface of the core 90 exposed to air or vacuum may include the coupling layer 440.

[0210] In some implementations, the coupling layer 440 may be deposited on the core 80 only if there is a first semiconductor layer 410 between the core 80 and the first semiconductor layer 410.

[0211] In some implementations, the extent of the first semiconductor layer 410, the dielectric layer 430, and the second semiconductor layer 420 in the x - direction or length is such that the first semiconductor layer 410 is the longest and the second semiconductor layer 420 is the shortest. This is to ensure that the first semiconductor layer 410 and the second semiconductor layer 420 are not accidentally electrically short - circuited during manufacturing. The modulation efficiency or modulation depth or Lπ may depend on the extent of the second semiconductor layer 420 in the x - direction.

[0212] Although Figure 4a and Figure 4b the examples of

[0213] Figure 5a relate to the EO modulator 400 covering three sides of the core 80, this concept can be extended to cover four sides or all sides of the cores 30, 60, 80 forming the waveguide to improve the modulation efficiency.

[0214] Figure 5a FIG. shows a top view of a Mach - Zehnder modulator or MZ modulator 500. The MZ modulator 500 includes a photonic Mach - Zehnder interferometer, and an EO modulator 505 is disposed on the photonic Mach - Zehnder interferometer.

[0215] The EO modulator 505 can be Figure 1 , Figure 2a , Figure 3 , Figure 4a and Figure 4b an example of the EO modulators 100, 200, 300, 400 described in

[0216] The MZ modulator 500 includes a waveguide formed using a core 560 and a cladding formed within the surrounding material, which is not visible in Figure 5a Figure 5a The example of Figure 1 , Figure 2a , Figure 3 , Figure 4a and Figure 4b is as described above in Figure 3As shown, the cross-section of the cores 60, 560 in the yz plane has a rectangular shape, and three sides of the cross-section of the core are embedded in the surrounding materials 70, 540.

[0217] The MZ modulator 500 includes an input port 501 and an output port 502. In some implementations, the input port 501 and the output port 502 can be connected to other components in the same substrate through waveguides of the same type including the core 560. In some implementations, the input port 501 and the output port 502 can be configured such that other components can be connected to the MZ modulator 500. As long as the guided mode 20 can be interfaced through the input port 501 and the output port 502, the implementations of the input port 501 and the output port 502 are not limited to these examples.

[0218] To form a Mach-Zehnder interferometer, between the input port 501 and the output port 502, the waveguide is divided into a first arm 503 and a second arm 504. The guided mode 20 input in the input port 501 can be divided into the first arm 503 and the second arm 504 such that the guided mode 20 is launched into the first arm 503 and the second arm 504 with substantially equal power. In some implementations, the separation of the optical mode can be achieved through a multimode interference (MMI) device.

[0219] In one of the arms, in this example, in the second arm 504, the EO modulator 505 is integrated into the MZ modulator 500. The EO modulator 505 is deposited on the waveguide forming the first arm 504, for example, as Figure 3 described.

[0220] The coupling layer 540 is deposited over the core 560 and the surrounding material around this portion of the core 560. The first semiconductor layer 510 is deposited on the coupling layer 540. A dielectric layer (not visible in Figure 5a either) is deposited on the first semiconductor layer 510. The second semiconductor layer 520 is deposited on the oxide layer to form the EO modulator 505, for example Figure 3 the EO modulator 300 described. The coupling layer 540 is used to couple the guided mode 20 of the waveguide to at least the first semiconductor layer 510. The coupling layer 540 can be configured such that when the EO modulator 500 is coupled to the waveguide, the coupling layer 540 is disposed between the core 560 and the semiconductor layer 510.

[0221] In some implementations, the length of the second arm 504 in the x direction is arranged to be equal to or longer than Lπ of the EO modulator 505. By applying a voltage within the possible operating voltage range of the EO modulator 505, the guided mode 20 traveling in the second arm 504 can obtain a π phase shift when Vπ is applied to the EO modulator. Since the guided mode 20 entering the first arm 503 does not obtain an additional phase shift, when the guided modes 20 in the first arm 503 and the second arm 504 recombine, destructive interference may occur at the output port 502 when Vπ is applied to the EO modulator 505. This provides amplitude modulation of the guided mode 20.

[0222] Figure 5b is a schematic diagram showing an exemplary embodiment of a Mach-Zehnder modulator.

[0223] Figure 5b shows a top view of the Mach-Zehnder modulator 550 or MZ modulator. Figure 5a The description of the MZ modulator 500 also applies to the amplitude modulator 550 because it includes an embedded Figure 1 , Figure 2a , Figure 3 , Figure 4a and Figure 4b photonic Mach-Zehnder interferometer of the EO modulators 100, 200, 300, 400 described in, except that the amplitude modulator 550 in this example includes two EO modulators located in the first arm 530 and the second arm 504 respectively: the first EO modulator 506 and the second EO modulator 507.

[0224] In some implementations, the two EO modulators 506, 507 can operate in a push-pull configuration. The first EO modulator 506 and the second EO modulator 507 can be driven by the same voltage source or by two voltage sources that are phase-locked to each other, such that phase shifts with the same amplitude but opposite signs are generated in the first EO modulator 506 and the second EO modulator 507. In the case where π phase shift is required for amplitude modulation, the lengths of the arms 503, 504 can be Figure 5a half of the length of the MZ modulator 500. Since the lengths of the first arm 503 and the second arm 504 are shorter, the overall loss can be reduced.

[0225] Figure 6 is a schematic diagram showing an exemplary embodiment of a ring resonator modulator.

[0226] Figure 6 shows a top view of the ring resonator modulator 600. The ring resonator modulator 600 includes a ring resonator 604 and a bus waveguide 606, and an EO modulator 605 is disposed on the ring resonator. For example, the EO modulator 605 can be Figure 4a andFigure 4b the EO modulator 400 described in Figure 4b . However, the configuration of the EO modulator 605 is not limited to Figure 5a and Figure 5b the examples of Figure 5b . Any of the EO modulators 100, 200, 300, 400 described in the earlier examples can be applicable to the ring resonator modulator 600.

[0227] The ring resonator 604 and the bus waveguide 606 include waveguides formed using a core 660 and a cladding formed within a surrounding material, which are not visible in Figure 6 . For example, the waveguide is as described earlier in Figure 4a : the cross-section of the core 80 in the yz plane has a rectangular shape, and at least one side of the cross-section of the core is in contact with the surrounding material 90. However, the ring resonator modulator 600 can also be composed of waveguides of any geometry described in the previous examples.

[0228] The ring resonator 604 and the bus waveguide 606 are coupled to each other at a coupling region 607, which is demarcated by a dashed line in Figure 6 . In some implementations, the ring resonator 604 and the bus waveguide 606 can be coupled to each other by proximity such that the guided mode 20 is evanescently coupled. In this case, the distance between the ring resonator 604 and the bus waveguide 606 can be one of the parameters determining the coupling degree between the ring resonator 604 and the bus waveguide 606.

[0229] The EO modulator 605 can be disposed on the waveguide forming the ring resonator 604. The EO modulator 605 can partially overlap the circumference of the ring resonator 604. Figure 6 shows the EO modulator 605 covering approximately half of the circumference. However, the range of the EO modulator 605 covering the ring resonator 604 is not limited to this example. For example, the EO modulator 605 can cover almost the entire circumference except for the coupling region.

[0230] In some embodiments, the EO modulator 605 can cover the coupling region 607, including all or part of the circumference of the ring resonator 604.

[0231] The coupling layer 640 is deposited over the core 660 and the surrounding material around this part of the core 660. The first semiconductor layer 610 is deposited on the coupling layer 640. The dielectric layer 630 is deposited on the first semiconductor layer 610. The second semiconductor layer 620 is deposited on the dielectric layer 630 to form the EO modulator 605.

[0232] ​​​​​​The ring resonator modulator 600 includes an input port 601 and an output port 602 on each side of the bus waveguide 606. In some implementations, the input port 601 and the output port 602 can be connected to other components in the same substrate through waveguides of the same type including a core 660. In some implementations, the input port 601 and the output port 602 can be connected such that other components can be connected to the ring resonator modulator 600. As long as the guided mode 20 can be interfaced through the input port 601 and the output port 602, the implementations of the input port 601 and the output port 602 are not limited to these examples.

[0233] In response to an electric field or voltage applied to the EO modulator 605, the EO modulator 605 can introduce a phase shift into the guided mode 20 traveling in the ring resonator 604, thereby shifting the resonance of the ring resonator 604. This results in a frequency shift of the transmission spectrum between the input port 601 and the output port 602.

[0234] Figure 7 is a flowchart showing an exemplary method of manufacturing an electro-optic modulator.

[0235] Specifically, Figure 7 shows a method of forming the EO modulators 100, 200, 300, 400, 505, 506, 507, 605 on waveguides including cores 10, 30, 60, 80, 560, 660.

[0236] At step 710, coupling layers 340, 440, 540, 640 can be deposited on the waveguides. In some implementations, the coupling layers 340, 440, 540, 640 can be deposited such that the coupling layers 340, 440, 540, 640 are in direct contact with at least one surface of the cores 10, 30, 60, 80, 560, 660. Examples of deposition methods for the coupling layers 340, 440, 540, 640 are described in the previous examples.

[0237] At step 720, a first semiconductor layer 210, 310, 410, 510, 610 can be deposited on the coupling layers 340, 440, 540, 640. Examples of deposition methods for the first semiconductor layers 310, 410, 510, 610 are described in the previous examples.

[0238] At step 730, a dielectric layer 230, 330, 430, 630 can be deposited on the first semiconductor layers 210, 310, 410, 510, 610. Examples of deposition methods for the dielectric layers 230, 330, 430, 630 are described in the previous examples.

[0239] At step 740, a second semiconductor layer 220, 320, 420, 520, 620 may be deposited on the dielectric layers 230, 330, 430, 630. Examples of deposition methods for the second semiconductor layer 220, 320, 420, 520, 620 are described in the previous examples.

[0240] The embodiments of the present invention shown in the drawings and described above are merely exemplary embodiments and are not intended to limit the scope of the present invention, which is defined by the following claims. It is intended that any combination of the non-exclusive features described herein be within the scope of the present invention.

Claims

1. An electro-optic modulator for a waveguide, comprising: A first semiconductor layer; A second semiconductor layer; A dielectric layer inserted between the second semiconductor layer and the first semiconductor layer; And A coupling layer for coupling a guided mode of the waveguide to at least one of the first semiconductor layer and the second semiconductor layer, Wherein the coupling layer is disposed between the first semiconductor layer and the waveguide such that a center of the guided mode does not overlap with the electro-optic modulator, and Wherein the electro-optic modulator is configured to induce modulation of the guided mode of the waveguide by changing a refractive index in response to a voltage applied between the first semiconductor layer and the second semiconductor layer.

2. The electro-optic modulator according to claim 1, wherein, The first semiconductor layer and the second semiconductor layer include dopings of opposite types to each other such that when the first semiconductor layer exhibits n-type behavior, the second semiconductor layer exhibits p-type behavior, and when the first semiconductor layer exhibits p-type behavior, the second semiconductor layer exhibits n-type behavior.

3. The electro-optic modulator according to claim 2, wherein, At least one of the first semiconductor layer and the second semiconductor layer includes a non-degenerate semiconductor.

4. The electro-optic modulator according to claim 2 or 3, wherein, At least one of the first semiconductor layer and the second semiconductor layer includes a III-V semiconductor.

5. The electro-optic modulator according to claim 2 or 3, wherein, At least one of the first semiconductor layer and the second semiconductor layer includes one or more of silicon, germanium, and SiGe alloys.

6. The electro-optic modulator according to any one of claims 2 to 5, wherein, A structure of at least one of the first semiconductor layer and the second semiconductor layer is one of the following: amorphous or crystalline.

7. The electro-optic modulator according to claim 6, wherein, A structure of at least one of the first semiconductor layer and the second semiconductor layer is amorphous, and the structure is hydrogenated amorphous.

8. The electro-optic modulator according to claim 6, wherein, A structure of at least one of the first semiconductor layer and the second semiconductor layer is crystalline, and the structure is polycrystalline or nanocrystalline.

9. The electro-optic modulator according to any one of claims 2 to 8, wherein, At least one of the first semiconductor layer and the second semiconductor layer includes an alloy, and the alloy includes one or more of NiSi, Ni2Si, NiSi2, TiSi, TiSi2, CoSi, CO2Si, PtSi, or a germanide film.

10. The electro-optic modulator according to claim 1, wherein, At least one of the first semiconductor layer and the second semiconductor layer includes an intrinsic semiconductor.

11. The electro-optic modulator according to claim 1, wherein, At least one of the first semiconductor layer and the second semiconductor layer includes a half-metal layer.

12. The electro-optic modulator according to any one of the foregoing claims, wherein, A thickness of the dielectric layer is between 0.1 nm and 40 nm.

13. The electro-optic modulator according to any one of the foregoing claims, wherein, Thicknesses of the first semiconductor layer and the second semiconductor layer are less than 500 nm.

14. The electro-optic modulator according to any one of the foregoing claims, wherein,The coupling layer includes one or more of silicon dioxide, silicon oxynitride, aluminum oxide, aluminum nitride, benzocyclobutene, polymethyl methacrylate, or parylene.

15. An electro-optical modulator according to any one of the preceding claims, wherein, The dielectric layer includes one or more of silicon dioxide, silicon oxynitride, benzocyclobutene, polymethyl methacrylate, or parylene.

16. A device comprising: A waveguide, including a core; and An electro-optic modulator according to any one of the preceding claims, Wherein a cross-section of the core has a polygonal shape at at least one position along a propagation direction of the guided mode, and Wherein, at the at least one position, the electro-optic modulator is formed to be substantially parallel to and cover one side of the cross-section of the core.

17. The device according to claim 16, wherein, At the at least one position, the electro-optic modulator is formed to be substantially parallel to and cover two or more consecutive sides of the cross-section of the core.

18. The device according to claim 16 or 17, wherein, The range of the first semiconductor layer along the propagation direction of the guided mode is greater than the range of the dielectric layer along the same direction, and wherein the range of the dielectric layer along the propagation direction of the guided mode is greater than the range of the second semiconductor layer along the same direction.

19. A Mach-Zehnder modulator comprising: Input port; Output port; A first beam splitter and a second beam splitter, respectively connected to the input port and the output port, and configured to split the optical guided modes received from the input port and the output port respectively into two optical guided modes; And A first arm and a second arm, disposed between the first beam splitter and the second beam splitter and connecting the first beam splitter and the second beam splitter, thereby forming a Mach-Zehnder interferometer, wherein the first arm includes a waveguide and a first electro-optic modulator, and the first electro-optic modulator is the electro-optic modulator according to any one of claims 1 to 15.

20. The Mach-Zehnder modulator according to claim 19, wherein, The second arm includes a waveguide and a second electro-optic modulator, and the second electro-optic modulator is the electro-optic modulator according to any one of claims 1 to 15.

21. A ring resonator comprising: A bus waveguide, including an input port and an output port; A ring resonator, coupled to the bus waveguide, wherein the ring resonator includes a waveguide and an electro-optic modulator according to any one of claims 1 to 15.

22. A method of fabricating an electro-optical modulator according to any one of claims 1 to 15 on a waveguide, the method comprising: Deposit a coupling layer on the waveguide such that the center of the guided mode of the waveguide does not overlap with the electro-optic modulator; Deposit a first semiconductor layer on the coupling layer; Deposit a dielectric layer on the first semiconductor layer; and Deposit a second semiconductor layer on the dielectric layer.

23. The method according to claim 22, wherein, The depositing of the coupling layer includes one or more of PECVD, LPCVD, atomic layer deposition, and thermal oxidation.

24. The method according to claim 22 or 23, wherein, The deposition of the first semiconductor layer or the second semiconductor layer includes LPCVD, PECVD, ALD, sputtering or PVD techniques, wherein the doping level is less than 2×10 20 at / cm 3 .

25. The method according to any one of claims 22 to 24, wherein, The depositing of the dielectric layer includes one or more of oxidation or atomic layer deposition of the first semiconductor layer, thermal oxidation or nitridation.

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