TCAM

Abstract

The present invention discloses a three-state content addressable memory, comprising a search line connected to a TCAM unit; the search line is provided with a boost circuit; the boost circuit comprises: a metal line arranged on one side of the search line and forming a coupling capacitor with the search line, and a boost control unit connected to the metal line; the boost control unit sets the metal line to a high level when the search line is at a high level; and the metal line increases the voltage of the local search line at a high level through the coupling capacitor. The present invention can further increase the voltage of the search line when the search line is at a high level. After the search line voltage is increased, the VGS voltage of the NMOS tube for discharging the matching line in the TCAM unit can be increased, thereby increasing the discharge current, making the matching line discharge speed faster, and further making the matching line evaluation speed faster, improving the efficiency of the search operation, and further improving the operating frequency and performance of the three-state content addressable memory.

Description

Technical Field

[0001] The present invention relates to a ternary content addressable memory. Background Art

[0002] Ternary Content Addressable Memory (TCAM) is mainly used to quickly search for ACL, routing and other table entries. It is developed on the basis of CAM. In general CAM memory, each bit has only two states, "0" or "1", while each bit in TCAM has three states. In addition to "0" and "1", there is also a "don't care" state, so it is called "three states". It is implemented through masks. It is this third state feature of TCAM that enables it to perform both exact match search and fuzzy match search, while CAM does not have a third state, so it can only perform exact match search.

[0003] The operating frequency of TCAM depends on the speed of the search operation, and the core depends on the discharge speed (i.e. evaluation speed) of the match line ML. Summary of the invention

[0004] The object of the present invention is to provide a ternary content addressable memory, comprising a local search line connected to a TCAM unit; the local search line is provided with a boost circuit;

[0005] The boost circuit comprises: a first metal line arranged at one side of the local search line and forming a first coupling capacitor with the local search line, and a boost control unit connected to the first metal line;

[0006] The boost control unit sets the first metal line to a high level when the local search line is at a high level; and the first metal line increases the voltage of the local search line at a high level through the first coupling capacitor.

[0007] Preferably, it further comprises a complementary local search line connected to the TCAM unit and complementary to the local search line;

[0008] The boost circuit further includes: a second metal line disposed at one side of the complementary local search line and forming a second coupling capacitor with the complementary local search line; the boost control unit is also connected to the second metal line;

[0009] The boost control unit sets the second metal line to a high level when the complementary local search line is at a high level; and the second metal line increases the voltage of the complementary local search line at a high level through the second coupling capacitor.

[0010] Preferably, the first metal line is parallel to the local search line, and the first metal line is not shorter than the local search line.

[0011] Preferably, the second metal line is parallel to the complementary local search line, and the second metal line is not shorter than the complementary local search line.

[0012] The specific structure of the boost control unit and the specific control method of the boost circuit are shown in the embodiments.

[0013] The advantages and beneficial effects of the present invention are as follows: a ternary content addressable memory is provided, which can further increase the voltage of the search line when the search line is at a high level. After the voltage of the search line is increased, the VGS voltage of the NMOS tube for discharging the match line in the TCAM unit can be increased, thereby increasing the discharge current, making the match line discharge speed faster, and further making the match line evaluation speed faster, thereby improving the efficiency of the search operation, and further improving the operating frequency and performance of the ternary content addressable memory.

[0014] Because the metal line is parallel to the corresponding search line and the metal line is not shorter than the corresponding search line, the coupling capacitance can change with the change of the search line length, so the voltage boost effect will not be reduced due to the lengthening of the search line.

[0015] In the present invention, the time that the flipping of the voltage boost control signal line lags behind the flipping of the search line can be adjusted, that is, the voltage boost start time point can be adjusted.

[0016] The solution of the present invention is applicable to all NOR-type CAMs. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a circuit diagram of the present invention. DETAILED DESCRIPTION

[0018] The specific implementation of the present invention is further described below in conjunction with the accompanying drawings and embodiments. The following embodiments are only used to more clearly illustrate the technical solution of the present invention, and cannot be used to limit the protection scope of the present invention.

[0019] The technical solutions specifically implemented in the present invention are as follows:

[0020] like Figure 1 As shown, the present invention provides a three-state content addressable memory, comprising: a match line ML and a local search line pair connected to a TCAM unit, and a global search line pair driving the local search line pair;

[0021] The local search line pair includes: a local search line LSL, a complementary local search line LSLB complementary to the local search line LSL;

[0022] The global search line pair includes: a global search line GSL for driving a local search line LSL, and a complementary global search line GSLB for driving a complementary local search line LSLB;

[0023] The local search line pair LSL, LSLB is equipped with a boost circuit;

[0024] The boost circuit includes: a first metal wire NETB1 disposed at one side of a local search line LSL and forming a first coupling capacitor C1 with the local search line LSL, a second metal wire NETB2 disposed at one side of a complementary local search line LSLB and forming a second coupling capacitor C2 with the complementary local search line LSLB, and a boost control unit connected to the first metal wire NETB1 and the second metal wire NETB2;

[0025] The boost control unit sets the first metal line NETB1 to a high level when the local search line LSL is at a high level; and the first metal line NETB1 increases the voltage of the local search line LSL at a high level through the first coupling capacitor C1; after the voltage of the local search line LSL is increased, the VGS voltage of the NMOS tube for discharging the match line ML in the TCAM unit can be increased, thereby increasing the discharge current, making the match line ML discharge faster, and further making the match line ML evaluation speed faster;

[0026] The boost control unit sets the second metal line NETB2 to a high level when the complementary local search line LSLB is at a high level; and the second metal line NETB2 increases the voltage of the complementary local search line LSLB at a high level through the second coupling capacitor C2; after the voltage of the complementary local search line LSLB is increased, the VGS voltage of the NMOS tube in the TCAM unit that discharges the match line ML can be increased, thereby increasing the discharge current, making the discharge speed of the match line ML faster, and further making the evaluation speed of the match line ML faster.

[0027] Specifically, the boost control unit includes: a boost control signal line BEN, a first inverter DN1, a second inverter DN2, a first PMOS tube P1, a second PMOS tube P2, a third PMOS tube P3, a fourth PMOS tube P4, a first NMOS tube N1, and a second NMOS tube N2;

[0028] The boost control signal line BEN is connected to the input end of the first inverter DN1, the output end of the first inverter DN1 is connected to the input end of the second inverter DN2, the output end of the second inverter DN2 is connected to the first metal line NETB1, and the output end of the second inverter DN2 is also connected to the second metal line NETB2;

[0029] The boost control signal line BEN is also connected to the gate of the first PMOS tube P1; the source of the first PMOS tube P1 is connected to the power supply, the drain of the first PMOS tube P1 is connected to the source of the third PMOS tube P3, the drain of the third PMOS tube P3 is connected to the drain of the first NMOS tube N1, and the source of the first NMOS tube N1 is grounded;

[0030] The global search line GSL is connected to the gate of the third PMOS transistor P3, and the global search line GSL is also connected to the gate of the first NMOS transistor N1;

[0031] The local search line LSL is connected to the drain of the third PMOS tube P3, and the local search line LSL is also connected to the drain of the first NMOS tube N1;

[0032] The boost control signal line BEN is also connected to the gate of the second PMOS tube P2; the source of the second PMOS tube P2 is connected to the power supply, the drain of the second PMOS tube P2 is connected to the source of the fourth PMOS tube P4, the drain of the fourth PMOS tube P4 is connected to the drain of the second NMOS tube N2, and the source of the second NMOS tube N2 is grounded;

[0033] The complementary global search line GSLB is connected to the gate of the fourth PMOS transistor P4, and the complementary global search line GSLB is also connected to the gate of the second NMOS transistor N2;

[0034] The complementary local search line LSLB is connected to the drain of the fourth PMOS transistor P4 , and the complementary local search line LSLB is also connected to the drain of the second NMOS transistor N2 .

[0035] Preferably, the first metal wire NETB1 is parallel to the local search line LSL and is not shorter than the local search line LSL; the second metal wire NETB2 is parallel to the complementary local search line LSLB and is not shorter than the complementary local search line LSLB.

[0036] The control method of the boost circuit is as follows:

[0037] In the initial state, the global search line GSL and the complementary global search line GSLB are both at a high level, and the boost control signal line BEN is at a low level; at this time, the first NMOS tube N1 and the second NMOS tube N2 are both turned on, the third PMOS tube P3 and the fourth PMOS tube P4 are both turned off, the local search line LSL is grounded through the first NMOS tube N1, the complementary local search line LSLB is grounded through the second NMOS tube N2, and the local search line LSL and the complementary local search line LSLB are both at a low level; the first metal line NETB1 and the second metal line NETB2 are connected to the boost control signal line BEN through the first inverter DN1 and the second inverter DN2, and the first metal line NETB1 and the second metal line NETB2 are both at a low level;

[0038] 1) If during search, only the local search line LSL is set to high level:

[0039] The global search line GSL is flipped to the bottom level, the complementary global search line GSLB is kept at a high level, and the boost control signal line BEN is kept at a low level; at this time, the second NMOS tube N2 is turned on, the fourth PMOS tube P4 is turned off, and the complementary local search line LSLB is kept at a low level; and the first NMOS tube N1 is turned off, the third PMOS tube P3 and the first PMOS tube P1 are both turned on, the local search line LSL is connected to the power supply through the third PMOS tube P3 and the first PMOS tube P1, and the local search line LSL is flipped to a high level;

[0040] After the local search line LSL is flipped to a high level, the boost control signal line BEN is flipped to a high level, the global search line GSL maintains a low level, and the complementary global search line GSLB maintains a high level; at this time, the first PMOS tube P1 and the first NMOS tube N1 are both turned off, and the second NMOS tube N2 is turned on; and the first metal line NETB1 and the second metal line NETB2 are both flipped to a high level following the boost control signal line BEN; because the first metal line NETB1 and the local search line LSL form a first coupling capacitor C1, the first metal line NETB1 flipped to a high level The voltage of the local search line LSL is increased by the first coupling capacitor C1, and the voltage of the local search line LSL is increased to a voltage higher than the power supply voltage; and because the second NMOS tube N2 is turned on, the complementary local search line LSLB maintains a low level, and the complementary local search line LSLB is not coupled by the second coupling capacitor C2 to increase the voltage; after the voltage of the local search line LSL is increased, the VGS voltage of the NMOS tube in the TCAM unit that discharges the match line ML can be increased, thereby increasing the discharge current, making the match line ML discharge faster, and further making the match line ML evaluation speed faster;

[0041] After the search is completed, the initial state is restored;

[0042] 2) If during search, only the complementary local search line LSLB is set to high level:

[0043] Then the complementary global search line GSLB is flipped to the bottom level, the global search line GSL is kept at a high level, and the boost control signal line BEN is kept at a low level; at this time, the first NMOS tube N1 is turned on, the third PMOS tube P3 is turned off, and the local search line LSL is kept at a low level; and the second NMOS tube N2 is turned off, the fourth PMOS tube P4 and the second PMOS tube P2 are both turned on, and the complementary local search line LSLB is connected to the power supply through the fourth PMOS tube P4 and the second PMOS tube P2, and the complementary local search line LSLB is flipped to a high level;

[0044] After the complementary local search line LSLB is flipped to a high level, the boost control signal line BEN is flipped to a high level, the complementary global search line GSLB is kept at a low level, and the global search line GSL is kept at a high level; at this time, the second PMOS tube P2 and the second NMOS tube N2 are both turned off, and the first NMOS tube N1 is turned on; and the first metal line NETB1 and the second metal line NETB2 are both flipped to a high level following the boost control signal line BEN; because the second metal line NETB2 forms a second coupling capacitor C2 with the complementary local search line LSLB, the second metal line NETB1 flipped to a high level B2 increases the voltage of the complementary local search line LSLB through the second coupling capacitor C2, and the voltage of the complementary local search line LSLB will be increased to a voltage higher than the power supply voltage; and because the first NMOS tube N1 is turned on, the local search line LSL maintains a low level, and the local search line LSL will not be coupled by the first coupling capacitor C1 to increase the voltage; after the voltage of the complementary local search line LSLB is increased, the VGS voltage of the NMOS tube in the TCAM unit that discharges the match line ML can be increased, thereby increasing the discharge current, making the match line ML discharge faster, and further making the match line ML evaluation speed faster;

[0045] After the search is complete, the initial state is restored.

[0046] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the technical principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A ternary content addressable memory, comprising a local search line connected to the TCAM unit, and a global search line for driving the local search line; The local search line is provided with a boost circuit; the boost circuit comprises: a first metal line forming a first coupling capacitor with the local search line, and a boost control unit connected to the first metal line; the boost control unit sets the first metal line to a high level when the local search line is at a high level; characterized in that, The boost control unit includes: a boost control signal line, a first inverter, a second inverter, a first PMOS tube, a third PMOS tube, and a first NMOS tube; The boost control signal line is connected to the input end of the first inverter, the output end of the first inverter is connected to the input end of the second inverter, and the output end of the second inverter is connected to the first metal line; The boost control signal line is also connected to the gate of the first PMOS tube; the source of the first PMOS tube is connected to the power supply, the drain of the first PMOS tube is connected to the source of the third PMOS tube, the drain of the third PMOS tube is connected to the drain of the first NMOS tube, and the source of the first NMOS tube is grounded; The global search line is connected to the gate of the third PMOS tube, and the global search line is also connected to the gate of the first NMOS tube; The local search line is connected to the drain of the third PMOS tube, and the local search line is also connected to the drain of the first NMOS tube.

2. The ternary content addressable memory according to claim 1, characterized in that: Also included is a complementary local search line connected to the TCAM unit and complementary to the local search line; The boost circuit further includes: a second metal line that forms a second coupling capacitor with the complementary local search line; the boost control unit is also connected to the second metal line; The boost control unit sets the second metal line to a high level when the complementary local search line is at a high level.

3. The ternary content addressable memory according to claim 2, characterized in that: Also includes: A complementary global search line is used to drive a complementary local search line.

4. The ternary content addressable memory according to claim 3, characterized in that: The boost control unit further includes: a second PMOS tube, a fourth PMOS tube, and a second NMOS tube; The output terminal of the second inverter is also connected to the second metal line; The boost control signal line is also connected to the gate of the second PMOS tube; the source of the second PMOS tube is connected to the power supply, the drain of the second PMOS tube is connected to the source of the fourth PMOS tube, the drain of the fourth PMOS tube is connected to the drain of the second NMOS tube, and the source of the second NMOS tube is grounded; The complementary global search line is connected to the gate of the fourth PMOS tube, and the complementary global search line is also connected to the gate of the second NMOS tube; The complementary local search line is connected to the drain of the fourth PMOS tube, and the complementary local search line is also connected to the drain of the second NMOS tube.

5. The ternary content addressable memory according to claim 1, characterized in that: The first metal line is parallel to the local search line.

6. The ternary content addressable memory according to claim 5, characterized in that: The first metal line is not shorter than the local search line.

7. The ternary content addressable memory according to claim 2, characterized in that: The second metal line is parallel to the complementary local search line.

8. The ternary content addressable memory according to claim 7, characterized in that: The second metal line is not shorter than the complementary local search line.

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