An array of emitters with varying spacing between adjacent emitters

Abstract

In some embodiments, a VCSEL array may include a plurality of VCSELs, each of which operates simultaneously and emits light at the same wavelength. A first distance between a first pair of adjacent VCSELs in the plurality of VCSELs may be different from a second distance between a second pair of adjacent VCSELs in the plurality of VCSELs. The first pair of adjacent VCSELs may be positioned closer to the center of the VCSEL array than the second pair of adjacent VCSELs. Compared to another VCSEL array having the same physical footprint as a VCSEL array including evenly spaced VCSELs, at least one of temperature non-uniformity or optical power non-uniformity in the plurality of VCSELs may be reduced.

Description

[0001] This application is a divisional application of the invention patent application with application date of September 25, 2018, application number 201811121109.5, and invention name “Transmitter array with varying spacing between adjacent transmitters”. Technical Field

[0002] The present invention relates generally to lasers and, more particularly, to arrays of emitters having varying spacing between adjacent emitters. Background Art

[0003] A vertical emitting device, such as a vertical cavity surface emitting laser (VCSEL), is a laser in which the laser beam is emitted in a direction perpendicular to the substrate surface (e.g., perpendicularly from the surface of a semiconductor wafer). Unlike edge emitting devices, vertical emitting devices can allow testing at intermediate steps in wafer fabrication. Summary of the invention

[0004] According to some possible embodiments, a VCSEL array may include a plurality of VCSELs, each of which operates simultaneously and emits light at substantially the same wavelength. A first distance between a first pair of adjacent VCSELs in the plurality of VCSELs may be different from a second distance between a second pair of adjacent VCSELs in the plurality of VCSELs. The first pair of adjacent VCSELs may be positioned closer to the center of the VCSEL array than the second pair of adjacent VCSELs. Compared to another VCSEL array, the other VCSEL array has the same physical footprint as a VCSEL array including uniformly spaced VCSELs, and at least one of temperature non-uniformity or optical power non-uniformity in the plurality of VCSELs may be reduced.

[0005] According to some possible embodiments, the emitter array may include a plurality of emitters that operate simultaneously and emit laser beams at substantially the same wavelength. The distance between adjacent emitters in the plurality of emitters may be based on the distance between the center of the emitter array and the adjacent emitters. Compared to another emitter array, the other emitter array has the same physical footprint as the emitter array including uniformly spaced emitters, and at least one of temperature uniformity or optical power uniformity in the plurality of emitters may be increased.

[0006] According to some possible embodiments, the laser array may include a plurality of vertical emitting devices with varying spacing between different pairs of adjacent vertical emitting devices. The plurality of vertical emitting devices may operate simultaneously to produce light at substantially the same wavelength. The spacing between a pair of adjacent vertical emitting devices in the plurality of vertical emitting devices may be a function of the distance between the center of the laser array and the pair of adjacent vertical emitting devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1A is a schematic diagram of an exemplary emitter array having uniform spacing between adjacent emitters;

[0008] Figure 1B is a schematic diagram comparing an exemplary transmitter array having varying spacing between adjacent transmitters and an exemplary transmitter array having uniform spacing between adjacent transmitters;

[0009] Figure 1C is a schematic diagram of another comparison between an exemplary transmitter array having varying spacing between adjacent transmitters and an exemplary transmitter array having uniform spacing between adjacent transmitters; and

[0010] Figure 2A and 2B are schematic diagrams showing a top view of an exemplary emitter and an exemplary cross-sectional view of an exemplary emitter, respectively. DETAILED DESCRIPTION

[0011] The following detailed description of exemplary embodiments refers to the accompanying drawings. The same reference numerals may represent the same or similar elements in different drawings. The embodiments described below are merely examples and are not intended to limit the embodiments to the exact disclosed form. Alternatively, the embodiments are selected to be used for description so that those skilled in the art can implement the embodiments.

[0012] Figure 1A is a schematic diagram of an exemplary emitter array having uniform spacing between adjacent emitters. Figure 1A An exemplary emitter array 100 having relatively small uniform spacing between adjacent emitters and an exemplary emitter array 105 having relatively large uniform spacing between adjacent emitters are shown. As shown, the emitter arrays 100, 105 can be two-dimensional emitter arrays. As further shown, the emitter arrays 100, 105 can include a plurality of emitters 110. The emitters 110 can include lasers, and additional details regarding the emitters 110 are described elsewhere herein.

[0013] Two-dimensional emitter arrays (e.g., emitter arrays 100, 105) typically exhibit non-uniform thermal profiles in the array and / or in a chip that includes the array. For example, an inner region 115 (e.g., a central region) of the emitter array may be hotter than an outer region 120 (e.g., an edge region) due to a larger number of emitters 110 surrounding the inner region 115 and a smaller number of emitters 110 surrounding the outer region 120. As a result, emitters 110 located in the inner region 115 (e.g., closer to the center of the array) typically have lower light output and increased failure rates compared to emitters 110 located in the outer region 120 (e.g., farther away from the center of the array).

[0014] Furthermore, thermal runaway may occur in the emitter arrays 100, 105. Thermal runaway refers to a situation where an increase in temperature changes the operating state in a way that causes a further increase in temperature (e.g., uncontrolled positive feedback), often leading to destructive results, such as catastrophic failure. In the case of the emitter arrays 100, 105, thermal runaway may occur when the arrays 100, 105 are driven electrically in parallel (e.g., at the same voltage). When a region of the emitters 110 (e.g., the inner region 115) becomes hotter than another region of the emitters 110 (e.g., the outer region 120), the emitters 110 in the hot region experience a decrease in resistance during operation, which causes an increase in the current supplied to the emitters 110 in the hot region. This increase in current leads to a further increase in temperature, which leads to a further decrease in resistance, which leads to a further increase in current. This cycle continues until a failure occurs in the hot region of the emitters 110.

[0015] In some cases, the uniform spacing between emitters 110 may be increased, as shown in emitter array 105, compared to emitter array 100. This increase in uniform spacing achieves a reduction in heat at a particular emitter 110 from surrounding emitters 110. However, such an arrangement may still experience thermal runaway, as described above, because the increase in uniform spacing does not account for relative heating or temperature differences between emitters 110 located in different regions of the emitter array 105. Even with greater uniform spacing, emitters 110 in inner region 115 may still operate at a higher temperature than emitters 110 in outer region 120. Furthermore, emitters 110 in emitter arrays 100, 105 having uniform spacing and non-uniform thermal distribution may be more likely to exhibit non-uniform performance, non-uniform beam profiles, non-uniform optical power (e.g., optical transmit power), and / or the like. Furthermore, such an arrangement may require a larger physical footprint than an emitter array having varying (e.g., non-uniform) spacing between adjacent emitters, thereby increasing chip cost and manufacturing cost.

[0016] For example, emitter arrays 100, 105 may have the same number of emitters, but with different uniform spacings, resulting in different (but non-uniform) thermal performance. For example, emitter array 105 having larger spacings between adjacent emitters may have improved thermal performance compared to emitter array 100 having smaller spacings between adjacent emitters. For example, thermal runaway may occur at higher temperatures when emitter array 105 is used, and thermal runaway may occur at lower temperatures when emitter array 110 is used. However, this improvement in thermal performance is achieved through a larger chip area, which increases cost. For example, a larger chip area increases the cost of each chip (e.g., because fewer chips can be assembled on a chip). In turn, a larger chip area increases the physical footprint of the package containing the chip. Although not shown, reducing the number of emitters will also improve thermal performance, but will reduce the total optical power provided by the chip.

[0017] Some techniques described herein use arrays of emitters with varying (e.g., non-uniform) spacing between adjacent emitters, such as for Figure 1B and 1C This is described in detail below. This arrangement of varying spacing achieves more uniform thermal distribution, reduces the likelihood of thermal runaway, increases the temperature threshold for thermal runaway, and achieves more uniform performance (e.g., more uniform beam profile, more uniform optical power, and / or the like) among different emitters 110 in the emitter array, compared to an emitter array having the same number of emitters 110 as an emitter array with varying spacing (having uniform spacing between adjacent emitters 110) and the same physical footprint. Furthermore, this varying spacing arrangement can be achieved without increasing the physical footprint of the array, compared to a uniformly spaced array including the same number of emitters 110 as the varying spacing array. In this way, the density of emitters in the emitter array can be increased without reducing the temperature at which thermal runaway occurs.

[0018] Figure 1B is an exemplary transmitter array 125 having varying spacing between adjacent transmitters and an exemplary transmitter array 100 having uniform spacing between adjacent transmitters (e.g., as described above for Figure 1A ), where the two transmitter arrays 125, 100 have the same physical footprint (eg, occupy an area of ​​the same size).

[0019] As shown, the variable spacing emitter array 125 can be a two-dimensional emitter array. As further shown, the emitter array 125 can include a plurality of emitters 110. The emitters 110 include lasers, such as vertical emitting devices (e.g., vertical emitting lasers), VCSELs, and / or the like. Figure 2A and 2BAn exemplary emitter 110 is described in detail below. The emitter array 125 can be a laser array, a VCSEL array, and / or the like. In some embodiments, multiple emitters 110 can operate simultaneously and can emit light (e.g., laser beams) at substantially the same wavelength (e.g., the same wavelength, or different wavelengths within a critical wavelength deviation).

[0020] As shown, the emitter array 125 can have a center 130. A first pair of adjacent emitters 135 can be positioned closer to the center 130 of the emitter array 125, and a second pair of adjacent emitters 140 can be positioned farther from the center 130 of the emitter array 125. In the emitter array 125 with varying spacing, a first distance between the first pair of adjacent emitters 135 can be different from a second distance between the second pair of adjacent emitters 140. For example, the first distance can be greater than the second distance, as shown. In this way, temperature non-uniformity and / or optical power non-uniformity are reduced among the plurality of emitters 110 in the emitter array 125 compared to another emitter array (e.g., emitter array 100) that includes uniformly spaced emitters 110. The emitter array 125 with varying spacing can have the same physical footprint as the emitter array 100 with uniform spacing. For example, the emitter arrays 100, 125 can be of the same size, can occupy the same area, can have the same dimensions (e.g., length and / or width), can include the same number of emitters 110, and / or the like. In this way, using the same size die, temperature uniformity and / or optical performance among the emitters 110 can be increased (e.g., this can save cost and material compared to using a larger die, and / or can meet die specifications).

[0021] In some embodiments, the difference between the first distance between the first pair of adjacent emitters 135 and the second distance between the second pair of adjacent emitters 140 can be associated with reducing the difference in operating temperature between the first pair of adjacent emitters 135 and the second pair of adjacent emitters 140. For example, when the distance between adjacent emitters 110 located in the inner region 115 is greater than the distance between adjacent emitters 110 located in the outer region 120, this can reduce the difference in operating temperature among emitters 110 in different regions compared to the uniformly spaced emitter array 100, thereby preventing thermal runaway, increasing the thermal runaway temperature, and / or improving performance.

[0022] In some embodiments, the difference between the first distance between the first pair of adjacent emitters 135 and the second distance between the second pair of adjacent emitters 140 can be associated with reducing the difference in optical power output between the first pair of adjacent emitters 135 and the second pair of adjacent emitters 140. For example, when the distance between adjacent emitters 110 located in the inner region 115 is greater than the distance between adjacent emitters 110 located in the outer region 120, this can reduce the difference in optical power among emitters 110 in different regions compared to the uniformly spaced emitter array 100, thereby improving performance. For example, for a uniform emitter array with a 20°C temperature difference between the center emitter and the outer emitters, the non-uniformity of the emitter spacing can reduce the temperature difference to 10-15°C, depending on the application. This is because the center emitters operate in a slightly cooler state and the edge emitters operate in a slightly hotter state compared to an emitter array with the same footprint and uniform spacing. In this example, this reduction in temperature difference will achieve a reduction in power non-uniformity of approximately 30%.

[0023] In some embodiments, the emitter array 125 is configured such that the distance between a pair of adjacent emitters 110 is based on the distance between the center 130 of the emitter array 125 and the pair of adjacent emitters 110. For example, the distance between the pair of adjacent emitters 110 may vary linearly based on the distance between the center 130 of the emitter array 125 and the pair of adjacent emitters 110. As another example, the distance between the pair of adjacent emitters 110 may vary according to a parabolic function based on the distance between the center 130 of the emitter array 125 and the pair of adjacent emitters 110. In one example, the distance between adjacent emitters in the inner region 115 may be approximately 50 microns near the center 130 of the emitter array 125, and the distance between adjacent emitters in the outer region 120 may be approximately 35 microns near the edge of the emitter array 125.

[0024] In some embodiments, multiple emitters 110 in an emitter array 125 may have the same aperture size (e.g., the width of the light aperture 208 and / or the current confinement aperture 210, as described below for Figure 2A and 2B In this way, temperature uniformity, optical power uniformity, and / or the like can be improved without using different aperture sizes for different emitters 110. In some embodiments, at least two emitters 110 in the plurality of emitters 110 can have different aperture sizes. In some cases, temperature uniformity, optical power uniformity, and / or the like can be further improved by using different aperture sizes for different emitters 110. See, for example, U.S. Patent Application No. 15 / 171,844, the entire contents of which are incorporated herein by reference.

[0025] In some embodiments, the distance between adjacent emitters 110 in the plurality of emitters 110 can be based on the distance between the center 130 of the emitter array 125 and the adjacent emitters 110. For example, a first distance between a first adjacent emitter 110 can be different from a second distance between a second adjacent emitter, a third distance between a third adjacent emitter 110 can be different from the first distance and the second distance, and / or the like. In some embodiments, the distance between adjacent emitters 110 can be a linear function or a parabolic function of the distance between the center 130 of the emitter array 125 and the adjacent emitters 110.

[0026] As an example, the x and y coordinates for a transmitter in an array of transmitters having non-uniform spacing may be calculated as follows (e.g., when the distance between adjacent transmitters varies according to a parabolic function), where x(i) is the x coordinate of the i-th transmitter in the non-uniformly spaced transmitter array, y(i) is the y coordinate of the i-th transmitter in the non-uniformly spaced transmitter array, x'(i) is the x coordinate of the i-th transmitter in a corresponding evenly spaced transmitter array (e.g., having the same physical footprint and the same number of transmitters), y'(i) is the y coordinate of the i-th transmitter in the evenly spaced transmitter array, r(i) is the distance between the i-th transmitter and the center of the array, and where ax, bx, cx, ay, by, and cy are coefficients of a quadratic equation used to calculate the amount of non-uniformity in the non-uniformly spaced transmitter array, and may vary depending on the application:

[0027] x(i)=x′(i)×[ax+bx×r(i)+cx×r(i) 2 ]

[0028] y(i)=y′(i)×[ay+by×r(i)+cy×r(i) 2 ]

[0029] Thus, different pairs of adjacent emitters 110 included in the emitter array 125 can have varying spacings, and the spacing for a pair of adjacent emitters 110 can be a function of the distance between the center 130 of the emitter array 125 and the pair of adjacent emitters 110. In some embodiments, the distance between adjacent emitters 110 can be inversely proportional to the distance between the center 130 of the emitter array 125 and the distance between the adjacent emitters 110. By decreasing the distance or spacing between adjacent emitters 110 as the distance from the center 130 of the emitter array 125 increases, temperature uniformity, optical power uniformity, and / or the like can be increased compared to an evenly spaced emitter array 100.

[0030] Figure 1Cis a schematic diagram of another comparison between an exemplary transmitter array 125 having varying spacing between adjacent transmitters 110 and an exemplary transmitter array 100 having uniform spacing between adjacent transmitters 110. Figure 1C As shown above, Figure 1A As described, the first distance 145 between emitters 110 located closer to the center of the emitter array 125 (e.g., in the inner region 115) may be greater than the second distance 150 between emitters 110 located farther from the center of the emitter array 125 (e.g., in the outer region 120). Thus, the density of emitters 110 may be sparser when closer to the center of the emitter array 125 (e.g., in the inner region 115), and may be denser when farther from the center of the emitter array 125 (e.g., in the outer region 120). For example, a smaller number of emitters 110 may be present in an area located closer to the center of the emitter array 125, and a greater number of emitters may be present in an equal-sized area located farther from the center of the emitter array 125. In this way, the temperature gradient across the emitter array 125 may be flat compared to the temperature gradient of the emitter array 100, achieving improvements in the performance of the emitter array 125 without increasing the size of the die on which the emitter arrays 100, 125 are placed.

[0031] As mentioned above, Figures 1A-1C are provided as examples. Other examples are possible and can be used in conjunction with Figures 1A-1C For example, while a rectangular physical footprint of emitters has been shown for simplicity, the techniques described herein are equally applicable to emitter arrays having other shapes (e.g., circular, elliptical, hexagonal, etc.) and having varying spacing between emitters from the center of the shape to the edge of the shape. While an emitter array has been shown and described as having a single center, there may be multiple centers and / or focal points with more complex shapes (e.g., elliptical, hourglass, long narrow rectangle, etc.).

[0032] Figure 2A and 2B 2 are schematic diagrams showing a top view of the emitter 200 and an exemplary cross-sectional view 250 of the emitter 200, respectively. Figure 2A As shown, transmitter 200 may include a set of transmission layers constructed in a transmitter architecture. Figure 2A Not all emission layers of transmitter 200 are shown in FIG. In some embodiments, transmitter 200 may correspond to transmitter 110, as described above for Figures 1A-1C described.

[0033] like Figure 2AAs shown, the transmitter 200 includes an implant protection layer 202, which is circular in this example. In some embodiments, the implant protection layer 202 can have another shape, such as an elliptical shape, a polygonal shape, etc. The implant protection layer 202 is defined based on the space between the implant material portions (not shown) included in the transmitter 200. Figure 2A As shown in the medium gray area in , the emitter 200 includes a P-type ohmic metal layer (P-Ohmic metal layer) 204, which is configured as a partial ring shape (e.g., having an inner radius and an outer radius). As shown, the P-type ohmic metal layer 204 is concentrically positioned above the implant protection layer 202 (i.e., the outer radius of the P-type ohmic metal layer 204 is less than or equal to the radius of the implant protection layer 202). This configuration can be used, for example, in the case of a P-type upward / top emitting emitter 200. In the case of a bottom emitting emitter 200, the configuration can be adjusted as needed.

[0034] Further Figure 2A As shown, the transmitter 200 includes a dielectric via opening 206 formed (e.g., etched) on a dielectric passivation / mirror layer (not shown) overlying a P-type ohmic metal layer 204. As shown, the dielectric via opening 206 is formed in a partial annular shape (e.g., similar to the P-type ohmic metal layer 204) and is formed concentrically above the P-type ohmic metal layer 204 such that the metallization of the dielectric passivation / mirror layer contacts the P-type ohmic metal layer 204. In some embodiments, the dielectric opening 206 and / or the P-type ohmic metal layer 204 can be formed in other shapes, such as a full annular shape or a split annular shape.

[0035] As further shown, the emitter 200 includes a light hole 208 in the inner radius of the partial annular shape of the P-type ohmic metal layer 204 and in a portion of the emitter. The emitter 200 emits a laser beam via the light hole 208. As further shown, the emitter 200 also includes a current confining hole 210 (e.g., an oxide hole formed by an oxide layer (not shown) of the emitter 200). The current confining hole 210 is formed below the light hole 208.

[0036] Further Figure 2A As shown, the emitter 200 includes a set of oxide trenches 212 that are spaced (e.g., equidistant, unequally spaced) around the circumference of the implant protection layer 202. How closely the oxide trenches 212 can be positioned relative to the light holes 208 depends on the application and is generally limited by the implant protection layer 202, the P-type ohmic metal layer 204, the dielectric via 206, and manufacturing tolerances.

[0037] Figure 2A The number and arrangement of layers shown are provided as examples. Figure 2A Emitter 200 may include additional layers, fewer layers, different layers, or differently arranged layers than shown. For example, although emitter 200 includes a group of six oxidation trenches 212, in practice, other designs are possible, such as a compact emitter including five oxidation trenches 212, seven oxidation trenches 212, and / or and / or the like. As another example, although emitter 200 is a circular emitter design, in practice, other designs are possible, such as rectangular emitters, hexagonal emitters, elliptical emitters, etc. Additionally or alternatively, a group of layers (e.g., one or more layers) of emitter 200 may perform one or more functions, which are described as being performed by another group of layers of emitter 200, respectively.

[0038] It should be noted that although the design of emitter 200 is described as including a VCSEL, other embodiments are possible. For example, the design of emitter 200 can be applied to other types of optical devices, such as light emitting diodes (LEDs) or other types of vertical emitting (e.g., top emitting or bottom emitting) optical devices. In addition, the design of emitter 200 can be applied to emitters having any wavelength, power level, emission mode (emission profile), etc. In other words, emitter 200 is not dedicated to emitters having given performance characteristics.

[0039] like Figure 2B As shown, the exemplary cross-sectional view may represent a cross-section of the emitter 200 through a pair of oxidation trenches 212 (eg, Figure 2A As shown, emitter 200 may include back cathode layer 228, substrate layer 226, bottom reflector 224, active region 222, oxide layer 220, top reflector 218, implant insulating material 216, dielectric passivation / reflector layer 214, and P-type ohmic metal layer 204. As shown, emitter 200 may have an overall height of approximately 10 μm.

[0040] The backside cathode layer 228 may include a layer in electrical contact with the base layer 226. For example, the backside cathode layer 228 may include an annealed metallization layer, such as an AuGeNi layer, a PdGeAu layer, or the like.

[0041] The base layer 226 may include a base substrate layer on which the epitaxial layer is grown. For example, the substrate layer 226 may include a semiconductor layer, such as a GaAs layer, an InP layer, and / or the like.

[0042] The bottom reflector 224 may include a bottom reflective layer of the emitter 200. For example, the bottom reflector 224 may include a distributed Bragg reflector (DBR).

[0043] The active region 222 may include a layer that confines electrons and defines the emission wavelength of the emitter 200. For example, the active layer 222 may be a quantum well.

[0044] The oxide layer 220 may include an oxide layer that provides optical and electrical confinement of the emitter 200. In some embodiments, the oxide layer 220 may be formed by wet oxidation of an epitaxial layer. For example, the oxide layer 220 may be an Al2O3 layer that is formed by oxidation of an AlAs or AlGaAs layer. The oxidation trench 212 may include an opening that allows oxygen (e.g., dry oxygen, wet oxygen) to reach the epitaxial layer from which the oxide layer 220 is formed.

[0045] The current confining aperture 210 may include an optically active aperture defined by the oxide layer 220. The size of the current confining aperture 210 may be, for example, in the range of about 6.0 μm to about 14.0 μm. In some embodiments, the size of the current confining aperture 210 may depend on the distance of the oxide trench 212 around the emitter 200. For example, the oxide trench 212 may be etched to expose the epitaxial layer from which the oxide layer 220 is formed. Here, before the dielectric passivation / mirror layer 214 is deposited, a specific distance (e.g., Figure 2B 2 ) is oxidized by the epitaxial layer, thereby forming an oxide layer 220 and a current confining hole 210. In some embodiments, the current confining hole 210 may include an oxide hole. Additionally or alternatively, the current confining hole 210 may include a hole associated with other types of current confinement techniques (e.g., an etched mesa, an area without ion implantation, an inner cavity mesa defined by lithography, and regrowth, etc.).

[0046] The top reflector 218 may include a top reflective layer of the emitter 200. For example, the top reflector 218 may include a DBR.

[0047] The implant insulating material 216 may include a material that provides electrical insulation. For example, the implant insulating material 216 may include an ion implanted material, such as an H implanted material or a hydrogen / proton implanted material. In some embodiments, the implant insulating material 216 may define an implant protection layer 202 .

[0048] The dielectric passivation / mirror layer 214 may include a layer that serves as a protective passivation layer and as an additional DBR. For example, the dielectric passivation / mirror layer 214 may include one or more sublayers (e.g., SiO2 layers, Si3N4 layers) deposited (e.g., via chemical vapor deposition) on one or more other layers of the emitter 200.

[0049] As shown, dielectric passivation / mirror layer 214 may include one or more dielectric via ports 206 that provide electrical access to P-type ohmic metal layer 204. Light aperture 208 may include a portion of dielectric passivation / mirror layer 214 over current confining aperture 210 through which light may be emitted.

[0050] The P-type ohmic metal layer 204 may include a layer for making electrical contact, through which current may flow. For example, the P-type ohmic metal layer 204 may include a TiAu layer, a TiPtAu layer, etc., through which current may flow (e.g., through a bond pad (not shown) that contacts the P-type ohmic metal layer 204 through the dielectric access port 206).

[0051] In some embodiments, the emitter 200 can be manufactured using a series of steps. For example, the bottom reflector 224, active region 222, oxide layer 220, and top reflector 218 can be epitaxially grown on substrate layer 226, after which the P-type ohmic metal layer 204 can be deposited on the top reflector 218. Next, the oxidation trench 212 can be etched to expose the oxide layer 220 for oxidation. The implant insulating material 216 can be formed via ion implantation, after which the dielectric passivation / mirror layer 214 can be deposited. The dielectric access port 206 can be etched in the dielectric passivation / mirror layer 214 (e.g., exposing the P-type ohmic metal layer for contact). Electroplating, seeding, and etching can be performed, after which the base layer 226 can be thinned and / or lapped to a target thickness. Finally, the back cathode layer 228 can be deposited on the bottom side of the base layer 226.

[0052] Figure 2B The number, arrangement, thickness, order, symmetry, etc. of the layers shown are provided as examples. Figure 2B Transmitter 200 may include additional layers, fewer layers, different layers, differently constructed layers, or differently arranged layers than shown. Additionally or alternatively, a set of layers (e.g., one or more layers) of transmitter 200 may perform one or more functions that are described as being performed by another set of layers of transmitter 200.

[0053] Some techniques described herein use varying spacing included in an emitter array between adjacent emitters to reduce temperature non-uniformity and / or reduce optical power non-uniformity across the emitter array, as compared to another emitter array having evenly spaced emitters. In some cases, an emitter array using varying spacing can have the same physical footprint as an emitter array using evenly spaced spacing. In this way, using the same size die, temperature uniformity and / or optical performance among the emitters can be increased (e.g., this saves cost and material compared to using a larger die). In this way, using the same amount of emitters and the same size die as an evenly spaced emitter array, the threshold for thermal runaway can be increased.

[0054] The foregoing content provides illustration and description, but the purpose is not to exhaust or limit the implementation to the exact form disclosed. Changes and modifications can be made under the inspiration of the above content or from the implementation process of the specific implementation.

[0055] Even though specific combinations of features are recited in the claims and / or disclosed in the specification, these combinations are not intended to limit the possible implementations of the invention. In fact, many of these features can be combined in various ways not specifically recited in the claims and / or disclosed in the specification. Although each dependent claim may be directly dependent on a claim, the disclosure of possible implementations includes each dependent claim in combination with every other claim in the claims.

[0056] The elements, actions or instructions used herein should not be understood as being critical or essential unless otherwise described. Also, as used herein, the article "one" is intended to include one or more items, and can be used interchangeably with "one or more". Furthermore, as used herein, the term "group" should include one or more items (such as associated items, non-associated items, a combination of associated items and non-associated items, etc.), and can be used interchangeably with "one or more". In the case of referring to only one item, the term "one" or similar terms are used. Also, as used herein, the terms "having", "including", "comprising", etc. should be open terms. Further, the phrase "based on" should be "based at least in part on", unless otherwise specified.

Claims

1. A transmitter array comprising: a plurality of emitters operating simultaneously and emitting laser beams of substantially the same wavelength, wherein the distance between adjacent emitters in the plurality of emitters is a function of the distance between the center of the emitter array and the adjacent emitter, and the function is a linear function or a parabolic function, in, A first pair of adjacent transmitters in the plurality of transmitters are positioned closer to the center than a second pair of adjacent transmitters in the plurality of transmitters, and Wherein, a first distance between the first pair of adjacent transmitters is greater than a second distance between the second pair of adjacent transmitters.

2. The emitter array of claim 1, wherein the plurality of emitters have the same aperture size.

3. A vertical cavity surface emitting laser (VCSEL) array comprising: Multiple VCSELs that operate simultaneously and emit laser beams at substantially the same wavelength, wherein each VCSEL in the plurality of VCSELs is associated with a first coordinate and a second coordinate, and wherein the first coordinate and the second coordinate are associated with a function of a distance of a corresponding VCSEL in the plurality of VCSELs from a center of the array, and Wherein the function is a quadratic function.

4. The VCSEL array of claim 3, wherein a first distance between a first pair of adjacent VCSELs in the plurality of VCSELs is different from a second distance between a second pair of adjacent VCSELs in the plurality of VCSELs, The first pair of adjacent VCSELs are closer to the center of the VCSEL array than the second pair of adjacent VCSELs. The VCSEL array of claim 4 , wherein the first distance is greater than the second distance. 6 . The VCSEL array of claim 3 , wherein a distance between a pair of adjacent VCSELs in the plurality of VCSELs is based on a distance between a center of the VCSEL array and the pair of adjacent VCSELs.

7. The VCSEL array according to claim 3, wherein: At least two VCSELs of the plurality of VCSELs have different aperture sizes.

8. The VCSEL array of claim 3, wherein the first axis of the first coordinate is orthogonal to the second axis of the second coordinate.

9. A vertical cavity surface emitting laser (VCSEL) array comprising: Multiple VCSELs, each VCSEL operates simultaneously and emits light of substantially the same wavelength, wherein a first distance between a first pair of adjacent VCSELs in the plurality of VCSELs is greater than a second distance between a second pair of adjacent VCSELs in the plurality of VCSELs, and the first pair of adjacent VCSELs is closer to the center of the VCSEL array than the second pair of adjacent VCSELs, The VCSEL array is an M×N array, where both M and N are greater than 1. wherein the first distance is a function of the distance between the center of the VCSEL array and a first pair of adjacent VCSELs, and in, The function is either a parabolic function or a linear function.

10. The VCSEL array of claim 9, wherein the difference between the first distance and the second distance is associated with reducing a difference in at least one of an operating temperature between the first pair of adjacent VCSELs and the second pair of adjacent VCSELs or an optical power output between the first pair of adjacent VCSELs and the second pair of adjacent VCSELs.

11. The VCSEL array of claim 9, wherein a distance between a pair of adjacent VCSELs in the plurality of VCSELs is based on a distance between a center of the VCSEL array and the pair of adjacent VCSELs.

12. The VCSEL array of claim 9, wherein the plurality of VCSELs have the same aperture size.

13. The VCSEL array according to claim 9, wherein: At least two VCSELs of the plurality of VCSELs have different aperture sizes.

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