Display device with input sensor having crosshatched elements

Abstract

A display device having an input sensor with cross line elements is provided. The display device includes a display panel including a plurality of unit pixel areas each having a quadrangular shape including a first diagonal line and a second diagonal line crossing the first diagonal line, and an input sensor including a plurality of first line elements and a plurality of second line elements defining a plurality of cross regions with the plurality of first line elements. A first group of elements among the plurality of first line elements and the plurality of second line elements are electrically connected to each other to define a first electrode. A second group of elements among the plurality of first line elements and the plurality of second line elements are electrically connected to each other to define a second electrode, and the second electrode is insulated from the first electrode while crossing the first electrode. A first angle defined by the first diagonal line and the second diagonal line is different from a second angle corresponding to the first angle defined by the plurality of first line elements and the plurality of second line elements in the plurality of cross regions.

Description

Technical Field

[0001] This disclosure relates to display devices. More specifically, this disclosure relates to display devices having an input sensor with cross-line elements. Background Technology

[0002] Multimedia electronic devices such as televisions, mobile phones, tablets, navigation units, and portable game consoles typically include a display device for showing images. In addition to conventional input methods such as buttons, keyboards, and mice, these display devices usually include input sensors that provide touch-based input methods, allowing users to easily and intuitively input information or commands into the display device.

[0003] Input sensors can be configured to sense touch or pressure generated by the user's body. Recently, active pointers have been used with such display devices because they provide users with a familiar way of inputting information, much like the use of pen and paper, and offer precise input well-suited for various applications, such as drawing applications. Summary of the Invention

[0004] The display device includes a display panel having multiple unit pixel regions and an input sensor. Each unit pixel region has a quadrilateral shape including a first diagonal and a second diagonal intersecting the first diagonal. The input sensor is arranged on the display panel and includes multiple first line elements and multiple second line elements defining multiple intersecting regions with the multiple first line elements. A first group of elements among the multiple first line elements and the multiple second line elements is electrically connected to each other to define a first electrode. A second group of elements among the multiple first line elements and the multiple second line elements is electrically connected to each other to define a second electrode. The second electrode is insulated from the first electrode while intersecting with the first electrode. A third group of elements among the multiple first line elements and the multiple second line elements defines a dummy electrode insulated from the first electrode and the second electrode. A first angle defined by the first diagonal and the second diagonal and a second angle corresponding to the first angle defined by the multiple first line elements and the multiple second line elements in the multiple intersecting regions are different from each other.

[0005] The width of the first electrode in the first region where the first electrode and the second electrode intersect can be substantially the same as the width of the first electrode in the second region where the first electrode and the second electrode do not intersect. Similarly, the width of the second electrode in the first region can be substantially the same as the width of the second electrode in the second region.

[0006] The display panel may include a base layer, transistors disposed on the base layer, light-emitting elements electrically connected to the transistors, and an encapsulation substrate facing the base layer and encapsulating the light-emitting elements. A plurality of first line elements and a plurality of second line elements may be disposed on the upper surface of the encapsulation substrate, and an adhesive layer may be omitted between the upper surface of the encapsulation substrate and the plurality of first line elements and the plurality of second line elements.

[0007] The multiple cross regions may include a first cross region and a second cross region. In the first cross region, one of the multiple first line elements and one of the multiple second line elements are disconnected, and another of the multiple first line elements and one of the multiple second line elements passes through the disconnected region. In the second cross region, one of the multiple first line elements is integrally disposed with one of the multiple second line elements.

[0008] A disconnected element may be included in one of the first group of elements and the second group of elements, and another element that crosses the disconnected area may be included in the other of the first group of elements and the second group of elements.

[0009] The display device may further include a bridging pattern. Multiple first intersection regions may be provided, and the bridging pattern may be arranged in at least one of the multiple first intersection regions and may be arranged on a layer different from the layer where the multiple first line elements and multiple second line elements are arranged. The bridging pattern can connect disconnected regions of a disconnected element arranged in at least one region.

[0010] Bridging patterns may include transparent conductive oxides.

[0011] The display device may further include a first signal line electrically connected to a first electrode. The first signal line may include a line portion and a pad portion disposed at an end of the line portion. The pad portion may include a first layer extending from the line portion and a second layer disposed on a different layer from the first layer and connected to the first layer. The second layer may include a material identical to the bridging pattern.

[0012] The first and second wire elements may include metallic materials.

[0013] A disconnected element may be included in a third group of elements, and another element that crosses the disconnected area may be included in either a first or second group of elements.

[0014] An element of a plurality of first line elements and an element of a plurality of second line elements may be included in a first group of elements, a second group of elements, or a third group of elements.

[0015] The display device may further include an input device that applies an input signal to an input sensor. The input sensor can sense user input in a first mode based on a change in capacitance between a first electrode and a second electrode, and can sense input via the input device in a second mode based on the input signal.

[0016] The first angle can be a right angle, and the second angle can be an acute angle or an obtuse angle.

[0017] Each of the multiple unit pixel regions may include multiple emission regions, and the multiple unit pixel regions may include the same number of emission regions in each other.

[0018] The display device includes a display panel for displaying an image and an input sensor disposed on the display panel. The input sensor includes a plurality of first electrodes disposed in a sensing region comprising a plurality of unit sensing regions arranged in a matrix, and a plurality of second electrodes intersecting the plurality of first electrodes. The plurality of first electrodes and the plurality of second electrodes are defined by a plurality of line elements. The plurality of line elements includes a plurality of first line elements extending in a first direction and a plurality of second line elements extending in a second direction intersecting the first direction and defining a plurality of intersection regions with the plurality of first line elements. The multiple electrode intersection regions of the plurality of first electrodes and the plurality of second electrodes are respectively disposed in the plurality of unit sensing regions. Each of the plurality of unit sensing regions includes a plurality of unit regions, each of the plurality of unit regions being defined by one intersection region disposed at the center of the corresponding unit region and four intersection regions closest to that one intersection region, and a plurality of corresponding unit regions are disposed in each of the plurality of unit sensing regions. The plurality of corresponding unit regions are arranged in each of the plurality of unit sensing regions in a matrix of N multiplied by M, where each of N and M is a multiple of 3, and N and M are each positive integers and distinct from each other.

[0019] Multiple first electrodes may extend in a third direction and may be arranged in a fourth direction intersecting the third direction. Each of the multiple unit sensing regions may have a first width in the third direction and a second width in the fourth direction. The third width of each of the multiple first electrodes in the fourth direction may be substantially the same as the second width, and the fourth width of each of the multiple second electrodes in the third direction may be substantially the same as the first width.

[0020] Multiple first electrodes may extend in a third direction and may be arranged in a fourth direction intersecting the third direction. Each of the multiple unit sensing regions may have a first width in the third direction and a second width in the fourth direction, a third width of each of the multiple first electrodes in the fourth direction may be less than the second width, and a fourth width of each of the multiple second electrodes in the third direction may be less than the first width.

[0021] Multiple first electrodes may extend in a third direction and may be arranged in a fourth direction intersecting the third direction. Here, N may be greater than M, and the first width of each of the multiple cell regions in the third direction may be greater than the second width of each of the multiple cell regions in the fourth direction.

[0022] The display device may further include a plurality of dummy electrodes insulated from a plurality of first electrodes and a plurality of second electrodes. The plurality of dummy electrodes may be defined by a plurality of line elements, and the intersection region defining the boundaries of the plurality of first electrodes, the plurality of second electrodes and the plurality of dummy electrodes among the plurality of intersection regions may allow one of the corresponding first line elements among the plurality of first line elements and one of the corresponding second line elements among the plurality of second line elements to be disconnected, and allow another of the corresponding first line elements among the plurality of first line elements and one of the corresponding second line elements among the plurality of second line elements to pass through the disconnected region.

[0023] A first group of elements among a plurality of first line elements may define a plurality of first electrode lines extending in a first direction in a plurality of unit sensing regions, and a second group of elements among a plurality of first line elements may define a plurality of second electrode lines extending in a first direction in a plurality of unit sensing regions.

[0024] The first electrode line can be configured as multiple, and the second electrode line can be closer to one of the two first electrode lines that are closest to each other in the second direction than the other first electrode line.

[0025] Multiple first electrode lines and multiple second electrode lines can be configured, and the length of the longest first electrode line among the multiple first electrode lines can be substantially the same as the length of the longest second electrode line among the multiple second electrode lines.

[0026] Multiple first electrode lines and multiple second electrode lines can be configured, and the length of the longest first electrode line among the multiple first electrode lines can be less than the length of the longest second electrode line among the multiple second electrode lines.

[0027] A first group of elements among a plurality of first line elements may define a plurality of first electrode lines extending in a first direction within a plurality of unit sensing regions. A second group of elements among a plurality of first line elements may define a plurality of second electrode lines extending in the first direction within a plurality of unit sensing regions. A first group of elements among a plurality of second line elements may define a plurality of third electrode lines extending in a second direction within a plurality of unit sensing regions. A second group of elements among a plurality of second line elements may define a plurality of fourth electrode lines extending in a second direction within a plurality of unit sensing regions. The smallest polygonal shape defined by the plurality of first electrode lines and the plurality of third electrode lines may have a first area. The smallest polygonal shape defined by the plurality of second electrode lines and the plurality of fourth electrode lines may have a second area. The first area may be larger than the second area.

[0028] The display device includes: a display panel having a plurality of quadrilateral-shaped pixels and a touch sensor layer disposed on the display panel. The touch sensor layer includes a plurality of first electrodes, each having a rhombus shape, and a plurality of second electrodes, each having a rhombus shape. The plurality of second electrodes are insulated from and intersect with the plurality of first electrodes. A plurality of dummy electrodes are insulated from both the plurality of first electrodes and the plurality of second electrodes.

[0029] The display panel may include a packaging substrate, and multiple first electrodes or multiple second electrodes may be directly disposed on the packaging substrate without an adhesive layer disposed between the multiple first electrodes or multiple second electrodes and the packaging substrate.

[0030] Multiple electrodes of any one of the plurality of first electrodes and the plurality of second electrodes may have an open rhomboid shape.

[0031] Multiple electrodes of any one of the plurality of first electrodes and the plurality of second electrodes may have a closed rhomboid shape. Attached Figure Description

[0032] The above and other aspects of this disclosure will become readily apparent when considered in conjunction with the accompanying drawings, and by referring to the following detailed description, in which:

[0033] Figure 1A This is a perspective view showing an electronic device according to an embodiment of the present disclosure;

[0034] Figure 1B This is an exploded perspective view showing an electronic device according to an embodiment of the present disclosure;

[0035] Figure 2A and Figure 2B It is along the electronic device shown Figure 1B A cross-sectional view taken from line I-I';

[0036] Figure 2C and Figure 2D It is along the electronic device shown Figure 1B A cross-sectional view taken from line I-I';

[0037] Figure 3A This is a block diagram illustrating the operation of an electronic device according to an embodiment of the present disclosure;

[0038] Figure 3B It is shown Figure 3A Block diagram of the input device shown;

[0039] Figure 4 This is an enlarged cross-sectional view showing a display device according to an embodiment of the present disclosure;

[0040] Figure 5 This is a plan view showing an input sensor according to an embodiment of the present disclosure;

[0041] Figure 6 This is a schematic diagram illustrating the operation of the input sensor in the first mode;

[0042] Figure 7A and Figure 7B This is a schematic diagram illustrating the operation of the input sensor in the second mode;

[0043] Figure 8A It is shown Figure 5 A plan view of the input sensor shown;

[0044] Figure 8B It is shown Figure 8A A magnified plan view of the four unit sensing areas shown;

[0045] Figure 8C It is shown Figure 8B An enlarged plan view of a unit sensing area shown in the figure;

[0046] Figure 8D It is shown Figure 8C An enlarged plan view of the unit region shown;

[0047] Figure 8E It is shown Figure 8C An enlarged plan view of the first intersection region shown;

[0048] Figure 8F It is along Figure 8E A cross-sectional view taken from line II-II';

[0049] Figure 8G It is shown Figure 8C An enlarged plan view of the second intersection region shown;

[0050] Figure 8H It is shown Figure 8C An enlarged plan view of the third intersection region shown;

[0051] Figure 8I It is shown Figure 8C An enlarged plan view of the fourth intersection region shown;

[0052] Figure 8J It is shown Figure 8C An enlarged plan view of a portion;

[0053] Figure 8K It is shown Figure 5 An enlarged plan view of the pad area shown;

[0054] Figure 8L It is along Figure 8K The cross-sectional view taken by line III-III' shown;

[0055] Figure 9A and Figure 9B This is an enlarged plan view showing the unit sensing area according to an embodiment of the present disclosure; and

[0056] Figure 10A and Figure 10B This is an enlarged plan view showing a unit region according to an embodiment of the present disclosure. Detailed Implementation

[0057] In this disclosure, it should be understood that when an element or layer is referred to as being “on,” “connected to,” or “linked to” another element or layer, the element or layer can be directly on, directly connected to, or directly linked to the other element or layer, or an intermediary element or layer may be present.

[0058] Throughout the specification and accompanying drawings, similar reference numerals may indicate similar elements. In the drawings, for the effective description of the technical content, the thickness, scale, and dimensions of parts may be exaggerated.

[0059] As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0060] It should be understood that although the terms first, second, etc., may be used herein to describe various elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not necessarily be limited by these terms. These terms are used only to distinguish one element, component, area, layer, or part from another. Therefore, the first element, component, area, layer, or part discussed below may be referred to as the second element, component, area, layer, or part without departing from the teachings of this disclosure. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the,” as used herein, are intended to include the plural forms as well.

[0061] Spatial relative terms, such as “lower,” “above,” and “upper,” may be used in this document for descriptive convenience to describe the relationship between one element or feature and another element(s) as shown in the figure.

[0062] It should also be understood that the terms “include” and / or “including” as used in this specification indicate the presence of the stated features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0063] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0064] Figure 1A This is a perspective view showing an electronic device ELD according to an embodiment of the present disclosure, and Figure 1B This is an exploded perspective view showing an electronic device ELD according to an embodiment of the present disclosure. Figure 2A and Figure 2B It is along the electronic device shown Figure 1B The cross-sectional view taken from line I-I'. Figure 2C and Figure 2D It is along the electronic device shown Figure 1B The cross-sectional view taken from line I-I'.

[0065] Reference Figure 1A and Figure 1B An electronic device (ELD) can be activated in response to an electrical signal. ELDs can be implemented in various ways. For example, ELDs can be used in electronic products such as smartphones, tablets, laptops, computer monitors, and smart TVs.

[0066] The electronic device ELD displays an image IM via a display surface IS that is substantially parallel to each of the first direction DR1 and the second direction DR2. The display surface IS through which the image IM is displayed corresponds to the front surface of the electronic device ELD. The image IM may be a video image and / or a still image.

[0067] According to the embodiment, the front (or upper) surface and the rear (or lower) surface of each component are defined relative to the direction of the displayed image IM. The front and rear surfaces are opposite to each other on a third direction DR3, and the normal direction of each of the front and rear surfaces may be substantially parallel to the third direction DR3.

[0068] The spacing between the front and rear surfaces in the third direction DR3 corresponds to the thickness of the electronic device ELD in the third direction DR3. The directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 can be changed to align with... Figure 1A Other directions that are different from the directions specified in the text.

[0069] An electronic device ELD can sense external input applied to it. External input can be one or more of various types of input provided from outside the electronic device ELD. According to an embodiment, the electronic device ELD can sense a first input TC1 applied to it by a user US. The first input TC1 of the user US can be an input generated by the user US's finger and can include all inputs that cause changes in capacitance, such as inputs from using the user US's body. The first input TC1 can include input generated by a passive type of input device, such as a passive stylus. The electronic device ELD can sense the first input TC1 of the user US applied to the side or rear surface of the electronic device ELD depending on the structure of the electronic device ELD, and the invention is not necessarily limited to a particular embodiment.

[0070] Additionally, according to an embodiment, the electronic device ELD can sense a second input TC2 that is different from the first input TC1. The second input TC2 may include input generated by an input device AP (e.g., a stylus pen, an active stylus pen, a stylus stylus, an electronic pen, etc.). Hereinafter, the second input TC2 is described as an input signal provided by an active stylus pen.

[0071] The front surface of an electronic device (ELD) may include an image area IA and a border area BZA. The image area IA may be the area through which an image IM is displayed. The user can view the image IM through the image area IA. In an embodiment, the image area IA may have a quadrilateral shape with rounded vertices; however, this is merely an example and the invention is not necessarily limited to this particular example. The image area IA may have various shapes and the invention is not necessarily limited to an image area IA with a specific shape.

[0072] The border region BZA may be adjacent to the image region IA. The border region BZA may have a predetermined color. The border region BZA may at least partially surround the image region IA. Accordingly, the image region IA may have a shape defined by the border region BZA; however, this is merely an example and the invention is not necessarily limited to this particular example, and the border region BZA may be arranged to be adjacent only to one side of the image region IA, or the border region BZA may be omitted. According to embodiments of this disclosure, the electronic device ELD may be implemented in various different forms, and the invention is not necessarily limited to using any particular electronic device ELD.

[0073] like Figure 1B As shown, the electronic device ELD may include a display device DD, a window WM disposed on the display device DD, and a housing EDC. The display device DD may include a display panel DP and an input sensor ISP.

[0074] According to embodiments of this disclosure, the display panel DP can be a light-emitting display panel; however, the present invention is not limited to the use of light-emitting display panels. For example, the display panel DP can be an organic light-emitting display panel or a quantum dot light-emitting display panel. The light-emitting layer of an organic light-emitting display panel may include organic light-emitting materials. The light-emitting layer of a quantum dot light-emitting display panel may include quantum dots and / or quantum rods. Hereinafter, organic light-emitting display panels are described as examples of display panel DPs.

[0075] The input sensor ISP can be arranged on the display panel DP and can obtain coordinate information of external inputs (e.g., first input TC1 and / or second input TC2). The input sensor ISP is described in detail below.

[0076] The display device DD may include a main circuit board MCB, a flexible circuit film FCB, and a driver chip DIC. One or more of the main circuit board MCB, flexible circuit film FCB, and driver chip DIC may be omitted. The main circuit board MCB may be connected to the flexible circuit film FCB, and the flexible circuit film FCB may be electrically connected to the display panel DP. The main circuit board MCB may include multiple driving elements. Driving elements may include circuitry portions that drive the display panel DP. The flexible circuit film FCB may be connected to the display panel DP to electrically connect the display panel DP to the main circuit board MCB. The driver chip DIC may be mounted on the flexible circuit film FCB.

[0077] The flexible circuit film FCB can be bent to allow the main circuit board MCB to face the rear surface of the display device DD. The main circuit board MCB can be electrically connected to other electronic modules of the electronic device ELD via connectors.

[0078] The driver chip (DIC) may include driving elements, such as data driving circuitry, for driving the pixels of the display panel (DP). In embodiments of this disclosure, a flexible circuit film (FCB) is shown; however, the invention is not limited to having only one flexible circuit film (FCB). For example, multiple flexible circuit films (FCBs) may be provided, and multiple flexible circuit films may be connected to the display panel (DP). Figure 1B The invention illustrates a structure in which a driver chip DIC is mounted on a flexible circuit film FCB; however, the invention is not limited to having a driver chip DIC mounted on a flexible circuit film FCB. For example, the driver chip DIC can be directly disposed on a display panel DP. A portion of the display panel DP can be bent, and the portion of the display panel DP in which the driver chip DIC is mounted can be arranged to face the rear surface of the display device DD.

[0079] The input sensor ISP can be electrically connected to the main circuit board MCB via an additional flexible circuit film; however, the invention is not limited to this specific example. The input sensor ISP can be electrically connected to the display panel DP, and the display panel DP can be electrically connected to the main circuit board MCB via a flexible circuit film FCB. The conductive structure for electrically connecting the input sensor ISP to the display panel DP can be applied to a display device DD.

[0080] The window WM may include a transparent material through which a visible image IM is transmitted. For example, the base layer of the window WM may include glass, sapphire, or plastic materials that transmit visible light. The window WM may have a single-layer structure. However, the invention is not limited to window WMs with a single-layer structure, and the window WM may include multiple layers (e.g., it may have a multi-layer structure).

[0081] The housing EDC can serve as a bottom protective structure for the electronic device ELD. The housing EDC can be attached to the window WM. The housing EDC absorbs impacts applied from the outside and prevents foreign objects and moisture from entering the display device DD, thus protecting the components installed within the housing EDC. The housing EDC can be formed from a single continuous structure or may comprise several structures connected to each other.

[0082] According to the implementation, the electronic device ELD may also include an electronic module, a power module, and a bracket. The electronic module includes various functional modules to drive the display device DD. The power module supplies the power required for the overall operation of the electronic device ELD. The bracket is connected to the display device DD and / or the housing EDC to separate the internal space of the electronic device ELD.

[0083] The above components can be bonded by the adhesive layer ADL (see reference). Figure 2AThe adhesive layers (ADLs) are interconnected. The ADL may include an optically clear adhesive film (OCA). However, the ADL is not limited to OCA, and may include conventional adhesives. For example, the ADL may include an optically clear resin (OCR) or a pressure-sensitive adhesive film (PSA).

[0084] An anti-reflective layer may also be disposed between the window WM and the display device DD. The anti-reflective layer reduces the reflectivity of external light incident on the window WM from above. According to embodiments of this disclosure, the anti-reflective layer may include a retarder and a polarizer. The retarder may be film-type or liquid crystal coating-type and may include a half-wave (λ / 2) retarder and / or a quarter-wave (λ / 4) retarder. The polarizer may be film-type or liquid crystal coating-type. A film-type polarizer may include a stretched synthetic resin film, and a liquid crystal coating-type polarizer may include liquid crystals arranged in a predetermined orientation. The retarder and polarizer may be implemented as a single polarizing film. In embodiments of this disclosure, the anti-reflective layer may be disposed directly on the input sensor ISP or the display panel DP. The retarder and / or polarizer may include a color filter that is internalized (e.g., as part of an element).

[0085] The display device DD can display an image in response to an electrical signal and can send / receive information about external input. The display device DD may include an active area AA and a peripheral area NAA. An image can be displayed through the active area AA, and external input can be sensed within the active area AA. The active area AA and the peripheral area NAA may respectively correspond to... Figure 1A The image region IA and the border region BZA are shown (and can be aligned with them). In the following description, the statement "region / part corresponds to another region / part" means "region / part overlaps with another region / part", but the statement is not limited to "region / part has the same area and / or the same shape as another region / part".

[0086] The peripheral region NAA may be defined as being adjacent to the effective region AA. For example, the peripheral region NAA may at least partially surround the effective region AA. However, this is merely an example, and the invention is not limited to this specific example, and the peripheral region NAA may be defined in various shapes. According to an embodiment, the effective region AA of the display device DD may correspond to at least a portion of the image region IA.

[0087] Reference Figure 2A The input sensor ISP can be directly disposed on the display panel DP. According to embodiments of this disclosure, the input sensor ISP can be formed on the display panel DP through a continuous process. For example, when the input sensor ISP is directly disposed on the display panel DP, an adhesive layer may not be disposed between the input sensor ISP and the display panel DP. However, as... Figure 2BAs shown, an adhesive layer (ADL) may be disposed between the input sensor ISP and the display panel DP. In this case, the input sensor ISP and the display panel DP may not be formed by a continuous process, and the input sensor ISP may be fixed to the upper surface of the display panel DP by the adhesive layer ADL after being formed by a separate process from the display panel DP.

[0088] like Figure 2A As shown, the window WM may include a light-blocking pattern WBM to define the border area BZA (see reference). Figure 1A The light-blocking pattern WBM can be a colored organic layer and can be formed on the lower surface of the base layer WM-BS by coating.

[0089] like Figure 2C As shown, the display panel DP may include a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, a packaging substrate ES, and a sealant SM that bonds the base layer BL and the packaging substrate ES to each other.

[0090] The base layer BL may include at least one plastic film. The base layer BL may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate. According to embodiments, the base layer BL may be a thin-film glass substrate having a thickness on the order of tens to hundreds of micrometers. The base layer BL may have a multilayer structure. For example, the base layer BL may include a multilayer structure of a polyimide layer / at least one inorganic layer / polyimide layer.

[0091] The circuit element layer DP-CL may include at least one insulating layer and circuit elements. The insulating layer may include at least one inorganic layer and at least one organic layer. The circuit elements may include signal lines and pixel driving circuitry. This will be described in detail below.

[0092] The display element layer of a DP-OLED may include at least a light-emitting element, such as an organic light-emitting diode. The display element layer of a DP-OLED may also include an organic layer, such as a pixel defining layer.

[0093] The encapsulation substrate ES can be spaced from the display element layer DP-OLED by a predetermined size gap GP (refer to...). Figure 4 The base layer BL and the encapsulation substrate ES may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate. The sealant SM may include an organic adhesive or a glass frit. The gap GP may be filled with a predetermined material. For example, the gap GP may be filled with a desiccant or a resin material.

[0094] like Figure 2DAs shown, the display panel DP may include a base layer BL, a circuit element layer DP-CL disposed on the base layer BL, a display element layer DP-OLED, and an upper insulating layer TFL. The upper insulating layer TFL may include multiple thin layers. Some layers may be disposed to improve optical efficiency, and other layers may be disposed to protect the organic light-emitting diode. The upper insulating layer TFL may include at least an inorganic layer / organic layer / inorganic layer.

[0095] Figure 3A This is a block diagram illustrating the operation of an electronic device ELD according to an embodiment of the present disclosure, and Figure 3B It is shown Figure 3A The block diagram of the input device AP shown is shown.

[0096] Reference Figure 3A and Figure 3B According to embodiments of this disclosure, the electronic device ELD further includes a main controller 200 that drives the display device DD and a sensor controller 100 connected to the input sensor ISP. The main controller 200 can drive the sensor controller 100. According to embodiments of this disclosure, the main controller 200 and the sensor controller 100 can each be mounted on a main circuit board MCB (see reference 100). Figure 1B According to embodiments of this disclosure, the sensor controller 100 may be built into the driver chip DIC (see reference 100). Figure 1B )middle.

[0097] The input sensor ISP may include sensing electrodes. The sensing electrodes may include a first set of sensing electrodes and a second set of sensing electrodes. The input sensor ISP is described in detail below.

[0098] The sensor controller 100 can be connected to the sensing electrodes of the input sensor ISP. The sensor controller 100 can operate the input sensor ISP in a first mode to sense a first input TC1 and in a second mode to sense a second input TC2.

[0099] like Figure 3B As shown, the input device AP may include a housing 11, a conductive tip 12, and a communication module 13. The housing 11 may have a pen shape and may be provided with a receiving space defined therein. The conductive tip 12 may protrude outward through one side of an opening in the housing 11. The conductive tip 12 may be the portion of the input device AP that directly contacts the input sensor ISP.

[0100] The communication module 13 may include a transmitting circuit 13a and a receiving circuit 13b. The transmitting circuit 13a can transmit downlink signals to the sensor controller 100. The downlink signals may include the position of the input device AP relative to the flat surface of the window WM, the slope of the input device AP relative to the flat surface of the window WM, status information, etc. When the input device AP is in contact with the input sensor ISP, the sensor controller 100 can receive the downlink signals via the input sensor ISP.

[0101] The receiving circuit 13b can receive uplink signals from the sensor controller 100. The uplink signals may include information such as panel information and protocol version. The sensor controller 100 can provide the uplink signals to the input sensor ISP, and the input device AP can receive the uplink signals by contacting the input sensor ISP.

[0102] The input device AP also includes an input controller 14 to drive the input device AP. The input controller 14 can be configured to operate according to a specific program. A transmitting circuit 13a receives signals provided from the input controller 14 and modulates the signals into signals that can be sensed by the input sensor ISP, and a receiving circuit 13b modulates signals applied to it via the input sensor ISP into signals that can be processed by the input controller 14. The input device AP may also include a power module 15 to supply power to the input device AP.

[0103] Figure 4 This is an enlarged cross-sectional view showing a display device DD according to an embodiment of the present disclosure.

[0104] Reference Figure 4 The display device DD may include a display panel DP and an input sensor ISP directly disposed on the display panel DP. An adhesive layer may not be disposed between the display panel DP and the input sensor ISP. The display panel DP may include a base layer BL, a circuit element layer DP-CL, a display element layer DP-OLED, and a packaging substrate ES.

[0105] The base layer BL provides a base surface on which the circuit element layer DP-CL can be disposed. The circuit element layer DP-CL can be disposed on the base layer BL. The circuit element layer DP-CL may include an insulating layer, semiconductor patterns, conductive patterns, and signal lines. The insulating layer, semiconductor layer, and conductive layer can be formed on the base layer BL by a coating or deposition process. Then, the insulating layer, semiconductor layer, and conductive layer can be selectively patterned by one or more photolithography processes. The semiconductor patterns, conductive patterns, and signal lines included in the circuit element layer DP-CL can be formed in the following way.

[0106] At least one inorganic layer may be formed on the upper surface of the base layer BL. The inorganic layer may include alumina, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and / or hafnium oxide. The inorganic layer may be formed in multiple layers. The inorganic layer may form a barrier layer and / or a buffer layer. According to an embodiment, the display panel DP may include a buffer layer BFL.

[0107] The buffer layer BFL can increase the bonding force between the base layer BL and the semiconductor pattern. The buffer layer BFL may include a silicon oxide layer and a silicon nitride layer, and the silicon oxide layer and silicon nitride layer may be stacked alternately on top of each other.

[0108] Semiconductor patterns can be disposed on the buffer layer BFL. The semiconductor patterns may include polysilicon; however, the invention is not limited to using semiconductor patterns comprising polysilicon. Semiconductor patterns may include amorphous silicon or metal oxide.

[0109] Figure 4 Only a portion of the semiconductor pattern is shown, and the semiconductor pattern can also be arranged in other areas. The semiconductor pattern can be arranged across multiple pixels according to a specific configuration. Depending on whether the semiconductor pattern is doped and whether it is doped with N-type or P-type dopant, the semiconductor pattern can have different electrical properties. The semiconductor pattern may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with either N-type or P-type dopant. A P-type transistor may include a doped region doped with P-type dopant. Compared to the first region, the second region may be undoped, or it may be doped with a lower concentration of dopant.

[0110] The first region may have a higher conductivity than the second region and may be substantially used as an electrode or signal line. The second region may substantially correspond to the active region (or channel region) of a transistor. For example, a portion of the semiconductor pattern may be the active region of a transistor, and other portions of the semiconductor pattern may be the source or drain regions of a transistor.

[0111] Each pixel can have an equivalent circuit including seven transistors, a capacitor, and a light-emitting element, and the equivalent circuit can be changed in various ways. Figure 4 The image shows a transistor TR and a light-emitting element ED included in a pixel.

[0112] The source region SR, channel region CHR, and drain region DR of a transistor TR can be formed by a semiconductor pattern. In a cross-sectional view, the source region SR and drain region DR can extend from the channel region CHR in opposite directions. Figure 4 A portion of the signal line SCL is shown, which is arranged on the same layer as the semiconductor pattern. When viewed in a plane, the signal line SCL is electrically connected to the transistor TR.

[0113] A first insulating layer IL1 may be disposed on the buffer layer BFL. The first insulating layer IL1 may overlap with multiple pixels (e.g., a single first insulating layer IL1 may overlap with all pixels) and may at least partially cover the semiconductor pattern. The first insulating layer IL1 may be an inorganic layer and / or an organic layer and may have a single-layer or multi-layer structure. The first insulating layer IL1 may include aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and / or hafnium oxide. According to an embodiment, the first insulating layer IL1 may have a single-layer structure of silicon oxide. Not only the first insulating layer IL1, but also the insulating layer of the circuit element layer DP-CL, described later below, may be an inorganic layer and / or an organic layer and may have a single-layer or multi-layer structure. The inorganic layer may include at least one of the above materials; however, the invention is not necessarily limited thereto.

[0114] The gate GE of the transistor TR may be disposed on the first insulating layer IL1. The gate GE may be part of a metal pattern. The gate GE may at least partially overlap with the channel region CHR. The gate GE may be used as a mask in the process of doping the semiconductor pattern.

[0115] The second insulating layer IL2 may be disposed on the first insulating layer IL1 and may at least partially cover the gate GE. The second insulating layer IL2 may overlap with multiple pixels (e.g., a single second insulating layer IL2 may overlap with all pixels). The second insulating layer IL2 may be an inorganic layer and / or an organic layer and may have a single-layer or multi-layer structure. According to an embodiment, the second insulating layer IL2 may have a single-layer structure of silicon oxide layer.

[0116] A third insulating layer IL3 may be disposed on the second insulating layer IL2. According to an embodiment, the third insulating layer IL3 may have a single-layer structure of silicon oxide. A first connection electrode CNE1 may be disposed on the third insulating layer IL3. The first connection electrode CNE1 may be connected to the signal line SCL through a contact hole CNT1 defined by the first insulating layer IL1, the second insulating layer IL2, and the third insulating layer IL3.

[0117] A fourth insulating layer IL4 may be disposed on the third insulating layer IL3. The fourth insulating layer IL4 may have a single-layer structure of silicon oxide. A fifth insulating layer IL5 may be disposed on the fourth insulating layer IL4. The fifth insulating layer IL5 may be an organic layer.

[0118] A second connection electrode CNE2 may be disposed on the fifth insulating layer IL5. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CNT2 defined by the fourth insulating layer IL4 and the fifth insulating layer IL5.

[0119] A sixth insulating layer IL6 may be disposed on the fifth insulating layer IL5 and may at least partially cover the second connecting electrode CNE2. The sixth insulating layer IL6 may be an organic layer. The display element layer DP-OLED may be disposed on the circuit element layer DP-CL. The display element layer DP-OLED may include a light-emitting element ED. For example, the display element layer DP-OLED may include organic light-emitting materials, quantum dots, quantum rods, micro LEDs, or nano LEDs. The light-emitting element ED may include a first electrode AE, an emitting layer EL, and a second electrode CE.

[0120] The first electrode AE ​​can be disposed on the sixth insulating layer IL6. The first electrode AE ​​can be connected to the second connecting electrode CNE2 through the contact hole CNT3 defined by the sixth insulating layer IL6.

[0121] A pixel defining layer IL7 may be disposed on a sixth insulating layer IL6 and may cover a portion of the first electrode AE. An opening OP7 may be defined by the pixel defining layer IL7. At least a portion of the first electrode AE ​​may be exposed through the opening OP7 of the pixel defining layer IL7. According to an embodiment, an emitting region PXA may correspond to the portion of the first electrode AE ​​exposed through the opening OP7. A non-emitting region NPXA may at least partially surround the emitting region PXA.

[0122] An emitting layer EL may be disposed on a first electrode AE. The emitting layer EL may be disposed within an opening OP7. For example, the emitting layer EL may be formed in each of a plurality of pixels after being divided into multiple portions. When the emitting layer EL is formed in each of a plurality of pixels after being divided into multiple portions, each of the plurality of emitting layer ELs may emit light having at least one color selected from blue, red, and green; however, the invention is not necessarily limited thereto or thereby. The emitting layer EL may be connected to a plurality of pixels and may be provided publicly. In this case, the emitting layer EL may provide blue light or white light.

[0123] The second electrode CE can be disposed on the emitter layer EL. The second electrode CE can have a monolithic shape and can be disposed commonly across multiple pixels. A common voltage can be applied to the second electrode CE, and the second electrode CE can be referred to as the common electrode.

[0124] A hole control layer may be disposed between the first electrode AE ​​and the emitter layer EL. The hole control layer may be commonly disposed within the emitter region PXA and the non-emitter region NPXA. The hole control layer may include a hole transport layer and may also include a hole injection layer. An electron control layer may be disposed between the emitter layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may also include an electron injection layer. The hole control layer and the electron control layer may be commonly formed in multiple pixels using an aperture mask.

[0125] The input sensor ISP can be directly formed on the upper surface of the package substrate ES via a continuous process. The input sensor ISP may include a first conductive layer ICL1, a first sensor insulating layer IIL1, a second conductive layer ICL2, and a second sensor insulating layer IIL2. According to embodiments of this disclosure, an inorganic layer may also be disposed between the upper surface of the package substrate ES and the first conductive layer ICL1.

[0126] Each of the first conductive layer ICL1 and the second conductive layer ICL2 may have a monolayer structure or a multilayer structure of multiple layers stacked on the third-direction DR3. The conductive layer with a monolayer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include transparent conductive oxides, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium zinc tin oxide (ITZO), etc. Alternatively, the transparent conductive layer may include conductive polymers such as poly(3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, graphene, etc.

[0127] A conductive layer with a multilayer structure may include multiple metal layers. These multiple metal layers may have a titanium / aluminum / titanium three-layer structure. A conductive layer with a multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0128] The first sensor insulating layer IIL1 may at least partially cover the first conductive layer ICL1, and the second sensor insulating layer IIL2 may at least partially cover the second conductive layer ICL2. The first sensor insulating layer IIL1 and the second sensor insulating layer IIL2 have a single-layer structure; however, the present invention is not necessarily limited thereto or thereby restricted.

[0129] The first sensor insulating layer IIL1 and / or the second sensor insulating layer IIL2 may include an inorganic layer. The inorganic layer may include aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and / or hafnium oxide.

[0130] The first sensor insulating layer IIL1 and / or the second sensor insulating layer IIL2 may include an organic layer. The organic layer may include acrylic resins, methacrylic resins, polyisoprene, ethylene resins, epoxy resins, urethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and / or perylene resins.

[0131] Figure 5 This is a plan view showing an input sensor ISP according to an embodiment of the present disclosure. Figure 6 This is a schematic diagram illustrating the operation of the input sensor in the first mode. Figure 7A and Figure 7B This is a schematic diagram illustrating the operation of the input sensor in the second mode. In the following text, refer to... Figure 3A , Figure 5 , Figure 6 , Figure 7A and Figure 7B The input sensor ISP is described in detail.

[0132] Reference Figure 3A and Figure 5 The input sensor ISP can include a sensing area ISA and a non-sensing area NSA. The sensing area ISA can be activated in response to an electrical signal. The sensing area ISA and the non-sensing area NSA can respectively correspond to Figure 1B The effective area AA and the peripheral area NAA of the display device DD shown are illustrated.

[0133] The input sensor ISP may include first sensing electrodes SE1_1 to SE1_n (hereinafter referred to as first electrodes SE1_1 to SE1_n or first electrode SE1) and second sensing electrodes SE2_1 to SE2_m (hereinafter referred to as second electrodes SE2_1 to SE2_m or second electrode SE2). The first electrodes SE1_1 to SE1_n may be electrically insulated from and may intersect with the second electrodes SE2_1 to SE2_m. The area where the first electrodes SE1_1 to SE1_n intersect with the second electrodes SE2_1 to SE2_m may be defined as an electrode intersection region ECA. The area where the first electrodes SE1_1 to SE1_n do not intersect with the second electrodes SE2_1 to SE2_m may be defined as a non-intersection region N-CA. According to the embodiments, the first electrodes SE1_1 to SE1_n may be longer than the second electrodes SE2_1 to SE2_m, and the number of first electrodes SE1_1 to SE1_n may be less than the number of second electrodes SE2_1 to SE2_m. However, the present invention is not necessarily limited thereto or thereby restricted.

[0134] Each of the first electrodes SE1_1 to SE1_n may have a strip or band shape and may extend primarily in the first direction DR1. The first electrodes SE1_1 to SE1_n may be arranged in the second direction DR2 and may be spaced apart from each other. The first electrodes SE1_1 to SE1_n may have a substantially constant width W1 in the second direction DR2. The spacing between the first electrodes SE1_1 to SE1_n in the second direction DR2 may be constant.

[0135] Each of the second electrodes SE2_1 to SE2_m may have a strip or band shape and may extend in the second direction DR2. The second electrodes SE2_1 to SE2_m may be arranged in the first direction DR1 and may be spaced apart from each other. The second electrodes SE2_1 to SE2_m may have a substantially constant width W2 in the first direction DR1. The spacing between the second electrodes SE2_1 to SE2_m in the first direction DR1 may be constant.

[0136] The input sensor ISP obtains information about the first input TC1 (referencing) based on the capacitance change between the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m. Figure 3A In the first mode of information, or in the input sensor ISP obtaining information about the second input TC2 (refer to) based on the capacitance changes of each of the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m,... Figure 3A In the second mode of the information, the ISP can be operated.

[0137] The input sensor ISP may further include a plurality of first sensing signal lines SL1_1 to SL1_n (hereinafter referred to as first signal lines SL1_1 to SL1_n or first signal lines SL1) and a plurality of second sensing signal lines SL2_1 to SL2_m (hereinafter referred to as second signal lines SL2_1 to SL2_m or second signal lines SL2). The first signal lines SL1_1 to SL1_n and the second signal lines SL2_1 to SL2_m may be arranged in the non-sensing region NSA. The first signal lines SL1_1 to SL1_n may be electrically connected to both sides of the first electrodes SE1_1 to SE1_n, respectively, and the second signal lines SL2_1 to SL2_m may be electrically connected to one side of the second electrodes SE2_1 to SE2_m. According to another embodiment of this disclosure, the first signal lines SL1_1 to SL1_n may be connected only to one side of the first electrodes SE1_1 to SE1_n.

[0138] The first electrodes SE1_1 to SE1_n can be electrically connected to the sensor controller 100 via first signal lines SL1_1 to SL1_n, and the second electrodes SE2_1 to SE2_m can be electrically connected to the sensor controller 100 via second signal lines SL2_1 to SL2_m. Each of the first signal lines SL1_1 to SL1_n and each of the second signal lines SL2_1 to SL2_m may include a line portion LP and a pad portion PP. The pad portion PP can be connected to... Figure 1B The flexible circuit film FCB shown is illustrated.

[0139] In a first mode, according to an embodiment of this disclosure, one of the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m is operable as a transmitting electrode, and the other of the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m is operable as a receiving electrode. Figure 6 In the diagram, the second electrodes SE2_1 and SE2_2 are shown as receiving electrodes. Figures 6 to 7B Two electrodes SE1_1 and SE1_2 from the first electrodes SE1_1 to SE1_n, and two electrodes SE2_1 and SE2_2 from the second electrodes SE2_1 to SE2_m are shown. In a first mode, the sensor controller 100 can sense changes in the mutual capacitance between the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m to sense external input.

[0140] In the first mode, the sensor controller 100 can apply drive signals TS1 and TS2 to the first electrodes SE1_1 and SE1_2. Drive signals TS1 and TS2 are shown as being applied to the first ends of the first electrodes SE1_1 and SE1_2; however, drive signals TS1 and TS2 can be applied substantially simultaneously to both ends of each of the first electrodes SE1_1 and SE1_2. In the first mode, the sensor controller 100 can receive sensing signals RS1 and RS2 from the second electrodes SE2_1 and SE2_2. Accordingly, the sensor controller 100 can compare the drive signals TS1 and TS2 with the sensing signals RS1 and RS2 corresponding to the drive signals TS1 and TS2, and can generate coordinate values ​​providing the position of the first input TC1 based on the changes between them.

[0141] Reference Figure 5 , Figure 7A and Figure 7B When the input device AP approaches the input sensor ISP, the input sensor ISP can enter a second mode to sense the second input TC2. The input device AP can communicate data with the sensor controller 100 through the input sensor ISP.

[0142] In the second mode, each of the first electrodes SE1_1 and SE1_2 and the second electrodes SE2_1 and SE2_2 can be used as a transmitting electrode to provide uplink signals TSa, TSb, TSc, and TSd from the sensor controller 100 to the input device AP. In the second mode, each of the first electrodes SE1_1 and SE1_2 and the second electrodes SE2_1 and SE2_2 can be used as a receiving electrode to provide downlink signals RSa, RSb, RSc, and RSd from the input device AP to the sensor controller 100. For example, all of the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m can be used as either transmitting or receiving electrodes in the second mode.

[0143] When each of the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m is configured as a strip, the change in mutual capacitance between the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m can remain substantially consistent even if the input device AP moves. Accordingly, although the second input TC2 moves, the movement of the second input TC2 can be accurately sensed in the second mode. For example, when writing or drawing using the input device AP, distortion of the second input TC2, which is provided linearly, due to changes in mutual capacitance can be prevented, and as a result, the linearity of the second input TC2 can be increased.

[0144] Figure 8A It is shown schematically. Figure 5 The diagram shows a plan view of the input sensor ISP. Figure 8B It is shown Figure 8A The image shows a magnified plan view of the four unit sensing areas UA. Figure 8C It is shown Figure 8B The image shows a magnified plan view of a single-unit sensing area UA. Figure 8D It is shown Figure 8C The enlarged plan view of the unit region SA shown. Figure 8E It is shown Figure 8C An enlarged plan view of the first intersection region CA1 shown. Figure 8F It is along Figure 8E The cross-sectional view taken from line II-II'. Figure 8G It is shown Figure 8C The enlarged plan view of the second intersection region CA2 shown. Figure 8H It is shown Figure 8C The enlarged plan view of the third intersection region CA3 shown. Figure 8I It is shown Figure 8C An enlarged plan view of the fourth intersection region CA4 shown. Figure 8J It is shown Figure 8C A magnified plan view of part of BB. Figure 8K It is shown Figure 5 The enlarged plan view of the pad area PA shown in the figure. Figure 8L It is along Figure 8K The cross-sectional view taken by line III-III' shown.

[0145] Reference Figure 8A The sensing area ISA comprises multiple unit sensing areas UA arranged in a matrix. For example... Figure 8A As shown, the entire sensing area ISA of the input sensor ISP is only arranged with unit sensing areas UA; however, the invention is not necessarily limited to this or by this limitation. In embodiments of this disclosure, the input sensor ISP may include a first sensing area and a second sensing area distinct from each other. The first sensing area may consist only of unit sensing areas UA, and the second sensing area, arranged outside the first sensing area, may include areas other than unit sensing areas UA, or may include unit sensing areas different from the unit sensing areas UA described below. For example, at least a portion of the sensing area ISA may be uniformly divided into multiple unit sensing areas UA. The multiple unit sensing areas UA may be arranged in rows and columns (e.g., in matrix form).

[0146] The unit sensing area UA may include at least Figure 5 The electrode crossover region ECA is shown in the figure. Based on the crossover ratio between the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m, the unit sensing region UA ​​may include only the electrode crossover region ECA, or it may also include the non-crossover region N-CA of the first electrodes SE1_1 to SE1_n and the second electrodes SE2_1 to SE2_m.

[0147] Reference Figure 8B The diagram illustrates two first electrodes SE1 and two second electrodes SE2 arranged in four unit sensing regions UA. According to an embodiment, the input sensor ISP may include a dummy electrode DE, which reduces the visibility difference between areas where the first electrodes SE1 and SE2 are not arranged and areas where the first electrodes SE1 and SE2 are arranged; however, the invention is not necessarily limited thereto. In embodiments of this disclosure, the dummy electrode DE may be omitted.

[0148] The width W1 of the first electrode SE1 in the electrode crossing region ECA is substantially the same as the width W1 of the first electrode SE1 in the non-crossing region N-CA, and the width W2 of the second electrode SE2 in the electrode crossing region ECA is substantially the same as the width W2 of the second electrode SE2 in the non-crossing region N-CA. Each of the first electrode SE1 and the second electrode SE2 may include a region with a relatively large width and a region with a relatively small width; however, the width of each of the first electrode SE1 and the second electrode SE2, measured from the same point in the electrode crossing region ECA and the non-crossing region N-CA, is substantially constant. Since the width of each of the first electrode SE1 and the second electrode SE2 is constant in the electrode crossing region ECA and the non-crossing region N-CA, the shape of the first electrode SE1 and the shape of the second electrode SE2 can be defined as a strip or a band shape. The width W1 of the first electrode SE1 is smaller than the width of the unit sensing region UA ​​in the second direction DR2, and the width W2 of the second electrode SE2 is smaller than the width of the unit sensing region UA ​​in the first direction DR1.

[0149] Reference Figure 8C The input sensor ISP has a grid shape. The input sensor ISP includes a plurality of first line elements LE1 extending substantially in a first extension direction EDR1 and a plurality of second line elements LE2 extending in a second extension direction EDR2 intersecting the first extension direction EDR1.

[0150] First line element LE1 and second line element LE2 define multiple intersection regions CA. Intersection region CA is the area where the first line element LE1 and second line element LE2 form either a hypothetical intersection or a real intersection. The difference between hypothetical and real intersections is described below. Open region OP is the area in the plane corresponding to the smallest polygonal shape defined by the first line element LE1 and second line element LE2, and the first line element LE1 and second line element LE2 are not arranged within the polygonal region. The polygonal shape corresponding to open region OP can be a rhombus shape (e.g., an elongated rhombus).

[0151] Because the area of ​​overlap between the first electrode SE1 and the second electrode SE2, which have a grid shape, and the second electrode CE of the display device DD is small, the base capacitance Cb (refer to...) Figure 4 Small. Correspondingly, drive signals TS1 and TS2 (refer to...) Figure 6 ) or uplink signals TSa, TSb, TSC, and TSd (refer to Figure 7A The signal transmission is fast because the RC delay of the signal is small. In this case, the first line element LE1 and the second line element LE2 may include metallic material to reduce the resistance of the first electrode SE1 and the second electrode SE2.

[0152] In the first wire element LE1 and the second wire element LE2, the first set of elements LE-G1 is electrically connected to each other to define the first electrode SE1, and in the first wire element LE1 and the second wire element LE2, the second set of elements LE-G2 is electrically connected to each other to define the second electrode SE2.

[0153] The first wire element LE1 of the first group of elements LE-G1 defines the first electrode line E1-L1 of the first electrode SE1. The second wire element LE2 of the first group of elements LE-G1 defines the second electrode line E1-L2 of the first electrode SE1. The first wire element LE1 of the second group of elements LE-G2 defines the first electrode line E2-L1 of the second electrode SE2. The second wire element LE2 of the second group of elements LE-G2 defines the second electrode line E2-L2 of the second electrode SE2.

[0154] The first electrode line E1-L1 of the first electrode SE1 can be substantially parallel to the first electrode line E2-L1 of the second electrode SE2, and the second electrode line E1-L2 of the first electrode SE1 can be substantially parallel to the second electrode line E2-L2 of the second electrode SE2. The first electrode line E2-L1 of the second electrode SE2 can be arranged between the two closest first electrode lines E1-L1 of the first electrode SE1 in the second extension direction EDR2. The first electrode line E2-L1 of the second electrode SE2 can be arranged to be closer to one of the two first electrode lines E1-L1 of the first electrode SE1 than the other of the two first electrode lines E1-L1 of the first electrode SE1. An open region OP can be arranged between the relatively close first electrode lines E2-L1 of the second electrode SE2 and the first electrode lines E1-L1 of the first electrode SE1, and two open regions OP can be arranged between the more distant first electrode lines E2-L1 of the second electrode SE2 and the first electrode lines E1-L1 of the first electrode SE1. To aid understanding, in Figure 8C The three open areas (OP) are indicated by shadows.

[0155] In the first wire element LE1 and the second wire element LE2, a third set of elements LE-G3 may define a dummy electrode DE that is insulated from the first electrode SE1 and the second electrode SE2. After the first wire element LE1 and the second wire element LE2 are fully connected, the first wire element LE1 and the second wire element LE2 are disconnected according to a predetermined rule, so that the three sets of elements LE-G1, LE-G2 and LE-G3 are distinguished from each other, thereby insulating the first electrode SE1, the second electrode SE2 and the dummy electrode DE from each other. The disconnected area described above corresponds to the imaginary crossover point described below.

[0156] exist Figure 8CIn this diagram, the three groups of elements LE-G1, LE-G2, and LE-G3 are shown differently to distinguish them from each other; however, the first group of elements LE-G1, the second group of elements LE-G2, and the third group of elements LE-G3 may have substantially the same linewidth, thickness, and material as each other. The first group of elements LE-G1, the second group of elements LE-G2, and the third group of elements LE-G3 may be distinguished from each other by electrical connections.

[0157] like Figure 8C As shown, the unit sensing area UA comprises multiple unit areas SA. For example, the unit sensing area UA can be uniformly divided into multiple unit areas SA. The multiple unit areas SA can be arranged into multiple rows and multiple columns. Figure 8C Six cell regions SA are shown as representative examples. Each cell region SA includes a cross region CA.

[0158] Reference Figure 8D A detailed description of the cell region SA is provided. (Refer to...) Figure 8D At the center of the unit region SA, there is a cross region CA-C (hereinafter referred to as the central cross region). The unit region SA is defined by four cross regions CA-C1 to CA-C4 that are closest to the central cross region CA-C.

[0159] Figure 8D The display panel DP (reference) is shown. Figure 4 The launch areas are PXA-R, PXA-B, PXA-G1, and PXA-G2. Figure 8D In the illustration, four types of emitting regions PXA-R, PXA-B, PXA-G1, and PXA-G2, which have different shapes from each other, are shown as representative examples; however, the invention is not necessarily limited thereto. In some embodiments, two of the four types of emitting regions PXA-R, PXA-B, PXA-G1, and PXA-G2 emit light of the same color; however, the invention is not necessarily limited thereto.

[0160] The first emission region PXA-R is the emission region of the first color pixel, the second emission region PXA-B is the emission region of the second color pixel, and the third emission region PXA-G1 and the fourth emission region PXA-G2 are the emission regions of the third color pixel. The first color light is red light, the second color light is blue light, and the third color light is green light, and the first, second, and third color lights can be changed to other three primary colors. According to embodiments of this disclosure, the third emission region PXA-G1 and the fourth emission region PXA-G2 may have the same shape as each other.

[0161] The display panel (DP) may include multiple pixel units (PUAs). Each PUA may include multiple emission regions, and the PUA may include the same number of emission regions. PUAs may have the same arrangement of emission regions. PUAs may be grouped into two groups. PUAs included in the same group have the same arrangement of emission regions, and PUAs included in different groups may have different arrangements of emission regions. Although the arrangements of emission regions in the two groups of PUAs are different from each other, the corresponding emission regions are provided to the two groups of PUAs respectively.

[0162] When viewed in a plane, the unit pixel area (PUA) can have the same size. The unit pixel area (PUA) is defined by dividing the display panel (DP) into identical regions, each comprising the same number of emission areas.

[0163] The unit pixel region PUA may have a quadrilateral shape including a first diagonal CL1 and a second diagonal CL2 intersecting the first diagonal CL1. The unit pixel region PUA may have a square shape or a rectangular shape.

[0164] Each unit pixel region PUA includes a first emitting region PXA-R, a second emitting region PXA-B, a third emitting region PXA-G1, and a fourth emitting region PXA-G2. The first emitting region PXA-R and the second emitting region PXA-B face each other in a first direction DR1, and the third emitting region PXA-G1 and the fourth emitting region PXA-G2 face each other in a second direction DR2. A first diagonal line CL1 passing through the first emitting region PXA-R and the second emitting region PXA-B is substantially parallel to the first direction DR1, and a second diagonal line CL2 passing through the third emitting region PXA-G1 and the fourth emitting region PXA-G2 is substantially parallel to the second direction DR2. Accordingly, the angle between the first diagonal line CL1 and the second diagonal line CL2 can be approximately 90 degrees. This angle is referred to as the first angle θ1.

[0165] In one embodiment, the first angle θ1 may be approximately 90 degrees. In another embodiment, all angles between the first diagonal CL1 and the second diagonal CL2 may be approximately 90 degrees. According to embodiments of this disclosure, the angles defined by the first diagonal CL1 and the second diagonal CL2 may include acute and obtuse angles. This disclosure describes a unit pixel region PUA comprising four types of emission regions PXA-R, PXA-B, PXA-G1, and PXA-G2; however, the invention is not necessarily limited thereto. The arrangement of the diagonals and the first angle θ1 may vary depending on the arrangement and number of emission regions in the unit pixel region PUA.

[0166] The first line element LE1 and the second line element LE2, having a straight shape and arranged in the unit region SA, may overlap with some of the first emission regions PXA-R, the second emission region PXA-B, the third emission region PXA-G1, and the fourth emission region PXA-G2. According to an embodiment of this disclosure, the first line element LE1 and the second line element LE2 arranged in the unit region SA may be arranged only in the non-emission region NPXA while maintaining their extension directions EDR1 and EDR2, and in this case, the first line element LE1 and the second line element LE2 may include multiple curved regions.

[0167] The first line element LE1 and the second line element LE2, arranged in the unit region SA, define an angle in the intersection region CA. This angle is described as a second angle θ2. The second angle θ2 is selected to correspond to the first angle θ1. For example, when the two diagonals define acute and obtuse angles, and the first line element LE1 and the second line element LE2 define acute and obtuse angles, both the first angle θ1 and the second angle θ2 can be acute or obtuse.

[0168] The first angle θ1 and the corresponding second angle θ2 have different values. The first angle θ1 is an index indicating the period of repeated placement of the unit pixel region PUA, and the second angle θ2 is an index indicating the period of repeated placement of the unit region SA. When the first angle θ1 and the second angle θ2 are the same, the period of the unit pixel region PUA overlaps with the period of the unit region SA, which leads to moiré effect. According to the embodiment, since the first angle θ1 and the second angle θ2 are different, the overlap between the period of the unit pixel region PUA and the period of the unit region SA can be reduced, and thus the moiré effect can be prevented.

[0169] Refer again Figure 8C Multiple unit regions SA can be arranged in a matrix of N multiplied by M within a single unit sensing region UA. In the implementation, each of "N" and "M" can be a multiple of 3, and "N" and "M" can be different natural numbers. "N" can be greater than "M", "N" can be 18, and "M" can be 12. As the values ​​of "N" and "M" increase, the size of the unit region SA decreases, and the number of unit regions SA increases.

[0170] The vertical width W10 of the unit region SA (i.e., the width in the second direction DR2) can be smaller than the horizontal width W20 of the unit region SA (i.e., the width in the first direction DR1). The ratio of the vertical width W10 to the horizontal width W20 of the unit region SA can be set to minimize moiré effects. The ratio of the vertical width W10 to the horizontal width W20 of the unit region SA can be determined by the unit pixel region PUA applied to the product, and it should not be limited to a specific value.

[0171] Reference Figure 8C and Figures 8E to 8I The intersection region CA is described in detail. The intersection region CA may include a first intersection region CA1, a second intersection region CA2, a third intersection region CA3, and a fourth intersection region CA4.

[0172] Reference Figure 8C and Figure 8E One of the first line elements LE1 and the second line element LE2 of the first group of elements LE-G1 may cross with another element of the first line element LE1 and the second line element LE2 of the second group of elements LE-G2. Figure 8E The first intersection region CA1 is shown, defining the imaginary intersection point by the second line element LE2 of the first group of elements LE-G1 and the first line element LE1 of the second group of elements LE-G2. Figure 8E The diagram illustrates a first intersection region CA1 where the second wire element LE2 of the first group of elements LE-G1 is disconnected and the first wire element LE1 of the second group of elements LE-G2 passes through the disconnected area of ​​the second wire element LE2. However, the invention is not necessarily limited thereto or thereby restricted. According to an embodiment of this disclosure, the first wire element LE1 of the second group of elements LE-G2 may be disconnected in the first intersection region CA1.

[0173] Reference Figure 8F After being formed by a continuous process, the first line element LE1 and the second line element LE2 can be directly disposed on the upper surface of the packaging substrate ES without an adhesive layer. The first sensor insulating layer IIL1 at least partially covers the first line element LE1 and the second line element LE2. A bridging pattern BRP is disposed on the first sensor insulating layer IIL1 and connects the disconnected areas of the second line element LE2 of the first group of elements LE-G1 through contact holes CH20. According to another embodiment of this disclosure, the bridging pattern BRP can be disposed on the upper surface of the packaging substrate ES, and the first line element LE1 and the second line element LE2 can be disposed on the first sensor insulating layer IIL1.

[0174] Reference Figure 8C and Figure 8G One of the first line elements LE1 and the second line element LE2 of the first group of elements LE-G1 may cross with another element of the first line element LE1 and the second line element LE2 of the second group of elements LE-G2. Figure 8G The diagram shows a second intersection region CA2 defined by the second line element LE2 of the first group of elements LE-G1 and the first line element LE1 of the second group of elements LE-G2, indicating an imaginary intersection point. The first line element LE1 of the second group of elements LE-G2 is disconnected. Unlike the first intersection region CA1, the bridging pattern BRP is not arranged in the second intersection region CA2.

[0175] The resistance of the first sensing electrode SE1 and / or the second sensing electrode SE2 and / or the intensity of the current flowing through the first sensing electrode SE1 and / or the second sensing electrode SE2 can be controlled by adjusting the number of bridging patterns BRP. For example, as Figure 9B As shown, the second cross region CA2 can be arranged in a region that has a low impact on the flow of current. (Refer to...) Figure 9B Since the current flows in the first direction DR1 of the first electrode SE1 and the second cross region CA2 induces the current to flow in the second direction DR2, it has a low influence on the current flow. Accordingly, the bridging pattern BRP connecting the first line element LE1 or the second line element LE2 of the first electrode SE1 can be omitted.

[0176] Reference Figure 8C and Figure 8H One of the first line element LE1 of the first group of elements LE-G1, the second line element LE2 of the first group of elements LE-G1, the first line element LE1 of the second group of elements LE-G2, and the second line element LE2 of the second group of elements LE-G2 may cross with another element of the first line element LE1 of the third group of elements LE-G3 and the second line element LE2 of the third group of elements LE-G3. Figure 8H The diagram illustrates a third intersection region CA3 defining the imaginary intersection point of the second line element LE2 of the first group of elements LE-G1 and the first line element LE1 of the third group of elements LE-G3. Similar to the second intersection region CA2, the bridging pattern BRP may not be arranged in the third intersection region CA3. An example shows a disconnected second line element LE2 of the first group of elements LE-G1; however, the invention is not necessarily limited thereto. The first line element LE1 of the third group of elements LE-G3 may be disconnected.

[0177] The third cross region CA3 defines the boundaries of the first electrode SE1, the second electrode SE2, and the dummy electrode DE. Since one of the first line elements LE1 and LE2 of the first electrode SE1, the second electrode SE2, and the dummy electrode DE is separated from the other of the first line elements LE1 and LE2 of the first electrode SE1, the second electrode SE2, and the dummy electrode DE, the first electrode SE1, the second electrode SE2, and the dummy electrode DE are electrically insulated from each other.

[0178] Reference Figure 8C and Figure 8IThe first line element LE1 and the second line element LE2 of the first group of elements LE-G1 can be integrally arranged with each other (e.g., arranged as a continuous structure) and can cross each other. The first line element LE1 and the second line element LE2 of the second group of elements LE-G2 can be integrally arranged with each other and can cross each other. The first line element LE1 and the second line element LE2 of the third group of elements LE-G3 can be integrally arranged with each other and can cross each other. Figure 8I The first line element LE1 and the second line element LE2 of the first group of elements LE-G1 are shown to define the fourth intersection region CA4, which defines the actual intersection point. The bridging pattern BRP is not required for the fourth intersection region CA4 and can therefore be omitted from it.

[0179] Reference Figure 8J The open region defined by the first wire element LE1 and the second wire element LE2 adjacent to the first intersection region CA1 may have an open rhombus shape. The open region defined by the first wire element LE1 and the second wire element LE2 adjacent to the second intersection region CA2 may have an open rhombus shape. The open region defined by the first wire element LE1 and the second wire element LE2 adjacent to the third intersection region CA3 may have an open rhombus shape. The open rhombus shapes connect adjacent open regions. The open region defined by the first wire element LE1 and the second wire element LE2 adjacent to the fourth intersection region CA4 may have an open rhombus shape. The open region defined by the first wire element LE1 and the second wire element LE2 adjacent to the fourth intersection region CA4 arranged in the dummy electrode DE may have a closed rhombus shape.

[0180] like Figure 5 and Figure 8K As shown, the first signal line SL1 and the second signal line SL2 may include a line portion LP and a pad portion PP. The pad portion PP may include a first layer PP1 and a second layer PP2. The line portion LP may be integrally disposed with the first layer PP1 of the pad portion PP. The line portion LP and the first layer PP1 of the pad portion PP may be formed by the same process, may include the same material, and may have the same stacking structure. According to an embodiment, the line portion LP and the pad portion PP may have different linewidths from each other; however, the line portion LP and the pad portion PP may have the same linewidth.

[0181] like Figure 8LAs shown, the first layer PP1 of the pad portion PP is disposed between the upper surface of the package substrate ES and the first sensor insulating layer IIL1. The second layer PP2 of the pad portion PP is disposed on the first sensor insulating layer IIL1 and connected to the first layer PP1 of the pad portion PP via a contact hole CH20 defined by the first sensor insulating layer IIL1. The second sensor insulating layer IIL2 is provided with at least the second layer PP2 of the pad portion PP through its exposed contact hole CNT. The second layer PP2 of at least the pad portion PP can be electrically connected to the pads of the flexible circuit board via an anisotropic conductive film or solder balls. The second layer PP2 of the pad portion PP is connected to the bridging pattern BRP (see reference). Figure 8F The same process can be used to form the same materials, and the same stacking structure can be used. The second layer PP2 of the pad portion PP and the bridging pattern BRP can include transparent conductive oxides.

[0182] Figure 9A and Figure 9B This is an enlarged plan view showing the unit sensing region UA ​​according to an embodiment of the present disclosure. In the following, with reference to... Figures 8A to 8L The extent to which detailed descriptions of the elements are omitted may be assumed that these elements are at least similar to their counterparts described elsewhere in this disclosure.

[0183] Reference Figure 9A The width of the unit sensing region UA ​​in the first direction DR1 is substantially the same as the width W2 of the second electrode SE2 in the first direction DR1. The width of the unit sensing region UA ​​in the second direction DR2 is substantially the same as the width W1 of the first electrode SE1 in the second direction DR2. The unit sensing region UA ​​is defined as being similar to the reference... Figure 8B The described electrode cross region ECA is essentially the same.

[0184] The non-intersecting regions N-CA are arranged to have predetermined dimensions. Figure 8B Unlike other electrodes, the boundary between adjacent first electrodes SE1 and the boundary between adjacent second electrodes SE2 are defined by the disconnection of the first line element LE1 and the second line element LE2.

[0185] In this case, within the unit sensing region UA, the length of the longest electrode line among the first electrode lines E1-L1 of the first electrode SE1 is substantially the same as the length of the longest electrode line among the first electrode lines E2-L1 of the second electrode SE2. Similarly, the length of the longest electrode line among the second electrode lines E1-L2 of the first electrode SE1 is substantially the same as the length of the longest electrode line among the second electrode lines E2-L2 of the second electrode SE2.

[0186] Reference Figure 9B When with Figure 9AWhen comparing the unit sensing region UA ​​shown, the dimensions of the first line element LE1 and the second line element LE2 of the first electrode SE1 decrease, and the dimensions of the first line element LE1 and the second line element LE2 of the dummy electrode DE increase. Accordingly, in the unit sensing region UA, the longest electrode line among the first electrode lines E1-L1 of the first electrode SE1 is shorter than the longest electrode line among the first electrode lines E2-L1 of the second electrode SE2. Similarly, the longest electrode line among the second electrode lines E1-L2 of the first electrode SE1 is shorter than the longest electrode line among the second electrode lines E2-L2 of the second electrode SE2.

[0187] When with Figure 9A When comparing the unit sensing area UA shown, the width W2 of the second electrode SE2 decreases. The dimensions of the first line element LE1 and the second line element LE2 of the second electrode SE2 decrease, while the dimensions of the first line element LE1 and the second line element LE2 of the dummy electrode DE increase. The decrease in the size of the second electrode SE2 is less than the decrease in the size of the first electrode SE1.

[0188] The polygonal shape defined by the first electrode line E1-L1 and the second electrode line E1-L2 of the first electrode SE1 may have a larger area than the polygonal shape defined by the first electrode line E2-L1 and the second electrode line E2-L2 of the second electrode SE2. Figure 9B The hexagonal shape defined in the first electrode SE1 and the quadrilateral shape defined in the second electrode SE2 are shown. Figure 9B In the image, one of the multiple hexagonal shapes is shown in shaded areas, and one of the multiple quadrilateral shapes is shown in shaded areas.

[0189] Figure 10A and Figure 10B This is an enlarged plan view showing the unit region SA according to an embodiment of the present disclosure. In the following, with reference to... Figure 8C and Figure 8D The extent to which detailed descriptions of the elements are omitted may be assumed that these elements are at least similar to their counterparts described elsewhere in this disclosure.

[0190] Reference Figure 10AEach unit pixel region PUA includes a first emitting region PXA-R, a second emitting region PXA-B, and a third emitting region PXA-G. In each unit pixel region PUA, the third emitting region PXA-G is arranged between the first emitting region PXA-R and the second emitting region PXA-B; however, the arrangement of the emitting regions can be changed. Each of the first emitting region PXA-R, the second emitting region PXA-B, and the third emitting region PXA-G may extend in a second direction DR2. The first emitting region PXA-R, the second emitting region PXA-B, and the third emitting region PXA-G may have substantially the same size as each other.

[0191] The unit pixel region PUA may have a first angle θ10 defined by a first diagonal CL1 and a second diagonal CL2. The first angle θ10 may be an acute angle and may have a value different from that of the second angle θ2.

[0192] Reference Figure 10B Each pixel region PUA includes a first emitting region PXA-R, a second emitting region PXA-B, and a third emitting region PXA-G. The second emitting region PXA-B has the largest size. The first emitting region PXA-R and the third emitting region PXA-G are arranged to the left of the second emitting region PXA-B. The first emitting region PXA-R and the third emitting region PXA-G may have substantially the same size as each other.

[0193] The unit pixel region PUA may have a first angle θ100 defined by a first diagonal CL1 and a second diagonal CL2. The first angle θ100 may have a value different from that of the second angle θ2.

[0194] While embodiments of this disclosure have been described, it should be understood that the invention is not limited to these embodiments, but rather that various changes and modifications can be made by those skilled in the art within the spirit and scope of this disclosure.

Claims

1. A display device, comprising: The display panel includes a plurality of unit pixel regions, each having a quadrilateral shape, the quadrilateral shape including a first diagonal and a second diagonal intersecting the first diagonal; as well as An input sensor is disposed on the display panel and includes a plurality of first line elements and a plurality of second line elements defining a plurality of intersecting regions with the plurality of first line elements. The first group of elements among the plurality of first wire elements and the plurality of second wire elements is electrically connected to each other and defines a first electrode. In this configuration, a second group of elements among the plurality of first wire elements and the plurality of second wire elements is electrically connected to each other and defines a second electrode, the second electrode being insulated from the first electrode while intersecting with it. Wherein, a third group of elements among the plurality of first wire elements and the plurality of second wire elements defines a dummy electrode insulated from the first electrode and the second electrode, and The first angle defined by the first diagonal and the second diagonal is different from the second angle defined by the plurality of first line elements and the plurality of second line elements in the plurality of intersection regions. The plurality of intersecting regions include: A first intersection region, in which one of the plurality of first wire elements and one of the plurality of second wire elements have a disconnected region, and the one of the plurality of first wire elements and the other of the plurality of second wire elements pass through the disconnected region; and In the second cross region, one of the plurality of first line elements is integrally disposed with one of the plurality of second line elements.

2. The display device as claimed in claim 1, wherein, The width of the first electrode in the first region where the first electrode and the second electrode intersect is the same as the width of the first electrode in the second region where the first electrode and the second electrode do not intersect. Wherein, the width of the second electrode in the first region is the same as the width of the second electrode in the second region.

3. The display device as claimed in claim 1, wherein, The display panel includes: base layer; A transistor, the transistor being disposed on the base layer; A light-emitting element, the light-emitting element being electrically connected to the transistor; and An encapsulation substrate, facing the base layer and encapsulating the light-emitting element. The plurality of first line elements and the plurality of second line elements are arranged on the upper surface of the packaging substrate, and an adhesive layer is omitted between the upper surface of the packaging substrate and the plurality of first line elements and the plurality of second line elements.

4. The display device as claimed in claim 1, wherein, The element having the disconnected region is included in one of the first group of elements and the second group of elements, and the other element passing through the disconnected region is included in the other of the first group of elements and the second group of elements.

5. The display device of claim 1, further comprising a bridging pattern, wherein, The first cross regions are configured as a plurality of them, and the bridging pattern is arranged in at least one of the plurality of first cross regions and on a layer different from the layer on which the plurality of first line elements and the plurality of second line elements are arranged, and the bridging pattern connects the disconnected regions of the disconnected one element arranged in the at least one region.

6. The display device as claimed in claim 5, wherein, The bridging pattern comprises a transparent conductive oxide.

7. The display device of claim 5, further comprising a first signal line electrically connected to the first electrode, wherein, The first signal line includes a line portion and a pad portion disposed at the end of the line portion. The pad portion includes a first layer extending from the line portion and a second layer disposed on a different layer from the first layer and connected to the first layer, and the second layer includes the same material as the bridging pattern.

8. The display device as claimed in claim 5, wherein, The first wire element and the second wire element each comprise metal.

9. The display device as claimed in claim 1, wherein, The disconnected element is included in the third group of elements, and the other element that passes through the disconnected area is included in the first group of elements or the second group of elements.

10. The display device as claimed in claim 1, wherein, One of the plurality of first line elements and one of the plurality of second line elements are integrally arranged with each other and are included in the first group of elements, the second group of elements, or the third group of elements.

11. The display device of claim 1, further comprising an input device that applies an input signal to the input sensor. in, The input sensor senses user input based on the change in capacitance between the first electrode and the second electrode in a first mode, and senses input made through the input device based on the input signal in a second mode.

12. The display device as claimed in claim 1, wherein, The first angle is a right angle, and the second angle is an acute angle or an obtuse angle.

13. The display device as claimed in claim 1, wherein, Each of the plurality of unit pixel regions includes a plurality of emission regions, and the plurality of unit pixel regions include the same number of emission regions in each other.

14. A display device, comprising: A display panel that displays images; as well as An input sensor, disposed on the display panel, includes: a plurality of first electrodes arranged in a sensing region comprising a plurality of unit sensing regions arranged in a matrix, and a plurality of second electrodes intersecting the plurality of first electrodes, wherein the plurality of first electrodes and the plurality of second electrodes are defined by a plurality of line elements, the plurality of line elements including: A plurality of first line elements, the plurality of first line elements extending in a first direction; and A plurality of second line elements extend in a second direction intersecting the first direction and define a plurality of intersection regions with the plurality of first line elements. The plurality of electrode intersection regions of the plurality of first electrodes and the plurality of second electrodes are respectively arranged in the plurality of unit sensing regions. Each of the plurality of unit sensing regions includes a plurality of unit regions. Each of the plurality of unit regions is defined by one intersection region arranged at the center of the corresponding unit region and four intersection regions closest to the one intersection region. A plurality of corresponding unit regions are arranged in each of the plurality of unit sensing regions in a matrix of N multiplied by M, where each of N and M is a multiple of 3, and N and M are different positive integers.

15. The display device as claimed in claim 14, wherein, The plurality of first electrodes extend in a third direction and are arranged in a fourth direction intersecting the third direction. Each of the plurality of unit sensing regions has a first width in the third direction and a second width in the fourth direction, wherein the third width of each of the plurality of first electrodes in the fourth direction is the same as the second width, and wherein the fourth width of each of the plurality of second electrodes in the third direction is the same as the first width.

16. The display device as claimed in claim 14, wherein, The plurality of first electrodes extend in a third direction and are arranged in a fourth direction intersecting the third direction, wherein each of the plurality of unit sensing regions has a first width in the third direction and a second width in the fourth direction, wherein the third width of each of the plurality of first electrodes in the fourth direction is less than the second width, and wherein the fourth width of each of the plurality of second electrodes in the third direction is less than the first width.

17. The display device as claimed in claim 14, wherein, The plurality of first electrodes extend in a third direction and are arranged in a fourth direction intersecting the third direction, where N is greater than M, and the first width of each of the plurality of unit regions in the third direction is greater than the second width of each of the plurality of unit regions in the fourth direction.

18. The display device of claim 14, further comprising a plurality of dummy electrodes, the plurality of dummy electrodes being insulated from the plurality of first electrodes and the plurality of second electrodes, wherein, The plurality of dummy electrodes are defined by the plurality of wire elements, and the intersection region defining the boundaries of the plurality of first electrodes, the plurality of second electrodes, and the plurality of dummy electrodes in the plurality of intersection regions allows one of the corresponding first wire elements and one of the corresponding second wire elements in the plurality of first wire elements to break at the break region, and allows another of the corresponding first wire elements and the corresponding second wire elements in the plurality of second wire elements to pass through the break region.

19. The display device as claimed in claim 14, wherein, A first group of elements among the plurality of first line elements defines a first electrode line of the plurality of first electrodes extending in the first direction in the plurality of unit sensing regions, and a second group of elements among the plurality of first line elements defines a second electrode line of the plurality of second electrodes extending in the first direction in the plurality of unit sensing regions.

Images