Semiconductor substrate and method of manufacturing the same

Abstract

The present application provides a semiconductor substrate and a manufacturing method thereof. The method includes epitaxially growing a buffer layer and a silicon carbide layer on a silicon face of an N-type silicon carbide substrate, wherein the silicon carbide layer is high-resistance silicon carbide or N-type silicon carbide (N-SiC), and then epitaxially growing a gallium nitride epitaxial layer on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer and the gallium nitride epitaxial layer. After epitaxially growing the gallium nitride epitaxial layer, a damage layer is formed in the semiconductor structure by using a laser, a wafer carrier is bonded to a surface of the gallium nitride epitaxial layer, and then the N-type silicon carbide substrate and the semiconductor structure are separated from the damage layer.

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor manufacturing technology, and in particular, to a semiconductor substrate and a manufacturing method thereof. BACKGROUND

[0002] Epitaxy refers to a technology of growing new crystals on a wafer to form a semiconductor layer. Since a film layer formed by an epitaxy process has advantages of high purity and good thickness controllability, the epitaxy process has been widely applied to the manufacturing of radio frequency (RF) devices or power devices.

[0003] An original epitaxial substrate is a gallium nitride grown on a silicon substrate. However, it is found that there is a problem of lattice mismatch between silicon and gallium nitride. Therefore, a silicon carbide substrate is recently used to replace the silicon substrate to solve the problem of lattice mismatch.

[0004] However, since the cost of the silicon carbide substrate is significantly higher than that of the silicon substrate, it is difficult to balance the cost and the requirement of epitaxial quality. SUMMARY

[0005] The present application is directed to a manufacturing method of a semiconductor substrate, which can simultaneously solve the problems of substrate lattice mismatch and high substrate cost.

[0006] The present application is also directed to a manufacturing method of a semiconductor substrate, which can manufacture a substrate with high lattice matching degree at a low cost.

[0007] The present application is further directed to a semiconductor substrate, which is suitable for a radio frequency (RF) device and has good crystalline quality.

[0008] The present application is also directed to a semiconductor substrate, which is suitable for a power device and has good crystalline quality.

[0009] According to an embodiment of the present application, a manufacturing method of a semiconductor substrate includes epitaxially growing a buffer layer and a silicon carbide layer on a silicon surface of an N-type silicon carbide substrate, wherein the silicon carbide layer is high-resistance silicon carbide or N-type silicon carbide (N-SiC); epitaxially growing a gallium nitride epitaxial layer on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer, and the gallium nitride epitaxial layer. After epitaxially growing the gallium nitride epitaxial layer, a damage layer is formed in the semiconductor structure by using a laser, and a wafer carrier is bonded to a surface of the gallium nitride epitaxial layer. Then, the N-type silicon carbide substrate and the semiconductor structure are separated from the damage layer.

[0010] In the manufacturing method according to the embodiment of the present application, the method of forming the damage layer includes applying a laser from the surface of the gallium nitride epitaxial layer to the buffer layer to form the damage layer in the buffer layer.

[0011] In a manufacturing method according to an embodiment of the present invention, the method for forming the above-mentioned damage layer includes: applying a laser from the carbon surface of an N-type silicon carbide substrate to the silicon surface of the N-type silicon carbide substrate to form the above-mentioned damage layer in the N-type silicon carbide substrate.

[0012] In the manufacturing method according to an embodiment of the present invention, after epitaxially growing the buffer layer and before epitaxially growing the silicon carbide layer, a laser lift-off (LLO) layer may also be epitaxially grown. The LLO layer is aluminum-doped silicon carbide, and the aluminum doping concentration of the LLO layer is, for example, 1E20 cm⁻¹. -3 The thickness of the LLO layer is, for example, between 1.0 nm and 10 nm.

[0013] In a manufacturing method according to an embodiment of the present invention, the method for forming the damage layer includes: applying a laser from the carbon surface of an N-type silicon carbide substrate to the LLO layer to form the damage layer within the LLO layer.

[0014] According to another embodiment of the present invention, a method for manufacturing a semiconductor substrate includes forming a damage layer in the silicon surface of an N-type silicon carbide substrate by ion implantation, and after forming the damage layer, epitaxially growing a buffer layer and a silicon carbide layer on the silicon surface of the N-type silicon carbide substrate, wherein the silicon carbide layer is high-resistivity silicon carbide or N-type silicon carbide (N-SiC). Then, an epitaxial gallium nitride layer is epitaxially grown on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer, and the gallium nitride epitaxial layer. A wafer carrier is bonded to the surface of the gallium nitride epitaxial layer. Then, the N-type silicon carbide substrate and the semiconductor structure are separated from the damage layer.

[0015] In the manufacturing method according to the above embodiments of the present invention, the silicon surface of the above-mentioned N-type silicon carbide substrate has an angle in the range of 0°+ / -8° relative to the (0001) surface.

[0016] In the manufacturing method according to the above embodiments of the present invention, after separating the above-described N-type silicon carbide substrate and the above-described semiconductor structure, the buffer layer may be removed.

[0017] In the manufacturing method of the above embodiments of the present invention, the manufacturing method may further include: bonding a support substrate to the surface of a buffer layer or a silicon carbide layer, wherein the support substrate includes a silicon substrate, an SOI (Silicon-on-Insulator) substrate, a ceramic substrate or a glass substrate.

[0018] In the manufacturing method according to the above embodiments of the present invention, the wafer carrier may be removed after the support substrate is bonded.

[0019] In the manufacturing method according to the above embodiments of the present invention, the material of the wafer carrier includes glass or sapphire.

[0020] According to another embodiment of the present invention, a semiconductor substrate includes: a high-resistivity silicon carbide layer and a gallium nitride epitaxial layer. The high-resistivity silicon carbide layer has a first surface and a second surface, the first surface being opposite to the second surface. The gallium nitride epitaxial layer is formed on the second surface of the high-resistivity silicon carbide layer, wherein the thickness of the gallium nitride epitaxial layer is less than 2 μm and the full width at half maximum (FWHM) of the (002) plane analyzed by X-ray diffraction is less than 100 arcsec. The thickness of the high-resistivity silicon carbide layer is between 20 μm and 50 μm, the second surface of the high-resistivity silicon carbide layer has an angle in the range of 0° + / - 8° relative to the (0001) plane, and the micropipe density (MPD) of the high-resistivity silicon carbide layer is less than 0.5 ea / cm. 2 basal dislocations less than 10ea / cm 2 And the threading screw dislocation (TSD) is less than 500 ea / cm 2 .

[0021] In a semiconductor substrate according to another embodiment of the present invention, the resistivity of the high-resistivity silicon carbide layer is greater than 1E5Ω·cm.

[0022] In a semiconductor substrate according to another embodiment of the present invention, the resistance change rate of the high-resistivity silicon carbide layer is less than 50%.

[0023] In another embodiment of the semiconductor substrate according to the present invention, the semiconductor substrate may further include a buffer layer that is in direct contact with the first surface of the high-resistivity silicon carbide layer.

[0024] In a semiconductor substrate according to another embodiment of the present invention, the thickness of the buffer layer is less than 1.5 μm.

[0025] In a semiconductor substrate according to another embodiment of the present invention, the semiconductor substrate may further include a laser lift-off (LLO) layer that is in direct contact with the first surface of the high-resistivity silicon carbide layer.

[0026] In a semiconductor substrate according to another embodiment of the present invention, the LLO layer is aluminum-doped silicon carbide.

[0027] In a semiconductor substrate according to another embodiment of the present invention, the aluminum doping concentration of the LLO layer is 1E20 cm⁻¹. -3 The above, and the thickness of the LLO layer is between 1.0 nm and 10 nm.

[0028] In another embodiment of the semiconductor substrate according to the present invention, the semiconductor substrate may further include a support substrate bonded to the exposed surface of the high-resistivity silicon carbide layer, wherein the support substrate includes a silicon substrate, an SOI substrate, a ceramic substrate or a glass substrate.

[0029] According to another embodiment of the present invention, a semiconductor substrate includes: an N-type silicon carbide (N-SiC) layer and a gallium nitride epitaxial layer. The gallium nitride epitaxial layer is formed on the surface of the N-SiC layer, wherein the thickness of the gallium nitride epitaxial layer is between 0.3 μm and 6 μm and the full width at half maximum (FWHM) of the (002) plane analyzed by X-ray diffraction is less than 100 arcsec. The thickness of the N-SiC layer is between 0.1 μm and 50 μm, the surface of the N-SiC layer has an angle in the range of 0° + / - 8° relative to the (0001) plane, and the micropipe density (MPD) of the N-SiC layer is less than 0.5 ea / cm². 2 basal dislocations less than 10ea / cm 2 And the threading screw dislocation (TSD) is less than 500 ea / cm 2 .

[0030] In a semiconductor substrate according to another embodiment of the present invention, the resistance of the N-SiC layer is, for example, 1E15cm. -3 ~1E20 cm -3 between.

[0031] In a semiconductor substrate according to another embodiment of the present invention, the resistance change rate of the above-mentioned N-SiC layer is less than 5%.

[0032] In another embodiment of the semiconductor substrate according to the present invention, the semiconductor substrate may further include a support substrate bonded to the exposed surface of the N-SiC layer, the support substrate including a silicon substrate, an SOI substrate, a ceramic substrate or a glass substrate.

[0033] Based on the above, the method of the present invention can simultaneously produce substrates with good crystallinity and reduce substrate costs by reusing silicon carbide substrates. Attached Figure Description

[0034] Figures 1A-1E This is a schematic cross-sectional view of the manufacturing process of a semiconductor substrate according to the first embodiment of the present invention;

[0035] Figures 2A-2D This is a schematic cross-sectional view of the manufacturing process of a semiconductor substrate according to a second embodiment of the present invention;

[0036] Figures 3A-3DThis is a schematic cross-sectional view of the manufacturing process of a semiconductor substrate according to a third embodiment of the present invention;

[0037] Figures 4A-4D This is a schematic cross-sectional view of the manufacturing process of a semiconductor substrate according to the fourth embodiment of the present invention;

[0038] Figure 5A This is a cross-sectional schematic diagram of a semiconductor substrate according to the fifth embodiment of the present invention;

[0039] Figure 5B This is a cross-sectional schematic diagram of another semiconductor substrate according to the fifth embodiment;

[0040] Figure 5C This is a cross-sectional schematic diagram of another semiconductor substrate according to the fifth embodiment;

[0041] Figure 6A This is a cross-sectional schematic diagram of a semiconductor substrate according to the sixth embodiment of the present invention;

[0042] Figure 6B This is a cross-sectional schematic diagram of another semiconductor substrate according to the sixth embodiment.

[0043] Explanation of reference numerals in the attached figures

[0044] 100: N-type silicon carbide substrate

[0045] 100a: Silicon surface

[0046] 100b, 104a: Carbon surface

[0047] 102: Buffer layer

[0048] 104: Silicon carbide layer

[0049] 106, 506, 604: Gallium nitride epitaxial layers

[0050] 106a: Surface

[0051] 108: Semiconductor Structure

[0052] 110: Laser

[0053] 112, 200, 304, 402: Damaged layers

[0054] 114: Chip carrier

[0055] 116, 512, 606: Support substrate

[0056] 300, 510: Laser peeling layer

[0057] 400: Ion Implantation

[0058] 500, 600: Semiconductor substrate

[0059] 502: High-resistivity silicon carbide layer

[0060] 502a: First surface

[0061] 502b: Second surface

[0062] 504: Material layer

[0063] 602: N-type silicon carbide layer

[0064] t1, t2, t3, t4, t5, t6: Thickness Detailed Implementation

[0065] The exemplary embodiments of the present invention will now be fully described with reference to the accompanying drawings. However, the invention may be embodied in many different forms and should not be construed as limited to the embodiments described herein. In the drawings, for clarity, the size and thickness of regions, parts, and layers may not be drawn to scale. For ease of understanding, the same devices will be described using the same reference numerals in the following description.

[0066] Figures 1A-1E This is a schematic cross-sectional view of a semiconductor substrate manufactured according to the first embodiment of the present invention.

[0067] Please refer to the following: Figure 1A A buffer layer 102 and a silicon carbide layer 104 are epitaxially grown on the silicon surface 100a of an N-type silicon carbide substrate 100. The thickness of the N-type silicon carbide substrate 100 is, for example, between 300 μm and 725 μm. The angle between the silicon surface 100a of the N-type silicon carbide substrate 100 and the (0001) surface is in the range of 0° + / - 8°, for example, within the range of 0° + / - 5°, preferably within the range of 0° + / - 3°, and most preferably 0°. The micropipe density (MPD) of the N-type silicon carbide substrate 100 is less than 1ea / cm². 2 basal plane dislocation (BPD) less than 3000 ea / cm 2 And threading screw dislocation (TSD) less than 1000 ea / cm 2The resistance of the N-type silicon carbide substrate 100 is approximately between 15 mΩ·cm and 26 mΩ·cm. The buffer layer 102 is a low-resistivity silicon carbide with a single-crystal structure. The silicon carbide layer 104 is either high-resistivity silicon carbide or N-type silicon carbide (N-SiC). If the silicon carbide layer 104 is high-resistivity silicon carbide (such as semi-insulating silicon carbide), it is suitable for semiconductor substrates of radio frequency (RF) devices; on the other hand, if the silicon carbide layer 104 is N-type silicon carbide, it is suitable for semiconductor substrates of power devices. The thickness of the silicon carbide layer 104 can be set between 0.1 μm and 50 μm, and the surface of the silicon carbide layer 104 has an angle relative to the (0001) plane, for example, within the range of 0°+ / -8°, 0°+ / -5°, or 0°+ / -3°, and the microtube density (MPD) of the silicon carbide layer 104 can be less than 0.5ea / cm. 2 Basic dislocations (BPDs) can be less than 10 ea / cm 2 Through-type spiral dislocations (TSDs) can be less than 500 ea / cm 2 In one embodiment, the silicon carbide layer 104 is high-resistivity silicon carbide, with a resistivity, for example, greater than 1E5 Ω·cm. In another embodiment, the silicon carbide layer 104 is N-type silicon carbide (N-SiC), with a resistivity, for example, in the range of 1E15 cm⁻¹. -3 ~1E20 cm -3 Between. Then, a gallium nitride epitaxial layer 106 is epitaxially grown on the silicon carbide layer 104 to obtain a semiconductor structure 108 composed of the buffer layer 102, the silicon carbide layer 104 and the gallium nitride epitaxial layer 106.

[0068] Next, please refer to Figure 1B After the gallium nitride epitaxial layer 106 is epitaxially grown, a damage layer 112 is formed in the semiconductor structure 108 using a laser 110. In this embodiment, the laser 110 is applied from the surface 106a of the gallium nitride epitaxial layer 106 to the buffer layer 102 to form the damage layer 112 in the buffer layer 102.

[0069] Then, please refer to Figure 1C A wafer carrier 114 is bonded to the surface 106a of the gallium nitride epitaxial layer 106, wherein the wafer carrier 114 is made of materials such as glass or sapphire.

[0070] Next, please refer to Figure 1D The N-type silicon carbide substrate 100 and the semiconductor structure 108 are separated from the damaged layer (112), and some of the buffer layer 102 may remain on the carbon surface 104a of the silicon carbide layer 104. Therefore, in one embodiment, the buffer layer 102 may be retained; in another embodiment, the buffer layer 102 needs to be ground off.

[0071] Next, please refer to Figure 1E To meet subsequent needs, a support substrate 116 can be bonded to the surface of the buffer layer 102 to facilitate subsequent movement and fixation of the entire semiconductor substrate. The support substrate 116 can be, for example, a silicon substrate, an SOI (Silicon-on-Insulator) substrate, a ceramic substrate, or a glass substrate. Alternatively, if the buffer layer has been ground, the support substrate 116 can be bonded to the surface of the silicon carbide layer 104. Moreover, after bonding the support substrate 116, the wafer carrier (114) can be removed to form radio frequency devices or power devices from the exposed surface 106a of the gallium nitride epitaxial layer 106.

[0072] Since the process of the first embodiment forms the separation damage layer 112 in the buffer layer 102 using laser 110 after the gallium nitride epitaxial layer 106 is grown, it can not only ensure the crystallinity quality of the silicon carbide layer 104 and the gallium nitride epitaxial layer 106, but also retain the complete silicon carbide layer 104 and N-type silicon carbide substrate 100, so that the separated N-type silicon carbide substrate 100 can be reused, thereby greatly reducing material costs.

[0073] Figures 2A-2D This is a schematic cross-sectional view of a semiconductor substrate manufactured according to a second embodiment of the present invention, wherein the same device symbols as in the first embodiment are used to represent the same or similar components, and the same or similar components can also be referred to the relevant description of the first embodiment, which will not be repeated here.

[0074] Please refer to the following: Figure 2A A buffer layer 102 and a silicon carbide layer 104 are epitaxially grown on the silicon surface 100a of an N-type silicon carbide substrate 100. Then, a gallium nitride epitaxial layer 106 is epitaxially grown on the silicon carbide layer 104 to obtain a semiconductor structure 108 composed of the buffer layer 102, the silicon carbide layer 104 and the gallium nitride epitaxial layer 106.

[0075] Next, please refer to Figure 2B In this embodiment, a laser is applied from the carbon surface 100b of the N-type silicon carbide substrate 100 to the silicon surface 100a of the N-type silicon carbide substrate 100 to form a damage layer 200 within the N-type silicon carbide substrate 100.

[0076] Then, please refer to Figure 2C A wafer carrier 114 is bonded to the surface 106a of the gallium nitride epitaxial layer 106.

[0077] Next, please refer to Figure 2DThe N-type silicon carbide substrate 100 and the semiconductor structure 108 are separated from the damaged layer (200), and some N-type silicon carbide substrate 100 may remain on the buffer layer 102. Therefore, in one embodiment, the buffer layer 102 can be retained; in another embodiment, grinding is required to remove the remaining N-type silicon carbide substrate 100 and buffer layer 102. Furthermore, if necessary, other processes can be performed such as... Figure 1E The steps are as follows: bonding a support substrate (not shown) and removing the wafer carrier 114.

[0078] Since the process in the second embodiment forms the separation damage layer 200 in the N-type silicon carbide substrate 100 using a laser 110 after the gallium nitride epitaxial layer 106 has been grown, it can not only ensure the crystallinity quality of the silicon carbide layer 104 and the gallium nitride epitaxial layer 106, but also preserve the complete silicon carbide layer 104. Furthermore, the laser 110 can precisely control the formation position of the damage layer 200, so as to preserve as much of the N-type silicon carbide substrate 100 as possible, making the separated N-type silicon carbide substrate 100 reusable and significantly reducing material costs.

[0079] Figures 3A-3D This is a schematic cross-sectional view of a semiconductor substrate manufactured according to a third embodiment of the present invention, wherein the same device symbols as in the first embodiment are used to represent the same or similar components, and the same or similar components can also be referred to the relevant description of the first embodiment, which will not be repeated here.

[0080] Please refer to the following: Figure 3A A buffer layer 102 is epitaxially grown on the silicon surface 100a of an N-type silicon carbide substrate 100, and then a laser lift-off (LLO) layer 300 is epitaxially grown. The LLO layer 300 is aluminum-doped silicon carbide, and the aluminum doping concentration of the LLO layer 300 is, for example, 1E20 cm⁻¹. -3 The thickness t1 of the LLO layer 300 is, for example, between 1.0 nm and 10 nm. Then, a silicon carbide layer 104 is epitaxially grown on the LLO layer 300.

[0081] Next, please refer to Figure 3B A gallium nitride epitaxial layer 106 is epitaxially grown on the silicon carbide layer 104 to obtain a semiconductor structure 302 composed of a buffer layer 102, an LLO layer 300, a silicon carbide layer 104, and a gallium nitride epitaxial layer 106. Then, a laser 110 is applied from the carbon surface 100b of the N-type silicon carbide substrate 100 to the LLO layer 300 to form a damage layer 304 within the LLO layer 300.

[0082] Then, please refer to Figure 3C A wafer carrier 114 is bonded to the surface 106a of the gallium nitride epitaxial layer 106.

[0083] Next, please refer to Figure 3D The N-type silicon carbide substrate 100 and the semiconductor structure 302 are separated from the damaged layer (304), and some LLO layer 300 may remain on the carbon surface 104a of the silicon carbide layer 104. Therefore, in one embodiment, the LLO layer 300 can be retained; in another embodiment, grinding is required to remove the residual LLO layer 300. Furthermore, if necessary, other processes can be performed as follows: Figure 1E The steps are as follows: bonding a support substrate (not shown) and removing the wafer carrier 114.

[0084] Because the process in the third embodiment forms the separation damage layer 304 in the LLO layer 300 using a laser 110 after the gallium nitride epitaxial layer 106 has been grown, it not only ensures the crystallinity quality of the silicon carbide layer 104 and the gallium nitride epitaxial layer 106, but also preserves the complete silicon carbide layer 104 and the N-type silicon carbide substrate 100. This allows the separated N-type silicon carbide substrate 100 to be reused, significantly reducing material costs. Furthermore, the resistance of the LLO layer 300 is lower than that of the buffer layer 102, which further improves the problem of lattice mismatch between the silicon carbide layer 104 and the underlying structural layer.

[0085] Figures 4A-4D This is a schematic cross-sectional view of a semiconductor substrate manufactured according to a fourth embodiment of the present invention, wherein the same device symbols as in the first embodiment are used to represent the same or similar components, and the same or similar components can also be referred to the relevant description of the first embodiment, which will not be repeated here.

[0086] Please refer to the following: Figure 4A A damage layer 402 is formed in the silicon surface 100a of an N-type silicon carbide substrate 100 by ion implantation 400. Therefore, the damage layer 402 is the ion implantation region in the N-type silicon carbide substrate 100.

[0087] Then, please refer to Figure 4B A buffer layer 102, a silicon carbide layer 104, and a gallium nitride epitaxial layer 106 are epitaxially grown on the silicon surface 100a of an N-type silicon carbide substrate 100 to obtain a semiconductor structure 108 composed of the buffer layer 102, the silicon carbide layer 104, and the gallium nitride epitaxial layer 106.

[0088] Next, please refer to Figure 4C A wafer carrier 114 is bonded to the surface 106a of the gallium nitride epitaxial layer 106.

[0089] Then, please refer to Figure 4DThe N-type silicon carbide substrate 100 and the semiconductor structure 108 are separated from the damaged layer 402, and some N-type silicon carbide substrate 100 may remain on the buffer layer 102. Therefore, in one embodiment, a portion of the N-type silicon carbide substrate 100 and the buffer layer 102 may be retained; in another embodiment, grinding is required to remove the remaining N-type silicon carbide substrate 100 and the buffer layer 102. Furthermore, if necessary, other processes can be performed such as... Figure 1E The steps are as follows: bonding a support substrate (not shown) and removing the wafer carrier 114.

[0090] Because the process of the fourth embodiment first uses ion implantation 400 to form a separation damage layer 402 in the N-type silicon carbide substrate 100 before growing the gallium nitride epitaxial layer 106, it can not only ensure the crystallinity quality of the silicon carbide layer 104 and the gallium nitride epitaxial layer 106, but also make the separated N-type silicon carbide substrate 100 reusable, thereby greatly reducing material costs.

[0091] Figure 5A This is a cross-sectional schematic diagram of a semiconductor substrate according to the fifth embodiment of the present invention.

[0092] Please refer to Figure 5A The semiconductor substrate 500 of this embodiment includes a high-resistivity silicon carbide layer 502, a material layer 504, and a gallium nitride epitaxial layer 506, and is therefore suitable as a semiconductor substrate for radio frequency (RF) devices. The high-resistivity silicon carbide layer 502 has a first surface 502a and a second surface 502b, with the first surface 502a opposite to the second surface 502b, and the high-resistivity silicon carbide layer 502 is, for example, semi-insulating silicon carbide (SI-SiC). The material layer 504 is in direct contact with the first surface 502a of the high-resistivity silicon carbide layer 502, but the invention is not limited thereto; in another embodiment, the semiconductor substrate may not have a material layer 504. The material layer 504 is, for example, a buffer layer, and the thickness t2 of the buffer layer may be less than 1.5 μm. In one embodiment, the buffer layer is silicon carbide with a lower resistance than the high-resistivity silicon carbide layer 502, and is a single-crystal structure. The gallium nitride epitaxial layer 506 is formed on the second surface 502b of the high-resistivity silicon carbide layer 502, wherein the thickness t3 of the gallium nitride epitaxial layer 506 is less than 2 μm and Figure 5A The structure can be manufactured using any of the methods in the first to fourth embodiments, and a step to remove residual structures other than material layer 504 can be added as needed. The resulting gallium nitride epitaxial layer 506 was tested, and its X-ray diffraction analysis showed that the full width at half maximum (FWHM) of the (002) plane was less than 100 arcsec, verifying that the grown epitaxial film was of excellent quality.

[0093] exist Figure 5AIn this high-resistivity silicon carbide layer 502, the thickness t4 is between 20 μm and 50 μm. The second surface 502b of the high-resistivity silicon carbide layer 502 has an angle relative to the (0001) surface within the range of 0° + / - 8°, for example, within the range of 0° + / - 5°, preferably within the range of 0° + / - 3°. The micropipe density (MPD) of the high-resistivity silicon carbide layer 502 is less than 0.5ea / cm². 2 basal plane dislocation (BPD) less than 10 ea / cm 2 And the number of threading screw dislocations (TSD) is less than 500 ea / cm 2 The resistivity of the high-resistivity silicon carbide layer 502 is greater than 1E5 Ω·cm. The resistance variation rate of the high-resistivity silicon carbide layer 502 is, for example, less than 50%. The so-called "resistivity variation rate" refers to the result of dividing the standard deviation of resistance by the average resistance.

[0094] Figure 5B This is a cross-sectional schematic diagram of another semiconductor substrate according to the fifth embodiment, wherein a semiconductor substrate is used... Figure 5A The same device symbol is used to represent the same or similar components, and the same or similar components can also be referred to. Figure 5A The relevant explanations will not be repeated here.

[0095] exist Figure 5B In the semiconductor substrate 500, the material layer is a laser lift-off (LLO) layer 510, located on and in direct contact with the first surface 502a of the high-resistivity silicon carbide layer 502. The LLO layer 510 may be aluminum-doped silicon carbide. In one embodiment, the aluminum doping concentration of the LLO layer 510 is, for example, 1E20 cm⁻¹. -3 The thickness t1 of the LLO layer 510 is, for example, between 1.0 nm and 10 nm. Figure 5B The structure can be manufactured using the third embodiment.

[0096] Figure 5C This is a cross-sectional schematic diagram of another semiconductor substrate according to the fifth embodiment. Wherein, it uses... Figure 5A The same device symbol is used to represent the same or similar components, and the same or similar components can also be referred to. Figure 5A The relevant explanations will not be repeated here.

[0097] exist Figure 5C In the semiconductor substrate 500, a support substrate 512 may also be included, bonded to the exposed surface of the material layer 504 (buffer layer), wherein the support substrate 512 is, for example, a silicon substrate, an SOI substrate, a ceramic substrate, or a glass substrate.

[0098] Figure 6A This is a cross-sectional schematic diagram of a semiconductor substrate according to the sixth embodiment of the present invention.

[0099] Please refer to Figure 6A The semiconductor substrate 600 of this embodiment includes an N-type silicon carbide (N-SiC) layer 602 and a gallium nitride epitaxial layer 604, and is therefore suitable as a semiconductor substrate for power devices. The gallium nitride epitaxial layer 604 is formed on the surface of the N-SiC layer 602, wherein the thickness t3 of the gallium nitride epitaxial layer 604 is between 0.3 μm and 6 μm. Figure 6A The structure can be manufactured using any of the methods in the first to fourth embodiments, and a step to remove residual structures other than the N-SiC layer 602 can be added as needed. The resulting gallium nitride epitaxial layer 604, after testing, has a full width at half maximum (FWHM) of less than 100 arcsec on the (002) plane according to X-ray diffraction analysis. The thickness t6 of the N-SiC layer 602 is between 0.1 μm and 50 μm, the surface of the N-SiC layer 602 has an angle within the range of 0° + / - 8° relative to the (0001) plane, and the microtube density (MPD) of the N-SiC layer 602 is less than 0.5 ea / cm². 2 Basic dislocations (BPD) less than 10 ea / cm 2 and through-type spiral dislocations (TSD) less than 500 ea / cm 2 In one embodiment, the resistance of the N-SiC layer 602 is, for example, 1E15 cm⁻¹. -3 ~1E20 cm -3 Between [a certain range]. The resistivity change rate of the N-SiC layer 602 is less than 5%.

[0100] Figure 6B This is a cross-sectional schematic diagram of another semiconductor substrate according to the sixth embodiment, wherein a semiconductor substrate is used with... Figure 6A The same device symbol is used to represent the same or similar components, and the same or similar components can also be referred to. Figure 6A The relevant explanations will not be repeated here.

[0101] exist Figure 6B In the semiconductor substrate 600, a support substrate 606 may also be included, bonded to the exposed surface of the N-SiC layer 602, wherein the support substrate 606 is, for example, a silicon substrate, an SOI substrate, a ceramic substrate, or a glass substrate.

[0102] In summary, this invention utilizes existing epitaxial processes to sequentially epitaxially grow a silicon carbide layer, a buffer layer, and a gallium nitride epitaxial layer on a silicon carbide substrate. Furthermore, by combining various methods that can form a damage layer between the silicon carbide substrate and the silicon carbide layer, it is possible not only to grow gallium nitride with excellent crystallinity, but also to retain most of the silicon carbide substrate due to the presence of the damage layer, enabling it to be reused and thereby reducing substrate costs.

[0103] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for manufacturing a semiconductor substrate, characterized in that, include: A buffer layer and a silicon carbide layer are epitaxially grown on the silicon surface of an N-type silicon carbide substrate, wherein the silicon carbide layer is high-resistivity silicon carbide or N-type silicon carbide, and the resistivity of the high-resistivity silicon carbide layer is greater than 1E5Ω·cm. A gallium nitride epitaxial layer is grown on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer and the gallium nitride epitaxial layer; After the gallium nitride epitaxial layer is grown, a damage layer is formed in the semiconductor structure using a laser; The surface bonding wafer carrier of the gallium nitride epitaxial layer; and Separate the N-type silicon carbide substrate from the semiconductor structure from the damaged layer.

2. The method for manufacturing a semiconductor substrate according to claim 1, characterized in that, The method of forming the damage layer includes: applying the laser from the surface of the gallium nitride epitaxial layer to the buffer layer to form the damage layer within the buffer layer.

3. The method for manufacturing a semiconductor substrate according to claim 1, characterized in that, The method of forming the damage layer includes: applying the laser from the carbon surface of the N-type silicon carbide substrate to the silicon surface of the N-type silicon carbide substrate to form the damage layer within the N-type silicon carbide substrate.

4. The method for manufacturing a semiconductor substrate according to claim 1, characterized in that, After the epitaxial growth of the buffer layer and before the epitaxial growth of the silicon carbide layer, a laser lift-off layer is further included, wherein the laser lift-off layer is aluminum-doped silicon carbide with an aluminum doping concentration of 1E20cm⁻¹. -3 The thickness of the laser ablation layer is between 1.0 nm and 10 nm.

5. The method for manufacturing a semiconductor substrate according to claim 4, characterized in that, The method of forming the damage layer includes: applying the laser from the carbon surface of the N-type silicon carbide substrate to the laser lift-off layer to form the damage layer within the laser lift-off layer.

6. A method for manufacturing a semiconductor substrate, characterized in that, include: A damage layer is formed within the silicon surface of an N-type silicon carbide substrate using ion implantation. After the damage layer is formed, a buffer layer and a silicon carbide layer are epitaxially grown on the silicon surface of the N-type silicon carbide substrate, and the silicon carbide layer is high-resistivity silicon carbide or N-type silicon carbide, and the resistivity of the high-resistivity silicon carbide layer is greater than 1E5Ω·cm. A gallium nitride epitaxial layer is grown on the silicon carbide layer to obtain a semiconductor structure composed of the buffer layer, the silicon carbide layer and the gallium nitride epitaxial layer; The surface bonding wafer carrier of the gallium nitride epitaxial layer; and Separate the N-type silicon carbide substrate from the semiconductor structure from the damaged layer.

7. The method for manufacturing a semiconductor substrate according to claim 6, characterized in that, The silicon surface of the N-type silicon carbide substrate has an angle of 0° + / - 8° relative to the (0001) surface.

8. The method for manufacturing a semiconductor substrate according to claim 1 or 6, characterized in that, After separating the N-type silicon carbide substrate from the semiconductor structure, the method further includes: removing the buffer layer.

9. The method for manufacturing a semiconductor substrate according to claim 8, characterized in that, Also includes: A support substrate is bonded to the silicon carbide layer, the support substrate including a silicon substrate, an SOI substrate, a ceramic substrate, or a glass substrate.

10. The method for manufacturing a semiconductor substrate according to claim 1 or 6, characterized in that, After separating the N-type silicon carbide substrate from the semiconductor structure, the method further includes bonding a support substrate to the surface of the buffer layer, the support substrate comprising a silicon substrate, an SOI substrate, a ceramic substrate, or a glass substrate.

11. The method for manufacturing a semiconductor substrate according to claim 9, characterized in that, After joining the support substrate, the process further includes removing the wafer carrier.

12. The method for manufacturing a semiconductor substrate according to claim 10, characterized in that, After joining the support substrate, the process further includes removing the wafer carrier.

13. The method for manufacturing a semiconductor substrate according to claim 1 or 6, characterized in that, The material of the wafer carrier includes glass or sapphire.

14. A semiconductor substrate manufactured by the method of manufacturing a semiconductor substrate according to claim 1 or 6, characterized in that, include: A high-resistivity silicon carbide layer has a first surface and a second surface, wherein the first surface is relative to the second surface, and the resistivity of the high-resistivity silicon carbide layer is greater than 1E5Ω·cm; as well as A gallium nitride epitaxial layer is formed on the second surface of the high-resistivity silicon carbide layer, wherein the thickness of the gallium nitride epitaxial layer is less than 2 μm and the full width at half maximum (FWHM) of the (002) plane analyzed by X-ray diffraction is less than 100 arcsec, and The thickness of the high-resistivity silicon carbide layer is between 20 μm and 50 μm, the second surface of the high-resistivity silicon carbide layer has an angle relative to the (0001) plane within the range of 0° + / - 8°, and the microtube density of the high-resistivity silicon carbide layer is less than 0.5ea / cm². 2 basal dislocations less than 10ea / cm 2 And through-type spiral dislocations less than 500 ea / cm 2 .

15. The semiconductor substrate according to claim 14, characterized in that, The resistivity change rate of the high-resistivity silicon carbide layer is less than 50%.

16. The semiconductor substrate according to claim 14, characterized in that, It also includes a buffer layer that is in direct contact with the first surface of the high-resistivity silicon carbide layer.

17. The semiconductor substrate according to claim 16, characterized in that, The thickness of the buffer layer is less than 1.5 μm.

18. The semiconductor substrate according to claim 14, characterized in that, It also includes a laser lift-off layer that is in direct contact with the first surface of the high-resistivity silicon carbide layer.

19. The semiconductor substrate according to claim 18, characterized in that, The laser-exfoliated layer is aluminum-doped silicon carbide.

20. The semiconductor substrate according to claim 18, characterized in that, The aluminum doping concentration of the laser-exfoliated layer is 1E20 cm⁻¹. -3 The thickness of the laser ablation layer is between 1.0 nm and 10 nm.

21. The semiconductor substrate according to claim 14, characterized in that, It also includes a support substrate bonded to the exposed surface of the high-resistivity silicon carbide layer, the support substrate including a silicon substrate, an SOI substrate, a ceramic substrate or a glass substrate.

22. A semiconductor substrate manufactured by the method of manufacturing a semiconductor substrate according to claim 1 or 6, characterized in that, include: N-type silicon carbide layer; as well as A gallium nitride epitaxial layer is formed on the surface of the N-type silicon carbide layer, wherein the thickness of the gallium nitride epitaxial layer is between 0.3 μm and 6 μm and the full width at half maximum (FWHM) of the (002) plane analyzed by X-ray diffraction is less than 100 arcsec, and The thickness of the N-type silicon carbide layer is between 0.1 μm and 50 μm, the surface of the N-type silicon carbide layer has an angle relative to the (0001) plane within the range of 0° + / - 8°, and the microtube density of the N-type silicon carbide layer is less than 0.5ea / cm². 2 basal dislocations less than 10ea / cm 2 And through-type spiral dislocations less than 500 ea / cm 2 .

23. The semiconductor substrate according to claim 22, characterized in that, The resistivity change rate of the N-type silicon carbide layer is less than 5%.

24. The semiconductor substrate according to claim 22, characterized in that, It also includes a support substrate bonded to the exposed surface of the N-type silicon carbide layer, the support substrate including a silicon substrate, an SOI substrate, a ceramic substrate or a glass substrate.

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