Circuit configuration

Abstract

The embodiment of the present application discloses a circuit structure applied to a three-level converter including a flying capacitor, the circuit structure comprising a positive input end and a negative input end configured to receive a first voltage; a first power tube, a second power tube, a third power tube and a fourth power tube coupled in series between the positive input end and the negative input end; and a first capacitor coupled between a common end of the second power tube and the third power tube and the negative input end; wherein a common end of the first power tube and the second power tube is coupled to one end of the flying capacitor, and a common end of the third power tube and the fourth power tube is coupled to the other end of the flying capacitor. The circuit structure can pre-charge and discharge the voltage of the flying capacitor as a soft start circuit before the three-level converter works, and can clamp the voltage of the flying capacitor at half of the first voltage during the working of the three-level converter.

Description

Technical Field

[0001] This invention relates to the field of power electronics, and more specifically, to a circuit structure. Background Technology

[0002] Compared to traditional converter topologies, three-level converters exhibit lower voltage stress on the power transistors, thereby improving system efficiency and making them highly suitable for medium to high power applications. Figure 1 A prior art three-level buck converter is presented, which includes power transistors Q1 to Q4 and a flying capacitor C. FLY The inductor L, the power transistors Q1 to Q4 are connected in series between the input high potential terminal and the ground potential terminal to receive the input voltage Vin, and the flying capacitor C FLY A capacitor L is coupled between the common terminal of power transistors Q1 and Q2 and the common terminal of power transistors Q3 and Q4. One end of the inductor L is coupled to the common terminal sw of power transistors Q2 and Q3, and the other end of the inductor L is coupled to the output high-potential terminal. Ideally, power transistors Q1 and Q2 have the same duty cycle, and the flying capacitor C... FLY The voltage is 1 / 2*vin, and the voltage stress of each power transistor is also 1 / 2*vin. Compared with a traditional buck converter, the filter inductor L and the output capacitor C... out It also reduces power density.

[0003] However, in practical applications, due to slight differences in the drive and control circuits, the conduction times of power transistors Q1 and Q2 cannot be exactly equal. Furthermore, the on-state voltage drop and switching characteristics of each power transistor will not be completely identical. This can lead to the flying capacitor C... FLY The voltage deviation causes an increase in voltage stress on each power transistor, leading to larger inductor current ripple and output voltage ripple. Furthermore, before the three-level buck converter operates, the flying capacitor C... FLY The voltage needs to be precharged to half of the input voltage Vin, therefore an additional soft-start circuit is required for the flying capacitor C. FLY Perform a soft boot. Summary of the Invention

[0004] In view of this, the present invention proposes a circuit structure to solve the technical problems in the prior art that cause voltage stress, inductor current ripple and increased output voltage ripple in each power transistor due to voltage deviation of the flying capacitor, and the need for an additional soft-start circuit to soft-start the flying capacitor.

[0005] This invention provides a circuit structure applied to a three-level converter. The three-level converter includes a flying capacitor and comprises: a positive input terminal and a negative input terminal configured to receive a first voltage; a first power transistor, a second power transistor, a third power transistor, and a fourth power transistor, sequentially connected in series between the positive input terminal and the negative input terminal; and a first capacitor coupled between the common terminal of the second and third power transistors and the negative input terminal. The common terminal of the first and second power transistors is coupled to one end of the flying capacitor, and the common terminal of the third and fourth power transistors is coupled to the other end of the flying capacitor.

[0006] Preferably, the first voltage is configured to be proportional to the voltage of the flying capacitor when the three-level converter reaches a steady state.

[0007] Preferably, the first voltage is configured to be equal to twice the voltage of the flying capacitor when the three-level converter reaches steady state.

[0008] Preferably, the three-level converter is configured as one of a three-level buck converter, a three-level boost converter, a three-level buck-boost converter, a three-level Cuk converter, a three-level SEPIC converter, a three-level Zeta converter, a three-level forward converter, a three-level flyback converter, a three-level half-bridge converter, and a three-level full-bridge converter.

[0009] Preferably, the operating states of the first power transistor, the second power transistor, the third power transistor, and the fourth power transistor are controlled to clamp the voltage of the flying capacitor to half of the first voltage.

[0010] Preferably, the first power transistor and the third power transistor have the same switching state, and the second power transistor and the fourth power transistor have the same switching state.

[0011] Preferably, the first power transistor and the second power transistor have the same duty cycle.

[0012] Preferably, when the three-level converter is operating in the stage of charging the flying capacitor, the first power transistor and the third power transistor are turned on; when the three-level converter is operating in the stage of discharging the flying capacitor, the second power transistor and the fourth power transistor are turned on.

[0013] Preferably, the three-level converter includes: a fifth power transistor, a sixth power transistor, a seventh power transistor, and an eighth power transistor, which are connected in series between the high-potential end and the low-potential end of the input terminal of the three-level converter; a first inductor, which is coupled between the common terminal of the sixth and seventh power transistors and the high-potential end of the output terminal of the three-level converter; and a flying capacitor, which is coupled between the common terminal of the fifth and sixth power transistors and the common terminal of the seventh and eighth power transistors.

[0014] Preferably, the input terminal of the three-level converter receives an input voltage, and the first voltage is configured as the input voltage.

[0015] Preferably, the operating states of the first power transistor, the second power transistor, the third power transistor, and the fourth power transistor are controlled to clamp the voltage of the flying capacitor to half of the input voltage.

[0016] Preferably, the control signals of the first power transistor and the third power transistor are configured as the AND result of the control signals of the fifth power transistor and the seventh power transistor; the control signals of the second power transistor and the fourth power transistor are configured as the AND result of the control signals of the sixth power transistor and the eighth power transistor.

[0017] Preferably, the operating states of the first power transistor, the second power transistor, the third power transistor, and the fourth power transistor are controlled to pre-discharge and pre-charge the flying capacitor in sequence, so as to complete the soft start of the flying capacitor.

[0018] Preferably, the first power transistor is controlled to turn off, and the second, third, and fourth power transistors are controlled to turn on, so as to pre-discharge the flying capacitor; the third power transistor is controlled to turn off, and the first, second, and fourth power transistors are controlled to turn on, so as to pre-charge the flying capacitor.

[0019] Preferably, the pre-discharge of the flying capacitor is completed when the voltage of the flying capacitor or the voltage of the first capacitor is less than a first threshold.

[0020] Preferably, the pre-discharge of the flying capacitor is completed when the pre-discharge time of the flying capacitor reaches the first time.

[0021] Preferably, when the voltage of the first capacitor or the voltage of the flying capacitor reaches half of the first voltage, the pre-charging of the flying capacitor is completed and the soft-start of the flying capacitor ends.

[0022] Preferably, the on-resistance of the first power transistor and the fourth power transistor is controlled to control the current for pre-charging and discharging the flying capacitor.

[0023] Preferably, a first resistor is connected in series with the first power transistor and / or the fourth power transistor to control the current for pre-charging and discharging the flying capacitor.

[0024] Compared with the prior art, the technical solution of the present invention has the following advantages: The circuit structure of the present invention is applied to a three-level converter, the three-level converter including a flying capacitor, the circuit structure including a positive input terminal and a negative input terminal, configured to receive a first voltage; a first power transistor, a second power transistor, a third power transistor, and a fourth power transistor are connected in series between the positive input terminal and the negative input terminal; a first capacitor is coupled between the common terminal of the second and third power transistors and the negative input terminal; wherein, the common terminal of the first and second power transistors is coupled to one end of the flying capacitor, and the common terminal of the third and fourth power transistors is coupled to the other end of the flying capacitor. The circuit structure of the present invention clamps the voltage of the flying capacitor to half of the first voltage to adjust the voltage of the flying capacitor in the three-level converter, the first voltage being configured according to the voltage of the flying capacitor when the three-level converter reaches a steady state. The circuit structure of this invention can both act as a soft-start circuit to pre-charge and discharge the voltage of the flying capacitor before the three-level converter operates, and clamp the voltage of the flying capacitor to half of the first voltage during the operation of the three-level converter. Furthermore, it is simple to control and has a fast response. Attached Figure Description

[0025] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0026] Figure 1 This is a circuit diagram of a prior art three-level buck converter;

[0027] Figure 2 This is a circuit diagram of Embodiment 1 of the circuit structure of the present invention;

[0028] Figures 3a-3b This is a schematic diagram of the working circuit in each working zone of Embodiment 1 of the circuit structure of the present invention;

[0029] Figure 4a This is a schematic diagram of the working circuit of Embodiment 1 of the circuit structure of the present invention during the pre-discharge stage;

[0030] Figure 4b This is a schematic diagram of the working circuit of Embodiment 1 of the circuit structure of the present invention during the pre-charging stage;

[0031] Figure 5 This is a circuit diagram of Embodiment 2 of the circuit structure of the present invention;

[0032] Figure 6This is a logic diagram illustrating the generation of control signals in Embodiment 2 of the circuit structure of the present invention;

[0033] Figure 7a The waveform diagram of a control signal in a second embodiment of the circuit structure of the present invention is shown.

[0034] Figure 7b This is a waveform diagram of another control signal in a second embodiment of the circuit structure of the present invention;

[0035] Figures 8a-8b This is a schematic diagram of the working circuit in each working zone of Embodiment 2 of the circuit structure of the present invention;

[0036] Figure 9a This is a schematic diagram of the working circuit of Embodiment 2 of the present invention during the pre-discharge stage;

[0037] Figure 9b This is a schematic diagram of the working circuit in the pre-charging stage of Embodiment 2 of the circuit structure of the present invention. Detailed Implementation

[0038] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0039] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0040] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0041] Unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0042] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0043] Figure 2 This is a circuit diagram of an embodiment of the circuit structure of the present invention; the circuit structure is applied to any three-level converter, wherein the three-level converter includes a flying capacitor C. FLY The circuit structure includes a positive input terminal a, a negative input terminal b, a first power transistor Q1, a second power transistor Q2, a third power transistor Q3, a fourth power transistor Q4, and a first capacitor C1. The positive input terminal a and the negative input terminal b are configured to receive a first voltage V1. The first power transistor Q1, the second power transistor Q2, the third power transistor Q3, and the fourth power transistor Q4 are connected in series between the positive input terminal a and the negative input terminal b. The first capacitor C1 is coupled between the common terminal n2 of the second power transistor Q2 and the third power transistor Q3 and the negative input terminal b. The common terminal n1 of the first power transistor Q1 and the second power transistor Q2 is coupled to the flying capacitor C1. FLY At one end, the common terminal n3 of the third power transistor Q3 and the fourth power transistor Q4 is coupled to the flying capacitor C. FLY The other end.

[0044] The circuit structure of this invention can achieve the following two functions: 1. Clamping the voltage of the flying capacitor. 2. Soft-starting the flying capacitor.

[0045] 1. The voltage of the flying capacitor is clamped using the circuit structure described above.

[0046] For different types of three-level converters, the first voltage V1 is determined by the flying capacitor C when the three-level converter reaches a steady state. FLY The voltage is configured. Further, the first voltage V1 is configured to be the voltage of the flying capacitor C when the three-level converter reaches steady state. FLY The voltage is proportional to the voltage. Furthermore, the first voltage V1 is configured to be equal to the flying capacitor C when the three-level converter reaches steady state. FLY Twice the voltage.

[0047] Furthermore, by controlling the operating states of the first power transistor, the second power transistor, the third power transistor, and the fourth power transistor, the voltage of the flying capacitor is clamped to half of the first voltage.

[0048] Preferably, the first power transistor Q1 and the third power transistor Q3 have the same switching state, and the second power transistor Q2 and the fourth power transistor Q4 have the same switching state. In this embodiment, the control signals for the first power transistor Q1 and the third power transistor Q3 are both control signal GH, and the control signals for the second power transistor Q2 and the fourth power transistor Q4 are both control signal GL. Furthermore, the duty cycles of the control signals GH and GL are the same, resulting in smaller ripple in the first capacitor C1, thus reducing the requirement for the capacitance value of the first capacitor C1.

[0049] When the three-level converter is operating in the stage of charging the flying capacitor, the first power transistor Q1 and the third power transistor Q3 are turned on, such as... Figure 3a As shown, the first voltage V1 affects the flying capacitor C. FLY The first capacitor C1 is charged, and at this time, the flying capacitor C FLY voltage VC FLY The sum of the voltage VC1 across the first capacitor C1 and the voltage VC1 across the first capacitor C1 equals the first voltage V1, i.e., V1 = VC. FLY +VC1.

[0050] When the three-level converter is operating in the stage of discharging the flying capacitor, the second power transistor Q2 and the fourth power transistor Q4 are turned on, such as... Figure 3b As shown, the flying capacitor C FLY Both the first capacitor C1 and the flying capacitor C2 discharge. FLY It is connected in parallel with the first capacitor C1, and the flying capacitor C FLY voltage VC FLY The voltage VC1 across the first capacitor C1 is equal to VC1, i.e., VC FLY =VC1.

[0051] Therefore, when the three-level converter reaches a steady state, VC FLY =VC1=1 / 2*V1, which is the flying capacitor C FLY The voltage is clamped to half of the first voltage V1 in steady state.

[0052] 2. Soft-start the flying capacitor using the aforementioned circuit structure:

[0053] For the flying capacitor C FLY The soft-start process includes a pre-discharge phase and a pre-charge phase. By controlling the operating states of the first, second, third, and fourth power transistors, the flying capacitor is sequentially pre-discharged and pre-charged to complete the soft-start of the flying capacitor.

[0054] Pre-discharge stage: such as Figure 4aAs shown, the first power transistor Q1 is turned off, while the second power transistor Q2, the third power transistor Q3, and the fourth power transistor Q4 are turned on, and the flying capacitor C... FLY The flying capacitor C is connected in parallel with the first capacitor C1. FLY Both capacitor C1 and capacitor C1 are discharged. After discharge, the pre-charging stage begins.

[0055] In one embodiment, when a flying capacitor C is detected FLY When the voltage on the flying capacitor or the voltage on the first capacitor C1 is less than a first threshold, the pre-discharge of the flying capacitor is completed, and the pre-charging phase begins. In another embodiment, when the pre-discharge time of the flying capacitor reaches a first time, the pre-discharge of the flying capacitor is completed, and the pre-charging phase begins.

[0056] Pre-charging phase: such as Figure 4b As shown, the third power transistor Q3 is turned off, the first power transistor Q1, the second power transistor Q2, and the fourth power transistor Q4 are turned off, and the flying capacitor C... FLY It is connected in parallel with the first capacitor C1, and the first voltage V1 affects the flying capacitor C. FLY And the first capacitor C1 is charged. In one embodiment, when the flying capacitor C is detected... FLY When the voltage of the first capacitor C1 or the voltage of the first capacitor C1 reaches half of the first voltage V1, that is, 1 / 2*V1, the pre-charging of the flying capacitor is completed and the soft start ends.

[0057] Furthermore, in one embodiment, the on-resistance of the first power transistor Q1 and the fourth power transistor Q4 is controlled to control the conduction impedance of the flying capacitor C. FLY The current used for pre-charge and discharge. In another embodiment, a first resistor is connected in series with the first power transistor Q1 and / or the fourth power transistor Q4 to control the current applied to the flying capacitor C. FLY The current used for pre-charge and discharge. Furthermore, the first power transistor Q1 and the fourth power transistor Q4 are power switches, with a first resistor connected in series at the power terminal of the power switch, for example, in series at the source or drain of the power switch.

[0058] Optionally, the three-level converter of the present invention is configured as one of a three-level buck converter, a three-level boost converter, a three-level buck-boost converter, a three-level Cuk converter, a three-level SEPIC converter, a three-level Zeta converter, a three-level forward converter, a three-level flyback converter, a three-level half-bridge converter, and a three-level full-bridge converter.

[0059] The circuit structure of this invention clamps the voltage of the flying capacitor to half of a first voltage V1 to regulate the voltage of the flying capacitor in the three-level converter. The first voltage V1 is configured based on the voltage of the flying capacitor when the three-level converter reaches a steady state. For example, when the three-level converter is a three-level buck converter, in steady state, the voltage of the flying capacitor is half of the input voltage of the three-level buck converter, so the first voltage V1 is configured as the input voltage of the three-level buck converter; when the three-level converter is a three-level boost converter, in steady state, the voltage of the flying capacitor is half of the output voltage of the three-level boost converter, so the first voltage V1 is configured as the output voltage of the three-level boost converter; when the three-level converter is a three-level buck-boost converter, in steady state, the voltage of the flying capacitor is half of the sum of the output voltage and input voltage of the three-level buck-boost converter, so the first voltage V1 is configured as the sum of the output voltage and input voltage of the three-level buck-boost converter. The following detailed description uses a three-level buck converter as an example, but this invention does not limit it. The circuit structure of this invention can both pre-charge and discharge the voltage of the flying capacitor as a soft-start circuit before the three-level converter operates, and clamp the voltage of the flying capacitor to half of the first voltage V1 during the operation of the three-level converter, and is simple to control and has a fast response.

[0060] Figure 5 This is a circuit diagram of Embodiment 2 of the circuit structure of the present invention; the circuit structure is applied to a three-level buck converter, which includes a fifth power transistor Q5, a sixth power transistor Q6, a seventh power transistor Q7, an eighth power transistor Q8, a first inductor L, and a flying capacitor C. FLY The fifth power transistor Q5, the sixth power transistor Q6, the seventh power transistor Q7, and the eighth power transistor Q8 are connected in series between the high-potential terminal c and the low-potential terminal d of the input terminal; the first inductor L is coupled between the common terminal m2 of the sixth power transistor Q6 and the seventh power transistor Q7 and the high-potential terminal e of the output terminal; the flying capacitor C FLY The common terminal m1 of the fifth power transistor Q5 and the sixth power transistor Q6 is coupled between the common terminal m3 of the seventh power transistor Q7 and the eighth power transistor Q8. The high-potential terminal c and the low-potential terminal d of the input terminal receive the input voltage Vin. Optionally, the three-level buck converter also includes an output capacitor C. out The output capacitor C out Coupled between the high-potential output terminal e and the ground-potential terminal f, the output voltage V is obtained. OUTThe circuit structure includes a positive input terminal a, a negative input terminal b, a first power transistor Q1, a second power transistor Q2, a third power transistor Q3, a fourth power transistor Q4, and a first capacitor C1. The positive input terminal a and the negative input terminal b are configured to receive an input voltage Vin; the first power transistor Q1, the second power transistor Q2, the third power transistor Q3, and the fourth power transistor Q4 are connected in series between the positive input terminal a and the negative input terminal b; the first capacitor C1 is coupled between the common terminal n2 of the second power transistor Q2 and the third power transistor Q3 and the negative input terminal b; wherein, the common terminal n1 of the first power transistor Q1 and the second power transistor Q2 is coupled to the flying capacitor C1. FLY At one end, the common terminal n3 of the third power transistor Q3 and the fourth power transistor Q4 is coupled to the flying capacitor C. FLY The other end.

[0061] In the three-level buck converter, the control signal G5 of the fifth power transistor Q5 and the control signal G8 of the eighth power transistor Q8 are complementary, the control signal G6 of the sixth power transistor Q6 and the control signal G7 of the seventh power transistor Q7 are complementary, and the duty cycles of the control signal G5 of the fifth power transistor Q5 and the control signal G6 of the sixth power transistor Q6 are the same. Preferably, the phase difference between the control signal G5 of the fifth power transistor Q5 and the control signal G6 of the sixth power transistor Q6 is 180 degrees.

[0062] The circuit structure of this invention can achieve the following two functions: 1. Clamping the voltage of the flying capacitor. 2. Soft-starting the flying capacitor.

[0063] 1. Clamp the voltage of the flying capacitor using the aforementioned circuit structure:

[0064] During the operation of the three-level buck converter, the circuit structure clamps the voltage of the flying capacitor to half of the input voltage Vin, i.e., 1 / 2 * Vin. Furthermore, by controlling the operating states of the first power transistor Q1, the second power transistor Q2, the third power transistor Q3, and the fourth power transistor Q4, the voltage of the flying capacitor is clamped to half of the input voltage Vin.

[0065] The control signals for the first and third power transistors are the same, both being control signal GH. Similarly, the control signals for the second and fourth power transistors are the same, both being control signal GL. Furthermore, the duty cycles of control signals GH and GL are the same, resulting in lower ripple for the first capacitor C1, thus reducing the capacitance requirement for C1. When the three-level buck converter is operating in the charging phase of the flying capacitor, the first power transistor Q1 and the third power transistor Q3 are turned on. When the three-level converter is operating in the discharging phase of the flying capacitor, the second power transistor Q2 and the fourth power transistor Q4 are turned on.

[0066] Figure 6 A logic diagram illustrating the generation of control signals for the circuit structure is provided. For example... Figure 6 As shown, the first input of AND gate 11 receives the control signal G5 of the fifth power transistor Q5, the second input of AND gate 11 receives the control signal G7 of the seventh power transistor Q7, and the output of AND gate 11 is configured as the control signal GH; the first input of AND gate 12 receives the control signal G6 of the sixth power transistor Q6, the second input of AND gate 12 receives the control signal G8 of the eighth power transistor Q8, and the output of AND gate 12 is configured as the control signal GL.

[0067] Figure 7a This is a waveform diagram of a control signal in a second embodiment of the circuit structure of the present invention, wherein the duty cycle D is less than 0.5. Combined with... Figure 7a and Figures 8a-8b This illustrates the clamping process in Embodiment 2. Figure 7a As shown:

[0068] In operating range ①, G5 / 7 / H is at a high level, and the first power transistor Q1, the third power transistor Q3, the fifth power transistor Q5, and the seventh power transistor Q7 are turned on. The circuit structure and the schematic diagram of the three-level buck converter are shown below. Figure 8a As shown, at this stage, the input voltage Vin affects the flying capacitor C. FLY The first inductor L1 is charged, and the load is powered; simultaneously, the input voltage Vin affects the flying capacitor C. FLY The first capacitor C1 is charged, and at this time, the flying capacitor C FLY voltage VC FLY The sum of the voltage VC1 across the first capacitor C1 and the voltage VC1 is equal to the input voltage Vin, i.e., Vin = VC. FLY +VC1.

[0069] In operating range ②, G7 / 8 is at a high level, the seventh power transistor Q7 and the eighth power transistor Q8 are turned on, and the first inductor L freewheels to supply power to the load.

[0070] In operating range ③, G6 / 8 / L is at a high level, and the second power transistor Q2, the fourth power transistor Q4, the sixth power transistor Q6, and the eighth power transistor Q8 are turned on. The circuit structure and schematic diagram of the three-level buck converter are shown below. Figure 8b As shown in the figure, at this stage, the flying capacitor C FLY Discharge to power the load; simultaneously, the flying capacitor C FLY It is connected in parallel with the first capacitor C1, and the flying capacitor C FLY voltage VC FLY The voltage VC1 across the first capacitor C1 is equal to VC1, i.e., VC FLY =VC1.

[0071] During operating interval ④, G7 / 8 are at a high level, the seventh power transistor Q7 and the eighth power transistor Q8 are turned on, and the first inductor L freewheels to supply power to the load. Operating intervals ① to ④ constitute one operating cycle Ts.

[0072] Therefore, when the three-level buck converter reaches steady state, VC FLY =VC1=1 / 2*Vin, which is the flying capacitor C FLY The voltage is clamped by the circuit structure at half of the input voltage Vin, i.e., 1 / 2*Vin, in steady state.

[0073] Figure 7b This is a waveform diagram of another control signal in a second embodiment of the circuit structure of the present invention, wherein the duty cycle D is greater than 0.5. Combined with... Figure 7b and Figures 8a-8b This illustrates the clamping process in Embodiment 2. Figure 7b As shown:

[0074] During the operating range ①, G5 / 6 is at a high level, the fifth power transistor Q5 and the sixth power transistor Q6 are turned on, and the input voltage Vin supplies power to the load through the first inductor L.

[0075] In operating range ②, G5 / 7 / H is at a high level, and the first power transistor Q1, the third power transistor Q3, the fifth power transistor Q5, and the seventh power transistor Q7 are turned on. The circuit structure and schematic diagram of the three-level buck converter are shown below. Figure 8a As shown, at this stage, the input voltage Vin affects the flying capacitor C. FLY The first inductor L is charged, and the load is powered; simultaneously, the input voltage Vin affects the flying capacitor C. FLY The first capacitor C1 is charged, and at this time, the flying capacitor C FLY voltage VC FLY The sum of the voltage VC1 across the first capacitor C1 and the voltage VC1 across it equals the input voltage Vin, i.e., Vin = VC.FLY +VC1.

[0076] In operating range ③, G5 / 6 is at a high level, the fifth power transistor Q5 and the sixth power transistor Q6 are turned on, and the input voltage Vin supplies power to the load through the first inductor L.

[0077] In operating range ④, G6 / 8 / L is at a high level, and the second power transistor Q2, the fourth power transistor Q4, the sixth power transistor Q6, and the eighth power transistor Q8 are turned on. The circuit structure and schematic diagram of the three-level buck converter are shown below. Figure 8b As shown in the figure, at this stage, the flying capacitor C FLY Discharge to power the load; simultaneously, the flying capacitor C FLY It is connected in parallel with the first capacitor C1, and the flying capacitor C FLY voltage VC FLY The voltage VC1 across the first capacitor C1 is equal to VC1, i.e., VC FLY =VC1. The working intervals ① to ④ constitute one working cycle Ts.

[0078] Therefore, when the three-level buck converter reaches steady state, VC FLY =VC1=1 / 2*Vin, which is the flying capacitor C FLY The voltage is clamped by the circuit structure at half of the input voltage Vin, i.e., 1 / 2*Vin, in steady state.

[0079] 2. Soft-start the flying capacitor using the aforementioned circuit structure:

[0080] The soft-start process for the flying capacitor includes a pre-discharge phase and a pre-charge phase. By controlling the operating states of the first, second, third, and fourth power transistors, the flying capacitor is sequentially pre-discharged and pre-charged to complete the soft start of the flying capacitor.

[0081] Pre-discharge stage: such as Figure 9a As shown, the first power transistor Q1 is turned off, while the second power transistor Q2, the third power transistor Q3, and the fourth power transistor Q4 are turned on, and the flying capacitor C... FLY The flying capacitor C is connected in parallel with the first capacitor C1. FLY Both capacitor C1 and capacitor C1 are discharged. After discharge, the pre-charging stage begins.

[0082] In one embodiment, when a flying capacitor C is detected FLY When the voltage on the flying capacitor or the voltage on the first capacitor C1 is less than a first threshold, the pre-discharge of the flying capacitor is completed, and the pre-charging phase begins. In another embodiment, when the pre-discharge time of the flying capacitor reaches a first time, the pre-discharge of the flying capacitor is completed, and the pre-charging phase begins.

[0083] Pre-charging phase: such as Figure 9b As shown, the third power transistor Q3 is turned off, the first power transistor Q1, the second power transistor Q2, and the fourth power transistor Q4 are turned off, and the flying capacitor C... FLY The input voltage vin is connected in parallel with the first capacitor C1, and the flying capacitor C is connected in parallel with the first capacitor C1. FLY And the first capacitor C1 is charged. In one embodiment, when the flying capacitor C is detected... FLY When the voltage of the flying capacitor or the voltage of the first capacitor C1 reaches half of the input voltage Vin, that is, 1 / 2*Vin, the pre-charging of the flying capacitor is completed and the soft start ends.

[0084] Furthermore, in one embodiment, the on-resistance of the first power transistor Q1 and the fourth power transistor Q4 is controlled to control the pre-charge / discharge current of the flying capacitor. In another embodiment, a first resistor is connected in series with the first power transistor Q1 and / or the fourth power transistor Q4 to control the pre-charge / discharge current of the flying capacitor. Further, the first power transistor Q1 and the fourth power transistor Q4 are power switches, and a first resistor is connected in series at the power terminal of the power switch, for example, at the source or drain of the power switch.

[0085] Although the embodiments are described and illustrated separately above, some common technologies are involved. Those skilled in the art can replace and integrate them between the embodiments. If there is any content not explicitly described in one embodiment, then another embodiment that is described can be referred to.

[0086] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A circuit structure applied to a three-level converter, the three-level converter including a flying capacitor, characterized in that, include: The positive and negative input terminals are configured to receive a first voltage; The first power transistor, the second power transistor, the third power transistor, and the fourth power transistor are connected in series between the positive input terminal and the negative input terminal. The first capacitor is coupled between the common terminal of the second and third power transistors and the negative input terminal; The common terminal of the first power transistor and the second power transistor is coupled to one end of the flying capacitor, and the common terminal of the third power transistor and the fourth power transistor is coupled to the other end of the flying capacitor. The three-level converter also includes: The fifth, sixth, seventh, and eighth power transistors are connected in series between the high and low potential terminals of the input of the three-level converter. The first inductor is coupled between the common terminal of the sixth and seventh power transistors and the high potential terminal of the output of the three-level converter; The flying capacitor is coupled between the common terminal of the fifth and sixth power transistors and the common terminal of the seventh and eighth power transistors.

2. The circuit structure according to claim 1, characterized in that: The first voltage is configured to be proportional to the voltage of the flying capacitor when the three-level converter reaches steady state.

3. The circuit structure according to claim 2, characterized in that: The first voltage is configured to be equal to twice the voltage of the flying capacitor when the three-level converter reaches steady state.

4. The circuit structure according to claim 1, characterized in that: The three-level converter is configured as one of a three-level buck converter, a three-level boost converter, a three-level buck-boost converter, a three-level Cuk converter, a three-level Sepic converter, a three-level Zeta converter, a three-level forward converter, a three-level flyback converter, a three-level half-bridge converter, and a three-level full-bridge converter.

5. The circuit structure according to claim 1, characterized in that: The operating states of the first power transistor, the second power transistor, the third power transistor, and the fourth power transistor are controlled to clamp the voltage of the flying capacitor to half of the first voltage.

6. The circuit structure according to claim 5, characterized in that: The first power transistor and the third power transistor have the same switching state, and the second power transistor and the fourth power transistor have the same switching state.

7. The circuit structure according to claim 5, characterized in that: The first power transistor and the second power transistor have the same duty cycle.

8. The circuit structure according to claim 5, characterized in that: When the three-level converter is operating in the stage of charging the flying capacitor, the first power transistor and the third power transistor are turned on. When the three-level converter is operating in the stage of discharging the flying capacitor, the second power transistor and the fourth power transistor are turned on.

9. The circuit structure according to claim 1, characterized in that: The input terminal of the three-level converter receives an input voltage, and the first voltage is configured as the input voltage.

10. The circuit structure according to claim 9, characterized in that: The operating states of the first power transistor, the second power transistor, the third power transistor, and the fourth power transistor are controlled to clamp the voltage of the flying capacitor to half of the input voltage.

11. The circuit structure according to claim 10, characterized in that: The control signals of the first power transistor and the third power transistor are configured as the AND result of the control signals of the fifth power transistor and the seventh power transistor. The control signals of the second power transistor and the fourth power transistor are configured as the AND result of the control signals of the sixth power transistor and the eighth power transistor.

12. The circuit structure according to claim 1, characterized in that: The operating states of the first power transistor, the second power transistor, the third power transistor, and the fourth power transistor are controlled to pre-discharge and pre-charge the flying capacitor in sequence, so as to complete the soft start of the flying capacitor.

13. The circuit structure according to claim 12, characterized in that: The first power transistor is turned off in a controlled manner, while the second, third, and fourth power transistors are turned on in a controlled manner to pre-discharge the flying capacitor; The third power transistor is controlled to turn off, while the first, second, and fourth power transistors are controlled to turn on, so as to precharge the flying capacitor.

14. The circuit structure according to claim 13, characterized in that: When the voltage of the flying capacitor or the voltage of the first capacitor is detected to be less than the first threshold, the pre-discharge of the flying capacitor is completed.

15. The circuit structure according to claim 13, characterized in that: The pre-discharge of the flying capacitor is completed when the pre-discharge time of the flying capacitor reaches the first time.

16. The circuit structure according to claim 13, characterized in that: When the voltage of the first capacitor or the voltage of the flying capacitor reaches half of the first voltage, the pre-charging of the flying capacitor is completed and the soft start of the flying capacitor ends.

17. The circuit structure according to claim 13, characterized in that: The on-resistance of the first power transistor and the fourth power transistor is controlled to control the current for pre-charging and discharging the flying capacitor.

18. The circuit structure according to claim 13, characterized in that: A first resistor is connected in series with the first power transistor and / or the fourth power transistor to control the current for pre-charging and discharging the flying capacitor.

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