Calibration Method of Trigger Level, Signal Measurement Method and Device

Abstract

The present invention provides a method and device for calibrating a trigger level and a signal measurement method, relating to the technical field of ATE calibration, including: configuring an initial calibration level for each voltage comparator; controlling a standard signal source to generate a standard signal, and determining an untriggered first voltage comparator and a triggered second voltage comparator from the voltage comparators; controlling the initial calibration level of the second voltage comparator to remain unchanged, and adjusting the initial calibration level of the first voltage comparator according to a preset increment to obtain a first target calibration level of the first voltage comparator; controlling the first target calibration level to remain unchanged, and adjusting the initial calibration level of the second voltage comparator according to a preset decrement to obtain a second target calibration level of the second voltage comparator; wherein, the target trigger levels of the signal measurement channels include the first target calibration level and the second target calibration level. The present invention can significantly improve the accuracy of calibrating the trigger level, effectively improve the signal test accuracy, and can also achieve calibration of trigger levels in a wide range, effectively improving the calibration efficiency of the trigger level.

Description

Technical Field

[0001] The present invention relates to the technical field of ATE (Automatic Test Equipment, integrated circuit automatic test machine) calibration, and in particular to a method for calibrating a trigger level, a method for measuring a signal, and a device therefor. Background Art

[0002] The trigger level calibration technology and the reading of calibration data are important technologies and methods in the field of ATE calibration technology, and play an important role in aspects such as the accuracy and stability of signal testing in a test machine. In the implementation of trigger level calibration, the input signal needs to be first subjected to square wave shaping processing of the trigger signal by a voltage comparison circuit, and then sent to an FPGA (Field Programmable Gate Array) or other processing units for identification processing of the trigger signal. At present, the trigger level calibration technologies provided by related technologies include a manual observation calibration method and an automatic trigger level calibration method. Among them, the manual observation calibration method has observation errors caused by human factors, and human operation deviations cannot be avoided, resulting in low signal testing accuracy; although the automatic trigger level calibration method can, to a certain extent, improve the problems existing in the manual observation calibration method, the existing automatic trigger level calibration method can only achieve the calibration function of a single trigger level and cannot achieve the calibration function of a wide range of trigger levels, resulting in low calibration efficiency of the trigger level. Summary of the Invention

[0003] In view of this, the purpose of the present invention is to provide a method for calibrating a trigger level, a method for measuring a signal, and a device therefor, which can significantly improve the accuracy of calibrating the trigger level, effectively improve the signal testing accuracy, and can also achieve the calibration of a wide range of trigger levels, effectively improving the calibration efficiency of the trigger level.

[0004] First aspect, an embodiment of the present invention provides a method for calibrating a trigger level. The method is applied to a control terminal of an integrated circuit automatic test device. The integrated circuit automatic test device further includes at least one signal measurement channel electrically connected to the control terminal. Both the signal measurement channel and the control terminal are electrically connected to a standard signal source. The signal measurement channel includes a plurality of DAC (digital-to-analog converter) voltage comparators. The method includes: configuring an initial calibration level for each of the voltage comparators; controlling the standard signal source to generate a standard signal, and determining an untriggered first voltage comparator and a triggered second voltage comparator from the voltage comparators; controlling the initial calibration level of the second voltage comparator to remain unchanged, and adjusting the initial calibration level of the first voltage comparator according to a preset increment to obtain a first target calibration level of the first voltage comparator; controlling the first target calibration level to remain unchanged, and adjusting the initial calibration level of the second voltage comparator according to a preset decrement to obtain a second target calibration level of the second voltage comparator; wherein the target trigger level of the signal measurement channel includes the first target calibration level and the second target calibration level.

[0005] In one implementation, the number of the voltage comparators is two; the step of configuring the calibration level for each of the voltage comparators includes: configuring a first initial trigger level for any one of the voltage comparators, and determining a first initial calibration level of the voltage comparator according to the first initial trigger level and a specified voltage value, and configuring the first initial calibration level to the voltage comparator; and configuring a second initial trigger level for the other voltage comparator, and determining a second initial calibration level of the voltage comparator according to the second initial trigger level and the specified voltage value, and configuring the second initial calibration level to the voltage comparator; wherein the first initial trigger level is higher than the second initial trigger level.

[0006] In one implementation, the step of determining the untriggered first voltage comparator and the triggered second voltage comparator from the voltage comparators includes: calculating a measurement result corresponding to each voltage comparator according to a square wave signal output by each voltage comparator for the standard signal; according to the measurement result, determining that the voltage comparator configured with the first initial trigger level is the untriggered first voltage comparator, and determining that the voltage comparator configured with the second initial trigger level is the triggered second voltage comparator.

[0007] In one embodiment, the step of adjusting the initial calibration level of the first voltage comparator according to a preset increment to obtain the first target calibration level of the first voltage comparator includes: adjusting the first initial calibration level of the first voltage comparator according to a first increment; controlling the standard signal source to generate a standard signal, determining that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal, and continuing to adjust the adjusted first initial calibration level according to the first increment until the first voltage comparator is triggered by the standard signal to obtain a first intermediate calibration level; adjusting the first intermediate calibration level according to a second increment; controlling the standard signal source to generate a standard signal, determining that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal, and continuing to adjust the adjusted first intermediate calibration level according to the second increment until the first voltage comparator is triggered by the standard signal to obtain the first target calibration level.

[0008] In one embodiment, the step of adjusting the initial calibration level of the second voltage comparator according to a preset decrement to obtain the second target calibration level of the second voltage comparator includes: adjusting the second initial calibration level of the second voltage comparator according to a first decrement; controlling the standard signal source to generate a standard signal, determining that the first voltage comparator is triggered by the standard signal and the second voltage comparator is not triggered by the standard signal, and continuing to adjust the adjusted second initial calibration level according to the first decrement until the second voltage comparator is triggered by the standard signal to obtain a second intermediate calibration level; adjusting the second intermediate calibration level according to a second decrement; controlling the standard signal source to generate a standard signal, determining that the first voltage comparator is triggered by the standard signal and the second voltage comparator is not triggered by the standard signal, and continuing to adjust the adjusted second intermediate calibration level according to the second decrement until the second voltage comparator is triggered by the standard signal to obtain the second target calibration level.

[0009] In one embodiment, the method further includes: performing a fitting process on the first target calibration level and the second target calibration level using a specified formula to determine the calibration coefficient of the signal measurement channel; wherein the calibration coefficient includes a gain coefficient and an offset coefficient.

[0010] In one embodiment, the control terminal is configured with a level storage unit and a coefficient storage unit corresponding to each signal measurement channel, and the method further includes: storing the target trigger level into the level storage unit corresponding to the signal measurement channel, and storing the calibration coefficient into the coefficient storage unit corresponding to the signal measurement channel.

[0011] In a second aspect, an embodiment of the present invention further provides a signal measurement method, which is applied to a control end of an integrated circuit automatic test device. The integrated circuit automatic test device further includes at least one signal measurement channel electrically connected to the control end. The method includes: determining a target measurement channel connected to a signal source to be measured from the signal measurement channels; where the number of the target measurement channels is at least one; obtaining measurement parameters corresponding to each of the target measurement channels, and configuring the measurement parameters in parallel to the target measurement channels, so that the target measurement channels perform shaping processing on the signal to be measured sent by the signal source to be measured based on the measurement parameters to obtain a square wave signal; where the measurement parameters at least include a target trigger level, and the target trigger level is calibrated by using any one of the methods provided in the first aspect; determining a signal measurement result corresponding to the signal source to be measured according to the square wave signal output by the target measurement channel.

[0012] In a third aspect, an embodiment of the present invention further provides a calibration device for a trigger level, which is applied to a control end of an integrated circuit automatic test device. The integrated circuit automatic test device further includes at least one signal measurement channel electrically connected to the control end. The signal measurement channel and the control end are both electrically connected to a standard signal source. The signal measurement channel includes a plurality of voltage comparators. The device includes: a first configuration module for configuring an initial calibration level of each of the voltage comparators; a signal generation module for controlling the standard signal source to generate a standard signal, and determining an untriggered first voltage comparator and a triggered second voltage comparator from the voltage comparators; a first level determination module for controlling the initial calibration level of the second voltage comparator to remain unchanged, and adjusting the initial calibration level of the first voltage comparator according to a preset increment to obtain a first target calibration level of the first voltage comparator; a second level determination module for controlling the first target calibration level to remain unchanged, and adjusting the initial calibration level of the second voltage comparator according to a preset decrement to obtain a second target calibration level of the second voltage comparator; where the target trigger level of the signal measurement channel includes the first target calibration level and the second target calibration level.

[0013] Fourth aspect, an embodiment of the present invention further provides a signal measurement device. The method is applied to the control end of an integrated circuit automatic test equipment, and the integrated circuit automatic test equipment further includes at least one signal measurement channel electrically connected to the control end. The device includes: a channel determination module, configured to determine a target measurement channel connected to a signal source to be measured from the signal measurement channels; wherein the number of the target measurement channels is at least one; a second configuration module, configured to obtain measurement parameters corresponding to each of the target measurement channels, and configure the measurement parameters to the target measurement channels in parallel, so that the target measurement channels perform shaping processing on the signal to be measured sent by the signal source to be measured based on the measurement parameters to obtain a square wave signal; wherein the measurement parameters at least include a target trigger level, and the target trigger level is calibrated by using any one of the methods provided in the first aspect; a measurement module, configured to determine a signal measurement result corresponding to the signal source to be measured according to the square wave signal output by the target measurement channel.

[0014] An embodiment of the present invention provides a method and device for calibrating a trigger level, which are applied to the control end of an integrated circuit automatic test equipment. The integrated circuit automatic test equipment further includes at least one signal measurement channel electrically connected to the control end. The signal measurement channel and the control end are both electrically connected to a standard signal source, and the signal measurement channel includes a plurality of voltage comparators. For each signal measurement channel, configure the initial calibration level of each voltage comparator, control the standard signal source to generate a standard signal, determine an untriggered first voltage comparator and a triggered second voltage comparator from the voltage comparators, then control the initial calibration level of the second voltage comparator to remain unchanged, and adjust the initial calibration level of the first voltage comparator according to a preset increment to obtain a first target calibration level of the first voltage comparator. Finally, control the first target calibration level to remain unchanged, and adjust the initial calibration level of the second voltage comparator according to a preset decrement to obtain a second target calibration level of the second voltage comparator. Wherein, the target trigger level of the signal measurement channel includes the first target calibration level and the second target calibration level. The above method fully automatically calibrates the target trigger level of each signal measurement channel in the integrated circuit automatic test equipment through a combination of software and hardware. The method for calibrating the trigger level provided by the embodiment of the present invention can significantly improve the accuracy of calibrating the trigger level, effectively improve the signal test accuracy, and can also realize the calibration of a wide range of trigger levels, effectively improving the calibration efficiency of the trigger level.

[0015] A signal measurement method and device provided by an embodiment of the present invention. The method is applied to a control terminal of an integrated circuit automatic test equipment, and the integrated circuit automatic test equipment further includes at least one signal measurement channel electrically connected to the control terminal. First, determine at least one signal measurement channel connected to a signal source to be measured from the signal measurement channels, obtain measurement parameters corresponding to each target measurement channel, and configure the measurement parameters in parallel to the target measurement channels, so that the target measurement channels perform shaping processing on the signal to be measured sent by the signal source to be measured based on the measurement parameters to obtain a square wave signal. Finally, determine the signal measurement result corresponding to the signal source to be measured according to the square wave signal output by the target measurement channels. Among them, the measurement parameters at least include a target trigger level, and the target trigger level is corrected by using the foregoing trigger level calibration method and device. The above method can obtain and configure the measurement parameters corresponding to each target measurement channel in parallel. Compared with the method of sending measurement parameters channel by channel in the prior art, the above signal measurement method provided by the embodiment of the present invention can enable multiple signal measurement channels to be enabled and run simultaneously, significantly improving the signal measurement efficiency.

[0016] Other features and advantages of the present invention will be described in the following specification, and, in part, will be obvious from the specification, or will be understood by implementing the present invention. The objectives and other advantages of the present invention are achieved and obtained by the structures specifically pointed out in the specification, claims, and drawings.

[0017] To make the above objectives, features, and advantages of the present invention more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes the following detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the description of the specific embodiments or the prior art. Obviously, the following drawings are some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0019] Figure 1 A schematic flow chart of reading level calibration data of an existing ATE device provided by an embodiment of the present invention;

[0020] Figure 2 A schematic flow chart of a calibration method for a trigger level provided by an embodiment of the present invention;

[0021] Figure 3 A schematic structural diagram of an integrated circuit automatic test equipment provided by an embodiment of the present invention;

[0022] Figure 4 A schematic diagram of level calibration provided by an embodiment of the present invention;

[0023] Figure 5 Schematic diagram of the structure of another integrated circuit automatic test device provided by an embodiment of the present invention;

[0024] Figure 6 Schematic diagram of the process of another trigger level calibration method provided by an embodiment of the present invention;

[0025] Figure 7 Schematic diagram of the process of a signal measurement method provided by an embodiment of the present invention;

[0026] Figure 8 Schematic diagram of the process of another signal measurement method provided by an embodiment of the present invention;

[0027] Figure 9 Schematic diagram of the structure of a trigger level calibration device provided by an embodiment of the present invention;

[0028] Figure 10 Schematic diagram of the structure of a signal measurement device provided by an embodiment of the present invention. Detailed implementation manners

[0029] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0030] At present, the trigger level calibration techniques provided by related technologies include manual observation calibration and automatic trigger level calibration. (1) For the manual observation calibration method: The signal source generates the required input waveform signal. At the output of the voltage comparator, the trigger signal is observed through an oscilloscope at the test point. The control of the DAC DC voltage setting is performed through the FPGA to change the DAC DC setting, generate different DC voltages, observe the change of the oscilloscope trigger signal, continuously adjust the DAC setting to determine the trigger level center position value relative to the input signal, and save this value to the host computer for later use. This method has human factor observation errors and human operation deviations that cannot be avoided; it is impossible to debug the packaged circuit product again; when voltage deviation occurs in the comparison circuit due to circuit aging, etc., it is impossible to directly perform manual retesting and correction; for different working environments, there may be power supply voltage deviation problems, and it is impossible to directly perform test correction. In practical applications, if the above error situations exist, the accuracy of product testing will be low. (2) For the automatic trigger level calibration method, the specific input signal is shaped into a square wave signal through a voltage comparison circuit, and then the positive pulse width and negative pulse width of the square wave signal are counted in the FPGA, and counting discrimination processing is performed, as well as the discrimination adjustment of the comparison level of the DAC trigger comparison circuit. Finally, the trigger level value that meets the requirements is determined and saved for later use through the host computer CPU. This method is only applicable to the trigger calibration of a single level value, and the calibration function for a wide range of trigger levels cannot be achieved.

[0031] In addition, referring to Figure 1 the schematic diagram of the process of reading the level calibration data of an existing ATE device shown in, this method mainly includes: (1) The AET device is powered on; (2) The calibration data of each module of the lower computer is updated to the Trim data table of the host computer; (3) Measurement starts; (4) The calibration data is read from the Trim data table site by site (channel by channel) and serially sent to the lower computer for execution. The lower computer completes the calculation of the calibration output value and the level output; (5) The lower computer configures the data instruction to the corresponding module. The reading of the level calibration data of the existing ATE device is achieved by the host computer sending the level calibration data site by site and channel by channel, and the communication between the host computer and the lower computer takes a long time, resulting in low multi-site test efficiency.

[0032] Based on this, the embodiments of the present invention provide a trigger level calibration method, a signal measurement method and device, which can significantly improve the accuracy of calibrating the trigger level, effectively improve the signal test accuracy, can also achieve the calibration of a wide range of trigger levels, effectively improve the calibration efficiency of the trigger level, and can also significantly improve the signal measurement efficiency.

[0033] To facilitate the understanding of this embodiment, a calibration method for a trigger level disclosed in the embodiments of the present invention will be introduced in detail first. This method is applied to the control terminal of an integrated circuit automatic test device. The integrated circuit automatic test device further includes at least one signal measurement channel electrically connected to the control terminal. Both the signal measurement channel and the control terminal are electrically connected to a standard signal source. The signal measurement channel includes a plurality of voltage comparators. Each voltage comparator includes a DAC circuit and a voltage comparison circuit. Refer to Figure 2 the schematic flowchart of a calibration method for a trigger level shown in

[0034] Step S202: Configure the initial calibration level of each voltage comparator. In an optional implementation manner, the initial calibration levels of different voltage comparators can be different. Exemplarily, assume that the signal measurement channel includes two voltage comparators. Configure a first initial calibration level for one voltage comparator and a second initial calibration level for the other voltage comparator. The first initial calibration level is higher than the second initial calibration level. For example, the first initial calibration level is 4.4V and the second initial calibration level is -0.4V.

[0035] Step S204: Control the standard signal source to generate a standard signal, and determine the first voltage comparator that is not triggered and the second voltage comparator that is triggered from the voltage comparators. Among them, the standard signal source can be used as a reference calibration source for the signal measurement channel. In an implementation manner, the control terminal can send a control instruction to the standard signal source so that the standard signal source generates a standard signal when receiving the control instruction. The standard signal will be sent to the voltage comparison circuit. The voltage comparison circuit will perform shaping processing on the standard signal according to the initial calibration level configured by the DAC circuit to obtain a square wave signal. The control terminal acquires the square wave signal and performs calculation processing on it, and determines whether the voltage comparator is triggered by the standard signal based on the calculation result.

[0036] Step S206: Keep the initial calibration level of the second voltage comparator unchanged, and adjust the initial calibration level of the first voltage comparator according to a preset increment to obtain the first target calibration level of the first voltage comparator. Among them, the preset increment can include a first increment and a second increment. The precision of the first increment is lower than that of the second increment, so as to improve the precision of the first target calibration level. In an implementation manner, the initial calibration level of the first voltage comparator can be gradually increased according to the first increment until the first voltage comparator is triggered by the standard signal to obtain a first intermediate calibration level, and then the first intermediate calibration level is gradually increased according to the second increment until the first voltage comparator is triggered by the standard signal to obtain the first target calibration level. During this process, the initial calibration level of the second voltage comparator remains unchanged.

[0037] Step S208: Keep the first target calibration level unchanged, and adjust the initial calibration level of the second voltage comparator according to a preset decrement to obtain the second target calibration level of the second voltage comparator. The target trigger levels of the signal measurement channels include the first target calibration level and the second target calibration level. The preset decrement may include a first decrement and a second decrement, and the accuracy of the first decrement is lower than that of the second decrement, thereby improving the accuracy of the second target calibration level. In one implementation, the initial calibration level of the second voltage comparator can be gradually decreased according to the first decrement until the second voltage comparator is triggered by the standard signal to obtain the second intermediate calibration level, and then the second intermediate calibration level is gradually decreased according to the second decrement until the second voltage comparator is triggered by the standard signal to obtain the second target calibration level, while keeping the first target calibration level unchanged during this process.

[0038] The above-mentioned calibration method for the trigger level provided by the embodiments of the present invention fully automatically calibrates the target trigger levels of each signal measurement channel in the integrated circuit automatic test equipment through a combination of software and hardware. The calibration method for the trigger level provided by the embodiments of the present invention can significantly improve the accuracy of calibrating the trigger level, effectively improve the signal test accuracy, and can also achieve the calibration of a wide range of trigger levels, effectively improving the calibration efficiency of the trigger level.

[0039] In one implementation, the number of the above-mentioned voltage comparators is two. For ease of understanding, the embodiments of the present invention provide a specific structure of an integrated circuit automatic test equipment. Refer to Figure 3 the structural schematic diagram of an integrated circuit automatic test equipment shown in Figure 3 which shows that the control end includes a host computer (i.e., an industrial control computer) and a slave computer (i.e., an FPGA). Each voltage comparator includes a voltage comparison circuit and a DAC circuit. Among them, the first input end of the voltage comparison circuit is electrically connected to the standard signal source, the second input end of the voltage comparison circuit is electrically connected to the output end of the DAC circuit, and the output end of the voltage comparison circuit and the input end of the DAC circuit are both electrically connected to the FPGA. In addition, Figure 3 it also shows that the industrial control computer is also electrically connected to the standard signal source and is used to control the standard signal source to generate a standard signal.

[0040] In practical applications, the above-mentioned standard signal source is used to generate a standard signal. The voltage comparison circuit is used to shape the input signal (including the standard signal or the signal under test, etc.) into a square wave signal. The DAC circuit is used to set the DC comparison level (i.e., the above-mentioned calibration level). The FPGA, as the slave computer, is responsible for processing the square wave signal to obtain the measurement result, communicating with the industrial control computer, and configuring the DC comparison level of the DAC. The industrial control computer, as the host computer, is responsible for controlling the standard signal source to generate a standard signal, judging whether to trigger the voltage comparison circuit according to the measurement result, and sending the DC comparison level of the DAC to the FPGA.

[0041] In one embodiment, the step - by - step scanning method is used for progressive trigger calibration when calibrating the trigger level, and the gain coefficient and offset coefficient are obtained by the two - point fitting method. In addition, according to different trigger level ranges, an input waveform (rising edge or falling edge) of the corresponding level is generated by a standard signal source. The specific input signal is shaped into two square - wave signals through a voltage comparison circuit, and then calculations (such as calculating the rising - edge time or falling - edge time) are performed in the FPGA. The measured results obtained by the calculation are transmitted to the industrial control computer for discrimination and adjustment and the re - configuration of the DAC comparison level, and finally the target trigger level that meets the requirements is determined.

[0042] Based on the above Figure 3 On this basis, the embodiment of the present invention also provides an embodiment for configuring the calibration level of each voltage comparator. Specifically:

[0043] (1) Configure a first initial trigger level for any one of the voltage comparators, and determine the first initial calibration level of this voltage comparator according to the first initial trigger level and the specified voltage value, and configure the first initial calibration level to this voltage comparator. In one embodiment, the industrial control computer configures the initial trigger level, and the FPGA encodes the initial trigger level to obtain data encoding and configures the data encoding into the corresponding DAC circuit. Exemplarily, randomly select a voltage comparator from the voltage comparators, and configure the first initial trigger level VDAC1 = 4.9V for the DAC circuit of this voltage comparator. Assuming the specified voltage value is 0.5V, then calculate the difference between the first initial trigger level and the specified voltage value to obtain the first initial calibration level (also called the high level) V1 = VDAC1 - 0.5V = 4.4V.

[0044] (2) Configure a second initial trigger level for another voltage comparator, and determine the second initial calibration level of this voltage comparator according to the second initial trigger level and the specified voltage value, and configure the second initial calibration level to this voltage comparator. Among them, the first initial trigger level is higher than the second initial trigger level. Exemplarily, configure the second initial trigger level VDAC2 = 0.1V for the DAC circuit of another voltage comparator, then calculate the difference between the second initial trigger level and the specified voltage value to obtain the second initial calibration level (also called the low level) V2 = VDAC2 - 0.5V = - 0.4V.

[0045] After the initial calibration level is set, the industrial control computer generates a standard signal from the coding control standard signal source. Optionally, the standard signal can be a rising edge signal. The standard signal is input to the voltage comparison circuit, and the voltage comparison circuit will shape the standard signal according to the above initial calibration level to obtain a corresponding square wave signal. The FPGA will process and calculate the two square wave signals to obtain a measurement result, and upload the measurement result to the industrial control computer. The industrial control computer will determine the first voltage comparator that has not been triggered and the second voltage comparator that has been triggered from the voltage comparator according to the measurement result. In a specific implementation manner, the measurement result corresponding to each voltage comparator can be calculated according to the square wave signal output by each voltage comparator for the standard signal, and then according to the measurement result, it is determined that the voltage comparator configured with the first initial trigger level is the first voltage comparator that has not been triggered, and it is determined that the voltage comparator configured with the second initial trigger level is the second voltage comparator that has been triggered. Exemplarily, it is determined according to the measurement result that the voltage comparator corresponding to the above low level V2 is triggered, while the voltage comparator corresponding to the above high level V1 is not triggered.

[0046] In one implementation manner, the embodiment of the present invention also provides an implementation manner of the foregoing step S206. See the following steps a1 to a4:

[0047] Step a1, adjust the first initial calibration level of the first voltage comparator according to the first increment. For easy understanding, see Figure 4 a schematic diagram of level calibration shown in Figure 4 Taking the calibration range of 0V to 5V as an example, the two selected calibration levels are V1 = 4.4V and V2 = -0.4V. The idea is as follows: while ensuring that one calibration level is always triggered, the other calibration level is calibrated by progressive triggering through the step-by-step scanning method. Figure 4 It is also shown that the first increment △1 = 0.05. Therefore, the first initial calibration level V1 after the first adjustment is V1 = 4.4 + △1 = 4.45V. In the process of progressive triggering, the number of times N1 of adjusting the first initial calibration level based on the first increment will also increase step by step, where N1 = N1 + 1.

[0048] Step a2: Control the standard signal source to generate a standard signal. Determine that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal. Continue to adjust the adjusted first initial calibration level according to the first increment until the first voltage comparator is triggered by the standard signal to obtain the first intermediate calibration level. In practical applications, keeping the above second initial trigger level V2 unchanged, the FPGA encodes and configures the adjusted first initial calibration level V1 to the first voltage comparator. The industrial control computer will again control the standard signal source to generate a standard signal and determine whether the first voltage comparator is triggered by the standard signal. When the determination result is negative, the above steps will be repeated until the first voltage comparator is triggered. When triggered, the first initial calibration level V1 = 4.4 + (N1 - 1) * Δ1 is determined as the first intermediate calibration level.

[0049] Step a3: Adjust the first intermediate calibration level according to the second increment. Considering that the accuracy of the above first increment is relatively low, in the embodiments of the present invention, the second increment Δ2 with higher accuracy will be used to continue to adjust the above first intermediate calibration level. Figure 4 It is shown that Δ2 = 0.005. During the process of gradual triggering, the number of times N2 = N2 + 1 for adjusting the first intermediate calibration level based on the second increment will also gradually increase. In practical applications, the above Δ1 and Δ2 can be set according to actual needs, and the embodiments of the present invention do not limit this.

[0050] Step a4: Control the standard signal source to generate a standard signal. Determine that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal. Continue to adjust the adjusted first intermediate calibration level according to the second increment until the first voltage comparator is triggered by the standard signal to obtain the first target calibration level. In practical applications, keeping the above second initial calibration level V2 unchanged, the FPGA encodes and configures the adjusted first intermediate calibration level V1 to the first voltage comparator. The industrial control computer will again control the standard signal source to generate a standard signal and determine whether the first voltage comparator is triggered by the standard signal. When the determination result is negative, the above steps will be repeated until the first voltage comparator is triggered. The first intermediate calibration level V1 = 4.4V + (N1 - 1) * Δ1 + N2 * Δ2 at the time of triggering is determined as the first target calibration level TG1.

[0051] In one implementation manner, the embodiments of the present invention also provide an implementation manner of the foregoing step S208, as shown in the following steps b1 to b4:

[0052] Step b1: Adjust the second initial calibration level of the second voltage comparator according to the first decrement. Exemplarily, the second initial calibration level V2 after the first adjustment is 0.6 - △1 = 0.1V, and the number of times N1 = N1 + 1 of adjusting the second initial calibration level based on the first decrement during the step-by-step triggering process will also gradually increase.

[0053] Step b2: Control the standard signal source to generate a standard signal, determine that the first voltage comparator is triggered by the standard signal, and the second voltage comparator is not triggered by the standard signal. Continue to adjust the adjusted second initial calibration level according to the first decrement until the second voltage comparator is triggered by the standard signal to obtain the second intermediate calibration level. In practical applications, keeping the above first target calibration level TG1 unchanged, the FPGA encodes and configures the adjusted second initial calibration level V2 to the second voltage comparator. The industrial control computer will again control the standard signal source to generate a standard signal and determine whether the second voltage comparator is triggered by the standard signal. When the judgment result is no, the above steps will be repeated until the second voltage comparator is triggered. When triggered, the second initial calibration level V2 = 0.6 - (N1 - 1)*△1 is determined as the second intermediate calibration level.

[0054] Step b3: Adjust the second intermediate calibration level according to the second decrement. Considering that the accuracy of the above first decrement is relatively low, the embodiment of the present invention will continue to adjust the above second intermediate calibration level using the second decrement △2 with higher accuracy. Figure 4 It is shown that △2 = 0.005, and the number of times N2 = N2 + 1 of adjusting the second intermediate calibration level based on the second decrement during the step-by-step triggering process will also gradually increase.

[0055] Step b4: Control the standard signal source to generate a standard signal, determine that the first voltage comparator is triggered by the standard signal, and the second voltage comparator is not triggered by the standard signal. Continue to adjust the adjusted second intermediate calibration level according to the second decrement until the second voltage comparator is triggered by the standard signal to obtain the second target calibration level. In practical applications, keeping the first target calibration level TG1 unchanged, the FPGA encodes and configures the adjusted second intermediate calibration level V2 to the second voltage comparator. The industrial control computer will again control the standard signal source to generate a standard signal and determine whether the second voltage comparator is triggered by the standard signal. When the judgment result is no, the above steps will be repeated until the second voltage comparator is triggered. The second intermediate calibration level V2 = 0.6V - (N1 - 1)*△1 - N2*△2 when triggered is determined as the second target calibration level TG2.

[0056] In one embodiment, a calibration coefficient can be further calculated, and the calibration coefficient includes a gain coefficient and an offset coefficient. Specifically, a specified formula can be used to perform a fitting process on the first target calibration level and the second target calibration level to determine the calibration coefficient of the signal measurement channel. Among them, the specified formula is the linear formula y = kx + b, and the gain coefficient k and the offset coefficient b are obtained by fitting the first target calibration level TG1 and the second target calibration level TG2.

[0057] In one embodiment, the control end is configured with a level storage unit and a coefficient storage unit corresponding to each signal measurement channel, such as Figure 5 the structural schematic diagram of another integrated circuit automatic test device shown Figure 5 indicating that the integrated circuit automatic test device includes a plurality of level storage units and a plurality of coefficient storage units. Exemplarily, the level storage unit x1 and the coefficient storage unit y1 both correspond to the signal measurement channel z1, and are respectively used to store the target trigger level and the calibration coefficient of the signal measurement channel z1. On Figure 5 this basis, the embodiment of the present invention can also store the target trigger level into the level storage unit corresponding to the signal measurement channel, and store the calibration coefficient into the coefficient storage unit corresponding to the signal measurement channel.

[0058] In practical applications, the above-mentioned integrated circuit automatic test device provided by the embodiment of the present invention provides independent storage spaces for each signal measurement channel. The FPGA is responsible for acquiring the calibration data of each signal measurement channel and calculating during the test process, and the industrial control computer is responsible for sending level instructions to each signal measurement channel. The FPGA is also responsible for encoding the target trigger level and configuring it into the corresponding signal measurement channel.

[0059] To facilitate the understanding of the trigger level calibration method provided in the foregoing embodiments, the embodiment of the present invention also provides an application example of the trigger level calibration method. Refer to Figure 6 the flow schematic diagram of another trigger level calibration method shown, and this method mainly includes the following steps S602 to step S618:

[0060] Step S602, enter the measurement mode and set the initial trigger level. In one embodiment, the industrial control computer sends the initial trigger level to the FPGA, and the FPGA encodes and configures the initial trigger level into the DAC circuit of the voltage comparator. Exemplarily, the initial trigger level VDAC2 of DAC2 = 0.1V, and the initial trigger level VDAC1 of DAC1 = 4.9V.

[0061] Step S604, the industrial control computer encodes and controls the standard signal source to generate a rising edge signal with V2 = -0.4V and V1 = 4.4 + N1*△1, ensuring that TG2 is always triggered. In one implementation, the initial low level is set as V2 = VDAC2 - 0.5V, and the high level is V1 = VDAC1 - 0.5V. At this time, TG2 can be triggered, and TG1 will not be triggered. Then, the low level V2 remains unchanged, and the high level V1 increases incrementally by △1 from 4.4V.

[0062] Step S606, the FPGA calculates the measurement result, and the industrial control computer determines whether TG1 is triggered based on the measurement result. If yes, execute Step S608; if no, execute Step S604. In one implementation, when the judgment result of the industrial control computer is "0", it indicates that TG1 is not triggered, and the above Step S604 will be returned until the test result returned by the FPGA meets the judgment requirements; when the judgment result of the industrial control computer is a specific value, it indicates that TG1 is triggered.

[0063] Step S608, the industrial control computer encodes and controls the standard signal source to generate a rising edge signal with V2 = -0.4V and V1 = 4.4V + (N1 - 1)*△1 + N2*△2, ensuring that TG2 is always triggered. Preferably, the smaller the scanning step △2 is set, the higher the calibration accuracy, but the calibration efficiency will be reduced.

[0064] Step S610, the FPGA calculates the measurement result, and the industrial control computer determines whether TG1 is triggered based on the measurement result. If yes, execute Step S612; if no, execute Step S608.

[0065] Step S612, determine the first target calibration level TG1 = 4.4V + (N1 - 1)*△1 + N2*△2.

[0066] Step S614, use the same method to obtain the second target calibration level TG2 = 0.6V - (N1 - 1)*△1 - N2*△2. Preferably, the method to obtain TG2 is basically the same as that of TG1, and only needs to ensure that TG1 is always triggered and then perform progressive trigger calibration on TG2 through the step-by-step scanning method.

[0067] Step S616, perform linear fitting on TG1 and TG2 through y = kx + b to obtain the calibration coefficients. Among them, the calibration coefficients include the gain coefficient k and the offset coefficient b. Preferably, the smaller the distance between the set voltage levels V1 - V2, the better the linear fitting. In practical applications, the focus on accuracy and efficiency should be balanced. The 0 - 5V range in the embodiments of the present invention is only used as an example and is not limited to this range.

[0068] Step S618, save the calibration coefficients to the coefficient storage unit. The calibration process of the trigger voltage for the 0 - 5V range is completed, and the actual values of the 0 - 5V levels can be corrected using the obtained calibration coefficients.

[0069] The calibration method for the trigger level provided by the embodiments of the present invention includes the following key points: (1) A method for calculating the calibration coefficient by two-point fitting according to the gear range; (2) A method for trigger calibration by different interval step scanning; (3) The method for calculating the calibration coefficient by two-point fitting is not limited to level calibration, and also includes time-related parameters, current parameters, impedance parameters, etc.; (4) The logic processing unit is not limited to FPGA. For example, it can include processing units such as single-chip microcontrollers, CPUs (central processing units), and GPUs (graphics processing units); (5) The level generation unit is not limited to DAC, and also includes components such as programmable reference sources that can generate reference levels.

[0070] Based on the above-mentioned calibration method for the trigger level, the embodiments of the present invention also provide a signal measurement method. This method is applied to the control end of an integrated circuit automatic test device. The integrated circuit automatic test device further includes at least one signal measurement channel electrically connected to the control end. Refer to Figure 7 the schematic flowchart of a signal measurement method shown in

[0071] Step S702, determine a target measurement channel connected to the signal source to be measured from the signal measurement channels; wherein, the number of target measurement channels is at least one.

[0072] Step S704, obtain the measurement parameters corresponding to each target measurement channel, and configure the measurement parameters in parallel to the target measurement channels, so that the target measurement channels perform shaping processing on the signal to be measured sent by the signal source to be measured to obtain a square wave signal; wherein, the measurement parameters include the target trigger level and the calibration coefficient. The target trigger level is calibrated by the calibration method for the trigger level provided in the foregoing embodiments. The measurement parameters may also include time-related parameters, current parameters, impedance parameters, etc. In one implementation, the industrial control computer sends channel information (channel number) and target trigger level information to the FPGA, and the FPGA obtains the calibration coefficient of the target trigger level of the corresponding signal measurement channel from the storage unit.

[0073] Step S706, determine the signal measurement result corresponding to the signal source to be measured according to the square wave signal output by the target measurement channel. In one implementation, the FPGA calculates the calibrated output value in parallel according to the obtained calibration coefficient, and sends a level output instruction to each signal measurement channel. Each signal measurement channel completes the level output, and the process of reading the level calibration data is completed.

[0074] The above signal measurement method provided by the embodiments of the present invention can obtain and configure the measurement parameters corresponding to each target measurement channel in parallel. Compared with the method of sending measurement parameters channel by channel in the prior art, the above signal measurement method provided by the embodiments of the present invention can enable multiple signal measurement channels to be enabled and run simultaneously, significantly improving the signal measurement efficiency.

[0075] For ease of understanding, the embodiments of the present invention also provide an application example of a signal measurement method. Refer to Figure 8 the flowchart of another signal measurement method shown in the figure. This method mainly includes the following steps S802 to step 812:

[0076] Step S802, power on the ATE device. In one implementation, the power-on process prepares the hardware environment required for testing.

[0077] Step S804, start measuring the signal to be measured. When the signal to be measured is received, the ATE device starts multi-site testing, and the mode setting requires obtaining the target trigger levels of each signal measurement channel.

[0078] Step S806, the industrial control computer sends the same level instruction to each signal measurement channel.

[0079] Step S808, the FPGA obtains the calibration data from the storage units corresponding to each signal measurement channel.

[0080] Step S810, the FPGA completes the calculation of the calibrated level.

[0081] Step S812, each signal measurement channel simultaneously completes the level output.

[0082] The above signal measurement method provided by the embodiments of the present invention includes the following key points: (1) The hardware architecture in which the host computer instruction can simultaneously enable the level output lines of multiple physical channels during multi-site testing; (2) The method for the lower computer to complete the calculation of calibration data in parallel and complete the level output; (3) This method is not limited to reading the calibration data of the trigger level, but also includes reading calibration data such as time-related parameters, current parameters, and impedance parameters.

[0083] In summary, the above trigger level calibration method and signal measurement method provided by the embodiments of the present invention decompose and coordinate the automatic calibration of the trigger level and the reading and use of calibration data through the combination of software and hardware, optimize the entire calibration and use process, and greatly improve the efficiency and accuracy of the calibration and testing of the ATE device. The above trigger level calibration method provided by the embodiments of the present invention at least has the following characteristics:

[0084] (1) The fully automatic calibration method effectively overcomes the defect that a product that has been debugged cannot be re-debugged or re-corrected, and corrects the observation error existing in the manual observation method; it solves the problem of re-calibration caused by environmental differences, product aging, injection signal differences, etc. that lead to deviations in the trigger reference level; the accuracy of product testing has been greatly improved.

[0085] (2) Reasonable two-point fitting levels can be set according to different gears, solving the problem that the calibration function of a wide-range trigger level cannot be realized, and the calibration level accuracy is further improved.

[0086] (3) An operation architecture is adopted in which the host computer sends the same instruction and the physical channels corresponding to multiple Sites are enabled simultaneously, improving the execution efficiency of level output: (a) Each physical channel of the Site has a corresponding calibration data storage space; (b) When multiple Sites are tested, the host computer instruction enables the level output lines of multiple physical channels simultaneously; (c) The slave computer obtains calibration data from the storage spaces of each channel and calculates, and after the calculation is completed, it sends a level output instruction, and the levels are output synchronously; (d) It can be realized that the execution time of multiple Sites is not higher than that of a single Site, greatly improving the product testing efficiency.

[0087] For the trigger level calibration method provided in the foregoing embodiments, an embodiment of the present invention provides a trigger level calibration device, which is applied to the control end of an integrated circuit automatic test device. The integrated circuit automatic test device further includes at least one signal measurement channel electrically connected to the control end. Both the signal measurement channel and the control end are electrically connected to a standard signal source. The signal measurement channel includes a plurality of voltage comparators. Refer to Figure 9 As shown in the structural schematic diagram of a trigger level calibration device, the device mainly includes the following parts:

[0088] The first configuration module 902 is used to configure the initial calibration level of each voltage comparator;

[0089] The signal generation module 904 is used to control the standard signal source to generate a standard signal, and determine the first voltage comparator that has not been triggered and the second voltage comparator that has been triggered from the voltage comparators;

[0090] The first level determination module 906 is used to keep the initial calibration level of the second voltage comparator unchanged, and adjust the initial calibration level of the first voltage comparator according to a preset increment to obtain the first target calibration level of the first voltage comparator;

[0091] A second level determination module 908 is configured to control the first target calibration level to remain unchanged, and adjust the initial calibration level of the second voltage comparator according to a preset decrement to obtain a second target calibration level of the second voltage comparator; wherein, the target trigger levels of the signal measurement channels include the first target calibration level and the second target calibration level.

[0092] The trigger level calibration device provided by the embodiment of the present invention automatically calibrates the target trigger levels of each signal measurement channel in the integrated circuit automatic test equipment in a combination of software and hardware. The trigger level calibration method provided by the embodiment of the present invention can significantly improve the accuracy of calibrating the trigger level, effectively improve the signal test accuracy, and can also achieve the calibration of a wide range of trigger levels, effectively improving the calibration efficiency of the trigger level.

[0093] In an implementation manner, the number of voltage comparators is two; the first configuration module 902 is further configured to: configure a first initial trigger level for any one of the voltage comparators, determine the first initial calibration level of the voltage comparator according to the first initial trigger level and a specified voltage value, and configure the first initial calibration level to the voltage comparator; and configure a second initial trigger level for the other voltage comparator, determine the second initial calibration level of the voltage comparator according to the second initial trigger level and the specified voltage value, and configure the second initial calibration level to the voltage comparator; wherein, the first initial trigger level is higher than the second initial trigger level.

[0094] In an implementation manner, the signal generation module 904 is further configured to: calculate a measurement result corresponding to each voltage comparator according to the square wave signals output by each voltage comparator for the standard signal; determine, according to the measurement result, that the voltage comparator configured with the first initial trigger level is the first voltage comparator that has not been triggered, and determine that the voltage comparator configured with the second initial trigger level is the second voltage comparator that has been triggered.

[0095] In an implementation manner, the first level determination module 906 is further configured to: adjust the first initial calibration level of the first voltage comparator according to a first increment; control the standard signal source to generate a standard signal, determine that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal, and continue to adjust the adjusted first initial calibration level according to the first increment until the first voltage comparator is triggered by the standard signal to obtain a first intermediate calibration level; adjust the first intermediate calibration level according to a second increment; control the standard signal source to generate a standard signal, determine that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal, and continue to adjust the adjusted first intermediate calibration level according to the second increment until the first voltage comparator is triggered by the standard signal to obtain a first target calibration level.

[0096] In one embodiment, the second level determination module 908 is further configured to: adjust the second initial calibration level of the second voltage comparator according to the first decrement; control the standard signal source to generate a standard signal, determine that the first voltage comparator is triggered by the standard signal, and the second voltage comparator is not triggered by the standard signal, and continue to adjust the adjusted second initial calibration level according to the first decrement until the second voltage comparator is triggered by the standard signal to obtain a second intermediate calibration level; adjust the second intermediate calibration level according to the second decrement; control the standard signal source to generate a standard signal, determine that the first voltage comparator is triggered by the standard signal, and the second voltage comparator is not triggered by the standard signal, and continue to adjust the adjusted second intermediate calibration level according to the second decrement until the second voltage comparator is triggered by the standard signal to obtain a second target calibration level.

[0097] In one embodiment, the above device further includes a coefficient calculation module, configured to: perform a fitting process on the first target calibration level and the second target calibration level by using a specified formula to determine the calibration coefficient of the signal measurement channel; wherein, the calibration coefficient includes a gain coefficient and an offset coefficient.

[0098] In one embodiment, the control end is configured with a level storage unit and a coefficient storage unit corresponding to each signal measurement channel, and the above device further includes a storage module, configured to: store the target trigger level into the level storage unit corresponding to the signal measurement channel, and store the calibration coefficient into the coefficient storage unit corresponding to the signal measurement channel.

[0099] For the signal measurement method provided in the foregoing embodiments, an embodiment of the present invention provides a signal measurement device, which is applied to the control end of an integrated circuit automatic test equipment. The integrated circuit automatic test equipment further includes at least one signal measurement channel electrically connected to the control end. Refer to Figure 10 the structural schematic diagram of a signal measurement device shown in

[0100] A channel determination module 1002, configured to determine a target measurement channel connected to a signal source to be measured from the signal measurement channels; wherein, the number of target measurement channels is at least one;

[0101] A second configuration module 1004, configured to obtain the target trigger level and the calibration coefficient corresponding to each target measurement channel, and configure the target trigger level and the calibration coefficient in parallel to the target measurement channel, so that the target measurement channel performs shaping processing on the signal to be measured sent by the signal source to be measured based on the target trigger level and the calibration coefficient to obtain a square wave signal; wherein, the target trigger level is calibrated by using any method provided in the foregoing embodiments.

[0102] A measurement module 1006, configured to determine a signal measurement result corresponding to a signal source to be measured according to a square wave signal output by a target measurement channel.

[0103] The signal measurement device provided in the embodiments of the present invention can obtain and configure measurement parameters corresponding to each target measurement channel in parallel. Compared with the prior art method of sending measurement parameters channel by channel, the signal measurement method provided in the embodiments of the present invention can enable multiple signal measurement channels to run simultaneously, significantly improving the signal measurement efficiency.

[0104] For the device provided in the embodiments of the present invention, the implementation principle and the technical effects produced are the same as those in the foregoing method embodiments. For the sake of brief description, for parts not mentioned in the device embodiments, reference may be made to the corresponding content in the foregoing method embodiments.

[0105] Finally, it should be noted that the above embodiments are only specific implementation manners of the present invention, used to illustrate the technical solutions of the present invention, and are not intended to limit them. The protection scope of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that any person skilled in the art within the technical scope disclosed by the present invention can still modify the technical solutions described in the foregoing embodiments, or can easily think of changes, or perform equivalent replacements for some technical features thereof; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A method for calibrating a trigger level, characterized in that, The method is applied to the control end of an integrated circuit automatic test device, which further includes at least one signal measurement channel electrically connected to the control end. Both the signal measurement channel and the control end are electrically connected to a standard signal source. The signal measurement channel includes a plurality of voltage comparators. The method includes: Configuring an initial calibration level for each of the voltage comparators; Controlling the standard signal source to generate a standard signal, and determining an untriggered first voltage comparator and a triggered second voltage comparator from the voltage comparators; Controlling the initial calibration level of the second voltage comparator to remain unchanged, and adjusting the initial calibration level of the first voltage comparator according to a preset increment to obtain a first target calibration level of the first voltage comparator; Controlling the first target calibration level to remain unchanged, and adjusting the initial calibration level of the second voltage comparator according to a preset decrement to obtain a second target calibration level of the second voltage comparator. Wherein, the target trigger levels of the signal measurement channel include the first target calibration level and the second target calibration level.

2. The method according to claim 1, characterized in that, The number of the voltage comparators is two; The step of configuring an initial calibration level for each of the voltage comparators includes: Configuring a first initial trigger level for any one of the voltage comparators, determining a first initial calibration level of the voltage comparator according to the first initial trigger level and a specified voltage value, and configuring the first initial calibration level to the voltage comparator; And configuring a second initial trigger level for the other voltage comparator, determining a second initial calibration level of the voltage comparator according to the second initial trigger level and the specified voltage value, and configuring the second initial calibration level to the voltage comparator; Wherein, the first initial trigger level is higher than the second initial trigger level.

3. The method according to claim 2, wherein The step of determining an untriggered first voltage comparator and a triggered second voltage comparator from the voltage comparators includes: Calculating a measurement result corresponding to each voltage comparator according to the square wave signal output by each voltage comparator for the standard signal; According to the measurement result, determining that the voltage comparator configured with the first initial trigger level is the untriggered first voltage comparator, and determining that the voltage comparator configured with the second initial trigger level is the triggered second voltage comparator.

4. The method according to claim 1, characterized in that, The step of adjusting the initial calibration level of the first voltage comparator according to a preset increment to obtain a first target calibration level of the first voltage comparator includes: Adjusting the first initial calibration level of the first voltage comparator according to a first increment; Controlling the standard signal source to generate a standard signal, determining that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal, and continuing to adjust the adjusted first initial calibration level according to the first increment until the first voltage comparator is triggered by the standard signal to obtain a first intermediate calibration level; Adjusting the first intermediate calibration level according to a second increment; Control the standard signal source to generate a standard signal, determine that the second voltage comparator is triggered by the standard signal and the first voltage comparator is not triggered by the standard signal, and continue to adjust the adjusted first intermediate calibration level according to the second increment until the first voltage comparator is triggered by the standard signal to obtain the first target calibration level.

5. The method according to claim 2, characterized in that, The step of adjusting the initial calibration level of the second voltage comparator according to a preset decrement to obtain the second target calibration level of the second voltage comparator includes: Adjust the second initial calibration level of the second voltage comparator according to a first decrement; Control the standard signal source to generate a standard signal, determine that the first voltage comparator is triggered by the standard signal and the second voltage comparator is not triggered by the standard signal, and continue to adjust the adjusted second initial calibration level according to the first decrement until the second voltage comparator is triggered by the standard signal to obtain a second intermediate calibration level; Adjust the second intermediate calibration level according to a second decrement; Control the standard signal source to generate a standard signal, determine that the first voltage comparator is triggered by the standard signal and the second voltage comparator is not triggered by the standard signal, and continue to adjust the adjusted second intermediate calibration level according to the second decrement until the second voltage comparator is triggered by the standard signal to obtain the second target calibration level.

6. The method according to claim 1, characterized in that, The method further includes: Performing a fitting process on the first target calibration level and the second target calibration level using a specified formula to determine the calibration coefficient of the signal measurement channel; wherein, the calibration coefficient includes a gain coefficient and an offset coefficient.

7. The method according to claim 6, wherein The control terminal is configured with a level storage unit and a coefficient storage unit corresponding to each signal measurement channel, and the method further includes: Storing the target trigger level into the level storage unit corresponding to the signal measurement channel, and storing the calibration coefficient into the coefficient storage unit corresponding to the signal measurement channel.

8. A signal measurement method, characterized in that, The method is applied to the control terminal of an integrated circuit automatic test device, and the integrated circuit automatic test device further includes at least one signal measurement channel electrically connected to the control terminal. The method includes: Determine a target measurement channel connected to a signal source under test from the signal measurement channels; wherein, the number of the target measurement channels is at least one; Obtain measurement parameters corresponding to each of the target measurement channels, and configure the measurement parameters in parallel to the target measurement channels so that the target measurement channels perform shaping processing on the signal under test sent by the signal source under test to obtain a square wave signal; wherein, the measurement parameters at least include a target trigger level, and the target trigger level is calibrated by the method according to any one of claims 1-7; Determine the signal measurement result corresponding to the signal source under test according to the square wave signal output by the target measurement channel.

9. A calibration device for trigger level, characterized in that, The device is applied to the control end of an integrated circuit automatic test equipment. The integrated circuit automatic test equipment further includes at least one signal measurement channel electrically connected to the control end. Both the signal measurement channel and the control end are electrically connected to a standard signal source. The signal measurement channel includes a plurality of voltage comparators. The device includes: A first configuration module, configured to configure an initial calibration level for each of the voltage comparators; A signal generation module, configured to control the standard signal source to generate a standard signal, and determine an untriggered first voltage comparator and a triggered second voltage comparator from the voltage comparators; A first level determination module, configured to keep the initial calibration level of the second voltage comparator unchanged, and adjust the initial calibration level of the first voltage comparator according to a preset increment to obtain a first target calibration level of the first voltage comparator; A second level determination module, configured to keep the first target calibration level unchanged, and adjust the initial calibration level of the second voltage comparator according to a preset decrement to obtain a second target calibration level of the second voltage comparator. Wherein, the target trigger levels of the signal measurement channel include the first target calibration level and the second target calibration level.

10. A signal measurement device, characterized in that, The device is applied to the control end of an integrated circuit automatic test equipment. The integrated circuit automatic test equipment further includes at least one signal measurement channel electrically connected to the control end. The device includes: A channel determination module, configured to determine a target measurement channel connected to a signal source under test from the signal measurement channels. Wherein, the number of the target measurement channels is at least one; A second configuration module, configured to obtain measurement parameters corresponding to each of the target measurement channels, and configure the measurement parameters to the target measurement channels in parallel, so that the target measurement channels perform shaping processing on the signal under test sent by the signal source under test to obtain a square wave signal. Wherein, the measurement parameters at least include a target trigger level, and the target trigger level is calibrated by using the method according to any one of claims 1-7; A measurement module, configured to determine a signal measurement result corresponding to the signal source under test according to the square wave signal output by the target measurement channel.

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