A multi-display controller based on a single chip and its design method

Abstract

A multi-display controller based on a single chip, comprising a superior display controller and an inferior display controller. Among them, the superior display controller is used to synthesize data and perform 2D acceleration and then output it to the interface display; the inferior display controller is used to synthesize the received data and then output it to the interface display. The multi-display controller based on a single chip and its design method of the present invention can provide a display controller with multi-layer synthesis ability, which can greatly reduce the burden on the GPU, reduce the latency of the picture, and give users a better experience.

Description

Technical Field

[0001] The present invention relates to the technical field of chip design, and in particular to a cascade solution of a display controller. Background Art

[0002] New industry trends represented by smart cars are placing increasingly complex demands on display capabilities, posing higher challenges to single-chip solutions.

[0003] Taking the smart cockpit of a car as an example, the main and secondary central control screens handle entertainment functions, requiring complex display controllers with advanced multi-layer synthesis capabilities. Furthermore, the vehicle's multiple streaming media rearview mirrors, heads-up displays, rear-seat screens, and control panels all require a sufficient number of display controllers to meet these demands. The key design challenge is how to integrate all these controllers on a single chip while also minimizing chip size, reducing chip costs, and avoiding performance loss.

[0004] Taking the car's central control as an example, the central control entertainment screen focuses on user experience and will run very complex systems such as the Android system to provide complex and beautiful display images.

[0005] At the same time, future car cockpits will require multiple screens to meet the needs of streaming media rearview mirrors, rear seat displays, control panels, head-up displays, etc. These requirements require display controllers with simple synthesis capabilities, but the number of screens required is large.

[0006] like Figure 2 As shown, different projects require different display controller capabilities. If all are equipped with complex controllers, it will cause performance waste and increase chip costs.

[0007] There are two main solutions for products currently on the market:

[0008] 1. Use multiple chips instead of a single chip

[0009] Single-chip has cost advantages and higher integration, while multi-chip costs are uncontrollable and will make the system more complex.

[0010] 2. The problem of insufficient number of screens is to cut the large screen into small screens by using an external adapter chip

[0011] The need for an external chip will also increase costs, and this solution has significant limitations on screen size.

[0012] For example, it requires the split screen width to be the same and has no synthesis capability.

[0013] 3. An additional 2D acceleration module is provided inside the chip specifically for multi-layer synthesis

[0014] This additional module significantly occupies chip area and also causes cost increase. Moreover, using memory to dump data results in large memory bandwidth occupation and increased rendering latency.

[0015] 4. Use the GPU for synthesis, and finally the GPU will synthesize the image data into a single layer.

[0016] This solution greatly increases the burden on the GPU, leading to increased power consumption and decreased performance.

[0017] On complex systems such as Android, currently almost no chip manufacturers do this.

[0018] Existing solutions need to be equipped with multiple display controllers that support complex synthesis capabilities to meet the complex synthesis requirements of entertainment screens. It is difficult to control the cost, which will lead to a reduction in the number of display controllers.

[0019] Once the chip design solution is fixed, it is difficult to meet various projects, with insufficient flexibility or wasted performance, and even unable to meet the screen quantity requirements. Summary of the Invention

[0020] In order to solve the deficiencies of the existing technology, the purpose of the present invention is to provide a multi-display controller based on a single chip and a design method, which can provide a display controller with multi-layer synthesis ability, greatly reduce the burden on the GPU, reduce the latency of the screen, and give users a better experience.

[0021] To achieve the above purpose, a multi-display controller based on a single chip provided by the present invention includes a superior display controller and an inferior display controller, wherein,

[0022] The superior display controller is used to synthesize data and perform 2D acceleration and then output it to the interface display;

[0023] The inferior display controller is used to synthesize the received data and then output it to the interface display.

[0024] Further, the inferior display controller is cascaded with at least one of the superior display controllers.

[0025] Further, the inferior display controller is also used to receive the data of the superior display controller and memory data, synthesize them and send them to the interface display.

[0026] Further, the superior display controller and the inferior display controller are controllers based on basic units.

[0027] To achieve the above purpose, the present invention also provides a design method for a multi-display controller based on a single chip, including the following steps:

[0028] Configure the multiplexing unit through registers;

[0029] The upper controller and the lower controller output synthesized data to the interface through the multiplexing unit.

[0030] Furthermore, the step of the upper controller and the lower controller outputting synthesized data to the interface through the multiplexing unit further includes

[0031] The lower controller is cascaded with at least one of the upper controllers;

[0032] The lower controller receives the data output by the upper controller and synthesizes it, and selects the interface to output and display through the multiplexing unit.

[0033] To achieve the above object, the present invention also provides a display control chip, which is characterized by including the multi-display controller based on a single chip described above.

[0034] To achieve the above object, the present invention also provides an electronic device, which is characterized by including a memory and a processor. A computer program is stored on the memory and runs on the processor. When the processor runs the computer program, it executes the steps of the multi-display controller design method based on a single chip described above.

[0035] To achieve the above object, the present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program runs, it executes the steps of the multi-display controller design method based on a single chip described above.

[0036] The multi-display controller based on a single chip and the design method of the present invention have the following beneficial effects:

[0037] 1) It can provide a display controller with multi-layer synthesis ability, which can greatly reduce the burden on the GPU, reduce the latency of the screen, and give users a better experience.

[0038] 2) Under the same chip area, more display controllers can be placed to meet the automotive demand for the number of screens.

[0039] Other features and advantages of the present invention will be described in the following specification, and, in part, will be obvious from the specification, or will be understood by implementing the present invention. Brief Description of the Drawings

[0040] The drawings are used to provide a further understanding of the present invention, and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation to the present invention. In the drawings:

[0041] Figure 1A schematic diagram of a single-chip multi-display controller according to the present invention;

[0042] Figure 2 A schematic diagram showing a synthesis of a display controller in the prior art;

[0043] Figure 3 A flow chart of a method for designing a multi-display controller based on a single chip according to the present invention;

[0044] Figure 4 A simplified schematic diagram of a chip design according to an embodiment of the present invention;

[0045] Figure 5 A schematic diagram of a chip design according to an embodiment of the present invention;

[0046] Figure 6 Schematic diagram of the synthesis process of a lower-level controller according to an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The preferred embodiments of the present invention are described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0048] Example 1

[0049] Figure 1 Schematic diagram of a multi-display controller based on a single chip according to the present invention, as shown in FIG. Figure 1 As shown, the single-chip multi-display controller of the present invention includes an upper display controller A (abbreviated as DCA) and a lower display controller B (abbreviated as DCB), wherein:

[0050] The upper display controller A and the lower display controller B are cascaded and form a basic unit controller.

[0051] The upper-level display controller A has stronger synthesis capability, more hardware layers, and can output to the screen.

[0052] The lower-level display controller B has a slightly weaker synthesis capability and only has a small number of software layers that can simultaneously receive data from DCA and synthesize all received data and output it to the screen.

[0053] In the embodiment of the present invention, Figure 4As shown in the figure, the upper display controller DCA and the lower display controller DCB can be cascaded. In complex scenarios where the demand for multi-layer synthesis capabilities is higher, the synthesis capabilities far exceeding those of a single module can be obtained through cascading. n upper controllers can be stacked together and input to the lower controller, and the synthesis capabilities of each upper controller are stacked together. Assuming that the synthesis capability of each upper controller is m layers, a synthesis capability of n * m can be obtained. In this way, under the same chip area, this solution can accommodate a larger number of display controllers to meet the automotive demand for the number of screens.

[0054] Embodiment 2

[0055] Figure 3 For the flowchart of the multi-display controller design method based on a single chip according to the present invention, the dynamic management method of multimedia resources of the present invention will be described in detail below with reference to Figure 3 and

[0056] In step 301, the multiplexing unit is configured through registers.

[0057] In step 302, the upper controller and the lower controller output synthesized data to the interface through the multiplexing unit.

[0058] Preferably, the lower controller is cascaded with at least one of the upper controllers. The lower controller can receive data from multiple upper controllers simultaneously, and the relationship between the lower controller and the upper controllers is one-to-many.

[0059] Preferably, the lower controller receives the data output by the upper controller and synthesizes it, and selects an interface through the multiplexing unit to output for display.

[0060] Embodiment 3

[0061] In the embodiment of the present invention, as Figure 5 shown, both the individual DCA and DCB of the invention have synthesis capabilities and are sent to the interface through displaymux, which can meet the display requirements of the operating system.

[0062] For example, the upper controller 1 can directly output to the mipi interface 1 or the mipi interface 2 through the display mux,

[0063] or it can also output to the lower controller 1 for synthesis and then select a channel LVDS1 to output through the display mux.

[0064] The multiplexing unit allows the controller to freely select the display interface as needed without binding the interface to the controller. The controller can output to the LVDS interface, the mipi interface, or output to multiple LVDS interfaces simultaneously, etc.

[0065] When more screen projects are needed, configure both the upper-level controller 1 and the lower-level controller to output to the display interface (mipi, lvds, parallel) through the multiplexing terminal. In this way, the system has multiple display controllers available, which can meet the requirements of multi-screen projects.

[0066] When more composite layer projects are needed, configure the upper-level controllers 1 and 2 to be linked to the lower-level controller 1, and a structure with more than twice the composite ability of the upper-level controller 2 can be obtained. In this way, the system can obtain a high-performance hardware composite module to meet the requirements of the project for high composite ability.

[0067] In the embodiment of the present invention, DCA and DCB are connected by hardware signals without using memory to dump data, reducing memory bandwidth occupancy and latency. The lower-level controller receives data from the upper-level controller and memory data from AXI, and after synthesis, it is sent to the interface for display. The hardware signal means that data is transmitted through the AXI bus and does not need to be read and written through memory. In this way, a composite ability far exceeding that of a single module can be obtained. The lower-level controller DCB also has multi-layer composite ability, and data from multiple upper-level controllers DCA can be directly synthesized into the final image.

[0068] Embodiment 4

[0069] In the embodiment of the present invention, as Figure 6 shown, the process of sending the layers of the upper-level control 1 + upper-level controller 2 to the lower-level controller 1 for synthesis through the high-speed bus:

[0070] The synthesis process of the lower-level controller is as Figure 6 shown. The lower-level controller receives the software layer and the layers input by the upper-level controller, and gradually stacks the layers to generate the final result.

[0071] In view of the diverse requirements of the automotive industry for screens, the present invention provides a design solution to solve the contradiction between chip cost and functional requirements. It replaces the originally equipped multiple complex display controllers and simple controllers with the smallest unit of display controller. The automotive electronic architecture is developing towards higher integration, and the cost advantage and integration advantage of a single chip are obvious. If a single chip can provide a display controller with multi-layer composite ability, it can greatly reduce the burden on the GPU, reduce the latency of the picture, and give users a better experience. In the case of simple scenarios with low requirements for composite ability, the quantity requirements can be met.

[0072] In an embodiment of the present invention, a display control chip is further provided, which is characterized by including the multi-display controller based on a single chip described above.

[0073] In one embodiment of the present invention, there is also provided an electronic device, which is characterized by including a memory and a processor. A computer program is stored on the memory and runs on the processor. When the processor runs the computer program, it executes the steps of the above-mentioned single-chip-based multi-display controller design method.

[0074] In one embodiment of the present invention, there is also provided a computer-readable storage medium, on which a computer program is stored. When the computer program runs, it executes the steps of the single-chip-based multi-display controller design method as described above.

[0075] Those of ordinary skill in the art can understand that the above description is only the preferred embodiment of the present invention and is not used to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, for those skilled in the art, they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A multi-display controller based on a single chip, characterized in that, Including a superior display controller and an inferior display controller configured on a single chip, where the inferior display controller and at least one of the superior display controllers are cascaded through an AXI bus; the superior display controller is configured to output the synthesized data to the inferior display controller or the multiplexing unit selection interface for display after 2D acceleration; the inferior display controller synthesizes the data received from the superior display controller and the memory data from the AXI and then outputs the synthesized data to the screen or the multiplexing unit selection interface for display.

2. The multi-display controller based on a single chip according to claim 1, characterized in that The inferior display controller is further configured to receive the data from the superior display controller and the memory data, synthesize them, and send the synthesized data to the interface for display.

3. The multi-display controller based on a single chip according to claim 1, wherein The superior display controller and the inferior display controller are controllers with a basic unit.

4. A design method of a multi-display controller based on a single chip, characterized in that, Applied to the multi-display controller based on a single chip according to any one of claims 1-3, it includes the following steps: Configuring the multiplexing unit through registers; The superior display controller and the inferior display controller output the synthesized data to the interface through the multiplexing unit.

5. The method for designing a multi-display controller based on a single chip according to claim 4, wherein The step of the superior display controller and the inferior display controller outputting the synthesized data to the interface through the multiplexing unit further includes that the inferior display controller is cascaded with at least one of the superior display controllers; the inferior display controller receives the data output by the superior display controller, synthesizes it, and outputs the synthesized data for display through the multiplexing unit selection interface.

6. A display control chip, characterized in that, Including the multi-display controller based on a single chip according to any one of claims 1-3.

7. An electronic device, characterized in that, Including a memory and a processor, where a computer program is stored on the memory and runs on the processor, and when the processor runs the computer program, it executes the steps of the design method of the multi-display controller based on a single chip according to any one of claims 4 or 5.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program runs, it executes the steps of the design method of the multi-display controller based on a single chip according to claim 4 or 5.

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