Preparation method of super-high-resolution nano-led light-emitting display array
By destroying the multi-quantum-well structure through ion implantation and using a hydrogen-absorbing alloy thermal conductive layer, the problems of electrode extraction and etching effects in Nano-LED light-emitting display arrays were solved, enabling the fabrication of high-resolution and high-quality display arrays.
Patent Information
- Application Number
- CN202210092018.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-01-26
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2042-01-26
AI Technical Summary
In ultra-high resolution Nano-LED light-emitting display arrays, pixel electrodes are difficult to extract, and edge and size effects generated during etching reduce luminous efficiency, requiring complex passivation and repair processes.
Ion implantation is used to destroy the multi-quantum-well structure to form a high-resistivity P-type GaN layer or isolation region, and hydrogen-absorbing alloy is used as the thermal conductive layer material to simplify the fabrication process and reduce edge and size effects in the etching process.
This achievement improves the electrical isolation and conductivity of ultra-high resolution Nano-LED light-emitting display arrays, reduces chip costs, and enhances chip quality.
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Figure CN114464641B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the field of semiconductor light-emitting device manufacturing, and particularly relates to a preparation method of an ultra-high-resolution Nano-LED light-emitting display array. BACKGROUND
[0002] LED has the advantages of high brightness, high light efficiency, long service life, high contrast, and nanosecond-level response time. At the same time, LED is prepared by using a semiconductor processing technology and is compatible with an IC technology, has extremely high device processing precision and stability, is expected to realize ultra-high resolution, is convenient for integration with sensors such as touch, hearing, and smell, realizes high-precision spatial positioning and touch perception, and makes it possible to realize more realistic AR and VR. The ultra-high-resolution Nano-LED light-emitting display refers to a LED display technology with extremely high resolution of nanoscale pixels. With the increasing requirements of display terminals on display information quantity and functional integration, the ultra-high-resolution Nano-LED light-emitting display is an inevitable trend of the development of display technology. However, the ultra-high-resolution Nano-LED light-emitting display has many scientific and technological problems, and urgently needs new coping strategies and revolutionary technologies to solve them.
[0003] When the light-emitting display pixel is as small as a nano quantum, the electrode lead-out has great challenges, and is one of the key technical problems to be solved in the ultra-high-resolution Nano-LED light-emitting display. The traditional LED display array is defined by using photolithography and etching means, and the pixels are uneven between the pixels. How to lead out independent ultra-fine and ultra-high-density electrodes on the surface of these small-size protruding pixels is the core key technology to realize the addressable ultra-high-resolution Nano-LED light-emitting display. At the same time, the edge effect and size effect generated in the etching process will reduce the light-emitting efficiency, and a complex passivation and repair process is needed to improve the light-emitting efficiency. SUMMARY
[0004] Therefore, the purpose of the present application is to provide a preparation method of an ultra-high-resolution Nano-LED light-emitting display array, which simplifies the preparation process and can reduce the edge effect and size effect that may be generated in the etching process.
[0005] To achieve the above-mentioned purpose, the present application adopts the following technical solutions:
[0006] An ultra-high-resolution Nano-LED light-emitting display array comprises, from bottom to top, a substrate, an N-type GaN layer, a light-emitting layer, a P-type GaN layer, and a P-contact electrode; a common N-contact electrode is further arranged on the N-type GaN layer; the light-emitting layer adopts a multi-quantum well nanodot array, and the isolation regions between the multi-quantum well nanodot array are equal in thickness and continuous.
[0007] Further, a heat-conducting film is arranged between the P-type GaN layer and the P-contact electrode.
[0008] Further, the P-type GaN layer structure is a P-type GaN nano array with a mutual isolation region between the P-type GaN layers.
[0009] Further, the common N-contact electrode and the P-contact electrode are a multilayer film formed by laminating one or more of Pt, Ti, and Au materials.
[0010] Further, the P-contact electrode covers N (N≥1) multiple quantum well nano dot arrays through patterning.
[0011] A preparation method of an ultrahigh-resolution Nano-LED light-emitting display array, comprising the following steps:
[0012] Step S11: sequentially epitaxially growing an N-type GaN layer and a multiple quantum well layer on a sapphire substrate;
[0013] Step S12: depositing an ion implantation protective layer on the surface of the multiple quantum well layer, forming a photoresist nano array on the ion implantation protective layer by electron beam lithography, variable parameter lithography, or nano imprinting, and removing the exposed ion implantation protective layer to form an ion implantation protective layer nano array with the photoresist as protection.
[0014] Step S13: using an ion implantation method, controlling the implantation depth and lateral diffusion degree by implantation energy, destroying the multiple quantum well structure without a protective layer, and removing the ion implantation protective layer nano array to form an ultrahigh-resolution multiple quantum well nano array.
[0015] Step S14: continuing to epitaxially grow a P-type GaN layer on the surface of the multiple quantum well nano array obtained in step S13.
[0016] Step S15: depositing a P-contact electrode film on the surface of the P-type GaN layer obtained in step S14, forming a photoresist array with a one-to-N relationship with the ultrahigh-resolution multiple quantum well nano array obtained in step S13 on the P-contact electrode film by electron beam lithography, variable parameter lithography, or nano imprinting, and removing the exposed P-contact electrode film to form a P-contact electrode array with a one-to-N relationship with the ultrahigh-resolution multiple quantum well nano array obtained in step S13, with the photoresist as protection.
[0017] Step S16: forming a common N-contact electrode window and leading out a common N-contact electrode by means of lithography and etching to form an ultrahigh-resolution Nano-LED light-emitting display array.
[0018] A preparation method of an ultra-high resolution Nano-LED light-emitting display array, comprising the following steps:
[0019] Step S21: sequentially epitaxially growing an N-type GaN layer and a multi-quantum well layer on a sapphire substrate;
[0020] Step S22: depositing an ion implantation protective layer on the surface of the multi-quantum well layer, forming a photoresist nano array on the ion implantation protective layer by electron beam lithography, variable parameter lithography or nano-imprinting, and removing the exposed ion implantation protective layer to form an ion implantation protective layer nano array with the photoresist as protection;
[0021] Step S23: using an ion implantation method, controlling the implantation depth and lateral diffusion degree by implantation energy, destroying the multi-quantum well structure without the protective layer to make it lose the light-emitting ability, removing the ion implantation protective layer nano array to form an ultra-high resolution multi-quantum well nano array;
[0022] Step S24: continuing to epitaxially grow a P-type GaN layer on the surface of the multi-quantum well nano array obtained in step S23;
[0023] Step S25: depositing a metal thin film on the surface of the P-type GaN layer obtained in step S24, forming a photoresist array corresponding to the ultra-high resolution multi-quantum well nano array obtained in step S23 on the metal thin film by electron beam lithography, variable parameter lithography or nano-imprinting, and removing the exposed metal thin film to form a heat conduction layer array corresponding to the ultra-high resolution multi-quantum well nano array obtained in step S23 with the photoresist as protection;
[0024] Step S26: using a thermal annealing process to control the temperature, and the heat conduction layer can improve the annealing efficiency, eliminate hydrogen ions generated in the epitaxial process, complete the activation of the P-type GaN below the heat conduction layer, and enhance the conductivity of the P-type GaN;
[0025] Step S27: continuing to deposit a P-contact electrode thin film on the basis of the completion of step S26, forming a photoresist array corresponding to the heat conduction layer array obtained in step S25 on the P-contact electrode thin film by electron beam lithography, variable parameter lithography or nano-imprinting, and removing the exposed P-contact electrode thin film to form a P-contact electrode array corresponding to the heat conduction layer obtained in step S25 with the photoresist as protection;
[0026] Step S28: using lithography and etching means to form a common N-contact electrode window and lead out a common N-contact electrode to form an ultra-high resolution Nano-LED light-emitting display array.
[0027] A preparation method of an ultra-high resolution Nano-LED light-emitting display array, comprising the following steps:
[0028] Step S31: sequentially epitaxially growing an N-type GaN layer and a multi-quantum well layer on a sapphire substrate;
[0029] Step S32: depositing an ion implantation protection layer on the surface of the multi-quantum well layer, forming a photoresist nanometer array on the ion implantation protection layer by electron beam lithography, variable parameter lithography or nanoimprint, and removing the exposed ion implantation protection layer to form an ion implantation protection layer nanometer array with the photoresist as protection;
[0030] Step S33: using an ion implantation method, controlling the implantation depth and lateral diffusion degree by implantation energy, implanting ion A to destroy the multi-quantum well structure without a protection layer, so that it loses the light emitting ability, removing the ion implantation protection layer nanometer array to form a super-high-resolution multi-quantum well nanometer array;
[0031] Step S34: continuing to epitaxially grow a P-type GaN layer on the surface of the super-high-resolution multi-quantum well nanometer array obtained in step S33;
[0032] Step S35: depositing an ion implantation protection layer on the surface of the P-type GaN layer obtained in step S34, forming a photoresist array corresponding to the super-high-resolution multi-quantum well nanometer array obtained in step S33 on the ion implantation protection layer by electron beam lithography, variable parameter lithography or nanoimprint, and removing the exposed ion implantation protection layer to form an ion implantation protection layer array corresponding to the super-high-resolution multi-quantum well nanometer array obtained in step S33 with the photoresist as protection;
[0033] Step S36: using an ion implantation method, implanting ion B into the region without a protection layer, i.e. the P-type GaN in the isolation region, to make it have a high resistivity characteristic, removing the ion implantation protection layer nanometer array to form a P-type GaN nanometer array with a mutual isolation region between the P-type GaN;
[0034] Step S37: depositing a metal thin film on the surface of the structure obtained in step S36, forming a photoresist array corresponding to one-to-N of the super-high-resolution multi-quantum well nanometer array obtained in step S33 on the metal thin film by electron beam lithography, variable parameter lithography or nanoimprint, and removing the exposed metal thin film to form a heat conduction layer array corresponding to one-to-N of the super-high-resolution multi-quantum well nanometer array obtained in step S33 with the photoresist as protection;
[0035] Step S38: using a thermal annealing process to control the temperature, and the heat conduction layer can improve the annealing efficiency and eliminate hydrogen ions generated in the epitaxial process, so that the P-type GaN under the heat conduction layer is activated to enhance its conductivity;
[0036] Step S39: on the basis of the completion of step S38, continue to deposit a layer of P contact electrode thin film, form an array of photoresist corresponding to the array of heat-conducting layers obtained in step S37 on the P contact electrode thin film by using electron beam lithography, variable parameter lithography or nano-imprinting, and remove the exposed P contact electrode thin film to form an array of P contact electrodes corresponding to the heat-conducting layers obtained in step S37, with the photoresist as protection;
[0037] Step S310: form a common N contact electrode window and lead out a common N contact electrode by using lithography and etching means, and form a super-high-resolution Nano-LED light-emitting display array.
[0038] Further, the ions used by the multi-quantum well structure of the injection quantum well to destroy the isolation region are fluorine ions.
[0039] Further, the metal thin film material used by the heat-conducting layer is a hydrogen-absorbing alloy mixed by one or more of Cr, Ti and V materials.
[0040] Further, the ion implantation protective layer material is SiO2 or other thin film materials with ion blocking function.
[0041] Further, the ions used to improve the resistivity of the P-type GaN layer of the isolation region are magnesium ions.
[0042] Compared with the prior art, the present application has the following beneficial effects:
[0043] 1. The present application uses ion implantation to destroy the multi-quantum well structure and form a P-type GaN layer with high resistivity, thereby forming an isolation region between the multi-quantum well nano dot arrays or isolating the sub-pixels through the high-resistance P-type GaN layer and independent P electrodes.
[0044] 2. The present application uses a hydrogen-absorbing alloy as the heat-conducting layer material, which can improve the efficiency of thermal annealing on the one hand, and eliminate the hydrogen ions in the P-type GaN that are not conducive to the operation of the device due to the epitaxial process on the other hand, further activate the P-type GaN below the heat-conducting layer and enhance its conductivity.
[0045] 3. The present application simplifies the preparation process, reduces the edge effect and size effect that may occur in the preparation and etching process of the independent driving electrodes of the Nano-LED array, greatly realizes the electrical isolation between device units, and has important significance for reducing chip cost and improving chip quality. BRIEF DESCRIPTION OF DRAWINGS
[0046] Figure 1is the final effect schematic diagram of the first preparation method of the super-high resolution Nano-LED light emitting display array provided by the application, in order to describe accurately and conveniently, the one piece of photoresist pattern corresponds to N multiple quantum wells (N≥1), and three multiple quantum wells are shown in the schematic diagram, the one piece of P contact electrode corresponds to N multiple quantum wells (N≥1), and three multiple quantum wells are shown in the schematic diagram;
[0047] Figures 2-7 is the preparation flow schematic diagram of the first super-high resolution Nano-LED light emitting display array provided by the application;
[0048] Figure 8 is the final effect schematic diagram of the second preparation method of the super-high resolution Nano-LED light emitting display array provided by the application, in order to describe accurately and conveniently, the one piece of photoresist pattern corresponds to N multiple quantum wells (N≥1), and three multiple quantum wells are shown in the schematic diagram, the one piece of heat conduction layer corresponds to N multiple quantum wells (N≥1), and three multiple quantum wells are shown in the schematic diagram;
[0049] Figures 9-15 is the preparation flow schematic diagram of the second super-high resolution Nano-LED light emitting display array provided by the application;
[0050] Figure 16 is the final effect schematic diagram of the third preparation method of the super-high resolution Nano-LED light emitting display array provided by the application, in order to describe accurately and conveniently, the one piece of photoresist pattern corresponds to N multiple quantum wells (N≥1), and three multiple quantum wells are shown in the schematic diagram, the one piece of heat conduction layer corresponds to N multiple quantum wells (N≥1), and three multiple quantum wells are shown in the schematic diagram;
[0051] Figures 17-25 is the preparation flow schematic diagram of the third super-high resolution Nano-LED light emitting display array provided by the application. DETAILED DESCRIPTION
[0052] The application will be further described below in combination with the drawings and embodiments.
[0053] Please refer to Figure 1 The embodiment provides a super-high resolution Nano-LED light emitting display array, which comprises a substrate 1 shared by a super-high resolution Nano-LED sub-pixel array, an N-type GaN layer 201 and a common N contact electrode 202, and a super-high resolution multiple quantum well nanodot array 301, a multiple quantum well structure 302 which is destroyed so as to not emit light, a P-type GaN layer 401 and a P contact electrode 501.
[0054] As Figures 2-7As shown, the first embodiment of the present application also provides a preparation method of the above-mentioned super-high-resolution Nano-LED light-emitting display array, comprising the following steps:
[0055] Step S11: sequentially epitaxially growing an N-type GaN layer and a multi-quantum well layer on a sapphire substrate;
[0056] Step S12: depositing an ion implantation protection layer on the surface of the multi-quantum well layer, forming a photoresist nano-array on the ion implantation protection layer by electron beam lithography, variable parameter lithography or nano-imprinting, and removing the exposed ion implantation protection layer to form an ion implantation protection layer nano-array with the photoresist as protection.
[0057] Step S13: using an ion implantation method to control the implantation depth and lateral diffusion degree by implantation energy, destroy the multi-quantum well structure without the protection layer, so that it loses the light-emitting ability, remove the ion implantation protection layer nano-array, and form a super-high-resolution multi-quantum well nano-array.
[0058] Step S14: continuing to epitaxially grow a P-type GaN layer on the surface of the multi-quantum well nano-array obtained in step S13.
[0059] Step S15: depositing a P-contact electrode thin film on the surface of the P-type GaN layer obtained in step S14, forming a photoresist array (one piece of photoresist corresponds to N multi-quantum wells) corresponding to the super-high-resolution multi-quantum well nano-array obtained in step S13 by one pair of N (N≥1) on the P-contact electrode thin film by electron beam lithography, variable parameter lithography or nano-imprinting, and removing the exposed P-contact electrode thin film to form a P-contact electrode array (one piece of P-contact electrode corresponds to N multi-quantum wells) corresponding to the super-high-resolution multi-quantum well nano-array obtained in step S13 by one pair of N (N≥1) with the photoresist as protection.
[0060] Step S16: forming a common N-contact electrode window and leading out a common N-contact electrode by means of lithography and etching, and forming a super-high-resolution Nano-LED light-emitting display array.
[0061] Preferably, in the present embodiment, the common N-contact electrode and the P-contact electrode can be a multi-layer thin film formed by one or more mixed layers of Pt, Ti and Au materials, or other conductive materials and structures.
[0062] Preferably, in the present embodiment, the ion implantation quantum well destruction isolation region adopts fluorine ions, and the ion implantation protection layer material is SiO2 or other thin film materials with ion blocking function.
[0063] As Figure 8As shown in the embodiment, the second super-high-resolution Nano-LED light-emitting display array comprises a substrate 1, an N-type GaN layer 201 and a common N contact electrode 202, and a super-high-resolution multi-quantum well nanodot array 301, a multi-quantum well structure 302 which is destroyed so as to be unable to emit light, a P-type GaN layer 401, a heat-conducting layer 501 and a P contact electrode 601.
[0064] As shown in the embodiment, the second super-high-resolution Nano-LED light-emitting display array comprises a substrate 1, an N-type GaN layer 201 and a common N contact electrode 202, and a super-high-resolution multi-quantum well nanodot array 301, a multi-quantum well structure 302 which is destroyed so as to be unable to emit light, a P-type GaN layer 401, a heat-conducting layer 501 and a P contact electrode 601. Figures 9-15
[0065] Step S21: sequentially epitaxially growing an N-type GaN layer and a multi-quantum well layer on the sapphire substrate;
[0066] Step S22: depositing an ion implantation protective layer on the surface of the multi-quantum well layer, forming a photoresist nanometer array on the ion implantation protective layer by electron beam lithography, variable parameter lithography or nanoimprint, and removing the exposed ion implantation protective layer to form an ion implantation protective layer nanometer array with the photoresist as protection.
[0067] Step S23: destroying the multi-quantum well structure without the protective layer by ion implantation method to make it lose the light-emitting ability, removing the ion implantation protective layer nanometer array to form a super-high-resolution multi-quantum well nanometer array by controlling the implantation depth and lateral diffusion degree through implantation energy.
[0068] Step S24: continuing to epitaxially grow a P-type GaN layer on the surface of the multi-quantum well nanometer array obtained in step S23.
[0069] Step S25: depositing a metal thin film on the surface of the P-type GaN layer obtained in step S24, forming a photoresist array (one piece of photoresist corresponds to N multi-quantum wells) corresponding to the super-high-resolution multi-quantum well nanometer array obtained in step S23 by N (N≥1) by electron beam lithography, variable parameter lithography or nanoimprint, and removing the exposed metal thin film to form a heat-conducting layer array (one piece of heat-conducting layer corresponds to N multi-quantum wells) corresponding to the super-high-resolution multi-quantum well nanometer array obtained in step S23 by N (N≥1) with the photoresist as protection.
[0070] Step S26: controlling the temperature by adopting a thermal annealing process, so that the P-type GaN under the heat-conducting layer is activated to enhance the conductivity by improving the annealing efficiency of the heat-conducting layer and eliminating hydrogen ions generated in the epitaxial process.
[0071] Step S27: continue to deposit a layer of P-contact electrode film on the basis of the completion of step S26, form a photoresist array corresponding to the array of heat-conducting layers obtained in step S25 on the P-contact electrode film by using electron beam lithography, variable parameter lithography or nano-imprinting, and remove the exposed P-contact electrode film to form an array of P-contact electrodes corresponding to the heat-conducting layers obtained in step S25 with the photoresist as protection.
[0072] Step S28: form a common N-contact electrode window and lead out the common N-contact electrode by using lithography and etching means, and form a super-high-resolution Nano-LED light-emitting display array.
[0073] The common N-contact electrode and the P-contact electrode are a multilayer film formed by one or more mixed layers of Pt, Ti and Au materials, and can also be other conductive materials and structures.
[0074] In the second embodiment, the ion used in the ion-implanted quantum well to destroy the multi-quantum well structure is fluorine ion, the ion-implanted protective layer material is SiO2 or other thin film materials with ion blocking function, and the material used in the heat-conducting film is a hydrogen-absorbing alloy mixed by one or more of Cr, Ti and V materials.
[0075] As shown in Figure 16 The third super-high-resolution Nano-LED light-emitting display array provided by the present embodiment includes a substrate 1 shared by the super-high-resolution Nano-LED sub-pixel array, an N-type GaN layer 201 and a common N-contact electrode 202, a super-high-resolution multi-quantum well nanodot array 301, a multi-quantum well structure 302 destroyed so that it cannot emit light, a P-type GaN layer 401, a P-type GaN layer 402 with high resistivity, a heat-conducting film 501 and a P-contact electrode 601.
[0076] As shown in Figures 17-25 The third embodiment of the present application also provides a preparation method of the above-mentioned super-high-resolution Nano-LED light-emitting display array, including the following steps:
[0077] Step S31: epitaxially grow an N-type GaN layer and a multi-quantum well layer on a sapphire substrate in sequence;
[0078] Step S32: deposit an ion-implanted protective layer on the surface of the multi-quantum well, form a photoresist nanometer array on the ion-implanted protective layer by using electron beam lithography, variable parameter lithography or nano-imprinting, and remove the exposed ion-implanted protective layer to form an ion-implanted protective layer nanometer array with the photoresist as protection;
[0079] Step S33: Using ion implantation method, by controlling the implantation depth and lateral diffusion degree through implantation energy, implanting ion A to destroy the multi-quantum well structure without protective layer, making it lose the ability of light emission, removing the ion implantation protective layer nano array, and forming the super high resolution multi-quantum well nano array;
[0080] Step S34: Continuing to epitaxially grow P-type GaN layer on the surface of the super high resolution multi-quantum well nano array obtained in step S33.
[0081] Step S35: Depositing an ion implantation protective layer on the surface of the P-type GaN layer obtained in step S34, using electron beam lithography, variable parameter lithography or nano-imprinting to form a photoresist array corresponding to the super high resolution multi-quantum well nano array obtained in step S33 on the ion implantation protective layer, and removing the exposed ion implantation protective layer to form an ion implantation protective layer array corresponding to the super high resolution multi-quantum well nano array obtained in step S33.
[0082] Step S36: Using ion implantation method, by controlling the implantation depth and lateral diffusion degree through implantation energy, implanting ion B to the region without protective layer, i.e. the P-type GaN in the isolation region, making it have high resistivity characteristics, removing the ion implantation protective layer nano array, and forming the P-type GaN nano array with mutual isolation region between P-type GaN.
[0083] Step S37: Depositing a metal thin film on the surface of the structure obtained in step S36, using electron beam lithography, variable parameter lithography or nano-imprinting to form a photoresist array corresponding to one to N (N≥1) of the super high resolution multi-quantum well nano array obtained in step S33 (one photoresist corresponds to N multi-quantum wells) on the metal thin film, and removing the exposed metal thin film to form a heat conduction layer array corresponding to one to N (N≥1) of the super high resolution multi-quantum well nano array obtained in step S33 (one heat conduction layer corresponds to N multi-quantum wells).
[0084] Step S38: Using thermal annealing process, controlling the temperature, and the heat conduction layer can improve the annealing efficiency, eliminate the hydrogen ions generated in the epitaxial process, so that the P-type GaN under the heat conduction layer is activated and its conductivity is enhanced.
[0085] Step S39: On the basis of the completion of step S38, continue to deposit a P-contact electrode thin film, use electron beam lithography, variable parameter lithography or nano-imprinting to form a photoresist array corresponding to the heat conduction layer array obtained in step S37 on the P-contact electrode thin film, and remove the exposed P-contact electrode thin film to form a P-contact electrode array corresponding to the heat conduction layer obtained in step S37.
[0086] Step S310: using photoetching and etching means, forming a common N contact electrode window and leading out a common N contact electrode, forming a super high resolution Nano-LED light emitting display array.
[0087] The common N contact electrode and the P contact electrode are a multilayer film formed by one or more of Pt, Ti and Au mixed and stacked, and can also be other conductive materials and structures.
[0088] In the third embodiment, the ion used for the ion implantation quantum well to break the multi-quantum well structure of the isolation region is fluorine ion, the ion implantation protective layer material is SiO2 or other thin film material with ion blocking function, the material used for the heat conduction thin film is a hydrogen absorbing alloy formed by one or more of Cr, Ti and V mixed, and the method used for improving the resistivity of the P type GaN layer of the isolation region is magnesium ion implantation.
[0089] The above only describes the preferred embodiments of the present application, and any equivalent changes and modifications made within the scope of the present application should be included in the scope of the present application.
Claims
1. A method for fabricating an ultra-high resolution Nano-LED light-emitting display array, characterized in that, The super-high-resolution Nano-LED light-emitting display array comprises, from bottom to top, a substrate, an N-type GaN layer, a light-emitting layer, a P-type GaN layer, and a P contact electrode; the N-type GaN layer is further provided with a common N contact electrode; The light-emitting layer adopts a multi-quantum well nano dot array, and the isolation regions between the multi-quantum well nano dot arrays are equal in thickness and continuous; The P contact electrode covers N multi-quantum well nano dot arrays through patterning, and N is greater than or equal to 1; The preparation method comprises the following steps: Step S11: sequentially epitaxially growing an N-type GaN layer and a multi-quantum well layer on a sapphire substrate; Step S12: depositing an ion implantation protection layer on the surface of the multi-quantum well, forming a photoresist nano array on the ion implantation protection layer by using electron beam lithography, variable parameter lithography or nano imprinting, and removing the exposed ion implantation protection layer to form an ion implantation protection layer nano array with photoresist as protection; Step S13: using an ion implantation method, the implantation energy is controlled to control the implantation depth and the lateral diffusion degree, the multi-quantum well structure without the protection layer is destroyed, the multi-quantum well structure loses the light-emitting capability, the ion implantation protection layer nano array is removed, and a super-high-resolution multi-quantum well nano array is formed; Step S14: continuing to epitaxially grow a P-type GaN layer on the surface of the multi-quantum well nano array obtained in step S13; Step S15: depositing a P contact electrode thin film on the surface of the P-type GaN layer obtained in step S14, forming a photoresist array opposite to the super-high-resolution multi-quantum well nano array obtained in step S13 on the P contact electrode thin film by using electron beam lithography, variable parameter lithography or nano imprinting, and removing the exposed P contact electrode thin film to form a P contact electrode array opposite to the super-high-resolution multi-quantum well nano array obtained in step S13 with photoresist as protection; Step S16: forming a common N contact electrode window by using lithography and etching means, and leading out the common N contact electrode to form a super-high-resolution Nano-LED light-emitting display array.
2. A method for fabricating an ultra-high resolution Nano-LED light emitting display array, comprising the steps of: The super-high-resolution Nano-LED light-emitting display array comprises, from bottom to top, a substrate, an N-type GaN layer, a light-emitting layer, a P-type GaN layer, and a P contact electrode; the N-type GaN layer is further provided with a common N contact electrode; The light-emitting layer adopts a multi-quantum well nano dot array, and the isolation regions between the multi-quantum well nano dot arrays are equal in thickness and continuous; A heat-conducting film is arranged between the P contact electrode and the P-type GaN layer; The P contact electrode covers N multi-quantum well nano dot arrays through patterning, and N is greater than or equal to 1; The preparation method comprises the following steps: Step S21: sequentially epitaxially growing an N-type GaN layer and a multi-quantum well layer on a sapphire substrate; Step S22: depositing an ion implantation protection layer on the surface of the multi-quantum well, forming a photoresist nano array on the ion implantation protection layer by using electron beam lithography, variable parameter lithography or nano imprinting, and removing the exposed ion implantation protection layer to form an ion implantation protection layer nano array with photoresist as protection; Step S23: using an ion implantation method, the implantation energy is controlled to control the implantation depth and the lateral diffusion degree, the multi-quantum well structure without the protection layer is destroyed, the multi-quantum well structure loses the light-emitting capability, the ion implantation protection layer nano array is removed, and a super-high-resolution multi-quantum well nano array is formed; Step S23: The ion implantation method is adopted, the implantation depth and the lateral diffusion degree are controlled by implantation energy, the multi-quantum well structure without the protection layer is damaged, the light emitting capability is lost, the ion implantation protection layer pattern nano array is removed, and the super high resolution multi-quantum well nano array is formed; Step S24: The P-type GaN layer is continuously epitaxially grown on the surface of the multi-quantum well nano array obtained in step S23; Step S25: A metal thin film is deposited on the surface of the P-type GaN layer obtained in step S24, the photoresist array corresponding to the super high resolution multi-quantum well nano array obtained in step S23 is formed on the metal thin film by adopting the electron beam lithography, the variable parameter lithography or the nano imprinting, the exposed metal thin film is removed by taking the photoresist as protection, and the heat conduction layer array corresponding to the super high resolution multi-quantum well nano array obtained in step S23 is formed; Step S26: The heat annealing process is adopted, the temperature is controlled, the heat conduction layer can improve the annealing efficiency, the hydrogen ion generated in the epitaxial process is eliminated, the P-type GaN under the heat conduction layer is activated, and the conductivity of the P-type GaN is enhanced; Step S27: On the basis of the completion of step S26, a P contact electrode thin film is continuously deposited, the photoresist array corresponding to the heat conduction layer array obtained in step S25 is formed on the P contact electrode thin film by adopting the electron beam lithography, the variable parameter lithography or the nano imprinting, the exposed P contact electrode thin film is removed by taking the photoresist as protection, and the P contact electrode array corresponding to the heat conduction layer obtained in step S25 is formed; Step S28: The photoetching and etching means are adopted, the common N contact electrode window is formed, the common N contact electrode is led out, and the super high resolution Nano-LED light emitting display array is formed.
3. A method for fabricating an ultra-high resolution Nano-LED light emitting display array, comprising the steps of: The super high resolution Nano-LED light emitting display array comprises a substrate, an N-type GaN layer, a light emitting layer, a P-type GaN layer and a P contact electrode which are sequentially arranged from bottom to top; and the N-type GaN layer is further provided with a common N contact electrode; The light emitting layer adopts a multi-quantum well nano dot array, and the isolation areas between the multi-quantum well nano dot arrays are equal in thickness and continuous; The P contact electrode is provided with a heat conduction film between the P-type GaN layer; The P-type GaN layer structure is a P-type GaN nano array with mutual isolation areas between P-type GaN; The P contact electrode covers N multi-quantum well nano dot arrays by patterning, and N is greater than or equal to 1; The method comprises the following steps: Step S31: An N-type GaN layer and a multi-quantum well layer are epitaxially grown on a sapphire substrate in sequence; Step S32: An ion implantation protection layer is deposited on the surface of the multi-quantum well, a photoresist nano array is formed on the ion implantation protection layer by adopting the electron beam lithography, the variable parameter lithography or the nano imprinting, the exposed ion implantation protection layer is removed by taking the photoresist as protection, and an ion implantation protection layer nano array is formed; Step S33: The ion implantation method is adopted, the implantation depth and the lateral diffusion degree are controlled by implantation energy, the ion A is implanted to damage the multi-quantum well structure without the protection layer, the light emitting capability is lost, the ion implantation protection layer nano array is removed, and the super high resolution multi-quantum well nano array is formed; Step S34: continue epitaxial growth of P-type GaN layer on the surface of the super-high-resolution multi-quantum well nano-array obtained in step S33; Step S35: deposit an ion implantation protection layer on the surface of the P-type GaN layer obtained in step S34, form a photoresist array corresponding to the super-high-resolution multi-quantum well nano-array obtained in step S33 on the ion implantation protection layer by electron beam lithography, variable parameter lithography or nano-imprinting, and remove the exposed ion implantation protection layer to form an ion implantation protection layer array corresponding to the super-high-resolution multi-quantum well nano-array obtained in step S33, with the photoresist as protection; Step S36: inject ion B into the P-type GaN of the isolation region without protection layer by ion implantation method, control the implantation depth and lateral diffusion degree by implantation energy, make the P-type GaN have high resistivity characteristics, remove the ion implantation protection layer nano-array, and form a P-type GaN nano-array with mutual isolation region between P-type GaN; Step S37: deposit a metal thin film on the surface of the structure obtained in step S36, form a photoresist array corresponding to the super-high-resolution multi-quantum well nano-array obtained in step S33 on the metal thin film by electron beam lithography, variable parameter lithography or nano-imprinting, and remove the exposed metal thin film to form a heat conduction layer array corresponding to the super-high-resolution multi-quantum well nano-array obtained in step S33, with the photoresist as protection; Step S38: control the temperature by using thermal annealing process, the heat conduction layer can improve the annealing efficiency, eliminate hydrogen ions generated in the epitaxial process, make the P-type GaN under the heat conduction layer complete activation, and enhance its conductivity; Step S39: continue to deposit a P-contact electrode thin film on the basis of the completion of step S38, form a photoresist array corresponding to the heat conduction layer array obtained in step S37 on the P-contact electrode thin film by electron beam lithography, variable parameter lithography or nano-imprinting, and remove the exposed P-contact electrode thin film to form a P-contact electrode array corresponding to the heat conduction layer obtained in step S37, with the photoresist as protection; Step S310: form a common N-contact electrode window by using lithography and etching means, and lead out the common N-contact electrode to form a super-high-resolution Nano-LED light-emitting display array.
4. The method of claim 1-3, wherein the method further comprises: The common N-contact electrode and the P-contact electrode are a multi-layer thin film formed by stacking one or more of Pt, Ti and Au materials.
5. The method of claim 1-3, wherein the method further comprises: forming a plurality of nano-LEDs on the substrate; and forming a plurality of nano-LEDs on the substrate. The ion used to destroy the multi-quantum well structure of the isolation region of the injection quantum well is fluorine ion.
6. The method of claim 1-3, wherein the method further comprises: The ion implantation protection layer material is SiO2 or other thin film materials with ion blocking function. The ion implantation protection layer material is SiO2 or other thin film materials with ion blocking function.
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