A method for suppressing DC bus voltage ripple of PWM rectifier under three-phase voltage unbalance condition based on virtual impedance

Abstract

The present invention relates to a method for suppressing the DC bus voltage ripple of a PWM rectifier under three-phase voltage unbalanced conditions based on virtual impedance, and belongs to the field of control technology of power electronics. The existing method for suppressing the DC bus voltage ripple of a PWM rectifier under three-phase voltage unbalanced conditions relies on the mathematical model of the PWM rectifier under the initial condition unbalanced conditions, and therefore does not fully consider the accuracy of the mathematical model when the parameters change. When the grid-side inductance parameters change, the DC bus voltage ripple suppression effect is reduced. The present invention changes the output impedance of the three-phase PWM rectifier to suppress the voltage ripple, thereby avoiding the use of the rectifier mathematical model. By adopting the method of the present invention, the DC bus voltage ripple can be fully suppressed, the robustness of the system to parameter changes is enhanced, and good dynamic steady-state performance is obtained.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics control, and in particular relates to a method for suppressing DC bus voltage ripple of a PWM rectifier under three-phase voltage unbalanced working conditions based on virtual impedance. Background Art

[0002] The popularity of traditional fuel vehicles has greatly facilitated people's travel, but it has also brought serious environmental pollution problems. At the same time, in order to find alternatives to fossil fuels, experts and scholars have conducted extensive and in-depth research on renewable, pollution-free new energy sources, and new energy vehicles have gradually entered the public eye.

[0003] Power electronic converters are essential for charging new energy vehicles. As the interface between the AC grid and the EV's power battery, three-phase PWM rectifiers offer advantages such as controllable output voltage, controllable power factor, and bidirectional energy transfer, making them crucial in EV fast-charging systems. However, grid faults and unbalanced loads can lead to three-phase voltage imbalance in the grid, causing severe grid-side current distortion in the three-phase PWM rectifier, which in turn introduces harmonic pollution to the grid. Furthermore, low-frequency ripple in the DC bus voltage increases voltage stress on the rectifier's power devices, increasing the risk of overvoltage damage. Furthermore, this low-frequency ripple in the DC bus can be transferred to the power battery through the subsequent DC / DC converter, leading to heating, overvoltage, and undervoltage issues. Therefore, suppressing grid-side current harmonics and DC bus voltage ripple is crucial.

[0004] While connecting large-capacity electrolytic capacitors in parallel across the DC bus can suppress DC bus voltage ripple to a certain extent, this increases the system size and cost, making it impractical in many situations. Furthermore, the limited lifespan of the electrolytic capacitors severely limits the service life of the rectifier, negatively impacting the use and maintenance of the charging system.

[0005] Mao Meiqin et al. proposed a single-phase inverter and control method that can suppress secondary ripple and improve power density (see patent CN 113037120). The power decoupling circuit suppresses the pulsating power of twice the industrial frequency to achieve secondary ripple suppression and reduce the size of the filter inductor.

[0006] He Liangzong et al. proposed a multiple low-frequency current ripple suppression method based on active virtual inductance (see patent CN112838577). The active virtual inductor and capacitor absorb the low-frequency current ripple, thereby improving the power density of the system.

[0007] However, the above methods all require additional power electronic converters to buffer the pulsating power, which not only increases the cost of the system but also brings additional losses, which is not conducive to improving the efficiency of the converter.

[0008] Reference [3] proposed a three-phase PWM direct power control method under unbalanced grid voltage conditions to effectively suppress DC bus voltage ripple. However, this method requires estimating the rectifier voltage. When there is an error in the rectifier voltage estimation, the DC bus voltage ripple suppression effect of this method will be reduced.

[0009] Known DC bus voltage ripple suppression technologies include two types: one relies on an additional power electronic converter to buffer the pulsating power, which increases the cost and complexity of the system; the other controls the output pulsating power of the three-phase PWM rectifier to zero, which is highly dependent on mathematical models. When the system parameters change, the ripple suppression effect is difficult to meet the predetermined requirements.

[0010] References to related patent applications:

[0011] [1] Mao Meiqin, Cheng Wei, Song Zhenyu, Zhang Liuchen. Single-phase inverter and control method capable of suppressing secondary ripple and improving power density[P]. Anhui Province: CN113037120A, 2021-06-25.

[0012] [2] He Liangzong, Lin Zhile. Multiple low-frequency current ripple suppression method based on active virtual inductor[P]. Fujian Province: CN112838577A, 2021-05-25.

[0013] [3]Y.Zhang, J.Liu, H.Yang and J.Gao, "Direct power control of pulsewidthmodulated rectifiers without DC voltage oscillations under unbalanced gridconditions," IEEE Trans.Ind.Electron., vol.65, no.10, pp.7900-7910, Oct.2018. Summary of the Invention

[0014] In view of the defects existing in the prior art, the purpose of the present invention is to provide a method for suppressing the DC bus voltage ripple of a PWM rectifier under three-phase voltage imbalance conditions. This method can effectively suppress the DC bus voltage ripple without adding any additional converters. At the same time, there is no need to estimate the rectifier voltage, thereby improving the system's robustness to parameter changes.

[0015] To achieve the above objectives, the present invention adopts a technical solution: a method for suppressing DC bus voltage ripple of a PWM rectifier under three-phase voltage unbalance conditions based on virtual impedance, comprising the following steps:

[0016] (1) Parallel virtual capacitor: According to the need of DC bus voltage ripple suppression, a virtual capacitor C is connected in parallel at the DC bus. i and realize the virtual capacitance through voltage feedback;

[0017] (2) Calculation of DC bus equivalent impedance: Calculate the DC bus equivalent impedance based on the parallel virtual capacitor and perform parameter design.

[0018] (3) Calculation of command current: Based on the mathematical model of the PWM rectifier, the command current in the two-phase rotating coordinate system is calculated.

[0019] Furthermore, in step (1), in order to effectively suppress the DC bus voltage ripple, the virtual capacitor value should exhibit the following characteristics:

[0020]

[0021] Furthermore, in order to realize the capacitance characteristic described by equation (1), the capacitor voltage feedback is used to form a virtual capacitor command current, which is added to the voltage loop output command current to form the final command current. The virtual capacitor command current can be written as

[0022]

[0023] Furthermore, in step (1), the voltage and current relationship of the DC side after the virtual capacitor is connected in series is:

[0024]

[0025] Furthermore, the ratio of the AC component of the DC bus voltage before and after the series connection of the virtual capacitor is:

[0026]

[0027] Where C is the DC bus capacitance, k c is the ratio of DC bus capacitance to virtual capacitance. c Approaching infinity

[0028]

[0029] Furthermore, in step (2), the equivalent impedance of the DC bus after connecting the virtual impedance in parallel is

[0030]

[0031] in

[0032]

[0033] Furthermore, in step (2), in order to realize parameter design, the current loop transfer function is obtained as

[0034]

[0035] Furthermore, the open-loop transfer function of the system is obtained as

[0036] W ov =0.75G u (s)φ i (s)Z out (9)

[0037] Furthermore, in step (2), the system Bode diagram is drawn according to the system open-loop transfer function, and the virtual capacitor parameters and the voltage loop PI parameters are designed according to the frequency and phase margin.

[0038] Furthermore, in step (3), the command current under input power control can be expressed as

[0039]

[0040] The present invention provides the following advantages: By utilizing the method described herein, while maintaining the system's dynamic response speed and stability margin, smaller capacitors are used to effectively suppress DC bus voltage ripple, thereby reducing system size and costs. Furthermore, this method eliminates the need for an additional DC / DC converter for ripple suppression, broadening the application scenarios of the control method, reducing system costs, and avoiding the additional energy losses associated with ripple suppression. Furthermore, this method eliminates the need to estimate the rectifier AC side voltage, thereby reducing reliance on inductor parameters in the estimation model. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 It is a control block diagram of the present invention;

[0042] Figure 2 is the virtual capacitance c i Bode diagram of the system during changes;

[0043] Figure 3 It is the Bode diagram of the system when the quality factor Q of the bandpass filter changes;

[0044] Figure 4 The DC bus voltage and grid-side current waveforms before the control method of the present invention is added;

[0045] Figure 5 The DC bus voltage and grid-side current waveforms after adding the control method of the present invention;

[0046] The main symbol names in the above figure are: U ref is the DC bus voltage reference value, U dc is the DC bus voltage, G BPF(s) is the bandpass filter transfer function, c i is the virtual capacitor value, i″ dref is the voltage loop output command current, i' dref is the virtual capacitor command current value, i″′ dref is the final command current value, P ref and Q ref are active and power reference values ​​respectively, e and i represent the three-phase voltage and phase current respectively, S a 、S b 、S c They are respectively the gate signals of the upper arms of the three-phase rectifier bridge. DETAILED DESCRIPTION

[0047] An embodiment of the present invention is given below with reference to the accompanying drawings by describing a control method for a PWM rectifier under a three-phase voltage imbalance condition, and further illustrating the effects of the present invention.

[0048] Example 1:

[0049] An adaptive watermark embedding method based on local quality evaluation includes the following steps:

[0050] (1) Assume that the original DC bus capacitor C of the three-phase PWM rectifier is 200μF. The control block diagram of the present invention is as follows: Figure 1 shown.

[0051] (2) Next, to determine the virtual capacitance c in step 1 i The value of the virtual capacitor c i From 400μF to 3200μF, the Bode diagram of the system is drawn according to formula (9) as follows Figure 2 shown.

[0052] (3) By Figure 2 From the amplitude-frequency curve, we can see that as the virtual capacitance c i The increase of the gain of the system at 100Hz is lower. Combining with formula (5), we can know that the system has a f The voltage ripple will be smaller. Figure 2 From the mid-phase frequency curve, we can see that as the virtual capacitance c i As the power increases, the system shear frequency increases slightly, but the phase margin decreases gradually.

[0053] (4) Therefore, the virtual capacitor value should effectively reduce the DC bus 2f while ensuring the system stability margin. f When the virtual capacitor c i When it is 6 times the DC bus capacitance, that is, k c 6, c i When the DC bus is 2f f The voltage ripple basically disappears.

[0054] (5) Comparing the Bode diagrams of the system before and after adding the virtual capacitor control strategy, it can be seen that the system phase margin is reduced from the original 94.4° to 80.5°, and the system shear frequency is increased from 85.4Hz to 88.4Hz. It can be seen that adding the virtual capacitor control strategy will not have a significant impact on the system stability margin, and at the same time can slightly speed up the system response speed. Therefore, the virtual capacitor c is determined i is 1200μF.

[0055] (6) Next, to further determine the value of the quality factor Q of the bandpass filter, the quality factor Q of the bandpass filter is reduced from 200 to 0.1, and the system Bode diagram is drawn as follows: Figure 3 shown.

[0056] (7) By Figure 3 It can be seen that when Q is in the range of 25 to 200, the system shear frequency w c However, when Q is in the range of 0.1 to 10, the shear frequency of the system decreases significantly as Q decreases.

[0057] (8) When Q is 0.1, the system shear frequency decreases from 85.4 Hz to 17.9 Hz, which greatly reduces the system’s dynamic response speed. At the same time, the system’s phase margin decreases from 94.4° to 49°, which is not conducive to the stable operation of the system.

[0058] (9) Therefore, in order to ensure the dynamic response speed and stability margin of the system and to ensure that the bandpass filter has a certain bandwidth, the quality factor Q is selected as 100. At this time, the system shear frequency is 88.4Hz and the phase margin is 80.5°, which not only ensures the dynamic response speed and stability margin of the system, but also can achieve the purpose of suppressing the DC bus voltage ripple. Therefore, the quality factor Q of the bandpass filter is selected as 100, and the virtual capacitor c i is 1200μF.

[0059] In this embodiment, the quality factor Q of the bandpass filter and the virtual capacitance c are given when the DC bus capacitance C is 200 μF. i This is the specific process of parameter selection. When the DC bus capacitance C is other parameters, this process can be followed.

[0060] In order to demonstrate the remarkable effects of the present invention, this embodiment provides some experimental results obtained using the embodiments. Figure 4 、 Figure 5 The waveforms of DC bus voltage and grid-side current before and after adding the control method proposed by the present invention are given. Figure 4 、 Figure 5It can be seen that before the control method proposed in this invention was implemented, the peak-to-peak ripple of the DC bus voltage was 17V, with significant ripple fluctuations at twice the power frequency. The effective values ​​of the three-phase currents on the grid side were 9.0A, 7.8A, and 8.3A, respectively, and the total harmonic distortion rates were 8.7%, 8.7%, and 8.8%, respectively, indicating severe current distortion. After the control method proposed in this invention was implemented, the peak-to-peak ripple of the DC bus voltage was reduced to 1V, effectively suppressing the ripple fluctuations at twice the power frequency. The effective values ​​of the three-phase currents on the grid side were 10.0A, 8.1A, and 7.6A, respectively, with total harmonic distortion rates of 2.6%, 2.7%, and 2.8%, respectively, significantly reducing current harmonics.

[0061] The experimental results obtained in this embodiment can illustrate that the method described in the present invention can not only effectively suppress the DC bus voltage ripple, but also effectively eliminate the grid-side current harmonics.

[0062] This embodiment provides the implementation effect of suppressing the DC bus voltage ripple of a three-phase PWM rectifier. However, the present invention is not limited to a three-phase voltage-type full-bridge rectifier topology. The present invention is also applicable to suppressing the DC bus voltage ripple of any three-phase rectifier topology.

[0063] The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects (e.g., virtual capacitor selection, bandpass filter quality factor design, and various parameters) as illustrative and not restrictive. The scope of the invention is therefore indicated by the appended claims rather than the foregoing description. All variations that fall within the meaning and scope of equivalent technical solutions of the claims are intended to be included within their scope.

Claims

1. A method for suppressing DC bus voltage ripple of a PWM rectifier under three-phase voltage unbalance conditions based on virtual impedance, comprising the following steps: (1) Parallel virtual capacitor: According to the need of DC bus voltage ripple suppression, a virtual capacitor C is connected in parallel at the DC bus. i and realize the virtual capacitance through voltage feedback; (2) Calculation of DC bus equivalent impedance: Calculate the DC bus equivalent impedance based on the parallel virtual capacitor and perform parameter design; (3) Calculation of command current: Calculate the command current in the two-phase rotating coordinate system based on the PWM rectifier mathematical model; It is characterized in that: in step (1), let f be the frequency, f f is the fundamental frequency of the grid voltage, c i The virtual capacitor is 2f f The capacitance at , the virtual capacitor has the following characteristics It is characterized in that: in step (1), in order to realize the virtual capacitor C i , the current of the virtual capacitor is fed forward, and the virtual capacitor current is obtained by the following formula i Ci =U dc G BPF (s) / G ci (s) (2) Here G ci (s)=1 / (c i s) (4) It is characterized in that: in step (2), the equivalent impedance of the DC bus after the virtual capacitor is connected in parallel is It is characterized in that: in step (3), it is assumed that e is the grid-side voltage, i is the grid-side current, the subscript "dq" represents the dq axis components respectively, and the superscript "pn" represents the positive and negative sequence components respectively, P ref is the active power command value, the command current is calculated by the following formula

Images