A chip simulation device

Abstract

The present invention discloses a chip simulation device, comprising: one EV chip, which is used for simulating multiple different types of chips; the EV chip includes a plurality of peripheral modules; wherein, the plurality of peripheral modules are used for electrically connecting a certain peripheral module to the processor module in the EV chip under different strobe signals, so as to simulate any peripheral module in multiple different types of chips. Thus, the present invention is beneficial to achieving the purpose of simulating multiple different types of chips by using one chip simulation device.

Description

Technical Field

[0001] The present invention belongs to the field of chips, and particularly relates to a chip simulation device. Background Art

[0002] In the field of chips, when a chip company delivers chips to users, it often also provides a chip simulation device so that users can simulate the functions of the delivered chips through the chip simulation device. When users use the chips, they need to verify various programs through the peripheral modules (such as ADC, DAC, various IO ports, etc.) in the chips so that the products finally provided by the users to the market can meet their expectations.

[0003] However, the chips provided by chip companies to the same or different users often include multiple different models, and the peripheral modules between different models may be the same or different. In the prior art, typically, a corresponding chip simulation device is provided for each different model of chip to simulate the chip of that model. This results in the chip company needing to provide a sufficient number of different models of chip simulation devices. Summary of the Invention

[0004] In view of this, in order to reduce the number of models of chip simulation devices, the present invention proposes a chip simulation device, including:

[0005] 1 EV chip, which is used for simulating multiple different models of chips;

[0006] The EV chip includes multiple peripheral modules;

[0007] Wherein,

[0008] The multiple peripheral modules are used to electrically connect a certain peripheral module to the processor module in the EV chip under the condition of different gating signals, so as to simulate any peripheral module in multiple different models of chips.

[0009] Preferably,

[0010] The EV chip only includes 1 processor module;

[0011] The 1 processor module is used to simulate any processor module in multiple different models of chips.

[0012] Preferably,

[0013] The gating signal is generated by means of address decoding.

[0014] Preferably,

[0015] For the multiple different models of chips, their respective processor modules can belong to exactly the same integrated circuit or completely different integrated circuits.

[0016] Preferably,

[0017] From the perspective of sets, the multiple peripheral modules in the EV chip belong to the complete set of all peripheral modules in multiple different types of chips.

[0018] Preferably,

[0019] Any one of the multiple different types of chips includes an OTP memory.

[0020] Preferably,

[0021] The chip simulation device repeatedly simulates the functions of any peripheral module in multiple different types of chips by writing different simulation programs multiple times.

[0022] Preferably,

[0023] When the respective processor modules of the multiple different types of chips belong to exactly the same integrated circuit, the processor module in the EV chip also belongs to exactly the same integrated circuit as any processor module in the multiple different types of chips.

[0024] Preferably,

[0025] When the respective processor modules of the multiple different types of chips belong to completely different integrated circuits, from the perspective of sets, the processor module in the EV chip is the complete set of all processor modules in the multiple different types of chips in terms of function.

[0026] Preferably,

[0027] When the multiple peripheral modules in the EV chip belong to the complete set of all peripheral modules in multiple different types of chips,

[0028] The multiple peripheral modules in the EV chip can be a complete replication of the circuit designs of all peripheral modules in multiple different types of chips, or,

[0029] The multiple peripheral modules in the EV chip can also adopt other circuit designs to achieve functional coverage of all peripheral modules in multiple different types of chips.

[0030] The present invention has the following technical effects:

[0031] Through the above solution, the present invention achieves the purpose of significantly reducing the types of chip simulation devices, thus facilitating the achievement of the purpose of being able to simulate multiple different types of chips with one chip simulation device. Description of the Drawings

[0032] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for the embodiments. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0033] Figure 1 is a schematic structural diagram of the chip simulation device in an embodiment of the present invention. Specific embodiments

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the following will combine the accompanying drawings in the embodiments of the present invention Figure 1 to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are some embodiments of the present invention, rather than all embodiments. Generally, the components of the embodiments of the present invention described and shown in the accompanying drawings here can be arranged and designed in various different configurations.

[0035] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents the selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the scope of protection of the present invention.

[0036] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0037] In the description of the present invention, it should be noted that if terms such as "upper", "lower", "inner", "outer", etc. are used to indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship when the product of the invention is normally placed. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.

[0038] In addition, if terms such as "first", "second", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0039] It should be noted that, without conflict, the features in the embodiments of the present invention can be combined with each other.

[0040] See Figure 1, in one embodiment, the present invention discloses a chip simulation device, comprising:

[0041] One EV chip, which is used for simulating multiple different types of chips;

[0042] The EV chip includes multiple peripheral modules;

[0043] Wherein,

[0044] The multiple peripheral modules are used to electrically connect a certain peripheral module to the processor module in the EV chip under different gating signals, so as to simulate any peripheral module in multiple different types of chips.

[0045] It should be noted that the EV chip is also called EV Chip. Figure 1 Among them, peripheral module 1 to peripheral module n are the multiple peripheral modules of the EV chip, which can be ADC, DAC, IO ports, etc. Among them, peripheral module 1 can correspond to the first peripheral module in the real first type of chip, the second peripheral module in the second type of chip, and even the third peripheral module in the third type of chip. Peripheral module 2 can correspond to the first peripheral module in the real second type of chip, and peripheral module 3 can correspond to the first peripheral module in the real third type of chip.

[0046] The key of this embodiment lies in the multiple peripheral modules in the EV chip. In this embodiment, the multiple peripheral modules in the EV chip are designed to electrically connect a certain peripheral module among the multiple peripheral modules to the processor module in the EV chip under different gating signals, so as to simulate any peripheral module in multiple different types of chips.

[0047] In another embodiment,

[0048] The EV chip only includes one processor module;

[0049] The one processor module is used to simulate any processor module in multiple different types of chips.

[0050] For this embodiment, obviously, although the EV chip includes multiple peripheral modules, there is only one processor module. This is because: the processor module performs logical operations, and it can completely use only one processor module.

[0051] In another embodiment,

[0052] The gating signal is generated by means of address decoding.

[0053] It can be understood that the chip simulation device may include an address decoder circuit, which can be implemented either in the EV chip or outside the EV chip.

[0054] In another embodiment,

[0055] For the multiple different types of chips, their respective processor modules can belong to exactly the same integrated circuit or to completely different integrated circuits.

[0056] It should be noted that in this embodiment, it is preferably exactly the same integrated circuit because, in addition to the simulation function, it is also beneficial for discovering whether there are other problems in the circuit design.

[0057] In another embodiment,

[0058] From the perspective of a set, the multiple peripheral modules in the EV chip belong to the complete set of all peripheral modules in the multiple different types of chips.

[0059] In another embodiment,

[0060] Any one of the multiple different types of chips includes an OTP memory.

[0061] In another embodiment,

[0062] The chip simulation device repeatedly simulates the functions of any peripheral module in multiple different types of chips by writing different simulation programs multiple times.

[0063] It can be understood that typically, for an OTP memory, since the art only supports one write due to cost considerations, in this embodiment and even in the present invention, the functions of any peripheral module in multiple different types of chips can be repeatedly simulated by writing different simulation programs multiple times. After the simulation is completed, then consider writing a program to the OTP memory in the real chip.

[0064] In another embodiment,

[0065] When the respective processor modules of the multiple different types of chips belong to exactly the same integrated circuit, the processor module in the EV chip also belongs to exactly the same integrated circuit as any one of the processor modules in the multiple different types of chips.

[0066] It can be understood that this can not only simulate the function but also be beneficial for discovering whether there are problems in the circuit design.

[0067] In another embodiment,

[0068] When the processor modules of the multiple different types of chips belong to completely different integrated circuits, from a collective perspective, the processor module in the EV chip is functionally a complete set of all processor modules in the multiple different types of chips.

[0069] For this embodiment, since the processor module is responsible for logical operations, the simulation purpose of the present invention can also be achieved by functionally becoming a complete set of all processor modules in chips of various different models.

[0070] Similarly, in another embodiment,

[0071] When the plurality of peripheral modules in the EV chip belong to the complete set of all peripheral modules in chips of different models,

[0072] The plurality of peripheral modules in the EV chip may be circuit designs of all peripheral modules in chips of different models that are completely copied, or,

[0073] The multiple peripheral modules in the EV chip may also adopt other circuit designs to achieve functional coverage of all peripheral modules in chips of various different models.

[0074] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A chip simulation device, comprising: 1 EV chip, which is used for simulating multiple different types of chips; The EV chip includes multiple peripheral modules; Wherein, The multiple peripheral modules are used to electrically connect a certain peripheral module to the processor module in the EV chip under different gating signals, so as to simulate any peripheral module in multiple different types of chips; Wherein, The EV chip only includes 1 processor module; The 1 processor module is used to simulate any processor module in multiple different types of chips; The gating signal is generated by means of address decoding; From the perspective of a set, the multiple peripheral modules in the EV chip belong to the complete set of all peripheral modules in multiple different types of chips; The chip simulation device repeatedly simulates the function of any peripheral module in multiple different types of chips by writing different simulation programs multiple times; Peripheral module 1 to peripheral module n are the multiple peripheral modules of the EV chip, and the peripheral module can be an ADC or a DAC or an IO port.

2. The chip simulation device according to claim 1, wherein, For the multiple different types of chips, their respective processor modules can belong to exactly the same integrated circuit or completely different integrated circuits.

3. The chip simulation device according to claim 1, wherein, Any one of the multiple different types of chips includes an OTP memory.

4. The chip simulation device according to claim 2, wherein, When the respective processor modules of the multiple different types of chips belong to exactly the same integrated circuit, the processor module in the EV chip also belongs to exactly the same integrated circuit as any processor module in the multiple different types of chips.

5. The chip simulation device according to claim 2, wherein, When the respective processor modules of the multiple different types of chips belong to completely different integrated circuits, from the perspective of a set, the processor module in the EV chip is the complete set of all processor modules in the multiple different types of chips in terms of function.

6. The chip simulation device according to claim 1, wherein, When the multiple peripheral modules in the EV chip belong to the complete set of all peripheral modules in multiple different types of chips, The multiple peripheral modules in the EV chip can be a complete replication of the circuit design of all peripheral modules in multiple different types of chips, or, The multiple peripheral modules in the EV chip can also adopt other circuit designs to achieve functional coverage of all peripheral modules in multiple different types of chips.

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