Rogowski coil integrated in a glass substrate

Abstract

A method of forming a current measuring device includes providing a glass substrate including first and second substantially planar surfaces opposite each other, forming a plurality of vias in the glass substrate, each via extending between the first and second substantially planar surfaces, and forming a conductive trace on the glass substrate connecting adjacent ones of the vias together. Forming the plurality of vias includes applying radiation to the glass substrate, and the conductive trace and the vias collectively form a coil structure in the glass substrate.

Description

Background Technology

[0001] Power semiconductor devices, such as diodes, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), and IGBTs (Insulated-Gate Bipolar Transistors), are used in a variety of applications involving high voltages (e.g., voltages above 100 volts, 250 volts, 500 volts, etc.) and / or high currents (e.g., currents above one ampere). A potential source of failure for power semiconductor devices in these applications is a short-circuit event, which causes electrical and / or thermal damage to the device. Devices can be protected from this event if a short-circuit event is detected early enough before the damaging voltage and / or current is applied to the device to disable it. For IGBTs, there is typically a window of several microseconds to detect a short circuit and disable the device before the short-circuit event damages it. Generally, short-circuit detection and protection measures should be reliable, fast, easy to integrate, and inexpensive.

[0002] One approach to short-circuit detection involves configuring the driver circuitry to detect an unexpected rise in the device's output voltage (e.g., collector-emitter voltage) due to desaturation of the device in the event of a short circuit. A drawback of this technique is that it requires a considerable amount of time to reliably distinguish between the short-circuit current and the permissible overcurrent. Another approach to short-circuit detection involves providing a shunt arrangement. A disadvantage of this technique is that it does not accurately reflect the parameters of interest. Summary of the Invention

[0003] A method for forming a current measuring device is disclosed. According to an embodiment, the method includes providing a glass substrate including a first substantially flat surface and a second substantially flat surface opposite to each other; forming a plurality of through-holes in the glass substrate, each through-hole extending between the first substantially flat surface and the second substantially flat surface; and forming conductive traces on the glass substrate connecting adjacent through-holes together. Forming the plurality of through-holes includes applying radiation to the glass substrate, and the conductive traces and through-holes together form a coil structure in the glass substrate.

[0004] Applying radiation to the glass substrate, either alone or in combination, includes applying laser energy to a first substantially flat surface to form a plurality of first laser-treated regions in the glass substrate, etching each of the first laser-treated regions to form a plurality of first laser-treated regions extending between the first substantially flat surface and the second substantially flat surface, and forming a through-hole in the via.

[0005] Etching the laser-treated surface, either alone or in combination, includes applying an etchant to an unmasked area of ​​the first substantially flat surface, the unmasked area comprising the first laser-treated area and an untreated area, wherein the etchant etches the first laser-treated area at a greater rate than it etches the untreated area.

[0006] The first perforation is formed, either alone or in combination, by specifically applying laser energy to a first substantially flat surface.

[0007] Forming the via, either alone or in combination, includes forming a second metallization layer on a second substantially flat surface before applying the laser energy to the first substantially flat surface, and performing a metal plating process to fill the first via with a conductive metal.

[0008] Alone or in combination, the method further includes forming a first metallization layer on a second substantially flat surface after applying laser energy to a first substantially flat surface, and forming conductive traces includes constructing each of the first and second metallization layers.

[0009] Applying radiation to the glass substrate, either alone or in combination, also includes applying laser energy to a second substantially flat surface, and the laser energy applied to the second substantially flat surface is substantially aligned with the first laser-treated region.

[0010] Forming the via, either alone or in combination, includes forming a seed layer lining the sidewall of the first through-hole, and performing a metal plating process using the seed layer to deposit conductive metal thereon.

[0011] Performing a metal plating process, either alone or in combination, such that a first metallization layer is formed on a first substantially flat surface and a second metallization layer is formed on a second substantially flat surface, and forming conductive traces includes constructing each of the first and second metallization layers.

[0012] In another embodiment, the method includes providing a glass substrate including a first substantially flat surface and a second substantially flat surface opposite to each other; forming a through-hole extending between the first substantially flat surface and the second substantially flat surface in the glass substrate; forming a coil structure including a plurality of conductive windings in the glass substrate, each conductive winding including a pair of through-holes; forming a plurality of disassembly features in the glass substrate; separating a first segment of the glass substrate by using the disassembly features; and forming the through-holes and disassembly features by applying radiation to the glass substrate.

[0013] Forming vias and forming removal features, individually or in combination, includes applying laser energy to a glass substrate to form a plurality of first laser-treated regions and a plurality of second laser-treated regions; etching each of the first laser-treated regions to form a plurality of first through holes in the glass substrate; and etching each of the second laser-treated regions to form a plurality of second through holes or one or more trenches in the glass substrate, forming vias in the plurality of first through holes, and the removal features include a plurality of second through holes or one or more trenches.

[0014] Laser energy is applied individually or in combination such that a second laser-treated region is formed with less laser energy than the first laser-treated region, and each of the second laser-treated regions is etched to form a disassembly feature to include one or more trenches.

[0015] Individually or in combination, the one or more trenches are formed as trench pairs separated from each other by thinner segments of the glass substrate, wherein oppositely opposed trench pairs define a separation plane surrounding the first segment of the glass substrate.

[0016] Individually or in combination, the one or more trenches are formed to extend from the first substantially flat surface and to be formed within the first section of the glass substrate.

[0017] Individually or in combination, the one or more trenches are formed as pairs of trenches separated from each other by thicker sections in the glass substrate that are part of a first segment of the glass substrate.

[0018] Individually or in combination, the first segment of the separated glass substrate includes a thinner portion of the mechanically fractured glass substrate formed by one or more trenches.

[0019] Individually or in combination, each of the second laser-treated regions is etched to form the disassembly feature to include a plurality of second perforations, and the second perforations define a separation plane surrounding a first segment of the glass substrate.

[0020] Individually or in combination, the first segment of the separated glass substrate includes the portion of the fractured glass substrate between the second perforations.

[0021] The coil is disposed, either alone or in combination, within a first section of the glass substrate.

[0022] The coil surrounds a first section of the glass substrate, either individually or in combination.

[0023] A current measuring device is disclosed. According to an embodiment, the current measuring device includes a glass substrate having a first substantially flat surface and a second substantially flat surface opposite to each other; a plurality of through holes in the glass substrate, each through hole extending between the first substantially flat surface and the second substantially flat surface; and conductive traces formed on the glass substrate, the conductive traces connecting adjacent through holes together, and the conductive traces and through holes together forming a coil structure in the glass substrate.

[0024] Individually or in combination, the winding of the coil structure includes a pair of through holes and a conductive trace in the conductive trace that electrically connects the pair of through holes together.

[0025] Alone or in combination, the current measuring device includes a first metallization layer formed on a first substantially flat surface and a second metallization layer formed on a second substantially flat surface, and conductive traces are formed in the first and second metallization layers.

[0026] The conductive traces formed in the first metallization layer, individually or in combination, have a first pattern, and the conductive traces formed in the second metallization layer have a second pattern different from the first pattern.

[0027] Individually or in combination, the current measuring device further includes a third metallization layer and a fourth metallization layer, the third metallization layer being formed on the first metallization layer and insulated from the first metallization layer by a first interlayer dielectric, the fourth metallization layer being formed on the second metallization layer and insulated from the second metallization layer by a second interlayer dielectric, and conductive traces being formed in the third metallization layer and the fourth metallization layer.

[0028] The coil structure is reverse-wound, either individually or in combination, such that the windings formed by the conductive traces in the first and second metallization layers are interleaved with the windings formed by the conductive traces in the third and fourth metallization layers.

[0029] The coil structure is configured as a Rogowski coil, either individually or in combination.

[0030] Individually or in combination, the glass substrate forms a closed loop around a central opening, and the coil at least partially surrounds the central opening.

[0031] Individually or in combination, the glass substrate has a linear strip geometry, and the coil structure extends linearly between opposite ends of the glass substrate.

[0032] Alone or in combination, the glass substrate has an L-shaped geometry with two vertical spans, wherein the coil structure extends along both vertical spans.

[0033] Those skilled in the art will recognize additional features and advantages when reading the following detailed description and viewing the accompanying drawings. Attached Figure Description

[0034] The elements in the accompanying drawings are not necessarily proportional to each other. The same reference numerals denote corresponding similar parts. Features of the various illustrated embodiments can be combined unless they are mutually exclusive. Embodiments are shown in the accompanying drawings and described in detail below.

[0035] Figure 1 An electronic component with a current measuring device according to an embodiment is shown.

[0036] Figure 2A and 2B A glass substrate, provided as a unit segment of a glass wafer according to an embodiment, is shown. Figure 2A A cross-sectional view of a unit segment of a glass wafer is shown, and Figure 2B A plan view of the glass wafer is shown.

[0037] Figure 3A and 3B The laser processing of a glass substrate according to an embodiment is illustrated. Figure 3A A cross-sectional view of the glass substrate during laser processing is shown, and Figure 3B A plan view of the laser-processed pattern in a glass substrate is shown.

[0038] Figure 4A and 4B An etching process according to an embodiment is illustrated, which forms a perforation in a glass substrate from a laser-treated area. Figure 4A A cross-sectional view of the etched glass substrate is shown, and Figure 4B A plan view of a unit segment of a glass substrate is shown.

[0039] Figure 5A and 5B Laser processing and etching of a glass substrate according to another embodiment are shown. Figure 5A A cross-sectional view of the glass substrate during double-sided laser processing is shown, and Figure 5B A cross-sectional view of the glass substrate after etching is shown.

[0040] Figure 6A and 6B The illustration shows the formation of a through-hole in a perforation and the formation of a metallization layer on a glass substrate, according to an embodiment. Figure 6A A cross-sectional view of the glass substrate is shown, and Figure 6B A plan view of the glass substrate is shown.

[0041] Figures 7A-7GSelected steps for forming vias and metallization layers using a single-sided laser processing technique according to an embodiment are shown. The figures show cross-sectional views of the glass substrate.

[0042] Figures 8A-8F Selected steps for forming vias and metallization layers using a double-sided laser processing technique according to an embodiment are shown. The figures show cross-sectional views of the glass substrate.

[0043] Figures 9A-9C The diagram illustrates the construction of a metallization layer according to an embodiment to form conductive traces connecting adjacent vias. Figure 9A A plan view of the first substantially flat surface of the glass substrate is shown. Figure 9B A plan view of the second substantially flat surface of the glass substrate is shown, and Figure 9C A cross-sectional view of the glass substrate is shown.

[0044] Figure 10A-10G The construction of a metallization layer according to an embodiment is shown to form a reverse-wound coil. Figure 10A A plan view of the top side of the two-layer coil is shown. Figure 10B A plan view of the bottom side of the two-layer coil is shown. Figure 10C A cross-sectional view of a glass substrate with two layers of coils is shown. Figure 10D A plan view of the top side of a single layer of coils is shown. Figure 10E A plan view of the bottom side of a single coil layer is shown. Figure 10F A plan view of the top side of a single layer of coils is shown. Figure 10G A plan view of the bottom side of a single coil layer is shown.

[0045] Figure 11A-11B A segment separating the glass wafer from the unit section is shown according to an embodiment. Figure 11A A plan view of a current measuring device formed by one of the unit sections is shown, and Figure 11B A plan view of the glass wafer is shown.

[0046] Figure 12A-12F This illustrates a technique for forming disassembly features using a laser-induced etching process and using these disassembly features to separate sections of a glass substrate, according to an embodiment. The figures show cross-sectional views of the glass substrate.

[0047] Figures 13A-13F A technique according to another embodiment for forming disassembly features by a laser-induced etching process and using the disassembly features to separate segments of a glass substrate is illustrated. The figures show cross-sectional views of the glass substrate.

[0048] Figure 14A-14F A technique according to another embodiment for forming disassembly features by a laser-induced etching process and using the disassembly features to separate segments of a glass substrate is illustrated. The figures show cross-sectional views of the glass substrate.

[0049] Figures 15A-15C A disassembly feature formed by a laser-induced etching process according to another embodiment is shown. The figures show plan views of the glass substrate.

[0050] Figures 16A-16C The illustration shows the formation of coils in a unit segment of a glass wafer having a linear strip geometry, according to an embodiment. Figure 16A A plan view of the glass wafer is shown. Figure 16B A plan view of a single-wound coil arranged in a linear strip section is shown, and Figure 16C A plan view of the anti-wound coil arranged in the linear strip section is shown.

[0051] Figure 17A and 17B A measurement arrangement with a current measuring device disposed in a linear strip glass substrate is shown according to an embodiment. Figure 17A A plan view is shown in which the coils have a single-wound configuration. Figure 17B A plan view is shown in which the coils have a reverse winding configuration.

[0052] Figure 18A and 18B A measurement arrangement with a current measuring device disposed in a linear strip glass substrate is shown according to another embodiment. Figure 18A A plan view is shown of an arrangement in which multiple linear strip glass substrate portions with a single-wound configuration are strung together. Figure 18B A plan view is shown of an arrangement in which multiple linear strip glass substrate portions with an anti-winding configuration are strung together.

[0053] Figures 19A-19C The illustration shows the formation of coils in a cell segment having an L-shaped geometry in a glass wafer, according to an embodiment. Figure 19A A plan view of the glass wafer is shown. Figure 19B A plan view of a single-wound coil arranged in an L-shaped section is shown, and Figure 19C A plan view of the reverse-wound coil arranged in the L-shaped section is shown.

[0054] Figure 20A and 20B A measurement arrangement with a current measuring device disposed in an L-shaped glass substrate is shown according to an embodiment. Figure 20A A plan view is shown in which the coils have a single-wound configuration. Figure 20B A plan view is shown in which the coils have a reverse winding configuration. Detailed Implementation

[0055] This document describes embodiments of a current measuring device comprising a coil formed in a glass substrate. The coil winding is formed by through-holes extending between opposite surfaces of the glass substrate and conductive traces formed on the glass substrate connecting the through-holes. The coil can be configured to measure the current in one or more devices (e.g., semiconductor dies) near the coil based on an induced magnetic field generated in the device to be measured. This measurement is highly accurate because it generates a signal representing the actual current in the device. Furthermore, due to the low inductance of the Rogowski coil, the current measurement is performed very rapidly, for example, within nanoseconds of a current event. Therefore, the Rogowski coil provides an efficient solution for detecting short-circuit events and disabling semiconductor devices within sufficient time to avoid damage. More generally, the coil can be used in any application requiring accurate and / or rapid current measurement, such as current-controlled systems.

[0056] The embodiments described herein include glass processing techniques for forming Rogowski coils. These techniques are scalable, cost-effective, and highly accurate. Glass provides a relatively inexpensive insulating substrate and does not adversely affect the function of the Rogowski coil. Through-holes can be formed using laser-induced etching technology. This laser-induced etching technology enables the formation of through-holes at close spacing, thereby enabling precise current measurement through the high-density windings in the coil structure. In embodiments, the laser-induced etching technology can be used to form disassembly features for separating segments of the glass substrate or singulating unit segments of the glass wafer that include the Rogowski coil.

[0057] refer to Figure 1 The diagram illustrates an electronic assembly 100 including a current measuring device 102. The current measuring device 102 includes a coil formed in a glass substrate 104. The current measuring device 102 is mounted on a carrier structure 106. The carrier structure 106 can be any structure suitable for mounting semiconductor dies and / or passive components thereon. Examples of such carrier structures include metal leadframes, printed circuit board (PCB) or power module substrates, such as DBC (direct-bonded copper) substrates, AMB (active metal brazing) substrates, or IMS (insulating metal) substrates. The current measuring device 102 can be mounted on the carrier structure 106 by providing adhesive or other bonding agents between the bonding surfaces (e.g., metal bonding pads or die attachment surfaces) of the glass substrate 104 and the carrier structure 106.

[0058] According to an embodiment, the coil of the current measuring device 102 is configured as a Rogowski coil. The Rogowski coil is composed of a helical coil extending continuously between its two ends. The ends of the coil may or may not be located at the same position. In the illustrated embodiment, the glass substrate 104 forms a closed loop around a central opening 108, and the coil is arranged in the glass substrate 104 to surround the central opening 108. More generally, the coil may be formed such that it at least partially surrounds the central opening 108.

[0059] Electronic component 100 includes a first semiconductor die 110 that generates a current to be measured by current measuring device 102. Generally, the first semiconductor die 110 can have any of a variety of device configurations. Examples of these device configurations include integrated circuits, discrete devices, active devices, passive devices, etc. In an embodiment, the first semiconductor die 110 is configured as a power transistor, such as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) or an IGBT (Insulated-Gate Bipolar Transistor). As shown, the first semiconductor die 110 is disposed within a central opening 108 of a glass substrate 104 and directly mounted to the same bonding surface as the current measuring device 102. Instead of the single die shown, this arrangement can include multiple semiconductor dies. In other embodiments, the first semiconductor die 110 can be mounted on different surfaces. For example, the current measuring device 102 may include a central glass portion (i.e., the central opening 108 is omitted), and the first semiconductor die 110 may be mounted thereon. In another example, a heat sink structure is mounted on a bonding surface within the central opening 108, and the first semiconductor die 110 may be mounted thereon. The first semiconductor die 110 can be mounted using conductive or non-conductive materials (such as adhesives, solders, sintered materials, tapes, etc.).

[0060] Electronic component 100 also includes a second semiconductor die 112 mounted on carrier structure 106. The second semiconductor die 112 is electrically connected to current measuring device 102. As shown, these conductive connections are provided by bonding wires. More generally, any type of electrical connection mechanism is possible. The second semiconductor die 112 may be a driver die configured to generate a control signal for turning the first semiconductor die 110 on or off (e.g., in the case of a transistor). Additionally, the second semiconductor die 112 may be configured to receive a signal from current measuring device 102 and determine the magnitude of the current rise in the first semiconductor die 110 based on that signal. The second semiconductor die 112 may be mounted using conductive or non-conductive materials (e.g., adhesives, solders, sintered materials, tapes, etc.). The second semiconductor die 112 may be mounted on the same bonding surface as the first semiconductor die 110, or alternatively, it may be mounted on bonding pads electrically isolated from the first semiconductor die 110.

[0061] The current measuring device 102 operates as follows. When the first semiconductor die 110 experiences a rapid change in current, it generates a rapid change in magnetic field. The current measuring device 102 is positioned sufficiently close to this magnetic field to induce a voltage in the coil structure. This voltage is fed to the second semiconductor die 112 via a conductive connection. The magnitude of the voltage induced in the coil is proportional to the rate of change of current (di / dt). The second semiconductor die 112 includes an integrated circuit that integrates the induced coil voltage to determine the magnitude of the current in the first semiconductor die 110. The second semiconductor die 112 uses this information to protect the first semiconductor die 110 from short-circuit events. For example, the second semiconductor die 112 can compare the determined current value with a predefined threshold indicating a short-circuit condition. If the current measurement exceeds the predefined threshold, the driver portion of the second semiconductor die 112 can shut down or otherwise disable all components in the first semiconductor die 110 via the conductive connection between the first semiconductor die 110 and the second semiconductor die 112. The configuration shown represents only one possible arrangement utilizing this concept. In another example, some or all of the functions of the second semiconductor die 112 are implemented in a device outside the electronic component 100 (e.g., in a device set on a separate PCB). In another example, the current measuring device 102 can be used to measure the current of various different component or device configurations (such as coil elements, parallel dies, current pins, terminals, bonding wires, etc.).

[0062] Advantageously, because the current measuring device 102 is configured as a separate component that can be mounted on the same carrier structure 106 as the device to be measured (the first semiconductor die 110 in the illustrated example), it can be easily integrated into a packaged semiconductor device or power module. As a result, the parasitic effects of the short-circuit protection mechanism (e.g., stray inductance) are minimized.

[0063] refer to Figure 2A and 2B A method for forming a current measuring device 102 includes providing a glass wafer 114. Generally, the glass wafer 114 may comprise any amorphous (non-crystalline) solid glass material. Examples of such glass materials include quartz glass, silica glass, soda-lime glass, photostructureable glass (e.g., foturan), float glass, ceramics, thermoplastic polymers, polymeric glass, acrylic glass, polycarbonate, polyethylene terephthalate, etc. In embodiments, the glass wafer 114 comprises a ferroelectric material, such as Fe, Co, Ni, or ferromagnetic glass, which increases the material's permeability, thereby improving the signal level of the Rogowski coil.

[0064] Each processing step described below is performed in a single cell segment 116 of the glass wafer 114. Therefore, multiple identical current measuring devices in the current measuring device 102 can be formed from a single glass wafer 114. Each cell segment 116 provides a glass substrate 104 having a first substantially flat surface 118 and a second substantially flat surface 120 opposite each other. The thickness of the glass substrate 104, measured between these first substantially flat surfaces 118 and second substantially flat surfaces 120, is typically in the range of, for example, 100 μm to 10 mm, and in the exemplary embodiment, in the range of 200 μm to 500 μm. Generally, the glass substrate 104 can be any shape other than the circular wafer shown, such as rectangular, elliptical, polygonal, etc.

[0065] refer to Figure 3A and 3B The method further includes applying laser energy 122 (i.e., highly concentrated electromagnetic radiation) to a first substantially flat surface 118 of the glass substrate 104. In an embodiment, the laser energy 122 is applied using a standard microelectronic laser tool (e.g., an excimer laser that applies UV radiation with a wavelength of 308 nm). More generally, the laser energy 122 can be in the UV or visible light spectrum. The laser energy 122 can be applied in multiple short pulse trains, for example, between approximately 100 ns (nanoseconds) and 200 ns, or as continuous pulses. The laser energy 122 forms a plurality of first laser-treated regions 124 in the glass substrate 104. The first laser-treated regions 124 are portions of the glass substrate 104 in which the molecular structure of the glass material has been disrupted by the laser energy 122, and therefore these regions are easier to etch than untreated regions.

[0066] refer to Figure 4A and 4B The method also includes an etching process. The etching process etches each of the first laser-treated regions 124 to form a plurality of first through-holes 126 extending between a first substantially flat surface 118 and a second substantially flat surface 120. Furthermore, untreated regions of the substrate (i.e., portions of the glass substrate 104 adjacent to the first laser-treated regions 124) remain substantially intact. Generally, the etchant used to etch the first laser-treated regions 124 can be any etchant capable of etching glass materials. In certain embodiments, the etchant may include a wet chemical (e.g., fluorine / fluorine-containing or fluorine-based) etchant, such as HF (hydrofluoric acid).

[0067] According to an embodiment, an etching process is performed using a maskless technique. According to this technique, an unmasked region of a first substantially flat surface 118, comprising a first laser-treated region 124 and an untreated region, is exposed to an etchant. The etchant has a greater etching rate on the laser-damaged glass material, causing the first laser-treated region 124 to be removed at a faster rate than the untreated region. Generally, the etchant selectivity can be any value between 5:1 and 100:1, meaning the etchant removes the first laser-treated region 124 at a rate between 5 and 100 times faster than the untreated region. The etchant selectivity can depend on various factors, such as the applied laser energy 122, the glass type, the etchant type, etc. In a particular example where the glass substrate 104 comprises quartz and the etchant comprises HF, the etchant selectivity is between approximately 40:1 and 60:1. Because the maskless technique still removes some material from the untreated region, the thickness of the glass substrate 104 is slightly reduced during the etching process depending on the etchant selectivity. For example, assuming the glass substrate 104 has an initial thickness of 500 μm, and the etchant has a 10:1 selectivity between the first laser-treated region 124 and the untreated region, the thickness of the glass substrate 104 is reduced to approximately 450 μm after the etching process. Therefore, the initial thickness of the glass substrate 104 can be selected to address this thickness reduction, allowing the finished Rogowski coil winding to have the desired height. In another embodiment, a mask is used to protect the untreated areas of the glass substrate 104.

[0068] The first through-hole 126 formed by the etching process can be at least slightly tapered, meaning that the width of the first through-hole 126 gradually decreases with distance from the surface exposed to laser treatment (in the illustrated example, the first substantially flat surface 118). This tapering is caused by the laser treatment becoming less effective as it penetrates deeper into the glass substrate 104. Therefore, the etchant becomes slightly less effective as it reaches deeper portions of the first laser-treated area 124. The taper (i.e., the angle of the sidewall relative to the perpendicularity to the first substantially flat surface 118) can be controlled by adjusting process parameters such as the amount of laser energy 122, the type of glass material, the type of etchant material, etc. Generally, the taper can be between 0.1° and 30°.

[0069] refer to Figure 5A and 5B This illustrates an alternative laser-induced etching technique. In the previously described technique, the first through-hole 126 is formed by applying laser energy 122 specifically to a first substantially flat surface 118, meaning that laser energy 122 is not applied to a second substantially flat surface 120 prior to performing the etching process. In contrast, Figure 5A and 5B The laser-induced etching technique is a multi-sided technique that further includes applying laser energy 122 to a second substantially flat surface 120. The laser energy 122 applied to the second substantially flat surface 120 is aligned with the laser energy 122 applied to the first substantially flat surface 118, such that the first laser-treated region 124 is excited on both sides of the glass substrate 104. Optionally, the laser energy 122 applied to the second substantially flat surface 120 may be the same as the laser energy 122 applied to the first substantially flat surface 118.

[0070] Figure 5A and 5B The multi-sided technique may be particularly beneficial for thicker glass substrates 104, where the laser energy 122 has difficulty or is not possible to fully penetrate the glass substrate 104 from one side. As mentioned above, the applied laser energy 122 tends to be less effective in altering the molecular structure of the material as it penetrates further into the substrate. This double-sided technique overcomes this problem by providing more thorough penetration of the laser energy 122. Figure 5A and 5B The double-sided technology is typically preferred for glass substrates 104 with a thickness of, for example, at least 500 μm. For example... Figure 5B As shown, multi-sided laser activation causes the first perforation 126 to gradually taper symmetrically, giving it an hourglass shape. Depending on the order of the steps, the laser energy used, and the etchant, other shapes are also possible.

[0071] refer to Figure 3A-5B The described techniques illustrate only two examples of techniques for forming vias 126 in a glass substrate 104 using a radiation-based process. More generally, vias 126 can be formed using any technique in which the glass properties of the glass substrate 104 are altered by exposure to a UV (ultraviolet) light source (e.g., for photosensitive glass materials) or a laser radiation source, followed by etching. In any of these techniques, UV (ultraviolet) light or laser radiation alters the properties of the glass substrate 104 such that the treated areas can be etched faster than the untreated areas.

[0072] refer to Figure 6A and 6BThe method further includes forming a plurality of vias 128 in a glass substrate 104, and forming a first metallization layer 130 and a second metallization layer 132 on the glass substrate 104. The vias 128 are formed in first through-holes 126 and extend between a first substantially flat surface 118 and a second substantially flat surface 120. The first metallization layer 130 is formed on the first substantially flat surface 118, and the second metallization layer 132 is formed on the second substantially flat surface 120. The vias 128 and the first and second metallization layers 130 and 132 may comprise conductive metals, such as copper, aluminum, nickel, etc. One or both of the first and second metallization layers 130 and 132 may be initially formed as a blanket layer, meaning they cover the entire area of ​​the first substantially flat surface 118 and / or the second substantially flat surface 120. Generally, these metallization layers can be formed using any of a variety of metal deposition techniques, such as electroplating or electroless metal plating, physical vapor deposition, chemical vapor deposition, or more generally, chemical, physical, plasma-assisted, printing, or etching deposition. More specific examples of the techniques used to form these structures will be provided below in more detail.

[0073] refer to Figures 7A-7G It describes the use of single-sided laser etching technology (e.g., reference). Figures 3A-4B The described technique combines the formation of a through-hole 128 with a first metallization layer 130 and a second metallization layer 132. According to this technique, the second metallization layer 132 is formed on a second substantially flat surface 120 before laser energy 122 is applied to a first substantially flat surface 118. A thin metal layer 134 may be formed between the second metallization layer 132 and the second substantially flat surface 120. The thin layer 134 should have good adhesion to glass and be thick enough to serve as an etchant barrier layer. Exemplary materials for the thin layer 134 include Cr, Ti, and Ag. The second metallization layer 132 may be relatively thick and may be formed from a material different from the thin metal layer 134, serving as an effective seed material (e.g., Cu). Subsequently, as... Figure 7B As shown, laser energy 122 is applied to a first substantially flat surface 118. A thin metal layer 134 protects the second metallization layer 132 from damage during this step. Subsequently, as... Figure 7C As shown, an etching process is performed so that the first through-hole 126 completely penetrates the glass substrate 104. At this point, a resist material 136 can be formed to cover the second metallization layer 132, preventing it from being etched or damaged by the etchant. Subsequently... Figure 7D As shown, the portion of the metal thin layer 134 exposed at the bottom of the first perforation 126 is etched using different etchants in order to expose the second metallization layer 132.

[0074] refer to Figure 7E The diagram illustrates a first option for forming the via 128. According to this technique, a metal plating process is performed after a portion of the metal thin layer 134 is removed. This metal plating process may include electroplating and / or electroless plating processes, wherein the deposited metal grows continuously from the bottom of the first via 126 until the first via 126 is filled with a conductive metal (e.g., Cu). Seed layers may be provided on the sidewalls and lower surface of the via. Subsequently, a first metallization layer 130 is formed on a first substantially flat surface 118. This can be accomplished by physical vapor deposition and electroplating thickening.

[0075] refer to Figure 7F-7G This illustrates a second option for forming the via 128. According to this technique, after removing a portion of the metal thin layer 134, a metal seed layer 136 is deposited on the glass substrate 104, for example, by physical vapor deposition. The seed layer 136 liner the sidewalls of the first via 126 and covers the first substantially flat surface 118. Subsequently, a plating process (e.g., electroless or electroplating) is performed to deposit a conductive metal on the seed layer 136. The plating process fills the first via 126 with a conductive metal (e.g., Cu). The same plating process can form a first metallization layer 130. Figure 7E Compared to the aforementioned techniques, this technique can increase the speed of forming the via 128 structure and / or reduce the likelihood of defects forming in the via 128 structure. Instead of or in conjunction with the plating technique described above, the via 128 structure can be formed at least partially by depositing a filler material (e.g., copper balls) in the opening.

[0076] refer to Figures 8A-8F This illustrates a method for combining multi-sided laser etching techniques (e.g., reference). Figure 5A and 5B The described technique (technique for forming via 128, first metallization layer 130, and second metallization layer 132) is described. According to this technique, in... Figure 8A and 8BAfter the first laser-treated region 124 is formed and the glass substrate 104 is etched, a seed layer 136 is formed, which liner the sidewalls of the first through-hole 126 and the first substantially flat surface 118 and the second substantially flat surface 120. Generally, the seed layer 136 may comprise any conductive metal, such as copper, nickel, silver, etc. The seed layer 136 can be formed, for example, by physical vapor deposition. Subsequently, a metal plating process is performed using the seed layer 136 to deposit conductive metal thereon. The metal plating process can be, for example, electroless plating or electroplating. The metal plating process continuously deposits conductive metal (e.g., Cu) on the seed layer until the first through-hole 126 is filled with conductive metal. This process can be performed such that the first through-hole 126 fills every dimension (including the dimension perpendicular to the illustrated cross-sectional view), such that the first through-hole 126 becomes completely filled. A first metallization layer 130 and a second metallization layer 132 are simultaneously formed during this deposition step.

[0077] refer to Figures 9A-9C The method further includes constructing a first metallization layer 130 and a second metallization layer 132. This metallization step selectively removes portions of the first metallization layer 130 and the second metallization layer 132 to form conductive traces 138 on a first substantially flat surface 118 and a second substantially flat surface 120 of the glass substrate 104. The metallization can be accomplished by forming a mask on the first metallization layer 130 and the second metallization layer 132 (e.g., using photolithography) and subsequently etching the metal exposed from the mask, for example, using etching or ablation techniques.

[0078] Conductive traces 138 connect adjacent through holes 128 together to form windings 139 of a coil structure. For example, from... Figure 9A and 9B As can be understood from the top and bottom views, the conductive traces 138 in the first metallization layer 130 have a different pattern than the conductive traces 138 in the second metallization layer 132. Specifically, as... Figure 9A As can be seen, the conductive trace 138 has a diagonal pattern connecting two diagonally adjacent through-holes 128. (See image) Figure 9B As can be seen, the conductive trace 138 has a vertically aligned pattern that connects two through holes 128 that are directly adjacent to each other in the vertical or horizontal direction. This pattern produces a coil structure in which the first of the through holes 128 is electrically connected to the second of the through holes 128, the second of the through holes 128 is electrically connected to the third of the through holes 128, and so on.

[0079] The pattern shown represents only one possible configuration for generating the coil structure. More generally, the orientation of the via 128 and the patterning of the first metallization layer 130 and the second metallization layer 132 can have any geometry that generates multiple windings 139 in the glass substrate 104. Figure 9A In the diagram, some of the electrical connections between the vias 128 are schematically represented by dashed lines. These electrical connections can be provided in a similar manner by conductive traces 138. In practice, the vias 128 and conductive traces 138 can be arranged to form a coil structure continuously wound around the central portion of the glass substrate 104, wherein the size or spacing of each winding is almost or not different.

[0080] The first metallization layer 130 and the second metallization layer 132 are further configured to include a first bonding pad 140 and a second bonding pad 141. In the illustrated embodiment, the first bonding pad 140 and the second bonding pad 141 are formed in the first metallization layer 130. The first bonding pad 140 and the second bonding pad 141 provide externally accessible electrical contacts to the ends of the coil structure.

[0081] After constructing the first metallization layer 130 and the second metallization layer 132, a passivation layer and / or an insulating layer may be formed on the glass substrate 104. These layers may be configured to provide electrical isolation and protect the coil structure. These layers may include oxides, imides, insulating foils, impregnated insulators, epoxy resins, glass, etc. Alternatively or additionally, the conductive trace 138 may be disposed within a groove formed in the first substantially flat surface 118 and / or the second substantially flat surface 120. In this case, the glass substrate 104 itself provides electrical isolation, and additional insulating material may be formed, for example, on top of the conductive trace 138 or within the opening by means of stencil printing, screen printing, spraying, etc.

[0082] refer to Figure 10A-10G The glass substrate 104 may be further processed to include a third metallization layer 142 formed on the first metallization layer 130 and insulated from the first metallization layer 130 by a first interlayer dielectric 144, and a fourth metallization layer 146 formed on the second metallization layer 132 and insulated from the second metallization layer 132 by a second interlayer dielectric 148. The first interlayer dielectric 144 and the second interlayer dielectric 148 may be or include oxides, imides, epoxy resins, glass, etc. The third metallization layer 142 and the fourth metallization layer 146 may be formed using techniques similar to or the same as those used for the first metallization layer 130 and the second metallization layer 132. The third metallization layer 142 and the fourth metallization layer 146 are configured to include conductive traces 138 in a manner similar to those previously described.

[0083] exist Figure 10A-10GIn one embodiment, the coil has a reverse winding configuration, wherein the winding 139 extends continuously from the starting point of the coil to the outer end 150 of the coil and then folds back to the starting point. At the outer end 150 of the coil, a connection is provided between the first metallization layer 130 and the second metallization layer 132.

[0084] exist Figures 10A-10C In one embodiment, the winding 139 formed by the conductive traces 138 in the first metallization layer 130 and the second metallization layer 132 is interleaved with the winding 139 formed by the conductive traces 138 in the third metallization layer 142 and the fourth metallization layer 146. Although the figures illustrate a simplified case of a reverse-wound coil extending linearly through a portion of the glass substrate 104, the reverse-wound coil can be formed in any desired geometry, including... Figures 9A-9C The geometry of the closed loop is shown in the figure.

[0085] Figure 10D and 10E An embodiment of a reverse-winding structure having only one metallization layer on each side of a glass substrate 104 is shown. Figure 10F and 10G Another embodiment of a reverse-wound structure with only one metallization layer on each side of the glass substrate 104 is shown. In each of these examples, the first metallization layer 130 and the second metallization layer 132 are patterned in a manner that allows the coil to fold back. An electrical connection 151 is provided between two vias 128 to enable the reverse winding.

[0086] One advantage of the Rogowski coil with a reverse winding configuration compared to the previously described single-winding configuration where the winding 139 does not fold back across the coil structure is the reduction of parasitic effects. This is at least partly due to the fact that the reverse winding configuration eliminates the closed conductor loop in which parasitic magnetic fields can additionally induce voltages.

[0087] refer to Figure 11A-11B After forming the coil structure (single-wound or reverse-wound configuration), each unit segment 116 is single-cut from the glass wafer 114. The glass wafer 114 is single-cut along an outer dicing line 152 defining the periphery of each current measuring device 102. Additionally, the glass substrate 104 is single-cut along an inner dicing line 154 forming the central opening 108 of the current measuring device 102. Generally, any glass cutting technique, such as laser ablation, mechanical sawing, chemical etching, etc., can be used to perform the single-cutting along any dicing line. In this embodiment, at least some of these single-cutting steps are performed using a laser etching technique, which can be the same technique used to form through-hole structures, examples of which will be described in further detail below.

[0088] refer to Figure 12A-15CVarious techniques for forming a disassembly feature 156 in a glass substrate 104 are illustrated. The disassembly feature 156 forms a separation plane 158 in the glass substrate 104, which can be used to separate the glass substrate 104 from the glass wafer 114, or to remove segments of the glass substrate 104. The separation plane 158 is a cross-section extending perpendicular to a first substantially flat surface 118 and a second substantially flat surface 120. The glass substrate 104 is thinner and / or less mechanically strong than its adjacent portions in the separation plane 158. As a result, when mechanical pressure is applied near the separation plane 158, the glass substrate 104 will fracture along the separation plane 158. Alternatively or additionally, the glass substrate 104 may be more easily cut or etched along the separation plane 158 than its adjacent portions.

[0089] Reference Figure 12A-15C In each of the described embodiments, forming the via 128 and forming the disassembly feature 156 includes a laser-induced etching process. This means that both features are formed by initially forming a laser-treated region in the glass substrate 104 and then etching the laser-treated region. Some or all of these steps may be common to each other. For example, the disassembly feature 156 may be formed using the same laser (at the same or different energy) used to form the first laser-treated region 124. Alternatively or alternatively, the same etching step used to form the first via 126 may be used to form the disassembly feature 156. Because laser-induced etching is highly flexible in this respect, disassembly features 156 with different geometries, depths, patterns, etc., than the via 128 can be easily formed, while reducing the number of processing steps required to form the complete current measuring device 102.

[0090] refer to Figure 12A-12F This illustrates a technique for forming a central opening 108 in a glass substrate 104 using a laser-induced etching process, according to an embodiment. According to this technique, a glass substrate 104 (such as...) is provided... Figure 12A (as shown), and laser energy 122 is applied to the first substantially flat surface 118 and the second substantially flat surface 120 (as shown). Figure 12B(As shown). During this step, a first laser-treated region 124 is formed in the glass substrate 104 in the manner previously described. Additionally, a plurality of second laser-treated regions 160 are formed by laser processing. The second laser-treated regions 160 are formed in a pattern surrounding a central portion 162 of the glass substrate 104. The second laser-treated regions 160 can be formed with different process parameters than the first laser-treated region 124, such that the two regions are not etched at the same rate. For example, the laser processing can be modified to use less energy to form the second laser-treated regions 160. This can be accomplished by shortening the laser pulse (e.g., from 100 ns to 70 ns). Alternatively or additionally, a coating (not shown) can be applied to the desired location of the second laser-treated regions 160 on the glass substrate 104, such that some of the laser energy 122 is reflected or absorbed.

[0091] Subsequently, as Figure 12C As shown, an etching process is performed. The etching process may include applying a wet chemical etchant (e.g., a fluorine / fluorine-containing or fluorine-based etchant or HF) in a manner similar to that previously described. The etching process forms a plurality of first through-holes 126 in the glass substrate 104 in a manner previously described. Additionally, the etching process forms removal features 156 as trenches or recesses in the glass substrate 104 from a second laser-treated region 160. These trenches are formed in pairs of opposing trenches, which are spaced apart from each other by thinner sections of the glass substrate 104. These pairs of opposing trenches define a separation plane 158 surrounding a central portion 162 of the glass substrate 104. Because the second laser-treated region 160 is formed using a different energy than that used for the first laser-treated region 124, the first through-holes 126 and removal features 156 can be formed simultaneously by a common etching step. Alternatively, opposite trench pairs can be formed by a separate etching step using the same or different chemical etchant as the etchant used to form the first perforation 126.

[0092] Subsequently, as Figure 12D and 12E As shown, via 128 is formed in the manner previously described, and a first metallization layer 130 and a second metallization layer 132 are formed and constructed. In this case, the first metallization layer 130 and the second metallization layer 132 are patterned such that opposite trench pairs and the central portion 162 of the glass substrate 104 between the opposite trench pairs are exposed from the metallization.

[0093] Subsequently, as Figure 12FAs shown, the central portion 162 of the glass substrate 104 is separated from the substrate. In this case, a thinner section of the glass substrate 104 forms a separation plane 158 capable of separating the central portion 162. According to an embodiment, the central portion 162 of the glass substrate 104 is separated by applying mechanical pressure to the central portion 162 until the thinner section of the glass substrate 104 breaks.

[0094] Opposite trench pairs can be formed in a regular pattern, with multiple trenches surrounding a central portion 162 of the glass substrate 104. Alternatively, from a plan view of the glass substrate 104, a single opposite trench pair can be formed with a continuous closed shape surrounding the central portion 162 of the glass substrate 104. In either case, the thickness of thinner sections of the glass substrate 104 can be selected such that these features provide sufficient mechanical support to keep the glass substrate 104 intact during each processing step, while providing a separation plane 158 that can be easily broken or cut.

[0095] refer to Figures 13A-13F This illustrates a technique for forming a removal feature 156 as a trench in a glass substrate 104 according to another embodiment. In this case, the removal feature 156 is configured as a trench extending from a first substantially flat surface 118 to the bottom of a trench, wherein a thinner portion of the glass substrate 104 lies between the bottom of the trench and a second substantially flat surface 120. Unlike the previously discussed embodiments, the trench is formed within a central portion 162 of the glass substrate 104 and can cover the entire area of ​​the central portion 162 of the glass substrate 104.

[0096] The trench providing the disassembly feature 156 can be formed using laser-induced etching technology according to the techniques described above. Different laser energies 122 can be used to form a second laser-treated region 160 in a manner previously described in order to provide a trench in combination with the first through-hole 126.

[0097] After a trench is formed in the central portion 162 of the glass substrate 104, the central portion 162 of the glass substrate 104 can be removed along a separation plane 158 that coincides with the corner where the glass substrate 104 transitions from thinner to thicker in the trench. In an embodiment, this separation is accomplished by applying mechanical pressure until the thinner segment breaks.

[0098] In another embodiment, the central portion 162 of the glass substrate may remain intact rather than being removed. In this case, electronic devices such as semiconductor chips can be placed directly within the cavity, and the coil can operate as a current measuring device for the electronic device. Additional vias may be formed within the central portion 162 of the glass substrate 104 to provide electrical connections and / or heat dissipation.

[0099] refer to Figure 14A-14F This illustrates a technique for forming a disassembly feature 156 as trenches in a glass substrate 104 according to another embodiment. In this embodiment, the disassembly feature 156 includes at least two trenches extending from a first substantially flat surface 118 and disposed within a central portion 162 of the glass substrate 104. The trenches are separated from each other by a thicker section 164 of the glass substrate 104, which is part of the central portion 162 of the glass substrate 104 after final separation. The technique for forming these trenches can be referenced above. Figures 13A-13F The technique described is the same, except that the laser excitation and / or etching steps are performed in such a way that certain portions of the glass substrate 104 within the central portion 162 of the glass substrate 104 are not etched. This technique may be preferred because the thicker portion 164 enhances the mechanical strength of the glass substrate 104, thereby preventing the glass substrate 104 from bending during processing.

[0100] refer to Figures 15A-15C The technique for forming a disassembly feature 156 according to an embodiment is described. In this case, the disassembly feature 156 is provided by a plurality of second perforations, i.e., complete openings penetrating the glass substrate 104. These second perforations may be larger and / or have different geometries than the first perforation 126 used to form the through-hole 128. However, the second perforations can be formed using the same laser application and etching steps as those used to form the first perforation 126.

[0101] The second perforation operates as a disassembly feature 156 by defining a separation plane 158 in the substrate, which extends through a bridging portion of the glass substrate 104 disposed between directly adjacent perforations in the perforation. The glass substrate 104 has relatively weak mechanical strength along the separation plane 158. By applying mechanical pressure to the central portion 162, the bridging portion of the glass substrate 104 breaks, and the central portion 162 separates.

[0102] Figures 15A-15C The diagram illustrates three possible geometric configurations of the second perforation, which create a separation plane 158 surrounding the central portion 162 of the glass substrate 104. Various modifications to the size, location, and geometry of the second perforation, enabling separation through the same concept, are possible. Generally, the second perforation can be formed such that the bridging portion of the glass substrate 104 has sufficient thickness to provide adequate mechanical support to maintain substrate integrity during each processing step, while providing a separation plane 158 that can be easily broken or cut.

[0103] refer to Figure 12A-15CThe various embodiments described for forming the disassembly feature 156 and the separation glass substrate 104 can be combined with each other. In one example, Figures 15A-15C technology and Figure 12A-12F The combination of these technologies results in a bridging portion of the substrate comprising oppositely opposed trench pairs forming a thinner portion of the glass substrate 104. In another example, Figures 15A-15C technology and Figures 13A-13F or Figure 14A-14F The techniques are combined to form one or more trenches surrounded by second perforations in the central portion 162 of the glass substrate 104.

[0104] refer to Figures 16A-16C The image shows a current measuring device 102 according to another embodiment. In this embodiment, a coil structure extends linearly between opposite ends of a glass substrate 104. Figure 16B In the single-wound configuration, the first bonding pad 140 and the second bonding pad 141 are located at these opposite ends of the glass substrate 104. Figure 16C In the reverse-winding configuration, the coil structure is folded back such that both the first bonding pad 140 and the second bonding pad 141 are located at one end of the glass substrate 104. In either case, the coil structure does not bend or change direction. As a result, the coil structure can be formed in a cell segment 116 of the glass wafer 114 having a linear strip geometry. The linear strip geometry is an elongated shape with a centerline extending substantially in a single direction and without a central opening.

[0105] One advantage of linear strip geometry is its efficient use of glass wafer 114. (As shown from...) Figure 16A Understandably, the unit segments 116 of the glass substrate 104 can be formed as a spatially effective pattern using a majority of the glass material that is directly adjacent to each other. Figure 11B The pattern shown is the opposite; no central opening 108 is formed in the glass substrate 104, thus eliminating waste of glass material. Any separation technique (including references) can be used. Figure 11A-14F The described technique involves using a laser-induced etching process to form a disassembly feature 156) around a cell segment 116 from a glass substrate 104, slicing the cell segment 116 from a glass wafer 114. Alternatively, reference may be made to... Figure 11A-14F The described technique can be used to form a glass wafer 114 having the same geometry (e.g., rectangular) as the unit segment 116, such that there is no waste of glass material at the outer periphery of the glass wafer 114.

[0106] Figure 17A and 17BA possible implementation of a linear bar current measuring device 102 for measuring current is shown. In this case, the linear bar current measuring device 102 is mounted adjacent to one side of the first semiconductor die 110, i.e., adjacent to the device being measured. Despite the configuration where the coil completely surrounds the device being measured (e.g., as...), Figure 1 Compared to (as shown), this arrangement may be less effective for current measurement, but in many applications, a single-sided arrangement can still provide sufficiently fast and accurate current detection.

[0107] Figure 18A and 18B Another possible implementation of a linear bar current measuring device 102 for measuring current is shown. In this case, multiple linear bar current measuring devices 102 are connected in series to achieve an arrangement in which coils are wound around a first semiconductor die 110. The electrical connection between each component can be provided by a conductive connector, for example, a bonding wire. Figure 18B In the case of the reverse winding configuration, the current measuring device 102 further includes a third bonding pad 143 and a fourth bonding pad 145, which respectively provide additional connections to the windings in the lower metallization and the upper metallization, so that the current measuring device 102 can be connected in series.

[0108] As shown in the figure, four of the linear bar current measuring devices 102 are connected in series, thus completely surrounding the first semiconductor die 110. Therefore, this arrangement provides current measurement comparable to a closed-loop configuration while effectively utilizing the glass material from the glass wafer 114. More generally, this concept can be implemented using any number of linear bar current measuring devices 102. The number and arrangement of these linear bar elements can be based on many considerations, such as desired measurement accuracy and / or the geometry of the device being measured.

[0109] refer to Figures 19A-19C The image shows a current measuring device 102 according to another embodiment. In this embodiment, the coil structure extends in two directions perpendicular to each other. As a result, the coil structure can be formed in a unit segment 116 of a glass wafer 114 having an L-shaped geometry. An L-shaped geometry refers to a geometry having two elongated spans, wherein the centerlines of the elongated spans are substantially perpendicular to each other. (See image from...) Figure 19A Understandably, the L-shaped geometry also makes efficient use of the glass wafer 114, as each L-shape can be part of a nested pattern. Similar to the previous embodiments, there is no removed central portion in each unit segment 116.

[0110] like Figure 20A and 20BAs shown, the L-shaped current measuring device 102 can be arranged such that it is adjacent to both sides of the first semiconductor die 110. Therefore, it provides greater current sensitivity compared to a single-sided current measurement configuration. In another embodiment (not shown), two of the L-shaped current measuring devices 102 are mounted around the first semiconductor die 110 such that all four sides of the first semiconductor die 110 face a portion of the coil structure. These two L-shaped current measuring devices 102 can be connected in series in a similar manner to that described above. Therefore, the L-shaped geometry represents another way to obtain accurate current measurement while effectively utilizing the glass material from the glass wafer 114.

[0111] The term "substantially" as used herein includes absolute conformity with the specified requirements, as well as minor deviations from the requirements due to manufacturing process tolerance windows. Assuming the component operates as expected within acceptable tolerances (e.g., within + / - 5% current measurement accuracy), the term "substantially" includes any variations within these process tolerance windows.

[0112] Terms such as "first" and "second" are used to describe various elements, areas, parts, etc., and are not intended to be limiting. Throughout the specification, the same term refers to the same element.

[0113] As used herein, the terms “having,” “containing,” “including,” “comprising,” etc., are open-ended terms that indicate the presence of the stated element or feature but do not exclude additional elements or features. The articles “a,” “an,” and “the” are intended to include both plural and singular forms unless the context clearly indicates otherwise.

[0114] It should be understood that, unless otherwise specifically indicated, the features of the various embodiments described herein can be combined with each other.

[0115] While specific embodiments have been shown and described herein, those skilled in the art will understand that various alternatives and / or equivalent embodiments may be substituted for the specific embodiments shown and described without departing from the scope of the invention. This application is intended to cover any modifications or variations of the specific embodiments discussed herein. Therefore, the invention is defined only by the claims and their equivalents.

Claims

1. A method for forming a current measuring device, the method comprising: A glass substrate is provided, the glass substrate comprising a first flat surface and a second flat surface opposite to each other; A plurality of through holes are formed in the glass substrate, each of the through holes extending between the first flat surface and the second flat surface; as well as Conductive traces are formed on the glass substrate to connect adjacent vias together. Forming the plurality of through holes includes applying radiation to the glass substrate; The conductive traces and the through-holes together form a coil structure in the glass substrate.

2. The method according to claim 1, wherein, Applying radiation to the glass substrate includes: Laser energy is applied to the first flat surface to form a plurality of first laser-treated regions in the glass substrate; and Each of the first laser-treated regions is etched to form a plurality of first laser-treated regions extending between the first flat surface and the second flat surface, and The through hole is formed in the perforation.

3. The method according to claim 2, wherein, Etching a laser-treated surface includes applying an etchant to an unmasked area of ​​the first flat surface, the unmasked area comprising the first laser-treated area and an untreated area, wherein the etchant etches the first laser-treated area at a greater rate than it etches the untreated area.

4. The method according to claim 2, wherein, The first perforation is formed by specifically applying the laser energy to the first flat surface.

5. The method according to claim 4, wherein, Forming the through hole includes: A second metallization layer is formed on the second flat surface before the laser energy is applied to the first flat surface; and Perform a metal plating process to fill the first perforation with conductive metal.

6. The method according to claim 5, further comprising: After the laser energy is applied to the first flat surface, a first metallization layer is formed on the second flat surface, and Forming the conductive traces includes constructing each of the first metallization layer and the second metallization layer.

7. The method according to claim 3, wherein, Applying radiation to the glass substrate further includes applying laser energy to the second flat surface, wherein the laser energy applied to the second flat surface is aligned with the first laser-treated region.

8. The method according to claim 4, wherein, Forming the through hole includes: Forming a seed layer lining the sidewall of the first perforation; and Perform a metal plating process using the seed layer to deposit conductive metal thereon.

9. The method according to claim 8, wherein, Performing the metal plating process such that a first metallization layer is formed on the first flat surface and a second metallization layer is formed on the second flat surface, wherein forming the conductive trace includes constructing each of the first metallization layer and the second metallization layer.

10. A method for forming a current measuring device, the method comprising: A glass substrate is provided, the glass substrate comprising a first flat surface and a second flat surface opposite to each other; A through-hole is formed in the glass substrate extending between the first flat surface and the second flat surface; A coil structure comprising a plurality of conductive windings is formed in the glass substrate, each of the conductive windings comprising a pair of the through holes; Multiple disassembly features are formed in the glass substrate; and The first segment of the glass substrate is separated by using the disassembly feature, and The process of forming the through-hole and the disassembly feature includes applying radiation to the glass substrate.

11. The method according to claim 10, wherein, Forming the through hole and forming the disassembly feature include: Laser energy is applied to the glass substrate to form a plurality of first laser-treated regions and a plurality of second laser-treated regions; Etching each of the first laser-treated regions to form a plurality of first through holes in the glass substrate; and Etching each of the second laser-treated regions to form a plurality of second through holes or one or more trenches in the glass substrate. Wherein, the through hole is formed in the plurality of first perforations, and The disassembly features include the plurality of second perforations or one or more grooves.

12. The method according to claim 11, wherein, The laser energy is applied such that the second laser-treated region is formed with less laser energy than the first laser-treated region, and wherein each of the second laser-treated regions is etched to form the disassembly feature to include the one or more trenches.

13. The method according to claim 12, wherein, The one or more trenches are formed as trench pairs separated from each other by thinner segments of the glass substrate, wherein oppositely opposite trench pairs define a separation plane surrounding the first segment of the glass substrate.

14. The method according to claim 12, wherein, The one or more trenches are formed to extend from the first flat surface and are formed within the first section of the glass substrate.

15. The method according to claim 14, wherein, The one or more trenches are formed as pairs of trenches separated from each other by thicker sections that are portions of the first section of the glass substrate.

16. The method according to claim 11, wherein, Separating the first segment of the glass substrate includes mechanically breaking a thinner portion of the glass substrate formed by the one or more trenches.

17. The method according to claim 11, wherein, Etching each of the second laser-processed regions forms the disassembly feature to include the plurality of second perforations, wherein the plurality of second perforations define a separation plane surrounding the first segment of the glass substrate.

18. The method according to claim 17, wherein, Separating the first segment of the glass substrate includes breaking the portion of the glass substrate between the second perforations.

19. The method according to claim 10, wherein, The coil structure is disposed within the first section of the glass substrate.

20. The method of claim 10, wherein, The coil structure surrounds the first section of the glass substrate.

21. A current measuring device, comprising: A glass substrate, comprising a first flat surface and a second flat surface opposite to each other; A plurality of through-holes in the glass substrate, each of the through-holes extending between the first flat surface and the second flat surface; as well as Conductive traces formed on the glass substrate connect adjacent vias together, and The conductive trace and the through-hole together form a coil structure in the glass substrate. The winding of the coil structure includes a pair of through-holes and a conductive trace that electrically connects the pair of through-holes together. The current measuring device includes a first metallization layer formed on the first flat surface and a second metallization layer formed on the second flat surface. The conductive trace is formed in the first metallization layer and the second metallization layer.

22. The current measuring device according to claim 21, wherein, The conductive traces formed in the first metallization layer have a first pattern, and the conductive traces formed in the second metallization layer have a second pattern different from the first pattern.

23. The current measuring device according to claim 21, further comprising: A third metallization layer is formed on top of the first metallization layer and is insulated from the first metallization layer by a first interlayer dielectric. as well as A fourth metallization layer is formed on top of the second metallization layer and is insulated from the second metallization layer by a second interlayer dielectric. The conductive traces are formed in the third metallization layer and the fourth metallization layer.

24. The current measuring device according to claim 23, wherein, The coil structure is reverse-wound, such that the windings formed by the conductive traces in the first and second metallization layers interweave with the windings formed by the conductive traces in the third and fourth metallization layers.

25. The current measuring device according to claim 21, wherein, The coil structure is configured as a Rogowski coil.

26. The current measuring device according to claim 21, wherein, The glass substrate forms a closed loop around a central opening, and the coil at least partially surrounds the central opening.

27. The current measuring device according to claim 21, wherein, The glass substrate has a linear strip geometry, and the coil structure extends linearly between opposite ends of the glass substrate.

28. The current measuring device according to claim 21, wherein, The glass substrate has an L-shaped geometry with two vertical spans, wherein the coil structure extends along both of the two vertical spans.

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