Power switch circuit with input protection, protection method and smart water meter

Abstract

The present invention provides a power switch circuit with input protection, a protection method, and a smart water meter, comprising: a main power supply, a backup power supply, an external power switch, an internal power switch, and an MCU; the main power supply is connected to the external power switch, the backup power supply is connected to the internal power switch, the output of the external power switch and the output of the internal power switch are connected in parallel to form a power output terminal, and the MCU is connected to the power output terminal. The present invention uses a MOS transistor instead of a conventional diode as the external power supply path, reducing the voltage drop caused by the diode. The present invention provides short-circuit protection and reverse polarity protection.

Description

Technical Field

[0001] The present invention relates to the technical field of switch circuits, and in particular to a power switch circuit with input protection, a protection method, and a smart water meter. Background Art

[0002] Today's smart water and gas meters typically use a main power supply and a backup power supply. The main power supply (referred to as the main power supply) is typically a 3.6V disposable lithium-ion battery or multiple dry-cell batteries. Common backup power supplies include supercapacitors (supercapacitors) and battery capacitors (lithium supercapacitors). When the main power supply fails, the stored energy is used to close valves and provide power-off protection for some MCU systems. Furthermore, battery capacitors have a strong discharge capacity, supporting the current consumption required for NB uploads. The backup power supply is typically soldered or connected directly to the main control circuit board and cannot be accessed externally, while the main power supply can be replaced during maintenance. To prevent accidental short circuits and reverse connection during main power supply maintenance and replacement, the main power supply is typically supplied to the system through a diode. While this prevents reverse connection and short circuits, the diode generates a voltage drop during operation, causing the system voltage to be lower than the main power voltage. Furthermore, due to the diode's volt-ampere characteristic, varying operating currents can lead to system voltage instability. If MOS tubes can be used instead of diodes as conduction switches, and at the same time the problem that the MOS tubes themselves cannot prevent power short circuits can be avoided, the voltage drop problem caused by the diodes can be solved, better use effects can be achieved, and the battery life can be extended. Summary of the Invention

[0003] In view of the defects in the prior art, the purpose of the present invention is to provide a power switch circuit with input protection, a protection method and a smart water meter.

[0004] According to the present invention, a power switch circuit with input protection includes: a main power supply, a backup power supply, an external power switch, an internal power switch, and an MCU; the main power supply is connected to the external power switch, the backup power supply is connected to the internal power switch, the output end of the external power switch and the output end of the internal power switch are connected in parallel to form a power output end, and the MCU is connected to the power output end.

[0005] Preferably, the external power switch includes: a PMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C3, a diode D1, and a diode D2; the negative electrode of the main power supply is connected to GND, the positive electrode of the main power supply is respectively connected to the drain of the PMOS transistor Q1 and one end of the capacitor C1, the positive electrode of the main power supply constitutes a detection terminal V_BAT, the source of the PMOS transistor Q1 is a power output terminal, the power output terminal is provided with a detection terminal V_SYS, the source of the PMOS transistor Q1 is connected to the positive electrode of the diode D1, the cathode of the diode D1 is respectively connected to one end of the resistor R3 and one end of the capacitor C3, the The other end of the capacitor C3 is connected to GND. The other end of the resistor R3 is respectively connected to the drain of the NMOS transistor Q2, the gate of the PMOS transistor Q1, and the gate of the NMOS transistor Q3. The gate of the NMOS transistor Q2 is respectively connected to the drain of the NMOS transistor Q3, the anode of the diode D2, one end of the resistor R1, one end of the resistor R2, and the other end of the capacitor C1. The cathode of the diode D2 and the other end of the resistor R1 are connected to VDD, and the other end of the resistor R2 is connected to GND. The source of the NMOS transistor Q2 is connected to the PW_SW_CTRL_1 port of the MCU, and the source of the NMOS transistor Q3 is connected to the PW_SW_CTRL_2 port of the MCU.

[0006] Preferably, a diode D3, a capacitor C2 and an LDO are connected between the MCU and the power output end, the anode of the diode D1 is connected to the anode of the diode D3, the cathode of the diode D3 is respectively connected to one end of the capacitor C2 and one end of the LDO, the other end of the capacitor C2 is grounded, and the other end of the LDO is connected to the MCU.

[0007] According to the present invention, a power switch circuit protection method with input protection is provided, comprising: an MCU determines whether to close an external power switch and an internal power switch through an internal power voltage detection circuit and an external power voltage detection circuit:

[0008] -When both internal and external power meet the design requirements, the main power supply and the backup power supply jointly supply power to V_SYS;

[0009] -MCU periodically disconnects the external power switch to detect the main power condition. If the main power is normal, the external power switch will continue to be closed. If the main power is abnormal, the external power switch will remain disconnected.

[0010] -When the main power supply is short-circuited, the external power switch automatically disconnects without notifying the MCU.

[0011] A smart water meter provided according to the present invention includes the above-mentioned power switch circuit with input protection.

[0012] Compared with the prior art, the present invention has the following beneficial effects:

[0013] 1. The present invention adopts MOS tube instead of the commonly used diode as the power supply path of the external power, reducing the voltage drop caused by the diode.

[0014] 2. The circuit disclosed in the present invention has the functions of short circuit protection and reverse connection protection. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments with reference to the following drawings:

[0016] Figure 1 This is a schematic diagram of the system of the present invention;

[0017] Figure 2 This is the principle diagram of the external power switch of the present invention. DETAILED DESCRIPTION

[0018] The present invention will be described in detail below with reference to specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, without departing from the scope of the present invention, a number of variations and improvements may be made by those skilled in the art. These all fall within the scope of protection of the present invention.

[0019] The present invention discloses a power switch circuit with input protection, referring to Figure 1 , including: a main power supply (external power), a backup power supply (internal power), an external power switch, an internal power switch and an MCU; the main power supply is connected to the external power switch, the backup power supply is connected to the internal power switch, the output end of the external power switch and the output end of the internal power switch are connected in parallel to form a power output end, the voltage of the power output end is V_SYS, and the MCU is connected to the power output end. A voltage detection point is set between the external power switch and the main power supply and between the internal power switch and the backup power supply. The voltage of the voltage detection point between the external power switch and the main power supply is V_BAT. The power output end is connected to a diode D1, and the anode of the diode D1 is connected to the power output end. A diode D3, a capacitor C2 and an LDO are connected between the MCU and the power output end. The anode of the diode D1 is connected to the anode of the diode D3, and the cathode of the diode D3 is connected to one end of the capacitor C2 and one end of the LDO respectively. The other end of the capacitor C2 is grounded, and the other end of the LDO is connected to the MCU.

[0020] When the main power supply is applied, power is supplied to the system via the internal diode in the external power switch circuit. The MCU then powers up and, using the internal and external power voltage detection circuits, determines whether to close the external power switch and the internal power switch. When both the internal and external power supply meet design requirements, the external power supply becomes the primary power source, and the internal power supply becomes the auxiliary power source, providing V_SYS with power. The MCU periodically disconnects the external power switch to monitor the external power supply. If the external power supply is normal, the external power switch remains closed. If the external power supply is abnormal, including underpowered, short-circuited, or reversed, the external power switch remains open. If the external power supply is directly short-circuited during use, the external power switch automatically disconnects without notifying the MCU.

[0021] Specifically, refer to Figure 2 The external power switch includes: a PMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C3, a diode D1, and a diode D2; the negative electrode of the main power supply is connected to GND, the positive electrode of the main power supply is respectively connected to the drain of the PMOS transistor Q1 and one end of the capacitor C1, the positive electrode of the main power supply constitutes a detection terminal V_BAT, the source of the PMOS transistor Q1 is a power output terminal, and the power output terminal is provided with a detection terminal V_SYS, the source of the PMOS transistor Q1 is connected to the positive electrode of the diode D1, the cathode of the diode D1 is respectively connected to one end of the resistor R3 and one end of the capacitor C3, the capacitor C The other end of resistor R3 is connected to GND. The other end of resistor R3 is connected to the drain of NMOS transistor Q2, the gate of PMOS transistor Q1, and the gate of NMOS transistor Q3. The gate of NMOS transistor Q2 is connected to the drain of NMOS transistor Q3, the anode of diode D2, one end of resistor R1, one end of resistor R2, and the other end of capacitor C1. The cathode of diode D2 and the other end of resistor R1 are connected to VDD, and the other end of resistor R2 is connected to GND. The source of NMOS transistor Q2 is connected to the PW_SW_CTRL_1 port of the MCU, and the source of NMOS transistor Q3 is connected to the PW_SW_CTRL_2 port of the MCU. A voltage detection point V_A is set at the gate of the PMOS transistor, and a voltage detection point V_B is set at the gate of the NMOS transistor Q2.

[0022] When the external power supply starts to come on, the internal diode of PMOS transistor Q1 begins to supply power to V_SYS. A parallel diode can also be connected to increase the supply current as needed. When the MCU is powered on, PW_SW_CTRL_1 and PW_SW_CTRL_2 are first pulled high. At this time, PMOS transistor Q1, NMOS transistors Q2, and NMOS transistors Q3 are all turned off. The internal diode of NMOS transistor Q3 maintains the V_B voltage close to VDD, and the V_A voltage is close to the voltage of V_SYS. After the MCU detects that the external power supply is normal through the voltage detection circuit, it first pulls down PW_SW_CTRL_1. This turns on NMOS transistor Q2, lowering V_A and turning on PMOS transistor Q1. After a delay sufficient for NMOS transistor Q2 to turn on, PW_SW_CTRL_2 is pulled down again. Since V_A has been pulled down, the gate voltage of NMOS transistor Q3 is zero, so NMOS transistor Q3 remains off. V_B is the voltage of VDD divided by R1 and R2, typically set slightly higher than the VGS(th) of NMOS transistor Q2. This voltage is sufficient to turn on NMOS transistor Q2. At this point, PMOS transistor Q1 is conducting normally, and the voltages V_SYS and V_BAT are essentially equal. The MCU closes the internal power switch, allowing the external power supply to charge the internal power supply, forming a parallel power supply state between the external and internal power supplies.

[0023] When the external power supply is lost and the internal power supply continues to supply V_SYS, the MCU periodically detects the external power voltage and pulls up PW_SW_CTRL_1 and PW_SW_CTRL_2, turning off PMOS transistors Q1, NMOS transistors Q2, and NMOS transistors Q3. V_SYS cannot supply power to the external V_BAT, ensuring that the external power voltage detection is not affected by the internal power supply. After the detection is completed, PW_SW_CTRL_1 and PW_SW_CTRL_2 are pulled down in sequence.

[0024] Assume that during normal operation, an external short circuit occurs. In this case, both PW_SW_CTRL_1 and PW_SW_CTRL_2 are low. Before the short circuit, the voltages across capacitor C1 are V_BAT and V_B, respectively, resulting in a voltage difference. Because the capacitor voltage difference cannot change suddenly, as the V_BAT voltage drops due to the external short circuit, the V_B voltage is also pulled down. When it falls below a certain voltage, NMOS transistor Q2 begins to turn off, while V_A voltage increases, turning on NMOS transistor Q3. At this time, V_B voltage is pulled down, keeping NMOS transistor Q2 off. This keeps PMOS transistors Q1 and Q2 off, while NMOS transistor Q3 on. V_SYS cannot supply power to the external V_BAT, and the external short circuit does not affect the internal power supply.

[0025] The LDO (low dropout voltage regulator) ensures the stability of the MCU's operating voltage, VDD. VDD is typically set between 2.5V and 3V, slightly different from V_SYS. When a short circuit causes a brief voltage drop in V_SYS, the unidirectional nature of diode D3 prevents the voltage on capacitor C2 from being pulled down simultaneously. The charge stored in capacitor C2 ensures short-term VDD voltage stability and unaffected MCU operation. When the short-circuit protection circuit activates, PMOS transistor Q1 turns off, and the voltage of the internal capacitor (the farad capacitor, lithium supercapacitor) returns to normal after a brief drop, ensuring stable system operation.

[0026] Similarly, when V_SYS drops due to a short circuit, the unidirectionality of diode D1 and the stored energy on capacitor C3 ensure that the high-level voltage of V_A is substantially unaffected by the short circuit during this brief short circuit.

[0027] Diode D1 and capacitor C3 ensure that the high level of V_A is not affected by a short circuit during a brief external power supply short. Once a short circuit occurs, whether the short circuit is cleared or not, the PMOS transistors Q1 and Q2 are turned off, and the NMOS transistor Q3 is turned on. The MCU must first pull PW_SW_CTRL_1 and PW_SW_CTRL_2 high. After confirming that the external power supply is normal, it must then pull PW_SW_CTRL_1 and PW_SW_CTRL_2 low in sequence to turn on PMOS transistors Q1 and Q2, turn off NMOS transistor Q3, and ensure the external power switch is turned on normally.

[0028] The present invention also discloses an intelligent water meter, comprising the above-mentioned power switch circuit with input protection.

[0029] In the description of this application, it should be understood that the terms "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0030] The above describes specific embodiments of the present invention. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art may make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. The embodiments of this application and the features in the embodiments may be combined with each other in any manner unless there is a conflict.

Claims

1. A power switch circuit with input protection, characterized in that: include: A main power supply, a backup power supply, an external power switch, an internal power switch, and an MCU; the main power supply is connected to the external power switch, the backup power supply is connected to the internal power switch, the output end of the external power switch and the output end of the internal power switch are connected in parallel to form a power output end, and the MCU is connected to the power output end; The external power switch includes: a PMOS transistor Q1, an NMOS transistor Q2, an NMOS transistor Q3, a resistor R1, a resistor R2, a resistor R3, a capacitor C1, a capacitor C3, a diode D1, and a diode D2; the negative electrode of the main power supply is connected to GND, the positive electrode of the main power supply is respectively connected to the drain of the PMOS transistor Q1 and one end of the capacitor C1, the positive electrode of the main power supply constitutes a detection terminal V_BAT, the source of the PMOS transistor Q1 is the power output terminal, the power output terminal is provided with a detection terminal V_SYS, the source of the PMOS transistor Q1 is connected to the positive electrode of the diode D1, the negative electrode of the diode D1 is respectively connected to one end of the resistor R3 and one end of the capacitor C3, the capacitor The other end of C3 is connected to GND, the other end of the resistor R3 is respectively connected to the drain of the NMOS transistor Q2, the gate of the PMOS transistor Q1, and the gate of the NMOS transistor Q3, the gate of the NMOS transistor Q2 is respectively connected to the drain of the NMOS transistor Q3, the anode of the diode D2, one end of the resistor R1, one end of the resistor R2, and the other end of the capacitor C1, the cathode of the diode D2 and the other end of the resistor R1 are connected to VDD, the other end of the resistor R2 is connected to GND, the source of the NMOS transistor Q2 is connected to the PW_SW_CTRL_1 port of the MCU, and the source of the NMOS transistor Q3 is connected to the PW_SW_CTRL_2 port of the MCU; When the external power starts to power up and the MCU is powered on, PW_SW_CTRL_1 and PW_SW_CTRL_2 are first pulled high. At this time, PMOS transistor Q1, NMOS transistor Q2, and NMOS transistor Q3 are all turned off. The V_B voltage is maintained at a value close to VDD by the internal diode of NMOS transistor Q3, and the V_A voltage is close to the voltage value of V_SYS. After the MCU detects that the external power is normal through the voltage detection circuit, it first pulls down PW_SW_CTRL_1. At this time, NMOS transistor Q2 turns on, the V_A voltage is pulled down, and PMOS transistor Q1 turns on. After a delay sufficient for NMOS transistor Q2 to turn on, PW_SW_CTRL_2 is pulled down again. When the external power is lost and the internal power continues to supply V_SYS, the MCU periodically detects the external power voltage and pulls up PW_SW_CTRL_1 and PW_SW_CTRL_2, turning off the PMOS transistors Q1, Q2, and Q3. V_SYS cannot supply power to the external V_BAT. After the detection is completed, PW_SW_CTRL_1 and PW_SW_CTRL_2 are pulled down in sequence.

2. The power switch circuit with input protection according to claim 1, characterized in that: A diode D3, a capacitor C2, and an LDO are connected between the MCU and the power output end. The anode of the diode D1 is connected to the anode of the diode D3, and the cathode of the diode D3 is connected to one end of the capacitor C2 and one end of the LDO respectively. The other end of the capacitor C2 is grounded, and the other end of the LDO is connected to the MCU.

3. A method for protecting a power switch circuit with input protection, based on the power switch circuit with input protection according to any one of claims 1 to 2, characterized in that: The MCU uses the internal and external voltage detection circuits to determine whether to close the external and internal power switches: -When both internal and external power meet the design requirements, the main power supply and the backup power supply jointly supply power to V_SYS; -MCU periodically disconnects the external power switch to detect the main power condition. If the main power is normal, the external power switch will continue to be closed. If the main power is abnormal, the external power switch will remain disconnected. -When the main power supply is short-circuited, the external power switch automatically disconnects without notifying the MCU.

4. A smart water meter, characterized in that: The invention comprises a power switch circuit with input protection as described in any one of claims 1 to 2.

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