A variable output power DC-DC power supply architecture and control method thereof

Abstract

A variable output power DC-DC power supply architecture and its control method, including a drive module, a switch module, an LC module, a sampling module, and a feedback control module. When the output voltage needs to be adjusted to change the power supply of the power supply to the load RL, the corresponding output voltage is adjusted by adjusting the resistance of the feedback resistor; the first comparator, the second comparator, and the third comparator of the feedback control module compare the feedback voltage with the first reference voltage, the second reference voltage, and the third reference voltage, respectively, and output corresponding control signals to control the drive module to turn on the NMOS power tube in the switch module, thereby accelerating the adjustment of the output voltage and helping the power supply architecture loop to be quickly re-established. The present invention solves the technical problems of the existing DC-DC power supply architecture, such as the waste of circuit board or integrated chip area, the high design complexity of the comparator, and the poor loop stability. It has the advantages of a small number of digital-to-analog conversion units (DACs), a simple comparator design, and good loop stability.

Description

Technical Field

[0001] The present invention relates to a DC-DC power supply architecture and a control method thereof, and in particular to a DC-DC power supply architecture with variable output power and a control method thereof. Background Art

[0002] In the modern electronics industry, especially power electronics, the application scenarios based on DC-DC power supplies are becoming increasingly broad. In addition to the efficiency requirements of the DC-DC power supply itself, more stringent efficiency requirements are also put forward at the system level. For example, for the same electronic product, if the DC-DC power supply can dynamically provide the corresponding level of power output according to actual needs for different application scenarios and working modes, it can greatly improve the power utilization of the system. In a dynamic power supply system, the traditional DC-DC power supply is required to be able to switch the output voltage amplitude at any time through the central control unit. When the system requires high power output, the DC-DC power supply outputs high voltage; when the system does not have strict requirements on output power, the DC-DC power supply outputs low voltage, thereby achieving the purpose of energy saving for the entire system.

[0003] For existing variable output power DC-DC power supply architectures, see Figure 1 Taking the Buck circuit (step-down conversion circuit) as an example, a digital-to-analog conversion unit (DAC) is added to the ordinary DC-DC power supply architecture, that is, Figure 1 The first digital-to-analog conversion unit DAC1 in the system enables, when the system detects that in a certain mode, the output voltage Vout needs to be adjusted to change the power supply of the power supply to the load RL, the central control unit can send instructions through the digital interface to modify the DAC code word stored in the register, thereby modifying the reference voltage Vref1 at the input end of the first comparator Comp1, and then the loop achieves the purpose of changing the output voltage under the action of negative feedback adjustment.

[0004] To simplify the circuit, Figure 1Omitting peripheral auxiliary circuitry, the first logic control unit (Logic) utilizes a PWM, PFM, or COT control circuit. The error amplifier (EA) increases loop gain. The first comparator (Comp1) serves as the main loop comparator, performing negative feedback loop regulation. Under light load conditions, the Buck circuit's efficiency decreases, the output voltage (Vout) ripple increases, and the feedback voltage (Vfb) fluctuations also increase. To improve efficiency, a second comparator (Comp2) is added, with its input reference voltage set to a second reference voltage (Vref2), which must be greater than the first reference voltage (Vref1). When the feedback voltage (Vfb) exceeds the second reference voltage (Vref2), the comparison result controls the first logic control unit, shutting down all power-consuming circuits in the loop except for the second comparator (Comp2). When the output voltage decreases, causing the feedback voltage (Vfb) to fall below the second reference voltage (Vref2), the system loop is restored. This dynamic regulation improves system efficiency under light load conditions, resulting in a low-power mode (Low-Iq mode). In this mode, the driver unit (Driver) outputs, maintaining the MOS power transistor output in a floating state.

[0005] However, when adding a digital-to-analog converter to a conventional DC-DC power supply architecture to achieve a low-power mode, in order to improve efficiency under light-load conditions with different output voltages, the second reference voltage Vref2 must be able to change in the same direction as the first reference voltage Vref1. This requires the addition of a second digital-to-analog converter DAC2, resulting in a waste of circuit board or integrated chip area. This disadvantage is even more severe when the number of bits in the digital-to-analog converter is large.

[0006] In addition, this DC-DC power supply architecture has a drawback that needs to be overcome: due to the relatively complex loop of the Buck circuit, the output voltage Vout will vary within a relatively wide range during dynamic output switching. This requires the digital-to-analog converter (DAC) to control the corresponding reference voltage to vary within a relatively wide range, which to a certain extent increases the design complexity of the comparator, for example, requiring more stringent requirements for the input common-mode voltage range. Furthermore, the drift of the static operating point may affect the loop stability of the power supply system under different output conditions, and it will also bring a series of negative effects in design simulation. Summary of the Invention

[0007] The purpose of the present invention is to provide a variable output power DC-DC power supply architecture and a control method thereof, which solves the technical problems of existing DC-DC power supply architectures, such as waste of circuit board or integrated chip area, high comparator design complexity, and poor loop stability. It has the advantages of a small number of digital-to-analog conversion units (DACs), simple comparator design, and good loop stability.

[0008] The technical solution of the present invention is:

[0009] A first variable output power DC-DC power supply architecture includes a driver module Driver, a switch module, an LC module, a sampling module, and a feedback control module connected in sequence to form a loop; the switch module includes a PMOS power transistor and an NMOS power transistor connected in sequence; the sampling module includes a feedback resistor Rf and a gain resistor Rg connected in series; the feedback control module includes a first comparison unit, a second comparison unit, and a first logic control unit Logic; the input terminals of the first comparison unit and the second comparison unit are both connected to a feedback voltage Vfb1, and the output terminals thereof are respectively connected to the corresponding input terminals of the first logic control unit; the output terminals of the first logic control unit Logic The input end of the driver module Driver is terminated; the second comparison unit includes a second comparator comp2; the first comparison unit includes an error amplifier EA and a first comparator comp1 connected in sequence; wherein the positive input end of the error amplifier EA is connected to the first reference voltage Vref1, and the negative input end of the second comparator comp2 is connected to the second reference voltage Vref2; its special feature is that the sampling module also includes a digital-to-analog conversion unit DAC; the feedback resistor Rf2 is a digitally adjustable resistor; the first reference voltage Vref1 is a fixed value, the second reference voltage Vref2 is a fixed value, and the second reference voltage Vref2 is greater than the first reference voltage Vref1.

[0010] The first control method of the variable output power DC-DC power supply architecture comprises the following steps:

[0011] The driver module controls the on and off of the switch module, and the output voltage passes through the LC module to provide the output voltage Vout1 to the load RL;

[0012] When the output voltage Vout1 needs to be adjusted to change the power supplied by the power supply to the load RL, the central control unit adjusts the resistance value of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC, and accordingly adjusts the output voltage Vout1. The first comparator comp1 of the feedback control module compares the feedback voltage Vfb1 with the first reference voltage Vref1, and the second comparator Comp2 compares the feedback voltage Vfb1 with the second reference voltage Vref2.

[0013] When the feedback voltage Vfb1 is greater than the first reference voltage Vref1 and less than the second reference voltage Vref2, the first comparator comp1 outputs a corresponding negative feedback control signal. Under the action of the negative feedback control signal, the driving module drives the loop to adjust the output voltage Vout2.

[0014] When the feedback voltage Vfb1 is greater than the second reference voltage Vref2, the first comparator comp1 outputs a low level; the second comparator Comp2 outputs a low power mode enable signal. Under the action of the low power mode enable signal, the driver module turns off other power-consuming circuits in the power architecture loop except the second comparator.

[0015] When the output voltage decreases and causes the feedback voltage Vfb1 to drop below the second reference voltage Vref2 , the power architecture loop is established again.

[0016] The second variable output power DC-DC power supply architecture includes a driver module Driver, a switch module, an LC module, a sampling module and a feedback control module connected in sequence to form a loop; the switch module includes a PMOS power tube and an NMOS power tube connected in sequence; the sampling module includes a feedback resistor Rf and a gain resistor Rg connected in series; the special feature is that the feedback control module includes a first comparison unit, a second comparison unit, a third comparison unit and a first logic control unit Logic; the input ends of the first comparison unit and the second comparison unit are both connected to the feedback voltage Vfb2, and their output ends are respectively connected to the corresponding input ends of the first logic control unit; the output end of the first logic control unit Logic is connected to the input end of the driver module Driver; the second comparison unit includes a second comparator comp2; the first comparison unit includes an error amplifier EA and a first comparator comp1 connected in sequence; wherein, the error amplifier E A positive input terminal is connected to the first reference voltage Vref1, and the negative input terminal of the second comparator comp2 is connected to the second reference voltage Vref2; the third comparison unit includes a third comparator comp3 and a second logic control unit Logic_2 connected in sequence; wherein, the positive input terminal of the third comparator comp3 is connected to the feedback voltage Vfb2, and its negative input terminal is connected to the third reference voltage Vref3; the sampling module also includes a digital-to-analog conversion unit DAC; the feedback resistor Rf is a digitally adjustable resistor; the first reference voltage Vref1 is a fixed value, the second reference voltage Vref2 is a fixed value, and the third reference voltage Vref3 is a fixed value, and the third reference voltage Vref3 is greater than the peak value of the feedback voltage Vfb2> the second reference voltage Vref2> the first reference voltage Vref1; the output terminal Npd of the second logic control unit Logic_2 is connected to the other input terminal of the driving module, and is used to turn on the NMOS power tube of the switching module.

[0017] The second logic control unit Logic_2 includes a timing and zeroing circuit Vrcgen, a fourth comparator comp4, an inverter, and a delay circuit Td, which are connected in sequence and form a loop; wherein the positive input terminal of the fourth comparator comp4 is connected to the feedback voltage Vfb2, and the negative input terminal thereof is connected to the output signal V of the timing and zeroing circuit Vrcgen.RC The output end of the delay circuit Td is connected to the zeroing end Vpd of the timing and zeroing circuit Vrcgen; the inverter output signal Npd is connected to the input end of the driving module.

[0018] The second control method of the variable output power DC-DC power supply architecture is characterized by comprising the following steps:

[0019] The driving module controls the on and off of the switch module;

[0020] The driver module controls the on and off of the switch module, and the output voltage passes through the LC module to provide the output voltage Vout2 to the load RL;

[0021] When the output voltage Vout2 needs to be adjusted to change the power supply of the power supply to the load RL, the central control unit adjusts the resistance value of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC to adjust the size of the corresponding output voltage Vout2;

[0022] The first comparator comp1, the second comparator Comp2 and the third comparator Comp3 of the feedback control module compare the feedback voltage Vfb2 with the first reference voltage Vref1, the second reference voltage Vref2 and the third reference voltage Vref3 respectively, and output corresponding control signals;

[0023] in:

[0024] When the feedback voltage Vfb2 is greater than the first reference voltage Vref1 and less than the second reference voltage Vref2, the first comparator comp1 outputs a corresponding negative feedback control signal. Under the action of the negative feedback control signal, the driving module drives the loop to adjust the output voltage Vout2.

[0025] When the feedback voltage Vfb2 is greater than the second reference voltage Vref2 and less than the third reference voltage Vref3, the first comparator comp1 outputs a low level; the second comparator Comp2 outputs a low power mode enable signal. Under the action of the low power mode enable signal, the driver module turns off other power-consuming circuits in the power architecture loop except the second comparator and the third comparator Comp3.

[0026] When the feedback voltage Vfb2 is greater than the third reference voltage Vref3, both the first comparator comp1 and the second comparator Comp2 output a low level. The output signal of the third comparator Comp3 passes through the logic circuit to control the driver module to turn on the NMOS power transistor in the switch module, thereby accelerating the adjustment of the output voltage Vout2 and helping to quickly re-establish the power architecture loop.

[0027] The present invention has the following beneficial effects:

[0028] The power supply architecture of the present invention only requires one digital-to-analog conversion unit DAC to achieve both dynamic changes in output voltage and low-power mode tracking and discrimination, while simplifying the circuit structure, reducing the chip area, and reducing chip power consumption.

[0029] The input reference voltages of the comparators in the power supply architecture of the present invention are all fixed values, which can effectively reduce power consumption, increase output voltage accuracy, simplify the design difficulty of the comparator, and reduce the risk of static operating point drift.

[0030] The second DC-DC power supply architecture of the present invention can significantly reduce the settling time when the output voltage Vout2 drops, which is beneficial to the stability of the system.

[0031] The present invention has universal applicability and is suitable for various DC-DC power supply architectures.

[0032] The present invention solves the technical problems of the existing DC-DC power supply architecture, such as waste of circuit board or integrated chip area, high comparator design complexity and poor loop stability. It has the advantages of a small number of digital-to-analog conversion units DAC, simple comparator design and good loop stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of an existing variable output power DC-DC power supply architecture;

[0034] Figure 2 This is a schematic diagram of the first variable output power DC-DC power supply architecture of the present invention;

[0035] Figure 3 This is a schematic diagram of a second variable output power DC-DC power supply architecture of the present invention;

[0036] Figure 4 Schematic diagram of the relationship between the action phases of each comparator and the reference voltage in the second variable output power DC-DC power supply architecture of the present invention;

[0037] Figure 5 Schematic diagram of a method for controlling the sequential opening of NMOS power tube switches when Vfb2>Vref3 in a second variable output power DC-DC power supply architecture of the present invention;

[0038] Figure 6 This is a block diagram showing the implementation principle of the second logic control unit in the second variable output power DC-DC power supply architecture of the present invention;

[0039] Figure 7 Schematic diagram comparing waveforms of key nodes of the first power supply architecture and the second power supply architecture of the present invention. DETAILED DESCRIPTION

[0040] The first variable output power DC-DC power supply architecture, see Figure 2 Its structure is basically the same as that of a conventional variable output power DC-DC power supply architecture, except that the first power supply architecture of the present invention places the digital-to-analog conversion unit DAC for adjusting the output voltage Vout1 on the output feedback resistor Rf.

[0041] The first variable output power DC-DC power supply architecture of the present invention includes a driver module Driver, a switch module, an LC module, a sampling module, and a feedback control module connected in sequence to form a loop; the switch module includes a PMOS power tube and an NMOS power tube connected in sequence; the sampling module includes a feedback resistor Rf and a gain resistor Rg connected in series; the feedback control module includes a first comparison unit, a second comparison unit, and a first logic control unit Logic; the first comparison unit and the second comparison unit are connected in parallel, and their output ends are both connected to the corresponding input ends of the first logic control unit; the output end of the first logic control unit Logic is connected to the input end of the driver module Driver; the second comparison unit includes The first comparison unit includes an error amplifier EA and a first comparator comp1 connected in sequence; wherein the positive input terminal of the error amplifier EA is connected to the first reference voltage Vref1, and the negative input terminal of the second comparator comp2 is connected to the second reference voltage Vref2; its special feature is that the sampling module also includes a digital-to-analog conversion unit DAC; the feedback resistor Rf is a digitally adjustable resistor, and its resistance control terminal is connected to a digital decoder, and a digital signal is used as a control signal to adjust the resistance of the feedback resistor Rf; the first reference voltage Vref1 is a fixed value, the second reference voltage Vref2 is a fixed value, and the second reference voltage Vref2 is greater than the first reference voltage Vref1.

[0042] In which, the first comparison unit can also adopt the following replacement structure: including an error amplifier EA, a first comparator comp1 and an inverter connected in sequence; wherein, the positive input terminal of the error amplifier EA is connected to the first reference voltage Vref1, the positive input terminal of the second comparator comp2 is connected to the second reference voltage Vref2, and the output terminal of the second comparator comp2 is connected to the input terminal of the inverter.

[0043] The present invention also proposes a first control method for a variable output power DC-DC power supply architecture, comprising the following steps:

[0044] The driving module controls the on and off of the switch module;

[0045] The switch module controls the power supply to provide the output voltage Vout2 to the load RL in half a cycle, and the capacitor Cs in the LC module provides the output voltage Vout2 to the load RL in the other half a cycle;

[0046] When the output voltage Vout1 needs to be adjusted to change the power supplied by the power supply to the load RL, the central control unit adjusts the resistance of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC, and accordingly adjusts the output voltage Vout1. The first comparator comp1 of the feedback control module compares the feedback voltage Vfb1 with the first reference voltage Vref1, and the second comparator Comp2 compares the feedback voltage Vfb with the second reference voltage Vref2.

[0047] When the feedback voltage Vfb is greater than the first reference voltage Vref1, the first comparator comp1 outputs a corresponding negative feedback control signal. Under the action of the negative feedback control signal, the driving module drives the loop to adjust the output voltage Vout1.

[0048] When the feedback voltage Vfb1 is greater than the second reference voltage Vref2, the second comparator Comp2 outputs a low power mode enable signal. Under the action of the low power mode enable signal, the driving module turns off other power-consuming circuits in the power architecture loop except the second comparator.

[0049] When the output voltage decreases and causes the feedback voltage Vfb to drop below the second reference voltage Vref2 , the power architecture loop is established again.

[0050] The first power supply architecture of the present invention has the following two main advantages: 1) This power supply architecture only requires one digital-to-analog conversion unit DAC to take into account the two purposes of dynamic changes in output voltage and low-power mode tracking and judgment; 2) The input reference voltage of the comparator is a fixed value, which can reduce the difficulty of comparator design, effectively reduce system power consumption, and increase output voltage accuracy.

[0051] However, this power supply architecture has a drawback: when the DAC code changes the resistance of feedback resistor Rf from large to small, due to the slow rate of change of output voltage Vout1, a transient current greater than that flowing through gain resistor Rg will flow across feedback resistor Rf at the instant the DAC state of the digital-to-analog conversion unit switches. This causes a significant overshoot in the voltage at the feedback voltage node Vfb1. This node is a high-impedance node, so the node voltage recovery process of feedback voltage Vfb1 is too long, resulting in a longer stabilization time when output voltage Vout1 switches from high to low. Because this overshoot of feedback voltage Vfb1 is often greater than the second reference voltage Vref2, it triggers low-power mode, actively disconnecting the loop adjustment mode, causing the loop to lose the pull-down adjustment capability of the NMOS power transistor, and degrading the settling time of output voltage Vout1 to an unacceptable level during the switching process.

[0052] When the output voltage Vout1 switches to a high voltage, the system fundamentally does not enter low-power mode. Although the feedback voltage Vfb1 remains a high-impedance node at this point, the system's settling time is shortened due to the negative feedback loop. Therefore, the only consideration is the process of the digital-to-analog converter (DAC) controlling the output voltage's downward transition. During this process, the architecture must address how to eliminate or minimize the impact of this deficiency, ensuring that the system enters low-power mode under light load conditions while ensuring that the system's settling time during the downward transition meets performance requirements.

[0053] To overcome the above shortcomings, a second variable output power DC-DC power supply architecture is provided, see Figure 3, including a driver module Driver, a switch module, an LC module, a sampling module and a feedback control module connected in sequence to form a loop; the switch module includes a PMOS power tube and an NMOS power tube connected in sequence; the sampling module includes a feedback resistor Rf and a gain resistor Rg connected in series; its special feature is that the feedback control module includes a first comparison unit, a second comparison unit, a third comparison unit and a first logic control unit Logic; the first comparison unit and the second comparison unit are connected in parallel, and their output ends are both connected to the corresponding input ends of the first logic control unit; the output end of the first logic control unit Logic is connected to the input end of the driver module Driver; the second comparison unit includes a second comparator comp2; the first comparison unit includes an error amplifier EA and a first comparator comp1 connected in sequence; wherein the positive input end of the error amplifier EA is connected to the first reference voltage Vref1, and the negative input end of the second comparator comp2 is connected to the second reference voltage Vref2; the third comparison unit includes a third comparator comp3 and a second logic control unit Logic_2 connected in sequence. ; wherein the positive input terminal of the third comparator comp3 is connected to the feedback voltage Vfb2, and the negative input terminal thereof is connected to the third reference voltage Vref3; or, the third comparison unit includes a third comparator comp3, a second logic control unit Logic_2, and an inverter connected in sequence; wherein the negative input terminal of the third comparator comp3 is connected to the feedback voltage Vfb, the positive input terminal thereof is connected to the third reference voltage Vref3, and the output terminal thereof is connected to the input terminal of the inverter; the sampling module also includes a digital-to-analog conversion unit DAC; the feedback resistor Rf is a digitally adjustable resistor, the resistance control terminal of which is connected to a digital decoder, and a digital signal is used as a control signal to adjust the resistance of the feedback resistor Rf; the first reference voltage Vref1 is a fixed value, the second reference voltage Vref2 is a fixed value, and the third reference voltage Vref3 is a fixed value, and the third reference voltage Vref3 is greater than the peak value of the feedback voltage Vfb2> the second reference voltage Vref2> the first reference voltage Vref1; the output terminal of the second logic control unit Logic_2 is connected to the input terminal of the driving module, and is used to turn on the NMOS power transistor of the switching module.

[0054] The first comparison unit may also adopt the following alternative structure: comprising an error amplifier EA, a first comparator comp1 and an inverter connected in sequence; wherein the positive input terminal of the error amplifier EA is connected to the first reference voltage Vref1, the positive input terminal of the second comparator comp2 is connected to the second reference voltage Vref2, and the output terminal of the second comparator comp2 is connected to the input terminal of the inverter;

[0055] The above-mentioned second logic control unit Logic_2 specifically includes a timing and zeroing circuit Vrcgen, a fourth comparator comp4 and a delay circuit that are connected in sequence to form a loop; wherein, the negative input terminal of the fourth comparator comp4 is connected to the sampled voltage of the output voltage Vout2, and its positive input terminal is connected to the output signal Vrc of the timing and zeroing circuit Vrcgen; or, the second logic control unit Logic_2 includes a timing and zeroing circuit Vrcgen, a fourth comparator comp4, an inverter and a delay circuit that are connected in sequence to form a loop; wherein, the positive input terminal of the fourth comparator comp4 is connected to the sampled voltage of the output voltage Vout2, and its negative input terminal is connected to the output signal Vrc of the timing and zeroing circuit Vrcgen; the inverter output signal Npd is connected to the input terminal of the driving module.

[0056] The present invention also proposes a second control method for a variable output power DC-DC power supply architecture, comprising the following steps:

[0057] The driving module controls the on and off of the switch module;

[0058] The switch module controls the power supply to provide the output voltage Vout2 to the load RL in half a cycle, and the capacitor Cs in the LC module provides the output voltage Vout2 to the load RL in the other half a cycle;

[0059] When the output voltage Vout2 needs to be adjusted to change the power supply of the power supply to the load RL, the central control unit adjusts the resistance value of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC to adjust the size of the corresponding output voltage Vout2;

[0060] The first comparator comp1, the second comparator Comp2 and the third comparator Comp3 of the feedback control module compare the feedback voltage Vfb2 with the first reference voltage Vref1, the second reference voltage Vref2 and the third reference voltage Vref3 respectively, and output corresponding control signals;

[0061] in:

[0062] When the feedback voltage Vfb2 is greater than the first reference voltage Vref1, the first comparator comp1 outputs a corresponding negative feedback control signal. Under the action of the negative feedback control signal, the driving module drives the loop to adjust the output voltage Vout2.

[0063] When the feedback voltage Vfb2 is greater than the second reference voltage Vref2 and less than the third reference voltage Vref3, the second comparator Comp2 outputs a low-power mode enable signal. Under the action of the low-power mode enable signal, the driver module turns off other power-consuming circuits in the power architecture loop except the second comparator and the third comparator Comp3.

[0064] When the feedback voltage Vfb2 is greater than the third reference voltage Vref3, the output signal of the third comparator Comp3 passes through the logic circuit to control the driving module to turn on the NMOS power transistor in the switch module, thereby accelerating the adjustment of the output voltage Vout2 and helping the power architecture loop to be quickly re-established.

[0065] The second variable output power DC-DC power supply architecture is able to distinguish between "excessive ripple in low power mode causing the feedback voltage Vfb2 to be too high" and "overshoot of the feedback voltage Vfb2 caused by the digital-to-analog conversion unit DAC lowering the output voltage Vout2". The second power supply architecture introduces a new third reference voltage Vref3 for secondary threshold judgment. Figure 4 It shows that in order to ensure that no misjudgment occurs in various situations, it is necessary to simulate within the full PVT (Process, Voltage, Temperature) range to obtain the peak value of the feedback voltage Vfb2 corresponding to the maximum ripple in the low power mode, and then set the third reference voltage Vref3>the peak value of the feedback voltage Vfb2>the second reference voltage Vref2.

[0066] With the above settings, when the feedback voltage Vfb2 is greater than the third reference voltage Vref3, the comparator result turns on the NMOS power tube through the control logic, pulling down the output voltage of Vout2, so that the sampled voltage of the Vfb2 feedback node quickly drops below Vref2. At this time, the negative feedback characteristics of the loop can be used to accelerate the adjustment of the Vout2 output voltage.

[0067] The third comparator Comp3 doesn't directly turn on the NMOS power transistor to pull down the output voltage Vout2 based on its judgment. Due to loop bandwidth limitations and the excessive drive capability of the NMOS power transistor, a sustained strong pull-down would cause the output voltage Vout2 to drop extremely low in a short period of time, causing the feedback voltage Vfb2 to fluctuate significantly, affecting loop stability. The solution is to properly configure the second logic control unit Logic_2 to implement a sequential pull-down mechanism. This means that the output voltage Vout2 is gradually reduced through the logic circuit, ensuring a smooth rate of change in the charge and discharge current at the feedback voltage Vfb2 node and ensuring system stability. Figure 5 , is the logic output waveform of the second variable output power DC-DC power supply architecture of the present invention, and the corresponding second logic control unit Logic_2 circuit structure is as follows Figure 6 shown.

[0068] Figure 6 In the example, Vfb2 is the sampling voltage obtained by dividing the output voltage Vout2, V RC It is a ramp voltage obtained by charging the capacitor with a fixed current. Let the charging time be T RC, a pull-down period is approximately equal to T RC +Td, where Td is Figure 5 The second logic control unit Logic_2 adopts the high pulse width of the control signal Ndrv of the NMOS power tube. Figure 6 After the control circuit is shown, the voltage changes of key nodes such as the system output voltage Vout2 and the feedback voltage Vfb2 are as follows: Figure 7 As shown. Figure 7 It can be seen that the second variable output power DC-DC power supply architecture of the present invention can effectively reduce the settling time when the output voltage Vout2 drops, and the improvement effect will vary depending on the circuit parameter settings. Through actual circuit simulation, we can reduce the settling time after the voltage drops from approximately 400us to 60us, significantly reducing the settling time when the output voltage Vout2 drops, which is beneficial to system stability. It can effectively solve the technical problems caused by the existing DC-DC power supply architecture, such as the waste of circuit board or integrated chip area, high comparator design complexity, and poor loop stability. It has the advantages of a small number of digital-to-analog conversion units (DACs), simple comparator design, and good loop stability.

[0069] In addition, in the first power supply architecture, the first comparison unit can also be implemented in another manner: including an error amplifier EA, a first comparator comp1 and an inverter connected in sequence; wherein the positive input terminal of the error amplifier EA is connected to the first reference voltage Vref1, the positive input terminal of the second comparator comp2 is connected to the second reference voltage Vref2, and the output terminal of the second comparator comp2 is connected to the input terminal of the inverter.

[0070] In the second power supply architecture, the first comparison unit and the third comparison unit can also be implemented in another manner: the first comparison unit includes an error amplifier EA, a first comparator comp1, and an inverter connected in sequence; wherein the positive input terminal of the error amplifier EA is connected to the first reference voltage Vref1, the positive input terminal of the second comparator comp2 is connected to the second reference voltage Vref2, and the output terminal of the second comparator comp2 is connected to the input terminal of the inverter; the third comparison unit includes a third comparator comp3, a second logic control unit Logic_2, and an inverter connected in sequence; wherein the negative input terminal of the third comparator comp3 is connected to the feedback voltage Vfb2, the positive input terminal thereof is connected to the third reference voltage Vref3, and the output terminal thereof is connected to the input terminal of the inverter.

Claims

1. A variable output power DC-DC power supply architecture, comprising a driver module, a switch module, an LC module, a sampling module, and a feedback control module connected in sequence to form a loop; The switch module includes a PMOS power tube and an NMOS power tube connected in sequence; The sampling module includes a feedback resistor Rf and a gain resistor Rg connected in series; The feedback control module includes a first comparison unit, a second comparison unit and a first logic control unit Logic; The input terminals of the first comparison unit and the second comparison unit are both connected to the feedback voltage Vfb1, and the output terminals thereof are respectively connected to the corresponding input terminals of the first logic control unit; The output terminal of the first logic control unit Logic is connected to the input terminal of the driver module Driver; The second comparison unit includes a second comparator comp2; The first comparison unit includes an error amplifier EA and a first comparator comp1 connected in sequence; wherein, The positive input terminal of the error amplifier EA is connected to the first reference voltage Vref1, and the negative input terminal of the second comparator comp2 is connected to the second reference voltage Vref2; Its characteristics are: The sampling module further includes a digital-to-analog conversion unit DAC; the central control unit adjusts the resistance value of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC; The feedback resistor Rf is a digitally adjustable resistor; The first reference voltage Vref1 is a fixed value, the second reference voltage Vref2 is a fixed value, and the second reference voltage Vref2 is greater than the first reference voltage Vref1.

2. A control method for a variable output power DC-DC power supply architecture, characterized in that: The following steps are involved: The driver module controls the on and off of the switch module, and the output voltage passes through the LC module to provide the output voltage Vout1 to the load RL; When the output voltage Vout1 needs to be adjusted to change the power supplied by the power supply to the load RL, the central control unit adjusts the resistance of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC, and accordingly adjusts the output voltage Vout1. The first comparator comp1 of the feedback control module compares the feedback voltage Vfb1 with the first reference voltage Vref1, and the second comparator comp2 compares the feedback voltage Vfb1 with the second reference voltage Vref2. When the feedback voltage Vfb1 is greater than the first reference voltage Vref1 and less than the second reference voltage Vref2, the first comparator comp1 outputs a corresponding negative feedback control signal. Under the action of the negative feedback control signal, the driving module drives the loop to adjust the output voltage Vout2. When the feedback voltage Vfb1 is greater than the second reference voltage Vref2, the first comparator comp1 outputs a low level; the second comparator comp2 outputs a low power mode enable signal. Under the action of the low power mode enable signal, the driving module turns off other power-consuming circuits in the power architecture loop except the second comparator. When the output voltage decreases and causes the feedback voltage Vfb1 to drop below the second reference voltage Vref2 , the power architecture loop is established again.

3. A variable output power DC-DC power supply architecture, comprising a driver module, a switch module, an LC module, a sampling module, and a feedback control module connected in sequence to form a loop; The switch module includes a PMOS power tube and an NMOS power tube connected in sequence; The sampling module includes a feedback resistor Rf and a gain resistor Rg connected in series; Its characteristics are: The feedback control module includes a first comparison unit, a second comparison unit, a third comparison unit, and a first logic control unit Logic; the input terminals of the first comparison unit and the second comparison unit are both connected to the feedback voltage Vfb2, and the output terminals thereof are respectively connected to the corresponding input terminals of the first logic control unit; the output terminal of the first logic control unit Logic is connected to the input terminal of the driver module Driver; The second comparison unit includes a second comparator comp2; The first comparison unit includes an error amplifier EA and a first comparator comp1 connected in sequence; wherein the positive input terminal of the error amplifier EA is connected to the first reference voltage Vref1, and the negative input terminal of the second comparator comp2 is connected to the second reference voltage Vref2; The third comparison unit includes a third comparator comp3 and a second logic control unit Logic_2 connected in sequence; wherein the positive input terminal of the third comparator comp3 is connected to the feedback voltage Vfb2, and the negative input terminal thereof is connected to the third reference voltage Vref3; The sampling module further includes a digital-to-analog conversion unit DAC; the central control unit adjusts the resistance value of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC; The feedback resistor Rf is a digitally adjustable resistor; The first reference voltage Vref1 is a fixed value, the second reference voltage Vref2 is a fixed value, and the third reference voltage Vref3 is a fixed value, and the third reference voltage Vref3>the peak value of the feedback voltage Vfb2>the second reference voltage Vref2>the first reference voltage Vref1; The output terminal Npd of the second logic control unit Logic_2 is connected to the other input terminal of the driving module, and is used to turn on the NMOS power tube of the switch module.

4. The variable output power DC-DC power supply architecture according to claim 3, wherein: The second logic control unit Logic_2 includes a timing and zeroing circuit Vrcgen, a fourth comparator comp4, an inverter, and a delay circuit Td, which are connected in sequence and form a loop; wherein the positive input terminal of the fourth comparator comp4 is connected to the feedback voltage Vfb2, and the negative input terminal thereof is connected to the output signal V of the timing and zeroing circuit Vrcgen. RC , the output terminal of the delay circuit Td is connected to the zero-setting terminal Vpd of the timing and zero-setting circuit Vrcgen; The inverter output signal Npd is connected to the input end of the driving module.

5. A control method for a variable output power DC-DC power supply architecture, characterized in that: The following steps are involved: The driving module controls the on and off of the switch module; The driver module controls the on and off of the switch module, and the output voltage passes through the LC module to provide the output voltage Vout2 to the load RL; When the output voltage Vout2 needs to be adjusted to change the power supply of the power supply to the load RL, the central control unit adjusts the resistance value of the feedback resistor Rf in the sampling module through the digital-to-analog conversion unit DAC to adjust the size of the corresponding output voltage Vout2; The first comparator comp1, the second comparator comp2 and the third comparator comp3 of the feedback control module compare the feedback voltage Vfb2 with the first reference voltage Vref1, the second reference voltage Vref2 and the third reference voltage Vref3 respectively, and output corresponding control signals; in: When the feedback voltage Vfb2 is greater than the first reference voltage Vref1 and less than the second reference voltage Vref2, the first comparator comp1 outputs a corresponding negative feedback control signal. Under the action of the negative feedback control signal, the driving module drives the loop to adjust the output voltage Vout2. When the feedback voltage Vfb2 is greater than the second reference voltage Vref2 and less than the third reference voltage Vref3, the first comparator comp1 outputs a low level; the second comparator comp2 outputs a low power mode enable signal. Under the action of the low power mode enable signal, the driver module turns off other power-consuming circuits in the power architecture loop except the second comparator and the third comparator comp3. When the feedback voltage Vfb2 is greater than the third reference voltage Vref3, both the first comparator comp1 and the second comparator comp2 output a low level. The output signal of the third comparator comp3 passes through the logic circuit to control the driver module to turn on the NMOS power transistor in the switch module, thereby accelerating the adjustment of the output voltage Vout2 and helping to quickly re-establish the power architecture loop.

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