Pixel array and image sensor comprising the same

By uniformly arranging color pixels in the image sensor and setting the same number of phase detection pixels, the noise and resolution problems in the prior art are solved, achieving high signal-to-noise ratio and high-quality image sensor performance.

CN114500892BActive Publication Date: 2026-04-07SAMSUNG ELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-10-26
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

The uneven arrangement of phase detection pixels in existing image sensors leads to increased noise and decreased resolution, affecting image quality.

Method used

In the pixel array of the image sensor, multiple color pixels are evenly arranged, each containing the same number of phase detection pixels. The sensing signal is processed by a line decoder, control logic, and readout circuit to improve the signal-to-noise ratio and imaging performance.

Benefits of technology

By uniformly arranging phase detection pixels, noise is reduced, signal-to-noise ratio and image quality are improved, while supporting the accuracy and speed of autofocus.

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Abstract

A pixel array and an image sensor are disclosed. The pixel array includes a plurality of pixel groups. Each of the plurality of pixel groups includes: a plurality of sub-pixels arranged in an M×N matrix, where M is a natural number equal to or greater than 2, and N is a natural number equal to or greater than 2; and a plurality of color pixels configured to sense light having different wavebands. Each of the plurality of color pixels includes the same number of phase detection pixels.
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Description

[0001] Cross-references to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2020-0139762 filed with the Korean Intellectual Property Office on October 26, 2020, and Korean Patent Application No. 10-2021-0030933 filed with the Korean Intellectual Property Office on March 9, 2021, the disclosures of which are incorporated herein by reference in their entirety. Technical Field

[0003] Embodiments of the present invention relate to a pixel array, and more specifically, to a pixel array comprising a plurality of phase detection pixels uniformly arranged in each color pixel and an image sensor comprising the pixel array. Background Technology

[0004] An image sensor may include an array of pixels that senses received optical signals. Because the image sensor provides autofocus, the pixel array may include multiple phase-detection pixels, which may be arranged discontinuously and irregularly within the pixel array. Summary of the Invention

[0005] Embodiments of the present invention provide a pixel array and an image sensor including the pixel array, wherein a plurality of phase detection pixels are uniformly arranged, thereby reducing or minimizing color channel-based noise for each pixel.

[0006] According to an embodiment of the present invention, the pixel array includes a plurality of pixel groups. Each of the plurality of pixel groups includes: a plurality of sub-pixels arranged in an M×N matrix, wherein M is a natural number equal to or greater than 2, and N is a natural number equal to or greater than 2; and a plurality of color pixels configured to sense light with different wavelengths. Each of the plurality of color pixels includes the same number of phase detection pixels.

[0007] According to an embodiment of the present invention, an image sensor includes a pixel array comprising a plurality of sub-pixels and a plurality of color pixels configured to sense light having different wavelengths. Each of the plurality of color pixels includes the same number of phase-detection pixels. The image sensor also includes readout circuitry configured to convert sensed signals received from the pixel array via a plurality of column lines into binary data. The image sensor further includes a row decoder configured to generate a row selection signal that controls the pixel array such that sensed signals are output for each row via the plurality of row lines; and control logic configured to control the row decoder and the readout circuitry.

[0008] According to an embodiment of the present invention, an image sensor includes a pixel array comprising a plurality of sub-pixels and a plurality of color pixels configured to sense light having different wavelengths. Each of the plurality of color pixels includes a phase detection pixel disposed at a specific location. The image sensor also includes readout circuitry configured to convert sensing signals received from the pixel array via a plurality of column lines into binary data. The image sensor further includes a row decoder configured to generate a row selection signal that controls the pixel array such that sensing signals are output for each row via the plurality of row lines; and control logic configured to control the row decoder and the readout circuitry, and to modify the method of outputting the sensing signals based on a mode signal. Attached Figure Description

[0009] The above and other features of the inventive concept will become more apparent from the detailed description of embodiments thereof with reference to the accompanying drawings, in which:

[0010] Figure 1 This is a block diagram illustrating an image sensor according to an embodiment;

[0011] Figure 2 This is a diagram illustrating a pixel array according to an embodiment;

[0012] Figure 3A and Figure 3B This is a diagram illustrating a group of pixels according to an embodiment;

[0013] Figure 4 This is a diagram illustrating the data values ​​of a color pixel, including sub-pixels, according to an embodiment;

[0014] Figures 5A to 5C This is a schematic cross-sectional view of a phase-detected pixel pair according to an embodiment;

[0015] Figures 6A to 6C According to the embodiments Figure 5B A plan view of a dual photodiode;

[0016] Figure 6D According to the embodiments along Figure 6A A cross-sectional view taken from line A-A';

[0017] Figure 7A This is a diagram illustrating the non-uniformly arranged phase detection pixels in each color pixel, based on a comparative example.

[0018] Figure 7B and Figure 7C This is a diagram illustrating phase detection pixels uniformly arranged in each color pixel according to an embodiment;

[0019] Figures 8A to 8FThis is a diagram illustrating various embodiments of a uniformly arranged phase detection pixel;

[0020] Figures 9A to 9F This is a diagram illustrating various embodiments of a uniformly arranged phase detection pixel;

[0021] Figure 10 This is a diagram illustrating the different data outputs under each mode according to the embodiment;

[0022] Figure 11 This is an equivalent circuit diagram of the pixels according to the embodiment;

[0023] Figure 12A and Figure 12B This is a circuit diagram of a pixel that performs an addition operation on a sensed signal according to an embodiment;

[0024] Figure 13 It is a block diagram of an electronic device including a multi-camera module that applies an image sensor according to an embodiment;

[0025] Figure 14 According to the embodiments Figure 13 Detailed block diagram of the multi-camera module;

[0026] Figure 15 This is a block diagram illustrating an electronic device according to an embodiment; and

[0027] Figure 16 This is a block diagram illustrating an electronic device according to an embodiment. Detailed Implementation

[0028] Embodiments of the inventive concept will be described more fully below with reference to the accompanying drawings. The same reference numerals may denote the same elements throughout the drawings.

[0029] It will be understood that the terms “first,” “second,” “third,” etc., are used herein to distinguish one element from another, and these elements are not limited by these terms. Thus, a “first” element in one embodiment may be described as a “second” element in another embodiment.

[0030] It should be understood that, unless otherwise clearly indicated in the context, the description of features or aspects within each embodiment should generally be considered as other similar features or aspects that may be used in other embodiments.

[0031] As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “one,” and “the” are also intended to include the plural forms.

[0032] It will be understood that when a component, such as a membrane, region, layer, or element, is referred to as being "on" another component, "connected to" another component, "coupled to" another component, or "adjacent to" another component, the component may be directly on, directly connected to, directly coupled to, or directly adjacent to the other component, or there may be intermediate components. It will also be understood that when a component is referred to as being "between" two components, the component may be the only component between the two components, or there may be one or more intermediate components. Other terms used to describe relationships between components should be interpreted in the same manner.

[0033] Figure 1 This is a block diagram illustrating an image sensor 100 according to an embodiment.

[0034] Image sensor 100 may be included in electronic devices with image or light sensing capabilities. For example, image sensor 100 may be included in electronic devices such as Internet of Things (IoT) devices, home appliances, tablet computers (PCs), personal digital assistants (PDAs), portable multimedia players (PMPs), navigation devices, drones, and advanced driver assistance systems (ADAS). Furthermore, image sensor 100 may be included in electronic devices provided as components in vehicles, furniture, manufacturing equipment, doors, various types of measuring devices, etc. However, image sensor 100 is not limited to these applications.

[0035] Image sensor 100 may include a lens LS, a pixel array 110, a row decoder 120, control logic 130, a ramp generator 140, and readout circuitry 150. In embodiments, image sensor 100 may also include a clock signal generator, a signal processor, a column decoder, and / or a memory.

[0036] Image sensor 100 can convert optical signals of an object input through an optical device into electrical signals, and can generate image data IDAT based on the electrical signals. The optical device may include an optical collecting device, which includes a mirror and a lens LS. For example, image sensor 100 can collect light reflected from the object via various paths using optical properties such as light scattering or refraction, or it can use an optical device for changing the path of light. For ease of explanation, an embodiment using a lens LS is described herein. However, as mentioned above, embodiments of the inventive concept can be implemented using various optical devices besides a lens LS.

[0037] Pixel array 110 may include a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS), which converts optical signals into electrical signals. Optical signals passing through lens LS can be transferred to the light-receiving surface of pixel array 110, forming an image of the object. Pixel array 110 can adjust the sensitivity of the optical signals under the control of control logic 130.

[0038] Pixel array 110 can be connected to multiple row lines RL and multiple column lines CL that transfer signals to pixels arranged in a matrix within pixel array 110. For example, each of the row lines RL can transfer a control signal output from row decoder 120 to a transistor included in the pixel, and the pixel signal of the pixel can be transferred to readout circuit 150 in column units of pixel array 110. Each of the multiple column lines CL can extend in the column direction, and pixels arranged in the same column can be connected to readout circuit 150.

[0039] Each of the plurality of pixels in pixel array 110 may include at least one photoelectric conversion device and a transistor. For example, pixel array 110 may be implemented using a photoelectric conversion device (or optical sensing device) such as a charge-coupled device (CCD) or CMOS; furthermore, pixel array 110 may be implemented using various types of photoelectric conversion devices. According to embodiments, the photoelectric conversion device can sense light and convert the sensed light into photocharge. For example, the photoelectric conversion device may include an optical sensing device comprising organic or inorganic materials, such as an inorganic photodiode, an organic photodiode, a perovskite photodiode, a phototransistor, a photogate, or a pinned photodiode. In embodiments, the transistor may transfer charge stored in the photoelectric conversion device, reset the charge to a source voltage, or convert the charge into an electrical signal.

[0040] Microlenses and color filters can be stacked on each of a plurality of pixels, and the plurality of color filters of the plurality of pixels can be configured as a color filter array. A color filter can transmit light of a specific color from the light incident through the microlens, and for example, can transmit wavelengths of a specific color region. Colors that can be sensed by the pixel can be determined based on the color filters included in the pixel. However, the inventive concept is not limited thereto. For example, in an embodiment, a photoelectric conversion device included in the pixel can convert light corresponding to wavelengths of a color region into an electrical signal based on the level of an electrical signal (e.g., a voltage level) applied to it; therefore, colors that can be sensed by the pixel can be determined based on the level of the electrical signal applied to the photoelectric conversion device.

[0041] In an embodiment, each of the plurality of pixels in the pixel array 110 may include a microlens and at least one photoelectric conversion device arranged in parallel below the microlens. For example, each of the plurality of pixels may include at least one first photoelectric conversion device and at least one second photoelectric conversion device arranged in parallel. Each pixel may output a first image signal generated from the first photoelectric conversion device or a second image signal generated from the second photoelectric conversion device. Furthermore, each pixel may output both image signals generated from the first and second photoelectric conversion devices.

[0042] Multiple pixels may include color pixels (e.g., red pixels, green pixels, and blue pixels). Color pixels can generate image signals including corresponding color information based on light passing through different color filters. In embodiments, color filters that generate different color information, color pixels that generate image signals including different color information, or a group of color pixels may be referred to as color channels. For example, a red channel may be referred to as a red filter or as a red pixel for processing light passing through a red filter; a blue channel may be referred to as a blue filter or as a blue pixel for processing light passing through a blue filter; and a green channel may be referred to as a green filter or as a green pixel for processing light passing through a green filter. In the embodiments described herein, colors such as red, green, and blue are described. However, the inventive concept is not limited thereto. For example, in embodiments, multiple pixels may include pixels based on combinations of different colors, such as yellow pixels, cyan pixels, and white pixels.

[0043] Red pixels can generate an image signal (or charge) corresponding to a red signal in response to the wavelength of a red region in the visible light region. Green pixels can generate an image signal (or charge) corresponding to a green signal in response to the wavelength of a green region in the visible light region. Blue pixels can generate an image signal (or charge) corresponding to a blue signal in response to the wavelength of a blue region in the visible light region. However, the inventive concept is not limited thereto. For example, in an embodiment, the plurality of pixels may also include white pixels. As another example, in an embodiment, the plurality of pixels may include cyan pixels, yellow pixels, magenta pixels, or white pixels.

[0044] Under the control of control logic 130, for example via the row control signal CTR_X, row decoder 120 can generate control signals for driving pixel array 110, and can drive multiple pixels of pixel array 110 in row units via multiple row lines RL. Each of the multiple row lines RL can extend in the row direction and can be connected to pixels set in the same row.

[0045] In one embodiment, the row decoder 120 can control multiple pixels such that the multiple pixels of the pixel array 110 sense light incident simultaneously or row by row. Furthermore, the row decoder 120 can select pixels from the multiple pixels row by row, provide a reset signal to the selected pixel (e.g., pixels in a row), and output the sensed voltage generated by the selected pixel via multiple column lines CL.

[0046] Control logic 130 can provide control signals for controlling the timing of row decoder 120, ramp generator 140, and readout circuit 150. For example, control logic 130 can provide a row control signal CTR_X to row decoder 120, which can sense pixel array 110 in row units via row lines RL based on row control signal CTR_X. For example, control logic 130 can provide a ramp control signal CTR_R to ramp generator 140 for controlling ramp signals, which can generate a ramp signal RMP for the operation of readout circuit 150 based on ramp control signal CTR_R. For example, control logic 130 can provide a column control signal CTR_Y to readout circuit 150, which can receive and process pixel signals from pixel array 110 via column lines CL based on column control signal CTR_Y.

[0047] According to an embodiment, control logic 130 can comprehensively control image sensor 100 based on mode signal MD. For example, control logic 130 can receive mode signal MD indicating high-resolution or low-resolution sensing from application processor, and can output row control signal CTR_X, column control signal CTR_Y, and ramp control signal CTR_R, such that each of the plurality of pixels in pixel array 110 outputs an independent pixel signal, and pixel array 110 can output each of the plurality of pixel signals based on row control signal CTR_X and column control signal CTR_Y. Furthermore, readout circuit 150 can sample or process pixel signals based on ramp signal RMP. For example, application processor can provide the result obtained by determining the imaging mode of image sensor 100 as mode signal MD based on various scenarios (such as the brightness of the imaging environment, the user's resolution setting, and the perception or learning state).

[0048] Control logic 130 can be implemented by processing circuitry, such as hardware including logic circuitry, or by a combination of hardware and software, such as a processor executing software to perform compression operations. For example, control logic 130 can be implemented by, but is not limited to, a central processing unit (CPU) included in image sensor 100, as well as an arithmetic logic unit (ALU), digital signal processor (DSP), microprocessor, application-specific integrated circuit (ASIC), and control logic to perform arithmetic and logical operations and shift operations, and control logic 130 can assist artificial neural networks and can also use accelerators and neural processing units (NPUs) that utilize artificial neural networks.

[0049] The ramp generator 140 can generate a ramp signal RMP with a specific slope that gradually increases or decreases, and can provide the ramp signal RMP to the readout circuit 150.

[0050] The readout circuit 150 can receive pixel signals output from the pixel array 110 via column lines CL, and can process the pixel signals to output image data IDAT. The readout circuit 150 may include a correlated double sampling (CDS) circuit 151, an analog-to-digital converter (ADC) circuit 153, and a buffer 155.

[0051] CDS circuit 151 may include multiple comparators and can compare pixel signals received from pixel array 110 via multiple column lines CL with a ramp signal RMP from ramp generator 140. Each of the comparators can compare the received pixel signal with the buffered ramp signal RMP and can output a comparison result at a logic low or logic high level. For example, when the level of ramp signal RMP is the same as the level of the pixel signal, each of the comparators can output a comparison signal for shifting a first level (e.g., logic high level) to a second level (e.g., logic low level), and the time for shifting the comparison signal can be determined based on the level of the pixel signal.

[0052] Multiple pixel signals output from multiple pixels can have deviations caused by the unique characteristics of each pixel (e.g., fixed-mode noise (FPN)) and / or by differences in the characteristics of the logic used to output the pixel signals (e.g., transistors used to output charges stored in the photoelectric conversion device within the pixel). As described above, the operation of calculating a reset voltage (or reset component) and a sense voltage (or sense component) that both correspond to the pixel signals and extracting the difference between them (e.g., voltage difference) as an effective signal to compensate for the deviations between the multiple pixel signals output through multiple column lines CL can be called CDS. Each of the comparators can output a comparison result (e.g., a comparison output) applied to the CDS technique. As a result, CDS circuit 151 can generate a comparison result applied to the CDS technique.

[0053] The ADC circuit 153 can convert the comparison result of the CDS circuit 151 into digital data to generate and output pixel values ​​corresponding to multiple pixels in row units. The ADC circuit 153 may include multiple counters. These counters may be connected to the outputs of multiple comparators and can count the comparison results output from the multiple comparators. Each counter can count the logic high or logic low comparison results output from the corresponding comparator based on a counting clock during a reset transition period for sensing a reset signal and an image transition period for sensing a sensed signal, and can output digital data (e.g., pixel values) based on the counting results. Each counter may include latching circuitry and calculation circuitry. The latching circuitry can latch a code value received as a counting clock signal while shifting the level of the comparison signal received from the corresponding comparator. The latch signal can latch each of the code value corresponding to the reset signal (e.g., reset value) and the code value corresponding to the image signal (e.g., image signal value). The calculation circuitry can perform arithmetic operations on the reset value and the image signal value to generate an image signal value from which the reset level has been removed. Each of the counters can output an image signal value from which the reset level of the pixel has been removed as a pixel value. However, the inventive concept is not limited thereto. For example, in embodiments, each counter can be implemented by an incrementing counter and computational circuitry, or by an increment / decrementing counter, or by a bit-by-bit inverting counter in which the count value is sequentially incremented based on a counting clock signal.

[0054] Buffer 155 can store pixel values ​​output from ADC circuit 153. Buffer 155 can store digital data (e.g., pixel values) corresponding to each row. In an embodiment, buffer 155 can temporarily store multiple digital data output from a counter and can amplify and output the stored multiple digital data. That is, buffer 155 can include an output buffer. Buffer 155 can temporarily store multiple digital data output from each of a plurality of counters, and can subsequently output the stored multiple digital data sequentially or selectively, with a sense amplifier amplifying and outputting the received digital data. Buffer 155 can output amplified image data IDAT to the outside of readout circuit 150 based on the column control signal CTR_Y for each column of the column decoder, controlled by control logic 130.

[0055] For example, buffer 155 may be implemented using static random access memory (SRAM), latches, flip-flops, or combinations thereof, but is not limited thereto. In an embodiment, buffer 155 may be a memory and may be included in ADC circuitry 153.

[0056] In this embodiment, the image sensor 100 may support autofocus (AF) functionality and may use phase-difference AF technology for autofocus detection. Phase-difference AF operation can be a method of adjusting focus by sensing the parallax of the phase of an image formed in the image sensor 100. Phase-difference AF operation may have the characteristic of increasing the phase difference between both the front and rear pins. In phase-difference AF operation, the phase difference value and direction information about the pins can be seen based on the sensed phase difference; therefore, focusing can be performed by moving the focusing lens once. For example, the image sensor 100 may pre-calculate the lens movement value based on the phase difference and direction information about the pins, and based on this, the focusing lens can be driven once to perform focusing. Therefore, the image sensor 100 using phase-difference AF operation can perform fast focusing without display shake from the electronic viewfinder.

[0057] When using phase-difference autofocus (AF) operation, there may be issues related to the position of the phase-detection pixels within the pixel array 110. When too many phase-detection pixels are arranged in the pixel array 110, the number of sensing pixels may decrease, leading to resolution degradation. When too few phase-detection pixels are arranged in the pixel array 110, the image sensor 100 may fail to detect accurate phase differences. The image sensor 100 can support various imaging modes, such as live view mode, still image mode, moving image mode, preview mode, and high-resolution capture mode. In various imaging modes, the position of the sensing pixels used to generate the image can be changed, and the imaging performance of each mode can be altered based on the arrangement of the phase-detection pixels. Therefore, according to embodiments, phase-detection pixel arrangement techniques can be utilized to improve the imaging performance of the image sensor 100.

[0058] Figure 2 This is a diagram illustrating the pixel array 110 according to an embodiment.

[0059] Reference Figure 2 The pixel array 110 may include multiple pixel groups PGs arranged in a repeating pattern. Each pixel group PG may include a red channel, a green channel, and a blue channel, and may be used to reproduce an object based on a combination of the red, green, and blue channels. Figure 1 A color representation unit (of an object in the text).

[0060] In an embodiment, a pixel group PG may include color pixels having a Bayer pattern including red, green, and blue. Each color pixel may include nine sub-pixels arranged in a 3×3 matrix, each sub-pixel receiving light passing through the same color filter. A pixel group PG including nine red sub-pixels R arranged in a 3×3 matrix, nine green sub-pixels Gr arranged in a 3×3 matrix, nine blue sub-pixels B arranged in a 3×3 matrix, and nine green sub-pixels Gb arranged in a 3×3 matrix may be referred to as a nine-cell unit. Hereinafter, the green sub-pixel Gr may be referred to as a first green sub-pixel, and the green sub-pixel Gb may be referred to as a second green sub-pixel. The first green sub-pixel Gr and the second green sub-pixel Gb may be collectively referred to as green pixel G. Therefore, the green pixel G including the green sub-pixel Gr may be referred to as the first green pixel, and the green pixel G including the green sub-pixel Gb may be referred to as the second green pixel. In this embodiment, for ease of description, nine sub-pixels arranged in a 3×3 matrix (e.g., a nine-cell unit) are described, but the inventive concept is not limited thereto. For example, according to an embodiment, the pixel group PG can be configured in various combinations of numbers. For example, in an embodiment, the pixel group PG can be configured to have an M×N configuration, where M is a natural number equal to or greater than 2, and N is a natural number equal to or greater than 2.

[0061] Pixel group PG may include phase-detection pixel P, which is one of a plurality of sub-pixels included in a color pixel. According to embodiments, the phase-detection pixel P may be uniformly arranged (or distributed) for each color channel (or color pixel). Image sensors (e.g., Figure 1 The distance to the object can be calculated based on the pixel signal difference (e.g., parallax) between a pair of phase-detecting pixels P, and thus focus can be automatically detected. Therefore, the phase-detecting pixels P can be arranged in pixel array 110 in horizontal or vertical pairs. In this embodiment, a horizontally arranged pair of phase-detecting pixels PHD is described, but the inventive concept is not limited thereto. For example, according to embodiments, phase-detecting pixel pairs with various geometries (such as vertical or diagonal structures) can be used.

[0062] According to an embodiment of the present invention, each color channel of a pixel group PG may include the same number of phase-detection pixels P. That is, each of a plurality of color pixels may include the same number of phase-detection pixels. For example, one pixel in a phase-detection pixel pair PHD may be located at the lower right end of a first green pixel, and another pixel in the phase-detection pixel pair PHD may be located at the lower left end of a red pixel. Similarly, one pixel in another phase-detection pixel pair may be located at the lower left end of a blue pixel, and another pixel in another phase-detection pixel pair may be located at the lower right end of a second green pixel. Pixel groups GP may be arranged repeatedly, and therefore, a phase-detection pixel P located at the lower left end of a blue pixel may contact a phase-detection pixel P included in another pixel group PG and located at the lower right end of a second green pixel to be configured as a pair.

[0063] According to an embodiment, the phase detection pixel P disposed in the first green pixel and the phase detection pixel P disposed in the red pixel can be configured as a phase detection pixel pair PHD. For example, the phase detection pixel P disposed at the lower right end of the first green pixel can sense the left image of the object, and the phase detection pixel P disposed at the lower left end of the red pixel can sense the right image of the object. Therefore, the disparity can be calculated based on the phase difference between the left and right images of the same object. Pixel groups PG can be repeatedly arranged in the pixel array 110, and therefore, the phase detection pixel P disposed at the lower left end of the blue pixel and the phase detection pixels of the pixel group disposed to the left of the pixel group PG (e.g., the second green pixel) can be configured as a phase detection pixel pair PHD, and the phase detection pixel P disposed at the lower right end of the second green pixel and the phase detection pixels of the pixel group disposed to the right of the pixel group PG (e.g., the blue pixel) can be configured as a phase detection pixel pair PHD. In the embodiment, as an example of implementing the Bayer pattern, for ease of description, it is described that the red pixel is disposed to the right of the first green pixel, the blue pixel is disposed below the first green pixel, and the second green pixel is disposed diagonally to the first green pixel, but the inventive concept is not limited thereto. For example, according to an embodiment, the positions of red, green, and blue pixels can be switched among them, or a white pixel can be provided in place of one of the two green pixels, or pixels can be implemented by a combination of different colors such as yellow and blue-green pixels.

[0064] According to an embodiment, the pixel array 110 may uniformly include a phase detection pixel P for each color pixel, and therefore, relatively constant crosstalk can occur between the phase detection pixel P and its neighboring pixels. This constant crosstalk can be removed without separate correction, and thus, the performance of phase detection and the quality of the image can be improved. (Refer to...) Figures 7A to 7C A more detailed description is given of the crosstalk that occurs between the phase-detected pixel P and its neighboring pixels.

[0065] Furthermore, in the image sensor 100 according to the embodiment, each color pixel of the pixel array 110 may uniformly include a phase detection pixel P, and therefore, the number of phase detection pixels P included in the color pixels can be reduced or minimized. As the number of sub-pixels of the sensing object other than the phase detection pixel P in each color pixel increases, the signal-to-noise ratio (SNR) of the image sensor 100 can be improved.

[0066] Figure 3A and Figure 3B This is a diagram illustrating pixel group PG1 or PG2 according to an embodiment.

[0067] Reference Figure 3A and Figure 3BThe terms “pixel groups PG1 and PG2”, “color pixels CP1 and CP2” and “subpixels SP1 and SP2” used in this document are defined in more detail.

[0068] Reference Figure 3A The first pixel group PG1 may include multiple color pixels having a Bayer pattern including red, green, and blue, each of which may include four sub-pixels arranged in a 2×2 matrix. The first pixel group PG1, including four red sub-pixels R1 to R4 arranged in a 2×2 matrix, four green sub-pixels Gr1 to Gr4 arranged in a 2×2 matrix, four blue sub-pixels B1 to B4 arranged in a 2×2 matrix, and four green sub-pixels Gb1 to Gb4 arranged in a 2×2 matrix, may be referred to as a four-cell unit. The multiple color pixels may be configured to sense light with different wavelengths, as described herein.

[0069] The first pixel group PG1 may include two green pixels, one red pixel, and one blue pixel as color pixels. For example, the green pixel including green sub-pixels Gr1 to Gr4, located to the left of the red pixels including red sub-pixels R1 to R4, may be the first color pixel CP1.

[0070] The first color pixel CP1 may include multiple sub-pixels having the same color information. For example, a green pixel may be the first color pixel CP1, and may include four sub-pixels Gr1 to Gr4 arranged in a 2×2 matrix. The sub-pixel Gr1 located at the upper left end of the first color pixel CP1 may be the first sub-pixel SP1.

[0071] Reference Figure 3B The second pixel group PG2 may include multiple colored pixels having a Bayer pattern including red, green, and blue, each of which may include nine sub-pixels arranged in a 3×3 matrix. The second pixel group PG2, which includes nine red sub-pixels R1 to R9 arranged in a 3×3 matrix, nine green sub-pixels Gr1 to Gr9 arranged in a 3×3 matrix, nine blue sub-pixels B1 to B9 arranged in a 3×3 matrix, and nine green sub-pixels Gb1 to Gb9 arranged in a 3×3 matrix, may be referred to as a nine-cell unit.

[0072] The second pixel group PG2 may include two green pixels, one red pixel, and one blue pixel as color pixels. For example, the green pixel including green sub-pixels Gr1 to Gr9, located to the left of the red pixels including red sub-pixels R1 to R9, may be the second color pixel CP2.

[0073] The second color pixel CP2 may include multiple sub-pixels having the same color information. For example, a green pixel may be the second color pixel CP2, and may include nine sub-pixels Gr1 to Gr9 arranged in a 3×3 matrix. The sub-pixel Gr1 located at the upper left end of the second color pixel CP2 may be the second sub-pixel SP2.

[0074] exist Figure 3A and Figure 3B In the diagram, pixel groups, color pixels, and subpixels (e.g., pixel groups PG1 and PG2, color pixels CP1 and CP2, and subpixels SP1 and SP2) are defined in four- or nine-cell units, but the inventive concept is not limited thereto. For example, embodiments of the inventive concept may be applied to subpixels based on combinations of various numbers of subpixels included in each color pixel (e.g., subpixels arranged in an M×N matrix).

[0075] Figure 4 This is a diagram illustrating the data values ​​of a color pixel, including sub-pixels, according to an embodiment.

[0076] exist Figure 4 In this paper, a nine-cell unit, which is a set of nine sub-pixels arranged in a 3×3 matrix, will be described as an example embodiment of the inventive concept. As described above, embodiments of the inventive concept can be applied to sub-pixels arranged in an M×N matrix.

[0077] Reference Figure 4 A pixel group PG may include color pixels, and each color pixel may include multiple sub-pixels arranged in an M×N (MN) matrix. For example, a pixel group PG may include a first green pixel, a second green pixel, a red pixel, and a blue pixel. The first green pixel may include MN green sub-pixels Gr, the second green pixel may include MN green sub-pixels Gb, the red pixel may include MN red sub-pixels R, and the blue pixel may include MN blue sub-pixels B.

[0078] According to an embodiment, each color pixel (e.g., a first green pixel, a second green pixel, a red pixel, and a blue pixel) may include the same number of phase detection pixels P. The phase detection pixels P can be uniformly arranged in each color pixel, and therefore, relatively constant crosstalk can occur between each of the phase detection pixels P and its neighboring pixels. For example, one or more phase detection pixels P may be located at each of the lower right end of the first green pixel, the lower left end of the red pixel, the lower left end of the blue pixel, and the lower right end of the second green pixel, with each color channel including the same number of phase detection pixels P.

[0079] In scenarios where high-resolution images are not required, due to low brightness in the imaging environment or the use of fast image processing (e.g., previewing images), the sensing signals or sensing data of multiple sub-pixels included in the color pixels can be summed, thus ensuring a sufficient amount of light. The summation of analog signals generated by multiple optical sensing devices can be called analog addition, while the summation of the digitally converted results of the sensing signals can be called digital addition. (Refer to...) Figure 11 A more detailed description of simulated addition, as shown in Figure 12, will be provided in reference to... Figure 13 A more detailed description of number addition.

[0080] According to an embodiment, the signal or data generated by a color channel can be summed as a single piece of color pixel information. For example, each color pixel may include M×N (MN) sub-pixels. One of the sub-pixels may be a phase detection pixel P used to calculate disparity, and the other sub-pixels may each be sensing sub-pixels used to sense the image. Referring to the first green pixel according to an embodiment, the sensing pixels corresponding to ((M×N)-#P) other sub-pixels among the MN sub-pixels, excluding the (#P) ​​phase detection pixels, can be summed. The signal or data of the summed sensing pixels may include more information (e.g., resolution, contrast, sensitivity, etc.) than the signal or data of each of the multiple sub-pixels. The red pixel, blue pixel, and second green pixel can be summed in a similar manner, and therefore, more information than that included in individual sub-pixels can be generated.

[0081] Figures 5A to 5C This is a schematic cross-sectional view of the phase detection pixel pair PHDa, PHDb, and PHDc according to an embodiment. For ease of explanation, the description... Figures 5A to 5C When repeating the same description, omit it.

[0082] Reference Figure 5A The phase detection pixel pair PHDa may include microlenses, an optical sensing device, and color filters. For example, as an embodiment of the optical sensing device, each of the plurality of pixels PX1 and PX2 may include a plurality of photodiodes PD1 and PD2 and a plurality of color filters CF1 and CF2, and a plurality of microlenses ML1 and ML2 may be disposed on the color filters CF1 and CF2. According to the embodiment, the cross-sectional shape of the microlenses ML1 and ML2 may be an arc with a circular curvature, or it may be a portion of an ellipse.

[0083] according to Figure 5AIn the illustrated embodiment, a color filter CF1 or CF2 and a microlens ML1 or ML2 can be disposed on a photodiode PD1 or PD2. For example, light incident on the center of the microlens ML1 can pass through the color filter CF1, and therefore, only light of a specific wavelength (e.g., approximately 500 nm to approximately 600 nm corresponding to green) can be transmitted, and the transmitted light of that specific wavelength can form an image in the photodiode PD1. Similarly, light incident on the center of the microlens ML2 can pass through the color filter CF2, and therefore, only light of a specific wavelength can be transmitted, and the transmitted light of that specific wavelength can form an image in the photodiode PD2. Figure 5A As shown, the case where light incident on a microlens ML1 or ML2 forms an image in a photodiode PD1 or PD2 can be referred to as a single photodiode (single PD). Multiple pixels PX1 and PX2 can be paired, and phase detection pixel pairs PHDa can be configured, such as in an image sensor (e.g., ...). Figure 1 (100) can use phase detection pixels to calculate parallax based on the phase difference between photodiodes PD1 and PD2 to determine the distance to the object and adjust the focal length.

[0084] Reference Figure 5B The phase detection pixel pair PHDb may include a microlens, an optical sensing device, and color filters. For example, pixel PXx may include two color filters CFa and CFb and two photodiodes PDa and PDb corresponding to color filters CFa and CFb, respectively. Similarly, pixel PXy may include two color filters CFc and CFd and two photodiodes PDc and PDd corresponding to color filters CFc and CFd, respectively.

[0085] according to Figure 5B In the illustrated embodiment, two color filters CFa and CFb, and two photodiodes PDa and PDb, can be positioned below a microlens MLx. For example, a first luminous flux LFx, which is part of the light incident on the center of the microlens MLx, can pass through the color filter CFa and form an image in the photodiode PDa. A second luminous flux LFy, which is another part of the light incident on the center of the microlens MLx, can pass through the color filter CFb and form an image in the photodiode PDb. A similar phenomenon to that of pixel PXx can occur in pixel PXy. Figure 5B As shown, the situation where light incident on a microlens MLx or MLy forms an image in two photodiodes PDa and PDb (or PDc and PDd) can be called a dual photodiode.

[0086] Reference Figure 5CA phase detection pixel pair (PHDc) may include a microlens, an optical sensing device, and a metal shield. For example, a pixel PXz may include a color filter CFz, a metal shield MSz, and a photodiode PDz, and similarly, a pixel PXw may include a color filter CFw, a metal shield MSw, and a photodiode PDw. The metal shield may include metal as a component and may block the travel or propagation of light.

[0087] according to Figure 5C In the illustrated embodiment, a third luminous flux LFz, which is part of the light incident on the center of the microlens MLz, can pass through the color filter CFz and form an image in the portion of the photodiode PDz corresponding to the color filter CFz. The path of the other part of the light incident on the center of the microlens MLz can be blocked by the metal shield MSz, and therefore, no image is formed in the portion of the photodiode PDz corresponding to the metal shield MSz. Similarly, a fourth luminous flux LFw, which is part of the light incident on the center of the microlens MLw, can pass through the color filter CFw and form an image in the portion of the photodiode PDw corresponding to the color filter CFw. The path of the other part of the light incident on the center of the microlens MLw can be blocked by the metal shield MSw, and therefore, no image is formed in the portion of the photodiode PDw corresponding to the metal shield MSw. In this embodiment, for ease of description, an example is described where a color filter (e.g., CFz) and a metal shield (e.g., MSz) are included in a single pixel (e.g., PXz). However, based on the characteristics of the metal shield used to block the travel of light, the metal shield can be positioned on or below the color filter, and the width of the microlens (e.g., MLz) can be sufficient to accommodate the metal shield. Figure 5C As shown, the situation where a portion of the light incident on a microlens MLz or MLw is blocked by a metal shield can be called a metal shielded photodiode (PD).

[0088] Reference Figure 5C Because a portion of the light is blocked by the metal shield, the first luminous flux (e.g., relative to the same object) is lower. Figure 5B The LFx and the third luminous flux LFz can be similar, and the disparity of the phase detection pixel pair PHDb or PHDc corresponding to the object can be similar.

[0089] Figures 6A to 6C According to the embodiments Figure 5B A plan view of a dual photodiode. Figure 6D According to the embodiments along Figure 6A A cross-sectional view taken from line A-A'.

[0090] Reference Figure 6A Pixel PXx may include a microlens MLx and two sub-pixels (e.g., a first sub-pixel SPXa and a second sub-pixel SPXb). The first sub-pixel SPXa and the second sub-pixel SPXb may be arranged parallel to each other in the column direction (e.g., the Y-axis direction (second direction)). For example, the first sub-pixel SPXa may be located in the left region of pixel PXx, and the second sub-pixel SPXb may be located in the right region of pixel PXx. The first sub-pixel SPXa and the second sub-pixel SPXb may each include a first photodiode PDa and a second photodiode PDb.

[0091] According to an embodiment, the sensing signal can be generated by each of the first photodiode PDa and the second photodiode PDb. For example, the first sub-pixel SPXa can output a first image signal, and the second sub-pixel SPXb can output a second image signal. A parallax calculated based on the phase difference can be calculated based on the first and second image signals, and therefore, the horizontal direction of focus can be adjusted.

[0092] Reference Figure 6B Pixel PXy may include a microlens MLy and two sub-pixels (e.g., a third sub-pixel SPXc and a fourth sub-pixel SPXd). The third sub-pixel SPXc and the fourth sub-pixel SPXd may be arranged parallel to each other in the row direction (e.g., the X-axis direction (first direction)). For example, the third sub-pixel SPXc may be located in the upper region of pixel PXy, and the fourth sub-pixel SPXd may be located in the lower region of pixel PXy. The third sub-pixel SPXc and the fourth sub-pixel SPXd may each include a third photodiode PDc and a fourth photodiode PDd. The third sub-pixel SPXc may output a third image signal, and the fourth sub-pixel SPXd may output a fourth image signal. A parallax based on the phase difference can be calculated based on the third and fourth image signals, and therefore, the vertical direction of focusing can be adjusted.

[0093] Reference Figure 6CPixel PXxy may include a microlens MLxy and four sub-pixels (e.g., a fifth sub-pixel SPXac, a sixth sub-pixel SPXbc, a seventh sub-pixel SPXad, and an eighth sub-pixel SPXbd). The fifth sub-pixel SPXac may be located at the upper left of pixel PXxy, the sixth sub-pixel SPXbc at the upper right, the seventh sub-pixel SPXad at the lower left, and the eighth sub-pixel SPXbd at the lower right. In other words, the fifth and sixth sub-pixels SPXac and SPXbc may be located in the row direction (e.g., the X-axis direction (first direction)), the seventh and eighth sub-pixels SPXad and SPXbd may be located in the row direction, the fifth and seventh sub-pixels SPXac and SPXad may be located in the column direction (e.g., the Y-axis direction (second direction)), and the sixth and eighth sub-pixels SPXbc and SPXbd may be located in the column direction.

[0094] The fifth sub-pixel SPXac, the sixth sub-pixel SPXbc, the seventh sub-pixel SPXad, and the eighth sub-pixel SPXbd can each include a photoelectric conversion device, and for example, can include a fifth photodiode PDac, a sixth photodiode PDbc, a seventh photodiode PDad, and an eighth photodiode PDbd, respectively. Figure 6C and Figure 6A and Figure 6B In comparison, Figure 6C In this configuration, four photodiodes PDac, PDbc, PDad, and PDbd can be arranged vertically and horizontally below a microlens MLxy, and therefore, all vertical and horizontal parallaxes can be calculated. This structure, where four photodiodes PDac, PDbc, PDad, and PDbd are arranged vertically and horizontally below a microlens MLxy, can be called a four-cell unit.

[0095] Reference Figure 6D Pixel PXx may include a first layer L1 and a second layer L2 stacked in the Z-axis direction (e.g., the third direction). The first layer L1 may be referred to as a photoelectric conversion layer and may include a color filter CF and a microlens MLx formed on a substrate SUB, as well as two photoelectric conversion devices (e.g., a first photodiode PDa and a second photodiode PDb) formed in the substrate SUB. For example, the first photodiode PDa and the second photodiode PDb may be embedded within the substrate SUB. In an embodiment, the first photodiode PDa and the second photodiode PDb may be completely embedded within the substrate SUB (e.g., completely surrounded by the substrate SUB). The second layer L2 may be referred to as a wiring layer, and multiple wirings WS may be formed in the second layer L2.

[0096] For example, the substrate SUB may include a silicon wafer, a silicon-on-insulator (SOI) substrate, or a semiconductor epitaxial layer. The substrate SUB may include a first surface Sf and a second surface Sb configured to be opposite each other. For example, the first surface Sf may be the front surface of the substrate SUB, and the second surface Sb may be the rear surface of the substrate SUB. Light can be incident on the second surface Sb.

[0097] Multiple pixel spacer layers SEP1 and SEP2 (e.g., deep trench isolation regions or P-type ion implantation regions) extending from the second surface Sb of the substrate SUB toward the first surface Sf of the substrate SUB can be formed on the substrate SUB. Pixel spacer layer SEP1 can be referred to as first pixel spacer layer SEP1, and pixel spacer layer SEP2 can be referred to as second pixel spacer layer SEP2. The multiple first pixel spacer layers SEP1, which are relatively longer in the Z-direction, can divide the pixel region APX forming pixel PXx. That is, the first pixel spacer layer SEP1 is longer than the second pixel spacer layer SEP2 in the Z-direction relative to each other. Furthermore, the pixel region APX can be divided by the second pixel spacer layer SEP2, which is relatively shorter than the first pixel spacer layer SEP1, into a first region A1 and a second region A2, respectively forming the first sub-pixel SPXa and the second sub-pixel SPXb. In an embodiment, each of the first region A1 and the second region A2 can be doped with a first conductivity type (e.g., P-type) impurity. The first photodiode PDa and the second photodiode PDb can be formed in the first region A1 and the second region A2, respectively. For example, multiple well regions doped with a second conductivity type (e.g., N-type) impurities can be formed as the first photodiode PDa and the second photodiode PDb.

[0098] As shown, the first photodiode PDa and the second photodiode PDb can be positioned relative to the optical axis MLXA of the microlens MLx in a first direction (e.g., the X direction) or a second direction (e.g., the Y direction).

[0099] A floating diffusion node FD can be formed between a first photodiode PDa and a second photodiode PDb. In an embodiment, multiple transistors can be formed between each of the first photodiode PDa and the second photodiode PDb and a first surface Sf of the substrate SUB. Signals can be transferred to and received from the transistors via multiple wirings WS of the wiring layer L2. This will be referred to... Figure 11 , Figure 12A and Figure 12B To provide a more detailed description.

[0100] Figure 7A It is a diagram illustrating the phase detection pixels that are not uniformly arranged in each color pixel according to a comparative example. Figure 7B and Figure 7C This is a diagram illustrating phase detection pixels uniformly arranged in each color pixel according to an embodiment.

[0101] Reference Figure 7A The pixel group PG may include four color channels, such as a first green pixel, a second green pixel, a red pixel, and a blue pixel. According to an embodiment, a phase-detection pixel pair for calculating vertical parallax may be disposed in the first green pixel Gr of the pixel group PG. For example, the phase-detection pixel P may be disposed at each of the positions where the sixth green sub-pixel Gr6 and the ninth green sub-pixel Gr9 of the nine green sub-pixels configuring the first green pixel Gr are to be disposed.

[0102] In this paper, a pixel including a green sub-pixel represented by Grx can be called a first green Gr, a pixel including a red sub-pixel represented by Rx can be called a red pixel, a pixel including a blue sub-pixel represented by Bx can be called a blue pixel, and a pixel including a green sub-pixel represented by Gbx can be called a second green pixel Gb, where x is a natural number.

[0103] Crosstalk can be caused by other sub-pixels directly adjacent to the phase detection pixel P. For example, the phase detection pixel P located at the position of the sixth green sub-pixel Gr6 in the phase detection pixel pair can be directly adjacent to other sub-pixels Gr3, Gr5, and R4, and the phase detection pixel P located at the position of the ninth green sub-pixel Gr9 in the phase detection pixel pair can be directly adjacent to other sub-pixels Gr8, B3, and R7. Therefore, photons accumulated in the sub-pixels directly adjacent to the phase detection pixel P, or unwanted signals based on the sensing signals generated by photons, can be input to the phase detection pixel P and can be used as noise that adversely affects the phase detection function.

[0104] Four color channels can be set in pixel group PG, but when the phase detection pixel is only set in the first green pixel Gr, the crosstalk occurring in each color channel can be different. For example, refer to Figure 7A The three sub-pixels Gr3, Gr5, and Gr8 that cause crosstalk can be set in the first green pixel Gr; the two sub-pixels R4 and R7 that cause crosstalk can be set in the red pixel R; and the one sub-pixel B3 that causes crosstalk can be set in the blue pixel B. The adverse effects of the sub-pixels causing crosstalk can be very small, or they can be basically not set in the second green pixel Gb. Figure 7A For ease of description, vertical phase detection pixel pairs are shown, but considering the symmetry of pixel group PG, it is understandable that horizontal phase detection pixel pairs may cause the same phenomenon.

[0105] Reference Figure 7B Phase detection pixels P can be uniformly distributed for each color channel in pixel group PG. According to an embodiment, each of the first green pixel Gr, red pixel R, blue pixel B, and second green pixel Gb may include one phase detection pixel P. The same number of phase detection pixels P can be set at specific locations in each color channel, and the amount of crosstalk caused by adjacent pixels can be constant.

[0106] According to an embodiment, the phase detection pixel P included in one color channel can be set based on the position of the phase detection pixel P included in another color channel directly adjacent to one color channel. For example, the phase detection pixel P included in the first green pixel Gr can be set at the lower right end of the first green pixel Gr based on the position (lower left end) of the phase detection pixel P of the red pixel R directly adjacent to the right. In an embodiment, the phase detection pixel P included in the first green pixel Gr can be set at the bottom end of the first green pixel Gr based on the position of the phase detection pixel P of the blue pixel B located partially adjacent to the first green pixel Gr. This will be referred to below. Figure 8A To provide a more detailed description.

[0107] According to an embodiment, phase detection pixel pairs can be configured based on a vertical or horizontal combination of phase detection pixels P set for each color channel. For example, a phase detection pixel pair for adjusting horizontal focus can be configured based on a combination of a phase detection pixel P located at the lower right end of the first green pixel Gr and a phase detection pixel P located at the lower left end of the red pixel. In an embodiment, a vertical phase detection pixel pair can be configured including the phase detection pixel P in the first green pixel Gr and the phase detection pixel P of the blue pixel B directly adjacent to the first green pixel Gr, and thus the horizontal focus can be adjusted. This will be referred to below. Figure 8A To provide a more detailed description.

[0108] In the embodiments, for ease of description, two phase detection pixels P configured as vertical or horizontal phase detection pixel pairs are shown to be adjacent to each other; however, the inventive concept is not limited thereto. For example, according to an embodiment, two phase detection pixels P configured as vertical or horizontal phase detection pixel pairs are spaced apart from each other, and one or more sub-pixels are disposed between them.

[0109] According to an embodiment, a specific number of phase detection pixels P can be disposed at predetermined specific positions in each color pixel, and therefore, the amount of crosstalk occurring in each color channel can be constant compared to the case where the phase detection pixels P are not uniformly disposed in the color pixels. For example, the three sub-pixels Gr6, Gr8, and B3 that cause crosstalk can be directly adjacent to the phase detection pixel P disposed at the lower right end of the first green pixel Gr, and the three sub-pixels R4, R8, and Gb1 that cause crosstalk can be directly adjacent to the phase detection pixel P disposed at the lower left end of the red pixel R. Figure 7B In the diagram, two sub-pixels B4 and B8 causing crosstalk are shown to be directly adjacent to the phase detection pixel P located at the lower left end of the blue pixel B in a pixel group PG. However, referring to... Figure 7B as well as Figure 7C Sub-pixel Gr1, which is directly adjacent to the lower side of the blue pixel B and located at the upper left end of the first green pixel Gr in another pixel group, may cause crosstalk in the phase detection pixel P of the blue pixel. Similarly, two sub-pixels Gb6 and Gb8, which are shown to cause crosstalk, are directly adjacent to the phase detection pixel P located at the lower right end of the second green pixel Gb in a pixel group PG, but refer to... Figure 7C The sub-pixel R3, located at the upper right end of the red pixel R in another pixel group, can cause crosstalk in the phase detection pixel P of the second green pixel Gb.

[0110] Reference Figure 7C as well as Figure 7B The phase detection pixel P located at the lower left end of the blue pixel and the phase detection pixel P located at the lower right end of the second green pixel Gb included in another pixel group can be paired, and the phase detection pixel pair with adjustable horizontal focus can be configured.

[0111] The phase detection pixel P, which is set at a specific predetermined position in each color channel, can be set at the same position in another pixel group PG. For example, the phase detection pixel P set at the lower right end of the first green pixel Gr can be equivalently set at the lower right end of the first green pixel Gr in another pixel group PG. Similarly, the phase detection pixel P set at the lower left end of the red pixel R can be equivalently set at the lower left end of the red pixel R in another pixel group PG.

[0112] Refer again Figure 7BThe three sub-pixels Gr6, Gr8, and Gr1 that cause crosstalk can be located in the first green pixel Gr; the three sub-pixels R4, R8, and R3 that cause crosstalk can be located in the red pixel R; the three sub-pixels B4, B8, and B3 that cause crosstalk can be located in the blue pixel B; and the three sub-pixels Gb6, Gb8, and Gb1 that cause crosstalk can be located in the second green pixel Gb. According to an embodiment, a specific number of phase detection pixels P can be located at specific positions in each color pixel, and therefore, the amount of crosstalk can be substantially the same, and specific crosstalk can be effectively removed without performing separate correction processing. Therefore, according to embodiments of the present invention, separate hardware or a combination of hardware and software implemented digital logic for correction can be omitted. Furthermore, according to an embodiment, because the phase detection pixels P are uniformly located at specific positions in each color channel, the number of phase detection pixels P included in the color channels can be reduced or minimized, and the SNR of the sensed signal can be increased.

[0113] Figures 8A to 8F This is a diagram illustrating various embodiments of a uniformly arranged phase detection pixel P.

[0114] exist Figures 8A to 8F In the description, a color pixel will be defined as a nine-cell unit comprising multiple sub-pixels arranged in a 3×3 matrix. For ease of explanation, the description... Figures 8A to 8F When repeating the same description, omit it.

[0115] Reference Figure 8A Phase detection pixels P included in a pixel group can be set to one in each color channel, and phase detection pixels P included in color channels that are vertically adjacent to each other can be configured as vertical phase detection pixel pairs. For example, phase detection pixels P included in the first green pixel Gr and phase detection pixels P of the blue pixel B that are partially adjacent to the first green pixel Gr directly below it can be configured as vertical phase detection pixel pairs (e.g., Figure 2 (PHD). Similarly, a phase detection pixel P included in the red pixel R and a phase detection pixel P included in a second green pixel Gb in another pixel group directly adjacent to the red pixel R on its upper side can be configured as a vertical phase detection pixel pair. The vertical phase detection pixel pair can provide vertical parallax of the object, image sensor (e.g., Figure 1 (100) can adjust the vertical focus of the object based on the result obtained by calculating the parallax.

[0116] Reference Figure 8B The phase detection pixel P can be positioned in the middle of the color channel rather than at the corner (e.g., Figure 7A , Figure 7B and Figure 8AFor example, the phase detection pixel P included in the first green pixel Gr and the phase detection pixel P of the red pixel R directly adjacent to the right side of the first green pixel Gr can be configured as a horizontal phase detection pixel pair (e.g., Figure 2 (PHD). Similarly, the phase detection pixel P included in the blue pixel B and the phase detection pixel P included in the second green pixel Gb, which is directly adjacent to the blue pixel B on the left, can be configured as a horizontal phase detection pixel pair. Therefore, the vertical focus of the object can be adjusted.

[0117] Reference Figure 8C as well as Figure 5C The phase detection pixel P may include a metal shield (e.g., Figure 5C The metal shielding element MSz or MSw, as described above, may include a metallic component and may block the travel or propagation of light. The metal shielding element MSz or MSw may block incident light onto the microlens (e.g., Figure 5C The path of a portion of the light at the center of the MLz or MLw is blocked to prevent the photodiode (e.g., at the corresponding blocked position) from being blocked. Figure 5C An image is formed in PDz or PDw.

[0118] According to embodiments, the phase detection pixel P included in the first green pixel Gr and the phase detection pixel P included in the blue pixel B can be configured as a vertical phase detection pixel pair; the phase detection pixel P included in the red pixel R and the phase detection pixel P included in another pixel group directly adjacent to the bottom of the red pixel in the second green pixel Gb can be configured as a vertical phase detection pixel pair; the phase detection pixel P included in the second green pixel Gb and the phase detection pixel P included in another pixel group directly adjacent to the top of the second green pixel Gb can be configured as a vertical phase detection pixel pair. The phase detection pixel P located at the top of the two phase detection pixels P configured as a vertical phase detection pixel pair may include a color filter located at the top (e.g., ...). Figure 5C CFz) and the metal shield located at the bottom (e.g., Figure 5C The two phase detection pixels P, one of which is located at the bottom, may include a color filter located at the bottom (e.g., MSz). Figure 5C CFw) and metal shielding located at the top (e.g., Figure 5C The MSw of the system can be used to detect vertical parallax.

[0119] Reference Figure 8DIncluding metal shielding (e.g., Figure 5C A phase detection pixel P of MSz or MSw can be paired with another phase detection pixel P to configure a horizontal phase detection pixel pair. Figure 8D The metal shielding-photodiode type phase detection pixel P shown can be compared with the above reference. Figure 8B The arrangement of the phase detection pixels P described is similar and can correspond to the application of the above reference. Figure 8C The embodiments of the described metal shielding MSz or MSw are shown. Therefore, for ease of explanation, repeated descriptions are omitted. The phase detection pixel P on the left of the two phase detection pixels P in a horizontal phase detection pixel pair may include a color filter located on the left (e.g., Figure 5C CFz) and the metal shield located on the right (e.g., Figure 5C The phase detection pixel P on the right side of the two phase detection pixels P can include a color filter located on the right side (e.g., MSz). Figure 5C CFw) and the metal shield located on the left (e.g., Figure 5C The MSw) can be used to detect horizontal parallax.

[0120] Reference Figure 8E All phase-detection pixels P in each color channel can be adjacent to each other. For example, the first green pixel Gr may include a phase-detection pixel P located at the lower right, the red pixel R may include a phase-detection pixel P located at the lower left, the blue pixel B may include a phase-detection pixel P located at the upper right, and the second green pixel Gb may include a phase-detection pixel P located at the upper left. Therefore, all phase-detection pixels P in a pixel group can be adjacent to each other. Four adjacent phase-detection pixels P can calculate the total horizontal and vertical parallax, which is crucial for image sensors (e.g., [image sensor name]). Figure 1 The 100) setting can adjust the horizontal and vertical focus of the object.

[0121] Reference Figure 8F The phase detection pixel P included in a pixel group can be set to one or more in each color channel. For example, each of the first green pixel Gr, red pixel R, blue pixel B, and second green pixel Gb can include two phase detection pixels P. Figure 8F In the arrangement of the phase detection pixels P shown, with Figure 8E The arrangement of the phase detection pixels P shown is different, and a pattern in which two more phase detection pixels P are arranged in the horizontal direction can be provided, but the concept of the present invention is not limited thereto.

[0122] According to an embodiment, the position of a phase detection pixel P included in one color filter can be symmetrical to that included in another color filter. For example, refer to Figure 8A The phase detection pixel P included in the second green pixel Gb can be symmetrical with respect to the horizontal line intersecting the pixel group PG and the phase detection pixel P included in the red pixel R, and the phase detection pixel P included in the first green pixel Gr can be symmetrical with respect to the horizontal line intersecting the pixel group and the phase detection pixel P included in the blue pixel (e.g., X-axis symmetry). Furthermore, the phase detection pixel P included in the first green pixel Gr and the phase detection pixel P included in the second green pixel Gb can be located at the same position. For example, refer to... Figure 8E The phase detection pixel P included in the first green pixel Gr can be completely symmetrical with respect to the horizontal and vertical lines intersecting the respective pixel groups, as well as the phase detection pixel P included in the red pixel R, the phase detection pixel P included in the blue pixel, and the phase detection pixel P included in the second green pixel Gb. Furthermore, besides... Figures 8A to 8F In addition to the embodiments shown, the inventive concept can be implemented by using various geometrically symmetric structures with a constant amount of crosstalk in each color channel.

[0123] Figures 8A to 8D The vertical or horizontal phase detection pixel pairs shown can be referred to as 1×2 or 2×1 array microlenses. Figure 8E The vertical or horizontal phase detection pixel pairs shown can be referred to as 2×2 array microlenses. Figure 8F The vertical or horizontal phase detection pixel pairs shown can be referred to as 2×4 matrix microlenses.

[0124] Figures 9A to 9F This is a diagram illustrating various embodiments of a uniformly arranged phase detection pixel P.

[0125] exist Figures 9A to 9F The description of a color pixel will consist of sixteen cells comprising multiple sub-pixels arranged in a 4×4 matrix. For ease of explanation, the description... Figures 9A to 9F When repeating the same description, omit it.

[0126] Reference Figure 9AA phase detection pixel P included in a pixel group can be set to one in each color channel, and phase detection pixels P included in color channels that are horizontally adjacent to each other can be configured as horizontal phase detection pixel pairs. For example, a phase detection pixel P included in the first green pixel Gr and a phase detection pixel P included in the red pixel R can be configured as a horizontal phase detection pixel pair; a phase detection pixel P included in the blue pixel B and a phase detection pixel P included in the second green pixel Gb in another pixel group directly adjacent to the left of the blue pixel B can be configured as a horizontal phase detection pixel pair; a phase detection pixel P included in the second green pixel Gb and a phase detection pixel P included in the blue pixel B in another pixel group directly adjacent to the right of the second green pixel Gb can be configured as a horizontal phase detection pixel pair.

[0127] Reference Figure 9B Phase detection pixels P included in color channels that are vertically adjacent to each other can be configured as vertical phase detection pixel pairs. For example, a phase detection pixel P included in a first green pixel Gr and a phase detection pixel P partially adjacent to a blue pixel B located directly below the first green pixel Gr can be configured as a vertical phase detection pixel pair. Similarly, a phase detection pixel P included in a red pixel R and a phase detection pixel P included in a second green pixel Gb in another pixel group directly adjacent to the top of the red pixel R can be configured as a vertical phase detection pixel pair, and a phase detection pixel P included in the second green pixel Gb and a phase detection pixel P included in a red pixel R in another pixel group directly adjacent to the bottom of the second green pixel Gb can also be configured as a vertical phase detection pixel pair.

[0128] Reference Figure 9C as well as Figure 5C and Figure 8D The phase detection pixel P may include a metal shield (e.g., Figure 5C (MSz or MSw). According to an embodiment, the phase detection pixel P included in the first green pixel Gr and the phase detection pixel P included in the red pixel R can be configured as a horizontal phase detection pixel pair; the phase detection pixel P included in the blue pixel B and the phase detection pixel P included in another pixel group directly adjacent to the left side of the blue pixel B can be configured as a horizontal phase detection pixel pair; the phase detection pixel P included in the second green pixel Gb and the phase detection pixel P included in another pixel group directly adjacent to the right side of the second green pixel Gb can be configured as a horizontal phase detection pixel pair.

[0129] Reference Figure 9D Phase detection pixels P can be set to two or more in each color channel. According to an embodiment, phase detection pixels P can be located at the center of the color channel rather than at the corner of the color channel (e.g., Figure 7A , Figure 7B and Figure 9A ) and sides (e.g., Figure 8B For example, two or more phase detection pixels P included in the first green pixel Gr can be set inward from the edge (or corner) of the first green pixel Gr, and can be set vertically, thereby configuring a vertical phase detection pixel pair.

[0130] According to an embodiment, each color channel of the pixel group can have the same arrangement pattern as the arrangement pattern of the phase-detection pixel pairs disposed in a color channel. For example, each of the red pixel R, the blue pixel B, and the second green pixel Gb can include two or more phase-detection pixels P, and can have the same arrangement pattern as the two or more phase-detection pixels P disposed in the first green pixel Gr. The phase-detection pixels P can be uniformly arranged in each color channel, and therefore, the amount of crosstalk caused by adjacent pixels can be constant, and constant crosstalk can be effectively removed in each color channel.

[0131] Reference Figure 9E Each color channel may include two or more phase detection pixels P, and the phase detection pixels P of two different color channels may be arranged adjacent to each other. For example, a first green pixel Gr may include two consecutively arranged phase detection pixels P that are vertically adjacent to each other at its lower right end, and a red pixel R may include two consecutively arranged phase detection pixels P that are vertically adjacent to each other at its lower left end. The four adjacent phase detection pixels P included in the first green pixel Gr and the red pixel R can be configured as vertical and horizontal phase detection pixels. Similarly, a blue pixel B may include two consecutively arranged phase detection pixels P that are vertically adjacent to each other at its lower left end, and a second green pixel Gb may include two consecutively arranged phase detection pixels P that are vertically adjacent to each other at its lower right end. Therefore, the four adjacent phase detection pixels P can be configured as vertical and horizontal phase detection pixels.

[0132] Reference Figure 9FEach color channel can include two or more phase detection pixels P, and all phase detection pixels P of four different color channels can be arranged directly adjacent to each other. For example, the first green pixel Gr can include phase detection pixels P located at its upper left and lower right ends, the red pixel R can include phase detection pixels P located at its lower left and upper right ends, the blue pixel B can include phase detection pixels P located at its upper right and lower left ends, and the second green pixel Gb can include phase detection pixels P located at its upper left and lower right ends. Therefore, all phase detection pixels P included in a pixel group can be directly adjacent to each other.

[0133] Figure 10 This is a diagram illustrating the different data outputs under each mode according to the embodiment.

[0134] exist Figure 10 In this paper, four units, described as a set of four sub-pixels arranged in a 2×2 matrix, will be used as examples of the inventive concept. As described above, embodiments of the inventive concept can be applied to nine-cell units, sixteen-cell units, or sub-pixels arranged in an M×N matrix.

[0135] Reference Figure 10 Pixel arrays 110a or 110b can output different data based on a pattern. Image sensors (e.g., Figure 1 The image sensor 100 may include a mode of the subject being captured, and may include, for example, a first mode MD1 or a second mode MD2. Furthermore, the image sensor 100 may also include various modes based on, for example, the imaging environment, imaging settings, or imaging scene. According to an embodiment, the mode signal MD may be provided to control logic (e.g., Figure 1 (130) The control logic 130 can control the image sensor 100 to sense objects in either the first mode MD1 or the second mode MD2.

[0136] According to the embodiments, the first mode MD1 can use a high-resolution image, or can ensure sufficient light due to the high brightness of the imaging environment, or can be an imaging mode corresponding to a scene using precise image processing (e.g., image capture, etc.). The second mode MD2 may not use a high-resolution image, or may not ensure sufficient light due to the low brightness of the imaging environment, or can be an imaging mode corresponding to a scene using fast image processing (e.g., preview image, etc.).

[0137] According to an embodiment, pixel array 110a can generate a sensing signal or sensing data corresponding to each of the plurality of sub-pixels included in the color pixel based on a first mode MD1. For example, pixel array 110a may include a first green pixel Gr and a second green pixel Gb, a red pixel R, and a blue pixel B, and each color pixel may include four sub-pixels. The plurality of sub-pixels included in each color channel can generate sensing signals or sensing data as a result obtained by sensing an object. For example, each of the four sub-pixels Gr1 to Gr4 included in the first green pixel Gr can generate a sensing signal or sensing data with a corresponding data expression depth (e.g., resolution or data depth) as the maximum bandwidth, and the generated sensing signal or sensing data can be output to a readout circuit (e.g., Figure 1 (of 150).

[0138] According to an embodiment, pixel array 110b can sum the sensing signals or sensing data corresponding to each of the plurality of sub-pixels included in the color pixels based on the second mode MD2 and output the summation result. For example, pixel array 110b can sum the sensing signals or sensing data generated by the four sub-pixels Gr1 to Gr4 included in the first green pixel Gr, and can output the summed sensing signals or summed sensing data to a readout circuit (e.g., Figure 1 (150). For example, the sum of the sensing signals or sensing data of the first green pixel Gr can correspond to the sum of the sensing signals or sensing data of the four sub-pixels Gr1 to Gr4 included in the first green pixel Gr, “Gr1'+Gr2'+Gr3'+Gr4'” (Gr'=Gr1'+Gr2'+Gr3'+Gr4'). Similarly, the sum of the sensing signals or sensing data of the second green pixel Gb can correspond to the sum of the sensing signals or sensing data of the four sub-pixels Gb1 to Gb4 included in the second green pixel Gb, "Gb1'+Gb2'+Gb3'+Gb4'", the sum of the sensing signals or sensing data of the red pixel R can correspond to the sum of the sensing signals or sensing data of the four sub-pixels R1 to R4 included in the red pixel R, "R1'+R2'+R3'+R4'", and the sum of the sensing signals or sensing data of the blue pixel B can correspond to the sum of the sensing signals or multiple sensing data of the four sub-pixels B1 to B4 included in the blue pixel B, "B1'+B2'+B3'+B4'".

[0139] According to an embodiment, pixel array 110a or 110b includes phase detection pixels (e.g., Figure 4In the case of P), the summation can be performed only on the sensing pixels other than the phase detection pixel P among the multiple sub-pixels included in the color channel. That is, the phase detection pixel P is not included in such a sum. The signal or data of the summed sensing pixels can include more information (e.g., resolution, contrast, sensitivity, etc.) than the signal or data of each of the multiple sub-pixels. That is, according to the second mode MD2, even when the amount of light cannot be sufficiently guaranteed, the brightness can be improved and the noise can be reduced compared to the sensing results of each of the individual sub-pixels, and therefore, the quality of the captured image can be improved.

[0140] Figure 11 This is an equivalent circuit diagram of pixel PX according to an embodiment.

[0141] Reference Figure 11 A pixel PX may include a photoelectric conversion device and multiple transistors. These transistors may include, for example, a transfer transistor TX, a reset transistor RX, a drive transistor DX, and a selection transistor SX.

[0142] Photoelectric conversion devices may include, for example, photodiodes (PDs). Photoelectric conversion devices may include at least one of phototransistors, photogates, pinned photodiodes (PPDs), and combinations thereof. A photodiode (PD) may include a PN junction diode and may generate a charge proportional to the amount of incident light (e.g., electrons as negative charges and holes as positive charges), and may generate photocharge based on the intensity of the incident light. A transfer transistor (TX) may be based on a row decoder (e.g., ...). Figure 1 The transfer control signal TG provided by (120) transfers photocharge to the floating diffusion node FD.

[0143] A floating diffusion node (FD) (or floating diffusion region) can be constructed using a capacitor C for storing photocharge. H To simulate photocharge. The driving transistor DX can amplify the photocharge based on the potential of the photocharge accumulated in the floating diffusion node FD, and the amplified photocharge can be transferred to the selection transistor SX.

[0144] The driving transistor DX can operate as a source follower. The driving transistor DX can receive a signal based on the charge amount (e.g., the potential of the floating diffusion node FD) through its gate terminal, and can buffer and output the received signal. The selection transistor SX can be turned on in response to a selection signal SEL applied to its gate terminal. The drain electrode of the selection transistor SX can be connected to the source electrode of the driving transistor DX. When the selection transistor SX is turned on in response to the selection signal SEL output from the row decoder 120, a pixel signal VOUT having a level corresponding to the voltage level of the floating diffusion node FD can be output to the column line CL connected to the pixel PX.

[0145] The reset transistor RX can reset the floating diffusion node FD based on the source voltage VDD according to the reset signal RS provided from the row decoder 120. The reset transistor RX can periodically reset the charge accumulated in the floating diffusion node FD. The source electrode of the reset transistor RX can be connected to the floating diffusion node FD, and the drain electrode of the reset transistor RX can be connected to the source voltage VDD. When the reset transistor RX is turned on in response to the reset signal RS applied to its gate terminal, the source voltage VDD connected to the drain electrode of the reset transistor RX can be transferred to the floating diffusion node FD. When the reset transistor RX is turned on, the charge accumulated in the floating diffusion node FD can be released, and therefore, the floating diffusion node FD can be reset.

[0146] Figure 12A and Figure 12B This is a circuit diagram of pixel PX performing an addition operation on a sensed signal according to an embodiment. For ease of explanation, the description... Figure 12A and Figure 12B When repeating the same description, omit it. Figure 12A This shows the effect on two sub-pixels (e.g., Figure 6A An example of summing pixels PXa (SPXa and SPXb). Figure 12B An example of pixel PXb is shown, which is the sum of four sub-pixels (e.g., SPXac, SPXbc, SPXad, and SPXbd).

[0147] Reference Figure 12A Pixel PXa may include a first photodiode PD1a, a second photodiode PD2a, a first transfer transistor TX1a, a second transfer transistor TX2a, a reset transistor RXa, a drive transistor DXa, and a selection transistor SXa. The selection signal SELa can control the selection transistor SXa.

[0148] The floating diffusion node FDa can be shared by the first photodiode PD1a, the second photodiode PD2a, the first transfer transistor TX1a, and the second transfer transistor TX2a. The first photodiode PD1a and the first transfer transistor TX1a can be referred to as the first sub-pixel (e.g., Figure 6A SPXa), the second photodiode PD2a and the second transfer transistor TX2a can be referred to as the second sub-pixel (e.g., SPXa), Figure 6A SPXb).

[0149] Each of the first photodiode PD1a and the second photodiode PD2a can generate photocharge that varies based on light intensity. When the first transfer transistor TX1a is turned on in response to a first transfer control signal TG1a applied to its gate terminal, the charge generated by the first photodiode PD1a (e.g., photocharge) can be transferred to and stored in the floating diffusion node FDa. When the second transfer transistor TX2a is turned on in response to a second transfer control signal TG2a applied to its gate terminal, the charge generated by the second photodiode PD2a (e.g., photocharge) can be transferred to and stored in the floating diffusion node FDa. The charge stored in the floating diffusion node FDa can be output as the output voltage VOUTa.

[0150] The first transfer control signal TG1a and the second transfer control signal TG2a can be separate signals, and therefore, the on-time of the first transfer transistor TX1a and the on-time of the second transfer transistor TX2a can be independently controlled by each of the first transfer control signal TG1a and the second transfer control signal TG2a.

[0151] According to an embodiment, in the first mode MD1, a first transfer control signal TG1a and a second transfer control signal TG2a can be applied at different times, and the first transfer transistor TX1a and the second transfer transistor TX2a can be turned on at different times, so that the photocharge of each of the first transfer transistor TX1a and the second transfer transistor TX2a can be stored in the floating diffusion node FDa. After applying one of the first transfer control signal TG1a and the second transfer control signal TG2a, a reset signal RSa can be applied to reset the floating diffusion node FDa, and then the other of the first transfer control signal TG1a and the second transfer control signal TG2a can be applied.

[0152] According to the embodiment, in the second mode MD2, the first transfer control signal TG1a and the second transfer control signal TG2a can be applied substantially simultaneously, and the first transfer transistor TX1a and the second transfer transistor TX2a can be turned on substantially simultaneously. Therefore, the photocharge of each of the first transfer transistor TX1a and the second transfer transistor TX2a can be stored in the floating diffusion node FDa.

[0153] Reference Figure 12B Pixel PXb may include multiple photoelectric conversion devices (e.g., four photodiodes (e.g., first photodiode PD1b to fourth photodiode PD4b)), first transfer transistors TX1b to fourth transfer transistors TX4b, reset transistor RXb, drive transistor DXb, and select transistor SXb. The reset signal RSb controls the reset transistor RXb, and the select signal SELb controls the select transistor SXb.

[0154] Microlenses can be disposed on each of the first photodiode PD1b to the fourth photodiode PD4b. Therefore, the combination of a microlens and a photoelectric conversion device can be referred to as a pixel. Figure 12B The pixel PXb can correspond to a combination of four sub-pixels (e.g., Figure 6C (PXxy).

[0155] The floating diffusion node FDb can be shared by four photoelectric conversion devices (e.g., first photodiodes PD1b to fourth photodiodes PD4b) and four transfer transistors TX1b to TX4b. The transfer transistors TX1b to TX4b can connect the four photoelectric conversion devices (e.g., first photodiodes PD1b to fourth photodiodes PD4b) to the floating diffusion node FDb or disconnect the four photoelectric conversion devices (e.g., first photodiodes PD1b to fourth photodiodes PD4b) from the floating diffusion node FDb based on the voltage of the transfer control signals TG1b to TG4b, respectively.

[0156] Light incident on a photoelectric conversion device (e.g., first photodiodes PD1b to fourth photodiodes PD4b) can be accumulated as charge through photoelectric conversion. When the charge accumulated in the first photodiodes PD1b to fourth photodiodes PD4b is transferred to the floating diffusion node FDb, the charge can be output as the output voltage VOUTb via the driving transistor DXb and the selection transistor SXb. The output voltage VOUTb corresponding to the voltage change of the floating diffusion node FDb can be transferred to an external readout circuit (e.g., Figure 1 (of 150).

[0157] Figure 13This is a block diagram of an electronic device 1000 that includes a multi-camera module employing an image sensor according to an embodiment. Figure 14 According to the embodiments Figure 13 Detailed block diagram of the multi-camera module.

[0158] Reference Figure 13 The electronic device 1000 may include a camera module group 1100, an application processor 1200, a power management integrated circuit (PMIC) 1300, and an external memory 1400.

[0159] Camera module group 1100 may include multiple camera modules 1100a to 1100c. Although an embodiment providing three camera modules 1100a to 1100c is shown, the inventive concept is not limited thereto. For example, in some embodiments, camera module group 1100 may include only two camera modules, or camera module group 1100 may include n camera modules, where n is a natural number equal to 4 or greater.

[0160] In the following text, reference will be made to Figure 14 The detailed configuration of camera module 1100b is described in more detail below. According to the embodiment, the following description can be equally applied to other camera modules 1100a and 1100c.

[0161] Reference Figure 14 The camera module 1100b may include a prism 1105, an optical path folding element (OPFE) 1110, an actuator 1130, an image sensing device 1140, and a storage unit 1150.

[0162] The prism 1105 may include a reflective surface 1107 of light-reflecting material and may alter the path of light L incident from outside the image sensor.

[0163] In some embodiments, prism 1105 can change the path of light L incident in the first direction X to a second direction Y perpendicular to the first direction X. Furthermore, prism 1105 can rotate the reflective surface 1107 of the light-reflecting material relative to the central axis 1106 in direction A, or it can rotate the central axis 1106 in direction B to change the path of light L incident in the first direction X to the second direction Y. OPFE 1110 can move in a third direction Z perpendicular to the first direction X and the second direction Y.

[0164] In some embodiments, as shown, the maximum rotation angle of prism 1105 in the A direction may be less than or equal to about 15 degrees in the positive (+) A direction and may be greater than about 15 degrees in the negative (-) A direction, but the inventive concept is not limited thereto.

[0165] In some embodiments, the prism 1105 may move in the positive (+)B direction or the negative (-)B direction within a range of approximately 20 degrees, or from approximately 10 degrees to approximately 20 degrees, or from approximately 15 degrees to approximately 20 degrees and within a range of movement angles. The prism 1105 may move at the same angle in the positive (+)B direction or the negative (-)B direction, or may move at substantially similar angles within a range of approximately 1 degree.

[0166] In some embodiments, the prism 1105 can move the reflective surface 1107 of the light-reflecting material in a third direction (e.g., the Z direction) parallel to the extension direction of the central axis 1106.

[0167] For example, OPFE 1110 may include m groups (where m is a natural number), each group comprising multiple optical lenses. Furthermore, the m lenses can be moved in the second direction Y to change the optical zoom ratio of camera module 1100b. For example, if the basic optical zoom ratio of camera module 1100b is Z, when the m optical lenses included in OPFE 1110 are moved, the optical zoom ratio of camera module 1100b can be changed to 3Z, 5Z, or a greater optical zoom ratio.

[0168] Actuator 1130 can move OPFE 1110 or optical lens to a specific position. For example, actuator 1130 can adjust the position of optical lens so that image sensor 1142 is positioned at the focal length of optical lens for precise sensing.

[0169] The image sensing device 1140 may include an image sensor 1142, control logic 1144, and memory 1146. The image sensor 1142 can sense an image of a target using light L provided through an optical lens.

[0170] Control logic 1144 can control the overall operation of camera module 1100b. For example, control logic 1144 can control the operation of camera module 1100b based on control signals provided through control signal line CSLb.

[0171] Memory 1146 may store information for the operation of camera module 1100b (such as calibration data 1147 as an example). Calibration data 1147 may include information for generating image data from light L provided externally by an image sensor using camera module 1100b. Calibration data 1147 may include, for example, information about rotation angle, information about focal length, and information about the optical axis. In the case where camera module 1100b is implemented as a multi-state camera with focal length varying based on the position of the optical lens, calibration data 1147 may include position-based (or state-based) focal length of the optical lens and information associated with autofocus.

[0172] The storage unit 1150 can store image data sensed by the image sensor 1142. The storage unit 1150 can be disposed outside the image sensing device 1140 and can be implemented in a stacked form, where the sensor chip configured with the image sensing device 1140 and the storage unit 1150 are stacked. In some embodiments, the storage unit 1150 can be implemented using an electrically erasable programmable read-only memory (EEPROM), but the inventive concept is not limited thereto.

[0173] Still refer to Figure 13 and Figure 14 In some embodiments, each of the plurality of camera modules 1100a to 1100c may include an actuator 1130. Therefore, each of the plurality of camera modules 1100a to 1100c may include the same or different calibration data 1147 based on the operation of the included actuator 1130.

[0174] In some embodiments, one of the plurality of camera modules 1100a to 1100c (e.g., 1100b) may include a folded lens camera module having the prism 1105 and OPFE 1110 described above, while the other camera modules (e.g., 1100a and 1100c) may include vertical camera modules that do not include the prism 1105 and OPFE 1110. However, the inventive concept is not limited thereto.

[0175] In some embodiments, one of the multiple camera modules 1100a to 1100c (e.g., 1100c) may include a vertical depth camera that extracts depth information using, for example, infrared (IR). In this case, the application processor 1200 may merge image data provided from the depth camera with image data provided from another camera module (e.g., 1100a or 1100b) to generate a three-dimensional (3D) depth image.

[0176] In some embodiments, at least two camera modules (e.g., 1100a and 1100b) of the plurality of camera modules 1100a to 1100c may have different fields of view. In this case, for example, the optical lenses of at least two camera modules (e.g., 1100a and 1100b) of the plurality of camera modules 1100a to 1100c may be different. However, the inventive concept is not limited thereto.

[0177] Furthermore, in some embodiments, the fields of view of the multiple camera modules 1100a to 1100c may be different. In this case, the optical lenses included in the multiple camera modules 1100a to 1100c may be different. However, the inventive concept is not limited thereto.

[0178] In some embodiments, the plurality of camera modules 1100a to 1100c may be configured to be physically spaced apart from each other. That is, in some embodiments, the plurality of camera modules 1100a to 1100c do not share the sensing area of ​​a single image sensor 1142, but rather, an independent image sensor 1142 may be disposed in each of the plurality of camera modules 1100a to 1100c.

[0179] Refer again Figure 13 The application processor 1200 may include an image processing device 1210, a memory controller 1220, and internal memory 1230. The application processor 1200 may be implemented spaced apart from a plurality of camera modules 1100a to 1100c. For example, the application processor 1200 and the plurality of camera modules 1100a to 1100c may be implemented as separate semiconductor photographs.

[0180] The image processing apparatus 1210 may include a plurality of sub-image processors 1212a to 1212c, an image generator 1214, and a camera module controller 1216.

[0181] The image processing device 1210 may include a plurality of sub-image processors 1212a to 1212c corresponding to the number of camera modules 1100a to 1100c.

[0182] Image data generated by each of camera modules 1100a to 1100c can be provided to the corresponding sub-image processor in sub-image processors 1212a to 1212c via multiple image signal lines ISLa, ISLb, and ISLc spaced apart from each other. For example, image data generated by camera module 1100a can be provided to sub-image processor 1212a via image signal line ISLa, image data generated by camera module 1100b can be provided to sub-image processor 1212b via image signal line ISLb, and image data generated by camera module 1100c can be provided to sub-image processor 1212c via image signal line ISLc. Image data transfer can be performed using a Camera Serial Interface (CSI) based on, for example, a Mobile Industrial Processor Interface (MIPI), but the inventive concept is not limited thereto.

[0183] In some embodiments, a sub-image processor can be configured to correspond to multiple camera modules. For example, as shown, sub-image processors 1212a and 1212c can not be implemented separately, but can be integrated and implemented as a single sub-image processor. Image data provided from camera modules 1100a and 1100c can be selected by a selection device (e.g., a multiplexer), and the selected image data can be provided to the integrated sub-image processor.

[0184] Image data provided to each of the sub-image processors 1212a to 1212c can be provided to the image generator 1214. The image generator 1214 can generate an output image based on image generation information or a mode signal MD using the image data provided from the sub-image processors 1212a to 1212c.

[0185] For example, image generator 1214 can combine at least some of the multiple image data generated by camera modules 1100a to 1100c with different fields of view based on image generation information or mode signal MD to generate an output image. Furthermore, image generator 1214 can select one image data from the multiple image data generated by camera modules 1100a to 1100c with different fields of view based on image generation information or mode signal MD to generate an output image.

[0186] Refer again Figure 4 According to an embodiment, the image generator 1214 can sum (digitally sum) multiple image data generated by converting sensing signals output from multiple sub-pixels respectively. For example, Figure 4 The image generator 1214 is shown as a nine-cell unit as a set of nine sub-pixels. It can receive image data as a result of performing analog-to-digital conversion independently on the multiple sub-pixels included in each color channel, and can subsequently sum the multiple image data corresponding to some (e.g., eight) of the multiple sub-pixels.

[0187] In some embodiments, image generation information may include a zoom signal or zoom factor. Furthermore, in some embodiments, for example, the mode signal MD may be a signal based on a mode selected by the user.

[0188] When the image generation information is a zoom signal (zoom factor) and camera modules 1100a to 1100c have different fields of view, image generator 1214 can perform different operations based on the type of zoom signal. For example, when the zoom signal is a first signal, image data output from camera module 1100a can be merged with image data output from camera module 1100b, and then an output image can be generated by using the merged image signal and the image data not used for merging and output from camera module 1100b. For example, in an embodiment, when the zoom signal is a second signal different from the first signal, image generator 1214 does not perform image data merging and can select one image data from multiple image data output from camera modules 1100a to 1100c respectively to generate an output image. However, the inventive concept is not limited to this, and the image data processing method can be modified according to this situation.

[0189] In some embodiments, the image generator 1214 may receive multiple image data with different exposure times from at least one of a plurality of sub-image processors 1212a to 1212c, and may perform high dynamic range (HDR) processing on the multiple image data to generate merged image data with increased dynamic range.

[0190] The camera module controller 1216 can provide control signals to each of the camera modules 1100a to 1100c. The control signals generated by the camera module controller 1216 can be provided to the corresponding camera modules in the camera modules 1100a to 1100c through control signal lines CSLa, CSLb and CSLc spaced apart from each other.

[0191] One of the multiple camera modules 1100a to 1100c may be designated as the master camera (e.g., 1100b) based on the mode signal MD or image generation information including zoom signals, and the other camera modules (e.g., 1100a and 1100c) may be designated as slave cameras. Such information may be included in control signals and may be provided to the corresponding camera modules in camera modules 1100a to 1100c via control signal lines CSLa, CSLb, and CSLc.

[0192] The camera module operating as a master or slave camera can be changed based on the zoom factor or operating mode signal. For example, when the field of view of camera module 1100a is wider than that of camera module 1100b and the zoom factor indicates a low zoom ratio, camera module 1100b can operate as a slave camera, and camera module 1100a can operate as a master camera. Alternatively, when the zoom factor indicates a high zoom ratio, camera module 1100a can operate as a master camera, and camera module 1100b can operate as a slave camera.

[0193] In some embodiments, control signals provided from camera module controller 1216 to each of camera modules 1100a to 1100c may include a synchronization enable signal. For example, when camera module 1100b is the main camera and each of camera modules 1100a and 1100c is a slave camera, camera module controller 1216 may transfer the synchronization enable signal to camera module 1100b. Camera module 1100b, which is provided with the synchronization enable signal, may generate a synchronization signal based on the synchronization enable signal and may provide the generated synchronization signal to camera modules 1100a and 1100c via the synchronization signal line SSL. Camera modules 1100b, as well as camera modules 1100a and 1100c, may synchronize with the synchronization signal and may transfer image data to application processor 1200.

[0194] In some embodiments, control signals provided from camera module controller 1216 to camera modules 1100a to 1100c may include mode information based on mode signal MD. Based on the mode information, the plurality of camera modules 1100a to 1100c may operate in a first operating mode and a second operating mode associated with sensing speed.

[0195] In a first operating mode, multiple camera modules 1100a to 1100c can generate image signals at a first speed (e.g., generate image signals with a first frame rate), encode the image signals at a second speed higher than the first speed (e.g., encode image signals with a second frame rate higher than the first frame rate), and transfer the encoded image signals to the application processor 1200. In this case, the second speed can be approximately 30 times or less than the first speed.

[0196] Application processor 1200 can store received image signals (e.g., encoded image signals) in internal memory 1230 included in application processor 1200 or in external memory 1400 located outside application processor 1200, and can subsequently read the encoded image signals from internal memory 1230 or external memory 1400 and decode the encoded image signals, and can display image data generated based on the decoded image signals. For example, a corresponding sub-image processor among the plurality of sub-image processors 1212a to 1212c of image processing device 1210 can perform decoding and can perform image processing on the decoded image signals.

[0197] In the second operating mode, multiple camera modules 1100a to 1100c can generate image signals at a third speed lower than the first speed (e.g., generate image signals with a third frame rate lower than the first frame rate), and can transfer the generated image signals to the application processor 1200. The image signals provided to the application processor 1200 may be signals that have not been decoded. The application processor 1200 may perform image processing on the thus received image signals, or may store the image signals in internal memory 1230 or external memory 1400.

[0198] PMIC 1300 can supply power (e.g., source voltage) to each of the multiple camera modules 1100a to 1100c. For example, under the control of application processor 1200, PMIC 1300 can supply a first power to camera module 1100a via power signal line PSLa, a second power to camera module 1100b via power signal line PSLb, and a third power to camera module 1100c via power signal line PSLc.

[0199] In response to a power control signal PCON received from the application processor 1200, the PMIC 1300 can generate power corresponding to each of the plurality of camera modules 1100a to 1100c, and can adjust the level of power. The power control signal PCON may include a power adjustment signal based on the operating mode of each of the plurality of camera modules 1100a to 1100c. For example, the operating mode may include a low power mode, and in this case, the power control signal PCON may include information about a predetermined power level and the camera module operating in the low power mode. The levels of power supplied to the plurality of camera modules 1100a to 1100c may be the same or different. Furthermore, the power level may be dynamically changed.

[0200] Figure 15 This is a block diagram illustrating an electronic device 30 according to an embodiment.

[0201] Reference Figure 15 The electronic device 30 may include a processor 31, a memory 32, a storage device 33, an image sensor 34, an input / output (I / O) device 35, and a power supply 36. These components can communicate with each other via a bus. Applications are possible. Figure 10 Image sensor 100 as Figure 15 The image sensor 34 is described, and for ease of explanation, repeated descriptions are omitted.

[0202] Processor 31 can perform calculations or tasks for the operation of electronic device 30. Memory 32 and storage device 33 can store data for the operation of electronic device 30. For example, processor 31 may include a microprocessor, CPU, or application processor; memory 32 may include volatile or non-volatile memory; and storage device 33 may include a solid-state drive (SSD), hard disk drive (HHD), or CD-ROM.

[0203] I / O device 35 may include: input devices, such as a keypad, keyboard, or mouse; and output devices, such as a printer or monitor. Power supply 36 may supply operating voltage for the operation of electronic device 30.

[0204] Figure 16 This is a block diagram illustrating an electronic device 1a according to an embodiment.

[0205] Reference Figure 16 The electronic device 1a according to the embodiment may include an image sensor 10a, an image signal processor (ISP) 20a, an application processor (AP) 30a, a display device 50a, a working memory 40a, a storage device 60a, a user interface 70a, and a wireless transceiver 80a. Figure 1 Image sensor 100 can be used as Figure 16 The image sensor 10a is operated, and for ease of explanation, repeated descriptions are omitted.

[0206] Image sensor 10a can generate image data (e.g., raw image data) based on the received light signals, and can provide binary data to image signal processor 20a. For example, readout circuitry (e.g., Figure 1 (150) can be obtained from a pixel array (e.g., through multiple column lines CL) Figure 1 The received sensing signal (110) is converted into binary data. The image signal processor 20a can perform image processing to convert the image data IDAT, which is digital data of an image, for example, converting the image data IDAT of a Bayer pattern to YUV or RGB format, and can remove noise, adjust brightness, and adjust sharpness to improve image quality. In embodiments, the image signal processor 20a can perform, for example, white balance, noise reduction, de-mosaicing, lens shading, gamma correction, edge detection, edge enhancement, noise reduction processing, gain adjustment, waveform normalization processing, interpolation processing, edge emphasis processing, and pixel binning to remove distortion of the image data IDAT, and can perform preprocessing operations to improve algorithm performance. As the image signal processor 20a performs preprocessing, the post-processing speed of the image data IDAT can be improved. The image sensor 10a and the image signal processor 20a may be referred to as camera module 15a.

[0207] In embodiments, the image signal processor 20a may be disposed externally to the image sensor 10a to improve space efficiency, or it may be included within the image sensor 10a to improve processing speed. In these embodiments, for ease of description, the image signal processor 20a and the application processor 30a are described as being provided separately, but the inventive concept is not limited thereto. For example, according to embodiments, the image signal processor 20a may not be configured with separate hardware or a combination of hardware and software, and may be positioned as a lower element of the application processor 30a.

[0208] Application processor 30a can control the overall operation of electronic device 1a and can be configured as a system-on-a-chip (SoC) to drive applications and operating systems (OS). Application processor 30a can control the operation of image signal processor 20a and can provide the display device 50a with converted image data generated by image signal processor 20a, or can store the converted image data in storage device 60a.

[0209] The working memory 40a can store programs executed by the application processor 30a and / or data obtained through processing by the application processor 30a. The storage device 60a can be implemented as a non-volatile memory device, such as NAND flash memory or resistive memory. The storage device 60a can be configured as, for example, a memory card, such as a multimedia card (MMC), an embedded multimedia card (eMMC), a secure digital card (SD card), or a micro SD card.

[0210] Storage device 60a can store data and / or programs corresponding to the execution algorithms of image processing operations controlling image signal processor 20a. When image processing operations are executed, the data and / or programs can be downloaded to working memory 40a. For example, working memory 40a or storage device 60a can be non-volatile memory and can include, for example, read-only memory (ROM), flash memory, phase-change random access memory (RAM) (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), or ferroelectric RAM (FRAM), or working memory 40a or storage device 60a can be volatile memory and can include, for example, static RAM (SRAM) or dynamic RAM (DRAM). However, the inventive concept is not limited thereto.

[0211] User interface 70a can be implemented using various devices that receive user input (such as a keyboard, keypad, touchpad, fingerprint sensor, or microphone). User interface 70a can receive user input and provide signals corresponding to the received user input to application processor 30a. Wireless transceiver 80a may include modem 81a, transceiver 82a, and antenna 83a.

[0212] As the demand for high-quality images increases, the pixels of image sensors may become highly integrated. When the pixel size of each image sensor decreases and the pattern of the pixel array becomes non-uniform, crosstalk between pixels may increase. Referring to a comparative example, due to this crosstalk, a target pixel may be adversely affected by signals appearing in neighboring pixels; therefore, the spectral characteristics of the signal generated by the target pixel may change, leading to reduced color reproducibility. Image quality may deteriorate due to the occurrence of crosstalk. As described above, embodiments of the inventive concept eliminate or reduce this adverse effect of crosstalk.

[0213] As is customary in the field of this invention, embodiments are described and illustrated in the accompanying drawings in terms of functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits (such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wiring connections, etc.) formed using semiconductor-based or other manufacturing techniques. Where blocks, units, and / or modules are implemented by microprocessors or the like, they can be programmed using software (e.g., microcode) to perform the various functions discussed herein and may optionally be driven by firmware and / or software. Alternatively, each block, unit, and / or module may be implemented by dedicated hardware, or as a combination of dedicated hardware to perform some functions and processors (e.g., one or more programmed microprocessors and associated circuitry) to perform other functions.

[0214] Although the inventive concept has been specifically shown and described with reference to embodiments thereof, it will be understood that various changes in form and detail may be made herein without departing from the spirit and scope of the inventive concept as defined by the appended claims.

Claims

1. A pixel array comprising a plurality of pixel groups, each of the plurality of pixel groups comprising: Multiple color pixels, configured to sense light with different wavelengths. Each of the plurality of color pixels comprises a plurality of sub-pixels arranged in an M×N matrix, where M is a natural number equal to or greater than 2, and N is a natural number equal to or greater than 2. The plurality of sub-pixels includes phase detection pixels. Each of the plurality of color pixels includes the same number of phase detection pixels. The plurality of color pixels includes a first color pixel and a second color pixel that are adjacent in the first diagonal direction, and the first phase detection pixel included in the first color pixel is located in the same position as the second phase detection pixel included in the second color pixel.

2. The pixel array according to claim 1, wherein, Each of the phase detection pixels is positioned at a predetermined location in each of the plurality of color pixels.

3. The pixel array according to claim 1, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction, and The first phase detection pixel included in the first color pixel is directly adjacent to the third phase detection pixel included in the third color pixel.

4. The pixel array according to claim 3, wherein, The first phase detection pixel and the third phase detection pixel share a microlens.

5. The pixel array according to claim 1, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction, and the plurality of pixel groups include an adjacent first pixel group and a second pixel group, and The second phase detection pixel included in the second color pixel of the first pixel group is directly adjacent to the fourth phase detection pixel included in the fourth color pixel of the second pixel group.

6. The pixel array according to claim 1, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction, and The position of the first phase detection pixel included in the first color pixel in the first color pixel is symmetrical to the position of the third phase detection pixel included in the third color pixel in the third color pixel.

7. The pixel array according to claim 1, wherein, The amount of crosstalk that occurs in each phase-detection pixel due to directly adjacent sub-pixels is the same for each color pixel.

8. The pixel array according to claim 1, wherein, The plurality of colored pixels includes a first green pixel, a red pixel, a blue pixel, and a second green pixel.

9. The pixel array according to claim 1, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction. Each of the plurality of color pixels includes at least two phase detection pixels, the at least two phase detection pixels being arranged symmetrically among the color pixels. The first color pixel includes a first phase detection pixel and a fifth phase detection pixel. The second color pixel includes a second phase detection pixel and a sixth phase detection pixel. The third color pixel includes a third phase detection pixel and a seventh phase detection pixel. The fourth color pixel includes a fourth phase detection pixel and an eighth phase detection pixel. The first phase detection pixel, the sixth phase detection pixel, the third phase detection pixel, and the eighth phase detection pixel are directly adjacent to each other.

10. The pixel array according to claim 9, wherein, The first phase detection pixel, the sixth phase detection pixel, the third phase detection pixel, and the eighth phase detection pixel share a microlens.

11. The pixel array according to claim 1, wherein, Each of the phase detection pixels includes a metal shield.

12. An image sensor, comprising: A pixel array comprising a plurality of color pixels configured to sense light of different wavelengths, wherein each of the plurality of color pixels comprises a plurality of sub-pixels, the plurality of sub-pixels including a phase detection pixel; The readout circuit is configured to convert the sensing signals received from the pixel array through multiple column lines into binary data; A line decoder configured to generate a line selection signal for controlling the pixel array such that the sensing signal is output for each row via multiple line lines; and Control logic, configured to control the line decoder and the readout circuitry. The plurality of color pixels include a first color pixel and a second color pixel that are adjacent in the first diagonal direction, and the first phase detection pixel included in the first color pixel is located in the same position as the second phase detection pixel included in the second color pixel.

13. The image sensor according to claim 12, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction, and The first phase detection pixel is directly adjacent to the third phase detection pixel included in the third color pixel.

14. The image sensor according to claim 12, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction, and The position of the first phase detection pixel in the first color pixel is symmetrical to the position of the third phase detection pixel included in the third color pixel in the third color pixel.

15. The image sensor according to claim 12, wherein, Each of the plurality of color pixels includes a phase detection pixel.

16. An image sensor, comprising: A pixel array comprising a plurality of color pixels configured to sense light of different wavelengths, wherein each of the plurality of color pixels comprises a plurality of sub-pixels, the plurality of sub-pixels including a phase detection pixel disposed at a specific location; The readout circuit is configured to convert the sensing signals received from the pixel array through multiple column lines into binary data; A line decoder configured to generate a line selection signal that controls the pixel array to output the sensing signal for each line through multiple line lines; and Control logic configured to control the line decoder and the readout circuitry, and to change the method of outputting the sensing signal based on the mode signal. The plurality of color pixels include a first color pixel and a second color pixel that are adjacent in the first diagonal direction, and the first phase detection pixel included in the first color pixel is located in the same position as the second phase detection pixel included in the second color pixel.

17. The image sensor according to claim 16, wherein, The mode signal indicates a first mode or a second mode, and The pixel array is configured to output the sensing signal from each of the plurality of sub-pixels based on the first mode, and to sum the sensing results of the plurality of sub-pixels based on the second mode and output the sensing result.

18. The image sensor according to claim 16, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction, and The first phase detection pixel is directly adjacent to the third phase detection pixel included in the third color pixel.

19. The image sensor according to claim 16, wherein, The plurality of color pixels also includes a third color pixel and a fourth color pixel adjacent in the second diagonal direction, and The position of the first phase detection pixel in the first color pixel is symmetrical to the position of the third phase detection pixel in the third color pixel.

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