A method and system for detecting a faulty arc

By collecting the industrial frequency current signal and high frequency components, combining DFT analysis to calculate the characteristic quantity, and training the coupling coefficient, the problem of failure arcs in the prior art cannot be accurately distinguished when the load is running normally, and fault arc detection with high reliability and low false alarm rate is achieved.

CN114509647BActive Publication Date: 2025-07-22ACREL CO LTD +1
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Patent Information

Application Number
CN202111580743.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-22
Publication Date
2025-07-22
Estimated Expiration
2041-12-22

AI Technical Summary

Technical Problem

The existing fault arc detection methods cannot accurately identify fault arcs generated during normal operation of the load, resulting in missed or false alarms.

Method used

By collecting the industrial frequency current signal and high-frequency components, combining DFT analysis to calculate the characteristic quantity, training the coupling coefficient, realizing the coupling characteristics analysis of the industrial frequency signal and high-frequency components, and identifying the faulty arc.

Benefits of technology

Improve the reliability of fault arc detection, reduce the false alarm rate, and achieve accurate fault arc detection.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a method and system for detecting a faulty arc. The method includes the following steps: Step S1, collect the power frequency current signal and high-frequency component on the live wire, optimize the bandwidth and convert them into digital signals; Step S2, through DFT analysis and calculation, obtain the characteristic quantities of the zero-crossing point, effective value, peak value, fundamental wave, and harmonic wave, and form a characteristic vector for detecting the faulty arc; Step S3, combine the characteristic quantities obtained from the analysis of the high-frequency component and the power frequency current signal, connect a large number of loads for test training, and obtain the coupling coefficient between the power frequency current signal and the high-frequency component; Step S4, based on the coupling coefficient obtained in Step S3, combine the characteristic vector obtained in Step S2 to perform faulty arc analysis and identification on the current of each half-cycle, so as to achieve accurate detection of the faulty arc. Compared with the prior art, the present invention has the advantages of improving the reliability of faulty arc detection and reducing the false alarm rate, etc.
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Description

Technical Field

[0001] The present invention relates to the detection technology of power systems, and in particular to a method and system for detecting faulty arcs. Background Art

[0002] Currently, most of the faulty arc detection methods are based solely on the analysis of power frequency current signals, or simply extract and combine the analysis of high-frequency current components, ignoring the coupling characteristics between power frequency signals and high-frequency components. For some special loads (such as disinfection cabinets), large current components will be generated in specific frequency bands during normal operation, which are similar to the distorted high-frequency components generated during faulty arcs. The above detection methods cannot accurately distinguish the faulty arcs generated during the normal operation of such loads, and false alarms or missed alarms are likely to occur in faulty arc detectors.

[0003] After retrieval, Chinese Patent Publication No. CN211718443U discloses a faulty arc detector, including: a power frequency current transformer, a power frequency signal amplifier, a high-frequency current transformer, a high-frequency signal amplifier, a high-pass filter, and an MCU processor. One side of the power frequency current transformer is connected to a low-frequency current signal, the other side of the power frequency current transformer is connected to the input end of the power frequency signal amplifier, the output end of the power frequency signal amplifier is connected to the signal input end of the MCU processor, one side of the high-frequency current transformer is connected to a high-frequency current signal, the other side of the high-frequency current transformer is connected to the input end of the high-frequency signal amplifier, the output end of the high-frequency signal amplifier is connected to the input end of the high-pass filter, and the output end of the high-frequency filter is connected to the MCU processor. However, this existing patent still cannot accurately distinguish the faulty arcs generated during the normal operation of the load, resulting in false alarms or missed alarms. Summary of the Invention

[0004] The purpose of the present invention is to overcome the defects of the above-mentioned existing technologies and provide a method and system for detecting faulty arcs, training and summarizing the coupling characteristics of power frequency signals and specific high-frequency components for different load operating states, so as to more accurately achieve faulty arc detection.

[0005] The purpose of the present invention can be achieved through the following technical solutions:

[0006] According to one aspect of the present invention, a method for detecting faulty arcs is provided, and the method includes the following steps:

[0007] Step S1, collect the power frequency current signal and high-frequency components on the live wire, optimize the bandwidth and convert them into digital signals;

[0008] Step S2, through DFT analysis and calculation, obtain the characteristic quantities of zero-crossing points, effective values, peak values, fundamental waves, and harmonics, and form a characteristic vector for detecting faulty arcs;

[0009] Step S3: Combine the characteristic quantities obtained from the analysis of the high-frequency component and the power-frequency current signal, connect a large number of loads for test training, and obtain the coupling coefficient between the power-frequency current signal and the high-frequency component;

[0010] Step S4: Based on the coupling coefficient obtained in Step S3, combine the eigenvector obtained in Step S2 to perform fault arc analysis and identification on the current of each half cycle, and achieve accurate detection of the fault arc.

[0011] As a preferred technical solution, the eigenvector N is specifically as follows:

[0012] N = (i rms , i m , I N , P, Δi rms )

[0013] where I N is the set of the DC component and the 1st - 127th harmonic components after the current signal is calculated by DFT, P is the high-frequency component of the current half cycle, i rms is the effective value of the current of the current half cycle, i m is the amplitude of the current of the current half cycle, and Δi rms is the change amount of the effective value of the half-cycle current.

[0014] As a preferred technical solution, the coupling coefficient Γ between the power-frequency current signal and the high-frequency component is calculated as follows:

[0015] Γ = F(N)

[0016] where F is the coupling characteristic curve function obtained through verification with a large number of real loads.

[0017] As a preferred technical solution, the fault arc analysis and identification in Step S4 are specifically as follows: Perform fault arc detection based on the eigenvector N with the coupling coefficient Γ as a constraint, and the detection result is E.

[0018] As a preferred technical solution, E is calculated as follows:

[0019] E = ηΓ * (λN)

[0020] where η is the constraint condition of the coupling coefficient Γ, which determines the fault arc detection threshold of the current load.

[0021] As a preferred technical solution, η is specifically calculated as follows:

[0022] λ = (λ1, λ2, λ3, λ4, λ5)

[0023] where λ1, λ2, λ3, λ4, λ5 are the calculation factors of each characteristic quantity in the eigenvector N.

[0024] As a preferred technical solution, if the result E = 1, it represents that the current half-cycle is a faulty arc.

[0025] As a preferred technical solution, if E = 0, it represents that the current half-cycle is not a faulty arc.

[0026] As a preferred technical solution, the number of faulty arcs in 100 half-cycles within 1 s is statistically calculated in a window calculation mode. If the number of half-cycles with faulty arcs exceeds a preset threshold, the device has detected a faulty arc alarm, and the action information is output to the action unit via the signal output unit to execute relevant action commands.

[0027] According to another aspect of the present invention, there is provided a device for the detection method of the faulty arc, including a power frequency current CT, a high-frequency CT, two sets of signal conditioning modules, an MCU, a signal output unit, and an action unit; the power frequency current CT and the high-frequency CT transmit the sampled current signals to the MCU through their respective signal conditioning modules. The MCU calculates and analyzes the corresponding digital signals obtained by sampling, and outputs the detected faulty arc alarm signal to the signal output unit. The signal output unit controls the action unit to perform corresponding actions.

[0028] Compared with the prior art, the present invention has the following advantages:

[0029] 1) The present invention combines the coupling characteristics between the load power frequency signal and the high-frequency component, improves the reliability of faulty arc detection, and reduces the false alarm rate.

[0030] 2) The present invention optimizes the bandwidth of the high-frequency CT to achieve the extraction of high-frequency components;

[0031] 3) The present invention performs 256-point radix-4 butterfly FFT operations to improve the accuracy and operation efficiency of power frequency signal feature vector calculation. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a flowchart of the detection method of the present invention;

[0033] Figure 2 It is a schematic diagram of the detection system of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0034] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some but not all of the embodiments of the present invention. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0035] Figure 1The software flow of the fault arc detection of the present invention is shown below. Next, in combination with Figure 1 the fault arc detection steps of this embodiment will be described in detail:

[0036] In step 401, the analog signal output by the front-stage sampling circuit is collected, converted into a digital signal, stored in the data unit of the single-chip microcomputer, and then step 402 is executed;

[0037] In step 402, a DFT operation is performed on the sampled signal. In this embodiment, N is taken as 256, that is, 256 points of the current cycle current signal are sampled to obtain the fundamental harmonic components of the current cycle signal, and then step 403 is executed;

[0038] In step 403, according to the fundamental component calculated in step 402, the zero-crossing position of the current cycle is calculated, and then step 404 is executed;

[0039] In step 404, the N / 2, that is, 128 points of data after the zero-crossing point are integrated, regarded as the current detected half-cycle, and DFT and other operations are performed to obtain the feature vector N with effective value, amplitude, fundamental wave, harmonic, etc. as feature quantities:

[0040] N = (i rms , i m , I N , P, Δi rms )

[0041] where I N is the set of DC components and 1st - 127th harmonic components of the current signal after DFT calculation, P is the high-frequency component of the current half-cycle, and then step 405 is executed;

[0042] In step 405, according to the current feature vector N, the coupling coefficient Γ between the power frequency signal and the high-frequency component is calculated:

[0043] Γ = F(N)

[0044] F is the coupling characteristic curve function obtained through verification of a large number of real loads, and then step 406 is entered;

[0045] In step 406, with the coupling coefficient Γ as a constraint, fault arc detection is performed according to the feature vector N, and the detection result is E:

[0046] E = ηΓ * (λN)

[0047] λ = (λ1, λ2, λ3, λ4, λ5)

[0048] where η is the constraint condition of the coupling coefficient Γ, which determines the fault arc detection threshold of the current load;

[0049] λ = (λ1, λ2, λ3, λ4, λ5) is the calculation factor of each characteristic quantity in the eigenvector N. If the result E = 1, it represents that the current half-cycle is a fault arc, and step 407 is executed; if E = 0, it represents that the current half-cycle is not a fault arc, and step 402 is executed to perform the fault arc identification and detection of the next half-cycle.

[0050] In step 407, the number of fault arcs in 100 half-cycles within 1 s is statistically calculated in the window calculation mode. If the number of half-cycles with fault arcs exceeds the preset threshold, step 408 is executed; if it does not exceed the alarm threshold, step 402 is executed to perform the fault arc identification and detection of the next half-cycle.

[0051] In step 408, the device has detected a fault arc alarm, and the action information is output to the action unit via the signal output unit to execute the relevant action commands.

[0052] As Figure 2 shown, the fault arc detection system described in this embodiment is composed of a power frequency current CT, a high-frequency CT, two sets of signal conditioning modules, an MCU, a signal output unit, and an action unit.

[0053] Two current CTs with different linear response frequency bands are used to obtain two current signals required for detection, and they are output to the MCU via different filter optimization circuits, and the analog signals are converted into digital signals through AD sampling. The acquisition of fault arc data and the analysis and calculation are integrated in a main MCU, which improves the stability and speed of fault arc detection and identification. The alarm command is output by the signal output unit, which can implement various alarm methods such as sound and light, and a circuit breaker can be externally connected to achieve short-circuit protection for the detected line.

[0054] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of various equivalent modifications or substitutions, and these modifications or substitutions should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.

Claims

1. A method for detecting a faulty arc, characterized in that, The method includes the following steps: Step S1: Collect the power frequency current signal and high-frequency component on the live wire, optimize the bandwidth and convert them into digital signals; Step S2: Through DFT analysis and calculation, obtain the characteristic quantities of zero-crossing points, effective values, peak values, fundamental waves, and harmonics, and form a characteristic vector for detecting faulty arcs; Step S3: Combine the characteristic quantities obtained from the analysis of the high-frequency component and the power frequency current signal, connect a large number of loads for test training, and obtain the coupling coefficient between the power frequency current signal and the high-frequency component; Step S4: Based on the coupling coefficient obtained in Step S3, combine the characteristic vector obtained in Step S2 to perform faulty arc analysis and identification on the current of each half-cycle, and achieve accurate detection of faulty arcs; The specific characteristic vector N is as follows: N = (i rms , i m , I N , P, Δi rms ) Among which I N is the set of the DC component and the 1st to 127th harmonic components after the DFT calculation of the current signal, P is the high-frequency component of the current half-cycle, and i rms is the effective value of the current of the current half-cycle, i m is the amplitude of the current of the current half-cycle, and Δi rms is the change amount of the effective value of the half-cycle current; The coupling coefficient Γ between the power frequency current signal and the high-frequency component is calculated as follows: Γ = F(N) where F is the coupling characteristic curve function obtained through verification with a large number of real loads; The faulty arc analysis and identification in Step S4 are specifically as follows: Then, with the coupling coefficient Γ as a constraint, perform faulty arc detection according to the characteristic vector N, and the detection result is Ε; The calculation of Ε is as follows: Ε = ηΓ * (λN) where η is the constraint condition of the coupling coefficient Γ, determining the faulty arc detection threshold of the current load, and λ is the calculation factor of each characteristic quantity in the characteristic vector N; If the result Ε = 1, it represents that the current half-cycle is a faulty arc; if Ε = 0, it represents that the current half-cycle is not a faulty arc.

2. The detection method of a faulty arc according to claim 1, characterized in that The specific calculation of λ is as follows: λ = (λ1, λ2, λ3, λ4, λ5) where λ1, λ2, λ3, λ4, λ5 are the calculation factors of each characteristic quantity in the characteristic vector N.

3. The detection method of a faulty arc according to claim 1, wherein, Statistically count the number of faulty arcs in 100 half-cycles within 1 s in the window calculation mode. If the number of half-cycles with faulty arcs exceeds the preset threshold, the device has detected a faulty arc alarm, and will output the action information to the action unit via the signal output unit to execute the relevant action command.

4. An apparatus for the detection method of the faulty arc according to claim 1, characterized in that, It includes a power frequency current CT, a high-frequency CT, two sets of signal conditioning modules, an MCU, a signal output unit, and an action unit; The power frequency current CT and the high-frequency CT send the sampled current signals to the MCU through their respective signal conditioning modules. The MCU calculates and analyzes the corresponding digital signals obtained by sampling, and outputs the detected faulty arc alarm signal to the signal output unit. The signal output unit controls the action unit to perform corresponding actions.

Citation Information

Patent Citations

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