Integrated circuit parameterization method, device, storage medium and terminal equipment

Abstract

The present application discloses a method, apparatus, storage medium, and terminal device for parameterizing an integrated circuit. The method comprises obtaining a circuit layout corresponding to the integrated circuit; identifying regional information of components in the circuit layout; and determining position parameters of the circuit layout based on the obtained regional information. After obtaining the circuit layout of the integrated circuit, the present application identifies the regional information of components in the circuit layout and converts the circuit layout into position parameters based on the regional information. The position parameters are used to represent the position information and positional relationships of each component in the circuit layout. In this way, if the circuit layout needs to be adjusted, it can be achieved by adjusting the position parameters, thereby improving the adjustment efficiency of the circuit layout and thus improving the production efficiency of the integrated circuit.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to an integrated circuit parameterization method, apparatus, storage medium, and terminal device. Background Art

[0002] Electronic Design Automation (EDA) is widely used in the field of circuit design, making circuit design more efficient. However, in the field of TFT circuit design, the TFT layout design process generally requires professionals to operate software to draw, making TFT circuit design highly dependent on manpower and resulting in low production efficiency. Summary of the Invention

[0003] The technical problem to be solved by this application is to provide an integrated circuit parameterization method, apparatus, storage medium and terminal device in response to the deficiencies of the existing technology.

[0004] In order to solve the above technical problems, a first aspect of an embodiment of the present application provides an integrated circuit parameterization method, the method comprising:

[0005] Obtaining a circuit layout corresponding to the integrated circuit;

[0006] Identifying regional information of components in the circuit layout;

[0007] The position parameters of the circuit layout are determined based on the acquired area information.

[0008] In the integrated circuit parameterization method, the step of identifying the region information of components in the circuit layout specifically includes:

[0009] Inputting the circuit layout into a trained recognition network model;

[0010] The regional information of the components in the circuit layout is determined by the identification network model.

[0011] The integrated circuit parameterization method, wherein determining the position parameters of the circuit layout based on the acquired area information specifically includes:

[0012] For each component in the circuit layout, obtain a reference part corresponding to the component;

[0013] Taking the reference component as a reference, determining the sub-position parameter corresponding to the component based on the region information of the component;

[0014] Based on all the acquired sub-position parameters, the position parameters of the circuit layout are determined.

[0015] The integrated circuit parameterization method, wherein the sub-position parameter is a sub-position vector; and determining the position parameter of the circuit layout based on all acquired sub-position parameters specifically includes:

[0016] The sub-position parameters are spliced ​​together to obtain the position parameter of the circuit layout, wherein the dimension of the position parameter is equal to the sum of the dimensions of the sub-position parameters.

[0017] In the integrated circuit parameterization method, the region information includes component categories, and each element in the position parameter carries the component category.

[0018] The integrated circuit parameterization method, wherein, after determining the position parameters of the circuit layout based on the acquired area information, the method further comprises:

[0019] Determining optoelectronic characteristics corresponding to the integrated circuit based on the trained detection network model and the position parameter;

[0020] The position parameter and the photoelectric characteristic are used as circuit parameters corresponding to the integrated circuit.

[0021] The integrated circuit parameterization method, wherein the training process of the detection network model specifically includes:

[0022] Acquire a training sample set, wherein the training sample set includes a plurality of training position parameters and target photoelectric characteristics corresponding to each training position parameter;

[0023] Inputting the training position parameters in the training sample set into a preset network model, and outputting the predicted photoelectric characteristics corresponding to the training position parameters through the preset network model;

[0024] Based on the predicted photoelectric characteristics and the target photoelectric characteristics, the preset network model is trained to obtain the detection network model.

[0025] The integrated circuit parameterization method, wherein obtaining a training sample set specifically includes:

[0026] Obtaining a training integrated circuit set;

[0027] For each training integrated circuit, determining a training position parameter corresponding to the circuit layout of the training integrated circuit, and determining a target optoelectronic characteristic corresponding to the training integrated circuit using a circuit simulator;

[0028] A training sample set is determined based on the training position parameters and target photoelectric characteristics corresponding to each training integrated circuit.

[0029] The integrated circuit parameterization method, wherein the integrated circuit is a TFT circuit.

[0030] A second aspect of an embodiment of the present application provides an integrated circuit parameterization device, comprising:

[0031] An acquisition module, used to acquire a circuit layout corresponding to the integrated circuit;

[0032] an identification module, configured to identify regional information of components in the circuit layout;

[0033] A first determination module is configured to determine a position parameter of the circuit layout based on the acquired area information. A third aspect of an embodiment of the present application provides a computer-readable storage medium storing one or more programs, wherein the one or more programs can be executed by one or more processors to implement the steps of any of the above-described integrated circuit parameterization methods.

[0034] A fourth aspect of an embodiment of the present application provides a terminal device, comprising: a processor, a memory, and a communication bus; the memory stores a computer-readable program executable by the processor;

[0035] The communication bus realizes the connection and communication between the processor and the memory;

[0036] When the processor executes the computer-readable program, the processor implements the steps in any of the above-mentioned integrated circuit parameterization methods.

[0037] Beneficial Effects: Compared with the prior art, the present application provides an integrated circuit parameterization method, apparatus, storage medium, and terminal device. The method includes obtaining a circuit layout corresponding to the integrated circuit; identifying regional information of components in the circuit layout; and determining position parameters of the circuit layout based on the obtained regional information. After obtaining the circuit layout of the integrated circuit, the present application identifies the regional information of components in the circuit layout and converts the circuit layout into position parameters based on the regional information. The position parameters are used to represent the position information and positional relationships of each component in the circuit layout. In this way, if the circuit layout needs to be adjusted, it can be achieved by adjusting the position parameters, thereby improving the adjustment efficiency of the circuit layout and further improving the production efficiency of the integrated circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without inventive work.

[0039] Figure 1This is an example diagram of the existing method of integrated circuit parameterization provided by this application.

[0040] Figure 2 This is a flow chart of the integrated circuit parameterization method provided in this application.

[0041] Figure 3 This is an example diagram of a TFT circuit.

[0042] Figure 4 An example diagram of a sub-pixel structure in a TFT circuit.

[0043] Figure 5 This is an example diagram of the position parameters of a component in a sub-pixel structure in a TFT circuit.

[0044] Figure 6 This is an example diagram of the position parameter adjustment process of the integrated circuit parameterization method provided in this application.

[0045] Figure 7 This is an example diagram of the process of obtaining several reference position parameters of the integrated circuit parameterization method provided in this application.

[0046] Figure 8 This is an example diagram of the position parameter adjustment process of the integrated circuit parameterization method provided in this application.

[0047] Figure 9 This is an example diagram of the process of acquiring target optoelectronic characteristics in the integrated circuit parameterization method provided in this application.

[0048] Figure 10 This is an example diagram of the process of acquiring target optoelectronic characteristics in the integrated circuit parameterization method provided in this application.

[0049] Figure 11 This is a structural principle diagram of the integrated circuit parameterization device provided in this application.

[0050] Figure 12 This is a schematic diagram of the terminal device structure provided in this application. DETAILED DESCRIPTION

[0051] This application provides an integrated circuit parameterization method, apparatus, storage medium, and terminal device. To clarify the purpose, technical solution, and effects of this application, the application is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are intended only to illustrate this application and are not intended to limit this application.

[0052] It will be understood by those skilled in the art that, unless expressly stated otherwise, the singular forms "a", "an", "said" and "the" used herein may also include the plural forms. It should be further understood that the term "comprising" used in the specification of the present application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof. It should be understood that when we refer to an element as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be intermediate elements. In addition, "connected" or "coupled" as used herein may include wireless connections or wireless couplings. The term "and / or" used herein includes all or any units and all combinations of one or more associated listed items.

[0053] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. It should also be understood that terms such as those defined in common dictionaries should be understood to have meanings consistent with their meanings in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless specifically defined as herein.

[0054] The inventors have found through research that Electronic Design Automation (EDA) is widely used in the field of circuit design, and electronic design automation makes circuit design more efficient. Figure 1 As shown, in the field of TFT circuit design, the TFT layout design process generally requires professionals to operate software to draw, which makes TFT circuit design highly dependent on manpower, resulting in low production efficiency.

[0055] To solve the above problem, in an embodiment of the present application, after obtaining the circuit layout corresponding to the integrated circuit, the regional information of the components in the circuit layout is identified; and the position parameters of the circuit layout are determined based on the obtained regional information. After obtaining the circuit layout of the integrated circuit, the present application identifies the regional information of the components in the circuit layout, and converts the circuit layout into position parameters based on the regional information. The position parameters are used to represent the position information and positional relationship of each component in the circuit layout. In this way, if the circuit layout needs to be adjusted, it can be achieved by adjusting the position parameters, thereby improving the adjustment efficiency of the circuit layout and further improving the production efficiency of the integrated circuit.

[0056] For example, embodiments of the present application can be applied to a scenario where a circuit layout for a TFT circuit is designed via a terminal device. In this scenario, the terminal device can determine the TFT circuit to be designed and obtain the circuit layout corresponding to the TFT circuit. After obtaining the circuit layout, the terminal device identifies the region information of the components in the circuit layout and determines the position parameters of the circuit layout based on the obtained region information. Furthermore, after determining the position parameters, the position parameters are adjusted, and the circuit layout is updated based on the adjusted position parameters, thereby achieving automated design of the circuit layout. This can reduce the reliance on manual labor in circuit layout design, thereby improving the efficiency of circuit layout design and, in turn, improving the production efficiency of TFT circuits.

[0057] It is understandable that in the above application scenarios, although the actions of the embodiments of the present application are described as being performed entirely by the terminal device, these actions may also be performed partially by the terminal device and partially by the server to which the terminal device is connected. For example, after the terminal device obtains the circuit layout corresponding to the integrated circuit, it inputs the circuit layout into the server so that the server identifies the circuit layout and identifies the regional information of the components in the circuit layout. The server can respond to the circuit layout input by the terminal device, identify the regional information of the components in the circuit layout, determine the position parameters of the circuit layout based on the obtained regional information, and send the position parameters to the terminal device after obtaining the position parameters, so that the terminal device can obtain the position information. Therefore, the present application is not limited in terms of the execution subject, as long as the actions disclosed in the embodiments of the present application are performed.

[0058] It should be noted that the above application scenarios are only shown to facilitate understanding of the present application, and the embodiments of the present application are not limited in this respect. On the contrary, the embodiments of the present application can be applied to any applicable scenario.

[0059] The application content will be further explained below through description of embodiments in conjunction with the accompanying drawings.

[0060] This embodiment provides an integrated circuit parameterization method, such as Figure 2 As shown, the method includes:

[0061] S10. Obtain a circuit layout corresponding to the integrated circuit.

[0062] Specifically, the integrated circuit may be a chip integrated circuit, a display panel integrated circuit, or a pixel unit integrated circuit. In one implementation of this embodiment, the integrated circuit is a TFT circuit, which is used to manufacture a TFT backplane. For example, Figure 3As shown, the TFT circuit may include a GOA (Gate Driver on Array, gate drive circuit substrate) and a plurality of pixels, each of which includes three sub-pixel units, namely an R pixel unit, a G pixel unit and a B pixel unit, wherein, as Figure 4 As shown, the sub-pixel unit may include circuit elements and connecting lines. The circuit elements may include capacitors, TFT transistors, and light-emitting diodes, and the connecting lines may include scan lines and data lines. The circuit layout is used to map the circuit design of the integrated circuit to the physical description level, so that the integrated circuit can be mapped to the wafer for production. The circuit layout contains relevant physical information such as the component types, component sizes, relative positions between components, and the connection relationships between various components in the integrated circuit.

[0063] The circuit layout of the integrated circuit may be automatically generated in advance or manually designed by a layout designer. In one implementation of this embodiment, the circuit layout is automatically generated, and the generation process may include: determining the integrated circuit to be designed, obtaining a number of components corresponding to the integrated circuit and the relative positional relationships between the components, and generating the circuit layout of the integrated circuit based on the relative positional relationships.

[0064] S20: Identify regional information of components in the circuit layout.

[0065] Specifically, the components are devices used to form the circuit layout, and may include metal layers, TFT transistors, capacitors, and ITO films. The region information is used to locate the components. The region information can be used to determine the component's location within the circuit layout and its component type. It is understood that the region information includes component positioning information, size information, and category information. The positioning information reflects the component's location within the circuit layout, the size information reflects the component's size, and the category information reflects the component's category. For example, the size information may include the height and width of the identification region corresponding to the component, and the position information may include the distance between the center of the identification region corresponding to the component and the center of the panel image. Of course, in practical applications, the position information may also be determined using other methods, such as the distance from the center of the identification region corresponding to the component to the upper left corner of the panel image, or the distance from the upper left corner of the identification region corresponding to the component to the upper left corner of the panel image. The size information may also be determined using other methods, such as the perimeter of the identification region corresponding to the component, or the area of ​​the identification region corresponding to the component.

[0066] Based on this, in one implementation of this embodiment, the area information can be in the form of a circuit parameter, which includes three data items, namely positioning information, size information and category information. For example, the area information is {(100,100), (20,30), capacitor}, (100,100) represents the coordinate information of the positioning point in the component in the coordinate system corresponding to the circuit layout, 20 in (20,30) can represent the width of the rectangular area corresponding to the component, 30 can represent the width of the rectangular area corresponding to the component, and capacitor indicates that the device type of the component is a capacitor. In addition, the rectangular area refers to the smallest rectangle containing the component. Of course, it is worth noting that the rectangular area here is only an example. It can also be a circle, an ellipse, a triangle, a regular pentagon, etc., and when the shape is different, the expression of the size information is also different. It will not be explained one by one here, but only an example will be given to illustrate. For example, when the component corresponds to a circular area, the area information can be circular coordinates and circular radius.

[0067] In an implementation of this embodiment, the identifying the region information of the components in the circuit layout specifically includes:

[0068] Inputting the circuit layout into a trained recognition network model;

[0069] The regional information of the components in the circuit layout is determined by the identification network model.

[0070] Specifically, the recognition network model can be a pre-trained network model for identifying the regional information of each component in the circuit layout. It can be understood that the recognition network model is a pre-trained network model, the input item of the recognition network model is the circuit layout, and the output item of the recognition network model is the regional information. When the circuit layout includes one component, the regional information is one, and when the circuit layout includes multiple components, the regional information is multiple, and the multiple regional information corresponds one-to-one to the multiple components. For example, if the circuit layout includes component A and component B, then the regional information output by the recognition network model includes regional information a and regional information b, wherein regional information a corresponds to component A and is used to locate component A, and regional information b corresponds to component B and is used to locate component B.

[0071] S30. Determine position parameters of the circuit layout based on the acquired area information.

[0072] Specifically, the position parameter is a parameterized representation of the circuit layout. This position parameter can be used to determine the components included in the circuit layout, the relative positional relationships between the components, and the position information of the components within the circuit layout. In other words, the position parameter is a parameter vector used to represent the circuit layout, and the circuit layout can be drawn based on the position parameter.

[0073] In one implementation of this embodiment, determining the position parameter of the circuit layout based on the acquired area information specifically includes:

[0074] For each component in the circuit layout, obtain a reference part corresponding to the component;

[0075] Taking the reference component as a reference, determining the sub-position parameter corresponding to the component based on the region information of the component;

[0076] Based on all the acquired sub-position parameters, the position parameters of the circuit layout are determined.

[0077] Specifically, the reference component is a reference object for the component and is used to determine the relative positional relationship between the component and the reference component, such as the distance between the component and the reference component, the distance between the edge of the component and the edge of the reference component, the tilt angle of the component relative to the reference component, etc. The reference component can be determined based on the acquired region information corresponding to each component, or based on a pre-set component position relationship list, where the component position relationship list can store the positional relationships between all components included in the circuit layout. For example, if the circuit version includes component A and component B, component A and component B are adjacent in the component position relationship list.

[0078] In one implementation of this embodiment, the reference components are determined based on the acquired region information corresponding to each component. Specifically, the acquisition process may include: after acquiring the region information corresponding to each component, candidate components located around the component are selected from all components based on the region information, and all acquired candidate components are used as reference components for the component. This allows the reference components corresponding to the components to be automatically determined based on the acquired region information, thereby speeding up circuit layout parameterization.

[0079] In one implementation of this embodiment, the reference component is determined based on a pre-set component position relationship list. Specifically, the determination process may include: for each component, selecting candidate components associated with that component from the component position relationship list, and using all selected candidate components as the reference component corresponding to that component. Determining the reference component based on the pre-set component position relationship list can avoid reference component errors caused by errors in regional information, thereby improving the accuracy of the reference component.

[0080] The sub-position parameter is used to reflect the size information of the component itself and the position information between the component and the reference component. The sub-position parameter can be used to determine the size of the component and the distance between the component and the reference component. Therefore, the sub-position parameter is used to reflect several attributes of the component, including the size of the component and the distance between the component and the reference component. Accordingly, the sub-position parameter includes several position parameter items, which correspond one-to-one to several attributes, and the value of each position parameter item is the attribute value of its corresponding attribute. The several attributes are determined based on the design rules of the circuit layout, for example, line width rule: the minimum width of polygons in the layout; maximum (minimum) size limit: the width or length of polygons; spacing rule: the minimum distance between polygons; encirclement rule: the minimum size of the overlap between one layer and another layer of lines and encircling them; overlap rule: the minimum size of the overlap between two layers; minimum area rule: on the premise of meeting the above basic requirements, try to ensure that the layout area is minimized.

[0081] Based on this, after obtaining the reference component corresponding to the component, the position parameter items included in the sub-position parameter corresponding to the component are determined according to the rules of the circuit layout, and the parameter values ​​corresponding to each position parameter item are calculated in sequence according to the regional information to obtain the sub-position parameter corresponding to the component. For example, if the integrated circuit is a TFT sub-pixel circuit, the capacitor in the TFT sub-pixel circuit is a rectangle with cut corners, and the reference components corresponding to the capacitor are the TFT and the bottom edge of the substrate, then the sub-position parameters corresponding to the capacitor may include the rectangle length, the matrix width, the distance from the bottom edge of the substrate, the distance from the TFT, and the size of the cut corner area.

[0082] For example: Figure 5 As shown, a capacitor in a TFT sub-pixel circuit, the sub-position parameters corresponding to the capacitor include 12 position parameter items, which are the distances A, B, C, D, E, F, G, H, I, J, K and L in the figure, then the sub-position parameters corresponding to the capacitor can be expressed as (A, B, C, D, E, F, G, H, I, J, K, L).

[0083] In one implementation of this embodiment, the sub-position parameter is a sub-position vector; and determining the position parameter of the circuit layout based on all acquired sub-position parameters specifically includes:

[0084] The sub-position parameters are spliced ​​together to obtain the position parameters of the circuit layout.

[0085] Specifically, the position parameter is composed of the splicing of each sub-position parameter, and the dimension of the position parameter is equal to the sum of the dimensions of each sub-position parameter. For example, the sub-position parameter corresponding to the circuit layout includes sub-position parameter A and sub-position parameter B. Position parameter A is (A1, A2) and sub-position parameter B is (B1, B2), then the position parameter is (A1, A2, B1, B2). In addition, in order to determine the components corresponding to each position parameter item in the spliced ​​position parameter, each position parameter item in the position parameter can be configured with the component category of its corresponding component, wherein the component category can be used as the subscript of each position parameter item in the sub-position parameter, or as a suffix of each position parameter item in the sub-position parameter, or as a prefix of each position parameter item in the sub-position parameter, etc.

[0086] In one implementation of this embodiment, after obtaining the position parameters, the optoelectronic characteristics corresponding to the integrated circuit can be determined based on the position parameters. Based on this, after determining the position parameters of the circuit layout based on the obtained area information, the method further includes:

[0087] Determining optoelectronic characteristics corresponding to the integrated circuit based on the trained detection network model and the position parameter;

[0088] The position parameter and the photoelectric characteristic are used as circuit parameters corresponding to the integrated circuit.

[0089] Specifically, the detection network model is pre-trained and is used to determine the optoelectronic characteristics corresponding to the integrated circuit. It is understood that the detection network model is used to convert the position parameter into the optoelectronic characteristics. Accordingly, the input of the detection network model is the position parameter, and the output of the detection network model is the optoelectronic characteristics, where the optoelectronic characteristics may include aperture ratio, charging rate, RC, LCS, voltage deviation Bestvcom, feedthrough, and charging time.

[0090] In one implementation of this embodiment, the detection network model includes a first fully connected module, a transformation module, and a second fully connected module. Determining the optoelectronic characteristics corresponding to the integrated circuit based on the trained detection network model and the position parameter specifically includes:

[0091] Inputting the position parameter into a first fully connected module, and outputting a first feature vector through the first fully connected module;

[0092] Inputting the first feature vector into a transformation module, and outputting a second feature vector through the transformation module, wherein the dimension of the first feature vector is equal to the dimension of the second feature vector;

[0093] The second eigenvector is input into a second fully-connected module, and the optoelectronic characteristics corresponding to the integrated circuit are output through the second fully-connected module.

[0094] Specifically, the first fully connected module is used to perform a linear transformation on the position parameter to reduce the dimension of the position parameter. The first eigenvector is a low-dimensional vector obtained by linearly transforming the position parameter through the first fully connected module. Accordingly, the vector dimension of the first eigenvector is smaller than the vector dimension of the position parameter, wherein the vector dimension of the position parameter can be in the range of 50-500, and the vector dimension of the first eigenvector can be in the range of 5-500. In a specific implementation, the vector dimension of the position parameter can be in the range of 50-100, and the vector dimension of the first eigenvector can be in the range of 5-50. For example, the vector dimension of the position parameter is 100, and the vector dimension of the first eigenvector is 50, etc.

[0095] The transformation module is used to convert the first characteristic vector into a second characteristic vector, and the vector dimension of the second characteristic vector is equal to the vector dimension of the first characteristic vector. For example, if the vector dimension of the first characteristic vector is 50, then the vector dimension of the second characteristic vector is 50. In one implementation of this embodiment, the transformation module can adopt a sigmoid function and a tanh function, etc. The output item of the second fully connected layer is the photoelectric characteristic. The dimension of the output item of the second fully connected layer can be determined according to the characteristic items included in the photoelectric characteristic obtained according to the actual application requirements. For example, the photoelectric characteristics include aperture ratio, charging rate, RC, LCS, voltage deviation Bestvcom, feedthrough Feedthrough and charging time, then the dimension of the output item of the second fully connected layer is 7.

[0096] In one implementation of this embodiment, the detection network model may include two cascaded network models, namely a first network model and a second network model. The first network model is used to reduce the dimension of the position parameter, and the second network model is used to determine the optoelectronic characteristics corresponding to the position parameter. Accordingly, determining the optoelectronic characteristics corresponding to the integrated circuit based on the trained detection network model and the position parameter specifically includes:

[0097] Inputting the position parameter into a first network model, and outputting a candidate position parameter through the first network model;

[0098] The candidate position parameters are input into the second network model, and the optoelectronic characteristics corresponding to the integrated circuit are output through the second network model.

[0099] Specifically, the candidate position parameter is the output item of the first network model, the input item of the second network model is the candidate position parameter, and the output item is the optoelectronic characteristic. The first network model is used to reduce the dimension of the position parameter to obtain the candidate position parameter after dimensionality reduction. Accordingly, the vector dimension of the candidate position parameter is smaller than the vector dimension of the position parameter, wherein the vector dimension of the position parameter can have a value range of 50-500, and the vector dimension of the candidate position parameter can have a value range of 5-500. In a specific implementation, the vector dimension of the position parameter can have a value range of 50-100, and the vector dimension of the candidate position parameter can have a value range of 5-50. For example, the vector dimension of the position parameter is 100, and the vector dimension of the candidate position parameter is 50, etc.

[0100] In one implementation of this embodiment, the first network model may include a third fully connected module and a nonlinear transformation module, and the second network model may include a fourth fully connected module. The third fully connected module is used to perform a linear transformation on the position parameter to reduce the dimension of the position parameter. The third fully connected module is connected to the nonlinear transformation module. The output item of the third fully connected module is the input item of the nonlinear transformation module. The output item of the nonlinear transformation module is the candidate position parameter, and the vector dimension of the candidate position parameter is equal to the vector dimension of the output item of the third fully connected module. For example, if the vector dimension of the output item of the third fully connected module is 50, then the vector dimension of the candidate position parameter is 50. In one implementation of this embodiment, the nonlinear transformation module may adopt a sigmoid function, a tanh function, etc.

[0101] In one implementation of this embodiment, the second network model includes a fourth fully-connected module, and the dimension of the output item of the fourth fully-connected module can be determined according to the characteristic items included in the photoelectric characteristics obtained according to actual application requirements. For example, the photoelectric characteristics include aperture ratio, charging rate, RC, LCS, voltage deviation Bestvcom, feedthrough Feedthrough and charging time, then the dimension of the output item of the second fully-connected layer is 7.

[0102] In one implementation of this embodiment, the training process of the detection network model specifically includes:

[0103] Obtain a training sample set;

[0104] Inputting the training position parameters in the training sample set into a preset network model, and outputting the predicted photoelectric characteristics corresponding to the training position parameters through the preset network model;

[0105] Based on the predicted photoelectric characteristics and the target photoelectric characteristics, the preset network model is trained to obtain the detection network model.

[0106] Specifically, the preset network model may be pre-set and used to generate a detection network model based on a training sample set; the detection network model is obtained by training the preset network model using the training sample set, and is used to determine the photoelectric characteristics corresponding to the position parameter. It is understood that after training the preset network model based on the training sample set, a detection network model can be obtained, wherein the model structure of the detection network model is the same as that of the preset network model, and the difference between the detection network model and the preset network model is that the model parameters configured in the detection network model are model parameters obtained through training, while the model parameters configured in the preset network model are initial model parameters.

[0107] In one implementation of this embodiment, the training sample set includes a plurality of training position parameters and target photoelectric characteristics corresponding to each training position parameter. Each of the plurality of training position parameters corresponds to a circuit layout, and the target photoelectric characteristics corresponding to the training position parameters are the photoelectric characteristics of the integrated circuit corresponding to the circuit layout. The target photoelectric characteristics are used as labeled values ​​for the corresponding training position parameters. After the predicted photoelectric characteristics corresponding to the training position parameters are determined using a preset network model, the target photoelectric characteristics are used as a standard to determine a loss value corresponding to the predicted photoelectric characteristics. This loss value is then used to perform reverse training on the preset network model based on the loss value to optimize the model parameters of the preset network model.

[0108] In one implementation of this embodiment, obtaining the training sample set specifically includes:

[0109] Obtaining a training integrated circuit set;

[0110] For each training integrated circuit, determining a training position parameter corresponding to the circuit layout of the training integrated circuit, and determining a target optoelectronic characteristic corresponding to the training integrated circuit using a circuit simulator;

[0111] A training sample set is determined based on the training position parameters and target photoelectric characteristics corresponding to each training integrated circuit.

[0112] Specifically, the training integrated circuit set may include several training integrated circuits, each of which is pre-designed and tested. Each of the several training integrated circuits corresponds to a training position parameter, wherein the process for determining the training position parameter can refer to the process for determining the position parameter described above and will not be repeated here. In addition, the target optoelectronic characteristics are determined based on a circuit simulator, and the determination process may be as follows: for each training integrated circuit, obtain the circuit layout corresponding to the training integrated circuit, and output the target optoelectronic characteristics corresponding to the training integrated circuit through the circuit simulator.

[0113] Furthermore, after obtaining the training position parameters and target photoelectric characteristics corresponding to the training integrated circuit, the training position parameters and target photoelectric characteristics are used as circuit parameters. Several training integrated circuits can determine several sets of circuit parameters, each set of circuit parameters including the training position parameters and the target photoelectric characteristics. Thus, after obtaining the several sets of circuit parameters corresponding to the several training integrated circuits, the set of circuit parameters corresponding to the several training integrated circuits can be used as a training sample set for the preset network model.

[0114] In summary, this embodiment provides an integrated circuit parameterization method, apparatus, storage medium, and terminal device, the method comprising obtaining a circuit layout corresponding to the integrated circuit; identifying regional information of components in the circuit layout; and determining position parameters of the circuit layout based on the obtained regional information. After obtaining the circuit layout of the integrated circuit, the present application identifies the regional information of components in the circuit layout, and converts the circuit layout into position parameters based on the regional information. The position parameters are used to represent the position information and positional relationships of each component in the circuit layout. In this way, if the circuit layout needs to be adjusted, it can be achieved by adjusting the position parameters, thereby improving the adjustment efficiency of the circuit layout and thereby improving the production efficiency of the integrated circuit.

[0115] In one embodiment, after obtaining the optoelectronic characteristics corresponding to the position parameter, the position parameter can be adjusted based on the optoelectronic characteristics so that the performance of the integrated circuit corresponding to the adjusted position parameter is better than the performance of the integrated circuit corresponding to the position parameter before the adjustment. Based on this, after using the position parameter and the optoelectronic characteristics as circuit parameters corresponding to the integrated circuit, the method can further include a position parameter adjustment process.

[0116] In one implementation of this embodiment, Figure 6 and Figure 7 As shown, the adjustment process may include:

[0117] Determining an adjustment parameter corresponding to the position parameter based on the photoelectric characteristic and the position parameter;

[0118] The position parameter is adjusted based on the adjustment parameter to obtain a target position parameter, and an adjusted integrated circuit is determined based on the target position parameter.

[0119] Specifically, the adjustment parameter is used to adjust the position parameter, and the position parameter can be adjusted by the adjustment parameter to obtain a target position parameter corresponding to the position parameter, wherein the target position parameter is used to determine the circuit layout of the integrated circuit. The vector dimension of the adjustment parameter is the same as the vector dimension of the position parameter. For each position parameter item in the position parameter, there is an adjustment parameter item in the adjustment parameter corresponding to the position parameter item, and the adjustment parameter item is used to adjust its corresponding position parameter item, wherein the adjustment parameter item corresponds to the position parameter item means that the position sequence number of the adjustment parameter item in the adjustment parameter is the same as the position sequence number of the position parameter item in the position parameter. For example, the position parameter is a 50-dimensional vector, the adjustment parameter item is a 50-dimensional vector, and the adjustment parameter item at the 25th position in the adjustment parameter item corresponds to the position parameter item at the 25th position in the position parameter. In addition, the vector dimension of the target position parameter is the same as the vector dimension of the position parameter, and each target position parameter item in the target position parameter corresponds one-to-one to each position parameter item in the position parameter, and each target position parameter item is calculated from its corresponding position parameter item and the adjustment parameter item corresponding to the position parameter item.

[0120] In one implementation of this embodiment, determining the adjustment parameter corresponding to the position parameter based on the photoelectric characteristic and the position parameter specifically includes:

[0121] Obtaining an error value corresponding to the photoelectric characteristic;

[0122] Based on the error value and the position parameter, an adjustment parameter corresponding to the position parameter is determined.

[0123] Specifically, the error value is used to reflect the error between the optoelectronic characteristic and the optoelectronic characteristic constraint. The optoelectronic characteristic constraint is specific to the integrated circuit and is used to limit the minimum optoelectronic characteristic requirements achieved by the integrated circuit. The optoelectronic characteristic includes several optoelectronic parameters, and the optoelectronic characteristic constraint includes lower thresholds corresponding to some of the several optoelectronic parameters. For example, the optoelectronic characteristics include aperture ratio, charging rate, and peak voltage, and the optoelectronic characteristic constraint may include the lower threshold for aperture ratio, the lower threshold for charging rate, and the lower threshold for peak voltage. Alternatively, the optoelectronic characteristic constraint may include the lower threshold for charging rate and the lower threshold for peak voltage, or the optoelectronic characteristic constraint may include the lower threshold for peak voltage. Of course, the optoelectronic characteristic constraint may not include the lower threshold for any optoelectronic parameter. In this case, the optoelectronic characteristic constraint states that the larger the optoelectronic parameter, the better the reference position parameter corresponding to the reference optoelectronic characteristic. Conversely, the smaller the optoelectronic parameter, the worse the reference position parameter corresponding to the reference optoelectronic characteristic.

[0124] In an implementation of this embodiment, obtaining the error value corresponding to the photoelectric characteristic specifically includes:

[0125] Obtaining optoelectronic characteristic constraints corresponding to the integrated circuit, and determining an objective function corresponding to the integrated circuit based on the optoelectronic characteristic constraints;

[0126] Based on the objective function, an error value corresponding to the photoelectric characteristic is determined.

[0127] Specifically, the objective function may be pre-set, and the objective function may correspond to the optoelectronic characteristic constraint. After determining the optoelectronic characteristic constraint corresponding to the integrated circuit, the corresponding objective function may be selected based on the optoelectronic characteristic constraint. It is understood that a set of objective functions may be pre-set, comprising a plurality of objective functions, each of which corresponds to an optoelectronic characteristic constraint. After determining the optoelectronic characteristic constraint corresponding to the integrated circuit, an objective function may be selected from the set of objective functions based on the optoelectronic characteristic constraint, and used as the objective function for determining the error value corresponding to the optoelectronic characteristic.

[0128] The objective function in the objective function set can be established based on actual applications. Here, an application scenario is used for illustration. In this application scenario, the photoelectric characteristics include three photoelectric parameters: aperture ratio a, charging rate b, and peak voltage c. The corresponding relationship between the objective function and the photoelectric characteristic constraint conditions can be:

[0129] When the photoelectric characteristic constraints are aperture ratio a>a0, charging rate b>b0, and peak voltage c>c0, where a0 is the lower threshold of the aperture ratio, b0 is the lower threshold of the charging rate, and c0 is the lower threshold of the peak voltage, then the objective function f(a, b, c) can be:

[0130] f(a,b,c)=sigmoid(a-a0)*sigmoid(b-b0)*sigmoid(c-c0)

[0131] Wherein, a represents the aperture ratio, b represents the charging rate, c represents the peak voltage, and sigmoid represents the sigmoid function;

[0132] When the photoelectric characteristic constraints are charging rate b>b0 and peak voltage c>c0, where b0 is the lower threshold of the charging rate and c0 is the lower threshold of the peak voltage, the objective function f(a, b, c) can be:

[0133] f(a,b,c)=(a-a0)*sigmoid(b-b0)*sigmoid(c-c0)

[0134] Wherein, a represents the aperture ratio, b represents the charging rate, c represents the peak voltage, and sigmoid represents the sigmoid function;

[0135] When the aperture ratio a, charging rate b, and peak voltage c in the photoelectric characteristic constraint conditions do not have lower thresholds set, the objective function f(a, b, c) can be:

[0136] f(a,b,c)=ka*(a-a0)+kb*(b-b0)+kc*(c-c0);

[0137] Among them, ka, kb, kc are weight coefficients, a0 is the lower threshold value of the aperture rate, b0 is the lower threshold value of the charging rate, and c0 is the lower threshold value of the peak voltage. Among them, ka, kb, kc, a0, b0 and c0 can all be set according to actual needs.

[0138] Furthermore, after obtaining the objective function, since the objective function is a function with the photoelectric characteristic as the independent variable, the objective function can be converted into a function with the position parameter as the independent variable. In this way, since the photoelectric characteristic is determined based on the position parameter, there is a candidate function between the position parameter and the photoelectric characteristic. Based on the candidate function, each photoelectric parameter in the photoelectric characteristic can be represented by the position parameter, and then each photoelectric characteristic represented by the position parameter is substituted into the objective function to obtain the converted objective function, and the converted objective function is used as the objective function corresponding to the photoelectric characteristic. After obtaining the objective function with the position parameter as the independent variable, the position parameter is input into the objective function to obtain the error value. Of course, in actual applications, the photoelectric characteristic can also be directly input into the objective function with the photoelectric characteristic as the independent variable to obtain the error value.

[0139] In an implementation of this embodiment, determining the adjustment parameter corresponding to the position parameter based on the error value and the position parameter specifically includes:

[0140] For each position parameter item in the position parameter, determine a gradient value corresponding to the position parameter item based on the error value and the objective function, and determine an adjustment parameter item corresponding to the position parameter item based on the gradient value;

[0141] All the acquired adjustment parameter items constitute the adjustment parameter corresponding to the position parameter.

[0142] Specifically, the gradient value is used to determine the adjustment parameter item corresponding to the position parameter item. In one implementation of this embodiment, the gradient value can be calculated using the formula: dY / dXi = f(X1, X2, X3, ...Xi + △Xi, ...Xn) - Y0, i = 1, 2, 3 ...n, where dY / dXi represents the gradient value corresponding to the position parameter item Xi, Y = f(X1, X2, X3, ...Xi, ...Xn) represents the objective function with the position parameter item as the independent variable, Xi represents the i-th position parameter item in the position parameter, △Xi represents the change corresponding to the position parameter item Xi, n represents the number of position parameter items, and Y0 represents the error value. The change corresponding to each position parameter item can be the same, or the change corresponding to some position parameter items can be the same while the change corresponding to some position parameter items can be different. Alternatively, the change corresponding to each position parameter item can be different. The change can be pre-set based on actual application conditions.

[0143] The calculation formula of the adjustment parameter item can be:

[0144] Xi=Xi+gamma_i*(dY / dXi)*△Xi,i=1,2,3…n

[0145] Among them, △Xi is the change corresponding to the position parameter item Xi, gamma_i is the weight coefficient corresponding to the position parameter item Xi, and n represents the number of position parameter items.

[0146] In an implementation of this embodiment, adjusting the position parameter based on the adjustment parameter to obtain the target position parameter specifically includes:

[0147] For each position parameter item in the position parameter, determining an adjustment parameter item corresponding to the position parameter item in the adjustment parameter;

[0148] Determine the element sum of the position parameter item and the adjustment parameter item, and use the element sum as the target position parameter item corresponding to the position parameter item;

[0149] The position parameter composed of all target position parameter items is used as the target position parameter.

[0150] Specifically, the vector dimension of the adjustment parameter is the same as the vector dimension of the position parameter, and the adjustment parameter items in the adjustment parameter correspond one-to-one to the position parameter items in the position parameter, so that for each position parameter item, its corresponding adjustment parameter item can be determined, and after determining the adjustment parameter item, the element sum of the position parameter item and the adjustment parameter item is calculated to obtain the adjusted position parameter item, that is, the target position parameter item corresponding to the position parameter item. Therefore, after obtaining the target position parameter items corresponding to all position parameter items, the position parameter composed of all target position parameter items can be used as the target position parameter.

[0151] In one implementation of this embodiment, Figure 7 and Figure 8 As shown, the adjustment process may include:

[0152] Based on the photoelectric characteristics and the position parameter, a target position parameter corresponding to the position parameter is determined, and an adjusted integrated circuit is determined based on the target position parameter.

[0153] Specifically, the target position parameter is the adjusted position parameter corresponding to the position parameter, and the vector dimension of the target position parameter is the same as the vector dimension of the position parameter. For example, if the vector dimension of the position parameter is 100, then the vector dimension of the target position parameter is 100. In addition, after determining the target position parameter, a circuit layout can be determined based on the target position parameter, and an integrated circuit can be processed based on the circuit layout.

[0154] In one implementation of this embodiment, determining the target position parameter corresponding to the integrated circuit based on the characteristic information specifically includes:

[0155] Obtaining a reference position parameter corresponding to the position parameter;

[0156] Determining an optimized position parameter corresponding to the reference position parameter based on the photoelectric characteristic and the reference position parameter;

[0157] Based on the optimized position parameters, target position parameters corresponding to the position parameters are determined.

[0158] Specifically, the vector dimension of the reference position parameter is smaller than the vector dimension of the position parameter, and the reference position parameter is obtained by performing a dimensionality reduction transformation on the position parameter. In this embodiment, the reference position parameter can be determined by the above-mentioned detection network model. When the detection network model includes a first network model and a second network model, the reference position parameter is an output item of the first network model. When the detection network model includes a first fully connected module, a transformation module, and a second fully connected module, the reference position parameter is an output item of the transformation module.

[0159] In one implementation of this embodiment, determining the optimized position parameter corresponding to the reference position parameter based on the photoelectric characteristic and the reference position parameter specifically includes:

[0160] Obtaining an objective function corresponding to the integrated circuit, and determining a target value corresponding to the optoelectronic characteristic based on the objective function;

[0161] Based on the target value, the reference position parameter is optimized using a Bayesian optimizer to obtain an optimized position parameter.

[0162] Specifically, the vector dimension of the optimized position parameter is the same as the vector dimension of the reference position parameter, and the optimized position parameter is the position parameter with the highest probability of improving the objective function. It is understood that the optimized position parameter can maximize the probability of reducing the error determined based on the objective function. The objective function is determined based on the optoelectronic characteristic constraints corresponding to the integrated circuit, and the objective function determination process and objective function representation are the same as those described above. A detailed description will not be given here. The specific description of the objective function can be found in the parameters above. Furthermore, the target value is determined by inputting the optoelectronic characteristics into the objective function, wherein the objective function is an objective function with optoelectronic characteristics as the independent variable. After obtaining the target value, the Bayesian optimizer calculates the optimized position parameter with the highest probability of improving the objective function value based on the target value, the reference position parameter, and the target value. In this embodiment, a Bayesian optimizer is used for Gaussian regression optimization. Other optimizers, such as genetic algorithms and simulated annealing algorithms, may also be used in other implementations.

[0163] In one implementation of this embodiment, determining the target position parameter corresponding to the position parameter based on the optimized position parameter specifically includes:

[0164] The optimized position parameters are input into a trained third network model, and the target position parameters corresponding to the position parameters are output through the third network model.

[0165] Specifically, the third network model is pre-trained and is used to perform dimensionality upgrade on the optimized position parameter to obtain the target position parameter, wherein the vector dimension of the target position parameter is greater than the vector dimension of the optimized position parameter, and the vector dimension of the target position parameter is equal to the vector dimension of the position parameter. It can be understood that the dimension of the output item of the third network model is the same as the dimension of the input item of the detection model. When the detection network model includes a first fully connected module, a transformation module, and a second fully connected module, the dimension of the input item of the third network model is the same as the dimension of the output item of the transformation module; when the detection network model includes a first network model and a second network model, the dimension of the input item of the third network model is the same as the dimension of the output item of the first network model.

[0166] For example: the detection network model includes a cascaded first network model and a second network model; the input item of the first network model is a first high-dimensional position parameter, and the output item is a first low-dimensional position parameter; the input item of the third network model is a second low-dimensional position parameter, and the output item is a second high-dimensional position parameter, and the dimension of the first high-dimensional position parameter is equal to the dimension of the second high-dimensional position parameter, and the dimension of the first low-dimensional position parameter is equal to the dimension of the second low-dimensional position parameter.

[0167] In one implementation of this embodiment, the training process of the third network model specifically includes:

[0168] Inputting a first position parameter corresponding to each integrated circuit in the training sample into a trained first network model, and outputting a second position parameter through the first network model, wherein the first network model and the second network model are jointly trained;

[0169] Inputting the second position parameter into a preset network model, and outputting a third position parameter through the preset network model;

[0170] Based on the first position parameter and the third position parameter, the preset network model is trained to obtain a third network model.

[0171] Specifically, the first network model is included in the detection network model. When the detection network model includes a first network model and a second network model, the first network model is the first network model in the detection network model. When the detection network model includes a first fully connected module, a transformation module and a second fully connected module, the detection network model can be divided into a first network model and a second network model, wherein the first network model includes a first fully connected module and a transformation module, and the second network model includes a second fully connected module.

[0172] Furthermore, the input items of the third network model are determined based on the first network model, and the input items of the third network model are the output items of the first network model. Therefore, when training the third network model, the training samples corresponding to the third network model can be determined based on the trained first network model, and the first network model and the third network model can be jointly trained to train the third network model. In the process of training the third network model, the model coefficients of the first network model remain unchanged.

[0173] In one implementation of this embodiment, the third network model is obtained by training the first network model and the third network model together. During the training process, the first position parameter is the input item of the first network model, the second position parameter is the output item of the first network model, and is the input item of the third network model, and the third position parameter is the output item of the third network model, wherein the first position parameter is the target value corresponding to the third position parameter, so that the loss item can be determined based on the first position parameter and the third position parameter, so as to train the third network model based on the loss item. In addition, the first network model is trained, and the first network model is obtained by training based on the second network model in the detection network model. In other words, the first network model is obtained by training the detection network model.

[0174] In one embodiment, after adjusting the position parameter to obtain the target position parameter, the target photoelectric characteristic corresponding to the target position parameter can be obtained, the target photoelectric characteristic corresponding to the target position parameter can be obtained, and the circuit parameters composed of the target position parameter and the target photoelectric characteristic can be saved. In addition, after obtaining the target photoelectric characteristic, the above adjustment process can be continued until the target photoelectric characteristic meets the preset conditions or the number of loop executions reaches the preset requirements. In this way, a number of circuit parameters can be obtained, each of which includes a position parameter and a photoelectric characteristic, wherein the position parameter corresponds to a circuit layout, and the photoelectric characteristic is the photoelectric characteristic corresponding to the circuit layout.

[0175] In one implementation of this embodiment, after obtaining a number of circuit parameters, the circuit parameters can be saved to form a circuit parameter set. After obtaining the desired optoelectronic characteristics, target circuit parameters can be selected from the circuit parameter set based on the desired optoelectronic characteristics, and the circuit layout corresponding to the position parameter in the target circuit parameter can be used as the circuit layout corresponding to the desired optoelectronic characteristics. This can improve the speed of circuit layout acquisition.

[0176] Based on this, after obtaining the circuit parameter set, the method may further include:

[0177] Based on the preset expected photoelectric characteristics, selecting target circuit parameters corresponding to the expected photoelectric characteristics from a plurality of pre-stored circuit parameters;

[0178] Based on the target position parameter in the target circuit parameter, an integrated circuit corresponding to the desired optoelectronic characteristics is determined.

[0179] Specifically, each of the plurality of circuit parameters includes a position parameter and an optoelectronic characteristic, wherein the position parameter corresponds to a circuit layout, and the optoelectronic characteristic is the optoelectronic characteristic corresponding to the circuit layout. It is understood that the position parameter and the optoelectronic characteristic correspond to the same circuit layout, the position parameter is parameterized by the circuit layout, and the optoelectronic characteristic is determined based on the position parameter or by a circuit simulator.

[0180] The target circuit parameters are included in a number of circuit parameters, and the target photoelectric characteristics among the several circuit parameters have the highest matching degree with the expected photoelectric characteristics, wherein the matching degree is used to reflect the similarity between the target photoelectric characteristics and the expected photoelectric characteristics. When the matching degree is higher, the similarity between the target photoelectric characteristics and the expected photoelectric characteristics is higher. Conversely, when the matching degree is lower, the similarity between the target photoelectric characteristics and the expected photoelectric characteristics is lower.

[0181] The matching degree can be the Euclidean distance between the photoelectric characteristic and the expected photoelectric characteristic, or a weight coefficient can be configured for each photoelectric parameter in the photoelectric characteristic. When determining the matching degree, each photoelectric parameter can be updated based on the weight coefficient of each photoelectric parameter (for example, the product of the photoelectric parameter and the weight coefficient is used as the photoelectric parameter, etc.). Based on the Euclidean distance between the updated photoelectric characteristic and the expected photoelectric characteristic, the matching degree between the photoelectric characteristic and the expected photoelectric characteristic can be obtained.

[0182] In one implementation of this embodiment, Figure 9 and Figure 10 As shown, based on the preset expected photoelectric characteristics, selecting the target circuit parameters corresponding to the expected photoelectric characteristics from the pre-stored circuit parameters specifically includes:

[0183] Obtaining a weight coefficient set corresponding to the desired photoelectric characteristic, wherein the weight coefficient set includes a weight coefficient corresponding to each photoelectric parameter in the desired photoelectric characteristic;

[0184] Based on the desired optoelectronic characteristics and the weight coefficient set, a target circuit parameter is selected from the plurality of circuit parameters.

[0185] Specifically, the weight coefficient set includes a plurality of weight coefficients, each corresponding to a plurality of photoelectric parameters included in the photoelectric characteristic. Each weight coefficient is used to reflect the importance of the corresponding photoelectric parameter. A higher weight coefficient indicates a higher importance of the photoelectric parameter, and conversely, a lower weight coefficient indicates a lower importance of the photoelectric parameter. The weight coefficient set can be pre-set, and different weight coefficient sets correspond to different desired photoelectric characteristics.

[0186] In one implementation of this embodiment, after obtaining the weight coefficient set, when determining the target photoelectric characteristics corresponding to the desired photoelectric characteristics based on the weight coefficient set, the matching degree between the photoelectric characteristics in each circuit parameter among several circuit parameters and the desired photoelectric characteristics can be calculated respectively, and the circuit parameters corresponding to the photoelectric characteristics with the highest matching degree can be selected as the target circuit parameters.

[0187] In one implementation of this embodiment, several circuit parameters are stored in the form of a KD tree. After obtaining a weight coefficient set, when determining the target optoelectronic characteristics corresponding to the desired optoelectronic characteristics based on the weight coefficient set, a KD tree search can be used to determine the target circuit parameters. This can increase the speed of obtaining the target circuit parameters. Accordingly, selecting target circuit characteristic data from the several circuit parameters based on the desired optoelectronic characteristics and the weight coefficient set specifically includes:

[0188] A KD tree search is performed on a number of circuit parameters based on the expected optoelectronic characteristics to obtain target circuit parameters corresponding to the expected optoelectronic characteristics, wherein the search range of the node optoelectronic characteristics of the KD tree search during the backtracking process is determined based on the node optoelectronic characteristics, the expected optoelectronic characteristics and the weight coefficient set.

[0189] Specifically, after obtaining the desired optoelectronic characteristics, a KD tree search is performed on a number of circuit feature data to obtain candidate circuit parameters. The KD tree search process can compare the desired optoelectronic characteristics with the value of the splitting dimension of the reference optoelectronic characteristics in the circuit parameters of the split node. If the desired optoelectronic characteristics are less than the reference optoelectronic characteristics, the search proceeds to the left subtree branch. If the desired optoelectronic characteristics are equal to or greater than the reference optoelectronic characteristics, the search proceeds to the right subtree branch, and so on until a leaf node is reached. The circuit parameters corresponding to the leaf node are used as candidate circuit parameters. After determining the candidate circuit parameters, a search is performed for leaf nodes that are in the same subspace as the candidate circuit parameters. When searching for leaf nodes in the same subspace as the candidate circuit parameters, the candidate circuit parameters are used as query circuit parameters, the optoelectronic characteristics in the candidate circuit parameters are the node optoelectronic characteristics, and a search radius is determined based on the node optoelectronic characteristics, the desired optoelectronic characteristics, and the set of weight coefficients. For example, the search radius process can include first multiplying the optoelectronic parameters in the desired optoelectronic characteristics by their corresponding weight coefficients to update each optoelectronic parameter, then calculating the Euclidean distance between the desired optoelectronic characteristics and the node optoelectronic characteristics, and finally using the calculated Euclidean distance as the search radius.

[0190] Furthermore, after searching for leaf nodes in the same subspace as the query point, the search path is traced back and it is determined whether there are data points in the other sub-node spaces of the nodes on the search path whose distance to the expected photoelectric characteristics is less than the search radius. If so, it is necessary to jump to the other sub-node spaces to search and add the other sub-nodes to the search path, and continue to determine whether there are data points in the other sub-node spaces of the nodes on the search path whose distance to the expected photoelectric characteristics is less than the search radius until the search path is empty, so as to obtain the target circuit parameters corresponding to the expected photoelectric characteristics.

[0191] Based on the above integrated circuit parameterization method, this embodiment provides an integrated circuit parameterization device, such as Figure 11 As shown, it includes

[0192] An acquisition module 100 is used to acquire a circuit layout corresponding to the integrated circuit;

[0193] An identification module 200 is used to identify regional information of components in the circuit layout;

[0194] The first determination module 300 is configured to determine position parameters of the circuit layout based on the acquired area information.

[0195] In one embodiment, the identification module specifically includes:

[0196] An input unit, configured to input the circuit layout into a trained recognition network model;

[0197] An output unit is used to determine the area information of the components in the circuit layout through the recognition network model.

[0198] In one embodiment, the first determining module specifically includes:

[0199] A first acquiring unit is configured to acquire, for each component in the circuit layout, a reference part corresponding to the component;

[0200] A first determining unit is configured to determine a sub-position parameter corresponding to the component based on the region information of the component, with the reference component as a reference;

[0201] The second determining unit is configured to determine the position parameters of the circuit layout based on all acquired sub-position parameters.

[0202] In one embodiment, the sub-position parameter is a sub-position vector; and the second determining unit is specifically configured to:

[0203] The sub-position parameters are spliced ​​together to obtain the position parameter of the circuit layout, wherein the dimension of the position parameter is equal to the sum of the dimensions of the sub-position parameters.

[0204] In one embodiment, the region information includes component categories, and each element in the position parameter carries a component category.

[0205] In one embodiment, the integrated circuit parameterization apparatus comprises:

[0206] a second determination module, configured to determine the optoelectronic characteristics corresponding to the integrated circuit based on the trained detection network model and the position parameter;

[0207] The third determining module is configured to use the position parameter and the photoelectric characteristic as circuit parameters corresponding to the integrated circuit.

[0208] In one embodiment, the training process of the detection network model specifically includes:

[0209] Acquire a training sample set, wherein the training sample set includes a plurality of training position parameters and target photoelectric characteristics corresponding to each training position parameter;

[0210] Inputting the training position parameters in the training sample set into a preset network model, and outputting the predicted photoelectric characteristics corresponding to the training position parameters through the preset network model;

[0211] Based on the predicted photoelectric characteristics and the target photoelectric characteristics, the preset network model is trained to obtain the detection network model.

[0212] In one embodiment, obtaining a training sample set specifically includes:

[0213] Obtaining a training integrated circuit set;

[0214] For each training integrated circuit, determining a training position parameter corresponding to the circuit layout of the training integrated circuit, and determining a target optoelectronic characteristic corresponding to the training integrated circuit using a circuit simulator;

[0215] A training sample set is determined based on the training position parameters and target photoelectric characteristics corresponding to each training integrated circuit.

[0216] In one embodiment, the integrated circuit is a TFT circuit.

[0217] Based on the above-mentioned integrated circuit parameterization method, this embodiment provides a computer-readable storage medium, which stores one or more programs. The one or more programs can be executed by one or more processors to implement the steps in the integrated circuit parameterization method as described in the above-mentioned embodiment.

[0218] Based on the above integrated circuit parameterization method, the present application also provides a terminal device, such as Figure 12 As shown, it includes at least one processor 20; a display screen 21; and a memory 22. It may also include a communications interface 23 and a bus 24. The processor 20, display screen 21, memory 22, and communications interface 23 can communicate with each other via bus 24. The display screen 21 is configured to display a preset user guidance interface in the initial setup mode. The communications interface 23 can transmit information. The processor 20 can call the logic instructions in the memory 22 to execute the method in the above embodiment.

[0219] In addition, the logic instructions in the memory 22 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.

[0220] The memory 22, as a computer-readable storage medium, can be configured to store software programs or computer-executable programs, such as program instructions or modules corresponding to the methods in the embodiments of the present disclosure. The processor 20 executes the software programs, instructions, or modules stored in the memory 22 to perform functional applications and data processing, thereby implementing the methods in the above embodiments.

[0221] The memory 22 may include a program storage area and a data storage area. The program storage area may store an operating system and at least one application required for a function; the data storage area may store data created based on the use of the terminal device. In addition, the memory 22 may include high-speed random access memory and non-volatile memory. For example, various media that can store program code, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, may also be transient storage media.

[0222] In addition, the specific process of loading and executing the multiple instructions in the storage medium and the processor in the terminal device has been described in detail in the above method and will not be described here one by one.

[0223] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for parameterizing an integrated circuit, characterized in that: The method comprises: Obtaining a circuit layout corresponding to the integrated circuit; Identifying regional information of components in the circuit layout; Determining position parameters of the circuit layout based on the acquired area information; After determining the position parameters of the circuit layout based on the acquired area information, the method further includes: Determining optoelectronic characteristics corresponding to the integrated circuit based on the trained detection network model and the position parameter; Using the position parameter and the photoelectric characteristic as circuit parameters corresponding to the integrated circuit; The detection network model includes a first fully connected module, a transformation module and a second fully connected module. The position parameters input into the detection network model pass through the first fully connected module, the transformation module and the second fully connected module in sequence to obtain the photoelectric characteristics corresponding to the integrated circuit.

2. The integrated circuit parameterization method according to claim 1, characterized in that: The regional information for identifying components in the circuit layout specifically includes: Inputting the circuit layout into a trained recognition network model; The regional information of the components in the circuit layout is determined by the identification network model.

3. The integrated circuit parameterization method according to claim 1 or 2, characterized in that: The determining of the position parameters of the circuit layout based on the acquired area information specifically includes: For each component in the circuit layout, obtain a reference part corresponding to the component; Taking the reference component as a reference, determining the sub-position parameter corresponding to the component based on the region information of the component; Based on all the acquired sub-position parameters, the position parameters of the circuit layout are determined.

4. The integrated circuit parameterization method according to claim 3, characterized in that: The sub-position parameter is a sub-position vector; and determining the position parameter of the circuit layout based on all the acquired sub-position parameters specifically includes: The sub-position parameters are spliced ​​together to obtain the position parameter of the circuit layout, wherein the dimension of the position parameter is equal to the sum of the dimensions of the sub-position parameters.

5. The integrated circuit parameterization method according to claim 1, wherein: The region information includes component categories, and each element in the position parameter carries a component category.

6. The integrated circuit parameterization method according to claim 1, wherein: The training process of the detection network model specifically includes: Acquire a training sample set, wherein the training sample set includes a plurality of training position parameters and target photoelectric characteristics corresponding to each training position parameter; Inputting the training position parameters in the training sample set into a preset network model, and outputting the predicted photoelectric characteristics corresponding to the training position parameters through the preset network model; Based on the predicted photoelectric characteristics and the target photoelectric characteristics, the preset network model is trained to obtain the detection network model.

7. The integrated circuit parameterization method according to claim 6, characterized in that: The obtaining of the training sample set specifically includes: Obtaining a training integrated circuit set; For each training integrated circuit, determining a training position parameter corresponding to the circuit layout of the training integrated circuit, and determining a target optoelectronic characteristic corresponding to the training integrated circuit using a circuit simulator; A training sample set is determined based on the training position parameters and target photoelectric characteristics corresponding to each training integrated circuit.

8. The integrated circuit parameterization method according to claim 1, wherein: The integrated circuit is a TFT circuit.

9. An integrated circuit parameterization device, characterized in that: The integrated circuit parameterization device is used to implement the steps of the integrated circuit parameterization method according to any one of claims 1 to 8, comprising: An acquisition module, used to acquire a circuit layout corresponding to the integrated circuit; an identification module, configured to identify regional information of components in the circuit layout; The first determination module is used to determine the position parameters of the circuit layout based on the acquired area information.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores one or more programs, and the one or more programs can be executed by one or more processors to implement the steps in the integrated circuit parameterization method according to any one of claims 1 to 8.

11. A terminal device, characterized in that: include: A processor, a memory and a communication bus; the memory stores a computer-readable program that can be executed by the processor; The communication bus realizes the connection and communication between the processor and the memory; When the processor executes the computer-readable program, the steps of the integrated circuit parameterization method according to any one of claims 1 to 8 are implemented.

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