Electrostatic chuck and method for manufacturing the same

Abstract

A method of constructing an E-sucker includes: forming at least one groove into a lower substrate; depositing an electrode material onto the lower substrate and into the at least one groove; removing excess electrode material from the lower substrate to leave electrode material in the at least one groove to form an electrode; and forming a dielectric on the lower substrate and the electrode such that the electrode is between the lower substrate and an upper substrate. Forming at least one groove into the lower substrate forms at least one support portion adjacent to the at least one groove, and the at least one support portion reduces surface depression of the electrode material during removal of the excess electrode material from the lower substrate.

Description

[0001] Cross - Reference to Related Applications

[0002] This application claims the benefit of U.S. Application No. 16 / 565,054, filed on September 9, 2019, entitled "Electrostatic Puck and Method of Manufacture", the content of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present disclosure relates to electrostatic chucks for use in semiconductor processing, and more generally to ceramic chucks having embedded electrodes. Background Art

[0004] The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.

[0005] Typically, an electrostatic chuck (also referred to herein as an "E - chuck") is used as a clamping surface for electrostatically holding a semiconductor wafer thereon during a vapor deposition or etching process. An "E - chuck" may include an "electrostatic puck" (also referred to herein as an "E - puck") composed of a sintered ceramic structure having electrodes embedded between two ceramic plate members and conductive paths established through the ceramic plate members from the electrodes. In operation, a potential, for example, between 300 and 12000 volts, is applied to the conductive paths through terminal leads such that the electrodes of the E - puck are energized. When energized, an electrostatic force is generated between an external electrode (e.g., a semiconductor wafer) and the electrodes embedded inside the E - puck.

[0006] A method for manufacturing an E - puck having embedded electrodes includes: forming a first layer of green ceramic material; screen - printing film electrodes on the first layer; depositing a second layer of green ceramic material on the screen - printed electrodes; and sintering the resulting ceramic structure. However, an electrostatic chuck fabricated using this manufacturing method may exhibit fluctuations or non - uniformities in the thickness of the second layer, as well as minute cracks and pores, which may adversely affect the ability of the E - puck to electrostatically hold a substrate to the E - puck surface. Also, non - uniformities in the thickness of the electrodes may adversely affect the electrostatic force between the semiconductor wafer and the electrodes embedded inside the E - puck. In addition, the sintering process may change the properties of the ceramic materials and affect their power density or watts / °K, resulting in non - uniformities in the thermal distribution of the E - puck during operation.

[0007] These problems of forming an E - puck, as well as other problems related to forming ceramic parts with embedded electrical components, are solved by the present disclosure. Summary of the Invention

[0008] This section provides a general overview of the disclosure and not an exhaustive disclosure of its full scope or all of its features.

[0009] In one form of the disclosure, a method of constructing an electrostatic chuck (E-chuck) includes: forming at least one groove into an upper surface of a lower substrate; depositing an electrode material onto the upper surface of the lower substrate and into at least one groove; removing excess electrode material from the lower substrate such that electrode material remains within at least one groove of the substrate to form an electrode; and securing an upper substrate to the lower substrate without thermal pressing. The electrode is flat and coplanar with an outer surface of the upper substrate such that the electrode will be flat and coplanar with a semiconductor wafer electrostatically attached to the E-chuck. In a variant of the disclosure, the excess electrode material is removed by processes such as chemical-mechanical planarization / polishing (CMP), etching, and polishing. In at least one variant, at least one groove includes at least one support portion located therein.

[0010] In at least one form, securing the upper substrate to the lower substrate includes bonding the upper substrate to the lower substrate such that a bonding region is formed by the bonding and the bonding region is recessed from a lower surface of the upper substrate. In at least one variant, the bonding includes a layering process selected from at least one of thick film, thin film, thermal spraying, and sol-gel processes. In one variant, the layering process is thermal spraying.

[0011] In at least one form, the method includes forming a mesa on an outer surface of the upper substrate. In at least one variant, the method includes depositing a yttrium oxide layer onto an outer surface of the upper substrate layer.

[0012] In at least one form, at least one groove is formed by processes such as laser ablation, bead blasting, machining, 3D sintering / printing / additive manufacturing, green state, molding, water jetting, hybrid laser / water, and dry plasma etching.

[0013] In at least one form, the electrode material is deposited onto the substrate and into at least one groove by a layering process such as thick film, thin film, thermal spraying, and sol-gel processes. Alternatively or in addition, the electrode material is deposited by melting a metal foil into at least one groove.

[0014] In at least one form, the lower substrate is a ceramic such as aluminum nitride and alumina, and the resistive material is a material such as titanium, molybdenum, tungsten, nickel, aluminum, and their alloys.

[0015] In another form of the present disclosure, a method of constructing an E-sucker includes the steps of: forming a plurality of grooves into a substrate, wherein a plurality of support portions are formed within the plurality of grooves; depositing an electrode material onto the substrate and within the plurality of grooves; removing excess electrode material from the substrate, thereby leaving electrode material within the plurality of grooves to form electrodes; and fixing an upper substrate to a lower substrate without hot pressing.

[0016] In at least one form, fixing the upper substrate to the lower substrate includes bonding the upper substrate to the lower substrate such that a bonding region is formed by the bonding and the bonding region is recessed from the lower surface of the upper substrate. That is, in at least one variant, a bonding region is formed by bonding the upper substrate to the lower substrate and the bonding region is recessed from the lower surface of the upper substrate.

[0017] In at least one form, the upper substrate is fixed to the lower substrate by depositing a material using a thermal spraying process. In at least one variant, after depositing the material, a portion of the upper substrate is removed.

[0018] Based on the description provided herein, additional fields of application will become apparent. It should be understood that the description and specific examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] To better understand the present disclosure, various forms of the present disclosure will now be described by way of example with reference to the accompanying drawings, in which:

[0020] Figure 1 is a cross-sectional view of an E-chuck with an E-sucker constructed in accordance with the teachings of the present disclosure;

[0021] FIG. 2 shows a series of steps of a method of manufacturing an E-sucker in accordance with the teachings of the present disclosure, wherein: Figure 2A is a cross-sectional view of the lower substrate; Figure 2B is the Figure 2A lower substrate with grooves; Figure 2C is the Figure 2B lower substrate in which an electrode material layer is deposited on the outer surface and within the grooves of the lower substrate; Figure 2D is the Figure 2C lower substrate in which the electrode material layer is removed from the outer surface of the lower substrate; Figure 2E is the Figure 2D lower substrate in which the upper substrate is deposited on at least one electrode element and the outer surface of the lower substrate; Figure 2F is the Figure 2E lower substrate in which the upper substrate is thinned and smoothed to form an E-sucker; Figure 2G is the Figure 2D lower substrate in which a dielectric plate is bonded to at least one electrode element and the outer surface of the lower substrate;The lower substrate in; Figure 2H is the one in which the dielectric plate is thinned and smoothed to form a ceramic substrate for an E - chuck; Figure 2G The lower substrate in; Figure 2I is the one in which a mesa is formed on the outer surface; Figure 2F the E - chuck in; Figure 2H the E - chuck in; and Figure 2J is Figure 2I an enlarged view of section 2J in;

[0022] Figure 3 is a top view of a ceramic substrate having trenches filled with electrode material and pedestal features between the trenches according to the teachings of the present disclosure; and

[0023] Figure 4 is an isometric view of a ceramic substrate having a mesa extending from its outer surface according to the teachings of the present disclosure.

[0024] The drawings described herein are for illustrative purposes only and are not intended to limit the scope of the present disclosure in any way. Detailed Description

[0025] The following description is merely exemplary in nature and is not intended to limit the present disclosure, application, or uses. It should be understood that in all the figures, corresponding reference numerals indicate like or corresponding parts and features. Examples are provided to fully convey the scope of the present disclosure to those skilled in the art. Many specific details, such as the types of specific components, devices, and methods, are set forth to provide a thorough understanding of the variations of the present disclosure. It will be clear to those skilled in the art that specific details need not be employed and the examples provided herein may include alternative embodiments and are not intended to limit the scope of the present disclosure. In some examples, well - known processes, well - known device structures, and well - known technologies are not described in detail.

[0026] Referring to Figure 1 , an E - chuck 10 having an E - chuck 100 constructed according to the teachings of the present disclosure is shown. In one form, the E - chuck 10 includes an E - chuck 100, a heater 130, and a cooling plate 150. The heater 130 is bonded to the E - chuck 100 by a bonding layer 132 and the cooling plate 150 is bonded to the heater 130 by a bonding layer 154. The heater 130 includes a heating layer 132 for generating heat that is transferred to a semiconductor wafer "W" electrostatically held to the E - chuck 10 by the E - chuck 100. Further, the cooling plate 150 may include one or more cooling channels (not shown) for extracting heat from the heater 130. As shown, the E - chuck 10 is used as part of a support base in semiconductor processing. However, it should be understood that the E - chuck 100 can be used in other applications while still being within the scope of the present disclosure.

[0027] The E-chuck 100 includes a ceramic substrate 110 that defines a first surface 112 (also referred to herein as the "upper surface") on which a wafer W is positioned and a lower surface 114 for coupling a heater 130. An electrode layer 124 having at least one electrode element 125 (also simply referred to herein as an "electrode") is embedded within the ceramic substrate 110. To form a support base, a tubular shaft (not shown) is coupled to the lower surface 152 of the cooling plate 150 and surrounds a wire connected to the heating layer 132 and at least one electrode 125. In operation, the wafer W is disposed on the upper surface 112 of the ceramic substrate 110 and is held in a desired position by an electrostatic force generated between the wafer W and at least one electrode 125 embedded within the ceramic substrate 110.

[0028] Now referring Figures 2A to 2F , a method of manufacturing the E-chuck 100 is provided.

[0029] As Figure 2A shown, in step 202, the method provides a ceramic plate member 110' (also referred to herein as the "lower substrate") in which an upper surface 113 is provided opposite to a lower surface 114. Non-limiting examples of the lower substrate 110' include an aluminum nitride substrate and an alumina substrate, among others.

[0030] As Figure 2B shown, in step 204, at least one groove 116 is formed in the upper surface 113 of the lower substrate 110'. That is, at least one groove 116 extends from the upper surface 113 toward the lower surface 114 (-z direction). Forming each groove 116 creates a pair of adjacent support portions or steps 115. It should be understood that at least one groove 116 can be formed using any known or to-be-developed material removal technique. Non-limiting examples of material removal techniques include grinding, laser cutting, etching, machining, lithography, laser cutting, etching, and sandblasting or grit blasting, among others. It should also be understood that, in at least one variant of the present disclosure, the support portions 115 are within at least one groove 116. For example, in one variant, Figure 2B at least one groove 116 in

[0031] As Figure 2CAs shown, in step 206, an electrode material 120 is deposited onto the upper surface 113 of the lower substrate 110', onto the support portion 115, and into at least one trench 116 to form an electrode material layer 122. Non-limiting examples of electrode materials include titanium, molybdenum, tungsten, nickel, aluminum, and their alloys, among others. It should be understood that the electrode material layer 122 and other layers disclosed herein can be deposited using any known or to-be-developed material layer deposition techniques. Non-limiting examples of material layer deposition techniques include cathodic arc discharge, cold spraying, chemical vapor deposition (CVD) techniques, physical vapor deposition techniques, sputtering, and vacuum plasma spraying. Additional non-limiting examples of material layer deposition techniques include layering processes such as thick film, thin film, thermal spraying, and sol-gel processes. In one variant, the electrode material layer 122 is deposited using thermal spraying.

[0032] As Figure 2D shown, in step 208, at least a portion or thickness (z-direction) of the electrode material layer 122 that extends or is deposited on the support portion 115 (i.e., excess electrode material 120) is removed. In some forms, the electrode material layer 122 is substantially removed from the support portion 115. However, as shown, the electrode material 120 remains in at least one trench 116 such that at least one electrode 125 is formed. It should be understood that the electrode material layer 122 and other layers disclosed herein can be removed using any known or to-be-developed layer removal techniques. Non-limiting examples of layer removal techniques include lapping, polishing, and chemical mechanical polishing (CMP). Moreover, during the removal of the excess electrode material 120, the support portion 115 reduces or prevents surface depression of the electrode material 120 within at least one trench 114 such that a smooth and flat (x-y plane) electrode 125 is produced. As used herein, the term "surface depression" refers to over-polishing and removal of the electrode material within the trench (e.g., in the -z direction in the figure) such that an out-of-plane surface of the electrode is not provided. In at least one variant of the present disclosure, the electrode 125 is flat within approximately 5 μm, such as within approximately 2 μm, relative to a planar surface extending parallel to the upper surface 113.

[0033] As Figure 2E and Figure 2F shown, in at least one form of the present disclosure, as Figure 2E and Figure 2F shown, a dielectric layer 118 (also referred to herein as the "upper substrate") is formed by depositing a dielectric material 117 onto the lower substrate 110'. In particular, in step 210, the dielectric material 117 is deposited onto at least one electrode 125 and the adjacent support portion 115 to form a precursor upper substrate 118' ( Figure 2E)。Then, in step 212, the upper substrate 118' on the precursor is thinned and smoothed to form the upper substrate 118 and produce the ceramic substrate 110 having the upper surface 112( Figure 2F )。Thus, the upper substrate 118 is fixed to the lower substrate 110' without hot pressing the two substrates 110', 118 together, and at least one electrode 125 is embedded within the ceramic substrate 110, as Figure 2F shown. In at least one variant, fixing the upper substrate 118 to the lower substrate 110' includes depositing a dielectric material 117 using a layering process, such as thick film, thin film, thermal spraying, and sol-gel processes, etc. A non-limiting example of the thickness of at least one electrode 125 ranges from 5 micrometers (μm) to 125 μm, for example, between 10 μm and 50 μm. A non-limiting example of the upper substrate 118 ranges from 25 μm to 500 μm, for example, between 100 μm and 300 μm.

[0034] As Figure 2G and Figure 2H shown, in at least one other form of the present disclosure, the upper substrate 118 is formed by bonding a dielectric plate 111 to the lower substrate 110'( Figure 2H )。Specifically, in step 214, the dielectric plate 111 is bonded to at least one electrode 125 and / or an adjacent support portion 115 to form the precursor upper substrate 111'( Figure 2G )。Then, in step 216, the precursor upper substrate 111' is thinned and smoothed to form the upper substrate 118 and produce the ceramic substrate 110 having the upper surface 112( Figure 2H )。In at least one variant, the upper substrate 118 is bonded to the lower substrate 110' such that a bonding region 111b is formed by the bonding. In one variant, the bonding region 111b is recessed in the (+z direction) from the lower surface 118' of the upper substrate 118. In this variant, the upper surface 113 of the lower substrate 110' and the lower surface 118' of the upper substrate 118 are bonded within a distance of less than or equal to about 5 μm from each other. Thus, the upper substrate 118 is fixed to the lower substrate 110' without hot pressing the two substrates 110', 118 together and at least one electrode 125 is embedded within the ceramic substrate 110, as Figure 2H shown. The dielectric plate 111 can be bonded to at least one electrode 125 and / or an adjacent support portion 115 using known or to-be-developed bonding techniques. Non-limiting examples of the bonding techniques include using adhesives, brazing, and transient liquid bonding, etc.

[0035] In any form of the present disclosure, the ceramic substrate 110 having at least one embedded electrode 125 shown in Figure 2F and / or Figure 2H can be further processed (as Figure 2Ias shown, such that a mesa 112’ is formed on or in the upper surface 112 of the ceramic substrate 110 (i.e., the outer surface (+z direction) of the upper substrate 118). As used herein, the term “mesa” refers to a flange or step that provides a gap or space between the semiconductor wafer W and the E-chuck 100. The same material removal techniques described above can be used to form the mesa on or in the upper surface 112. It should be understood that the mesa 112’ provides a plurality of gaps or spaces 119 between the wafer W and the ceramic substrate 110, such that facilitating the removal of the wafer W from the E-chuck 100 and / or making it easier to remove the wafer W from the E-chuck 100 compared to the case where there is no gap 119 on the upper surface 112 of the E-chuck 110.

[0036] Now referring to Figure 2J , in some aspects of the present disclosure, the upper surface 112 including the mesa 112’ is coated with an oxide layer 160, such that reducing the chemical corrosion of the upper surface 112 and / or the mesa 112’ during the semiconductor processing of the wafer W. The same material layer deposition techniques described above can be used to deposit the oxide layer 160 on the upper surface 112 (and the mesa 112’) of the upper substrate 118, and the non-limiting range of the thickness of the oxide layer is between about 500 nm and about 10 μm, such as between about 1 μm and about 10 μm, between about 2 μm and about 8 μm, and between about 3 μm and 7 μm. Non-limiting examples of the oxide for forming the oxide layer 160 include yttrium oxide, aluminum oxide, sapphire, silicon dioxide, and SiC, etc.

[0037] Now referring to Figure 3 , a top view of the ceramic substrate 110 is shown, which includes a plurality of electrodes 125 in a plurality of trenches (not labeled) disposed between a plurality of support features 115. As Figure 3 shown, the electrode 125R on the right hand side (+x direction) of the ceramic substrate 110 is isolated from the electrode 125L on the left hand side (-x direction) of the ceramic substrate 110 by the support features 115R and 115L, thereby providing a bipolar electrode design in which one of the electrodes 125 is a cathode and the other electrode 125 is an anode.

[0038] Now referring to Figure 4 , an isometric view of the ceramic substrate 110 having a plurality of mesas 112’ on the upper surface 112. The plurality of mesas 112’ extend upward (+z direction) from the upper surface 112 and support the wafer electrostatically attached to the upper substrate 118.

[0039] It should be understood from the teachings of the present disclosure that an E-chuck and a method of constructing an E-chuck are provided. The method forms trenches with adjacent support features in a lower substrate and deposits electrode material into the trenches. Excess electrode material deposited on the support features is removed therefrom and the support features reduce and / or prevent surface depressions of the electrode material within the trenches such that a flat outer surface of the electrode is produced. An upper substrate is formed on the electrode and the lower substrate without thermal pressing such that the electrode is embedded within the E-chuck ceramic substrate. Thus, an electrode having a uniform thickness and a "flatness" of less than or equal to about 2 μm is provided and embedded within the E-chuck ceramic substrate. It should be understood that during semiconductor processing of a wafer, the uniform thickness and flatness of the electrode provide improved (e.g., more uniform) electrostatic force between the wafer and the electrode embedded within the E-chuck.

[0040] When an element or layer is referred to as being "on another element or layer", "engaged to another element or layer", or "coupled to another element or layer", it can be directly on, engaged, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on another element or layer", "directly engaged to another element or layer", "directly connected to another element or layer", or "directly coupled on another element or layer", no intervening elements or layers may be present. Other words used to describe the relationship between elements should be interpreted in a like manner (e.g., "between" versus "directly between", "adjacent" versus "directly adjacent", etc.). As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0041] For ease of description, spatially relative terms such as "inner", "outer", "beneath", "below", "lower", "above", "upper", etc. may be used herein to describe the relationship of one element or feature to another element or feature shown in the figures. In addition to the orientation depicted in the figures, the spatially relative terms are intended to encompass different orientations of the device in use or operation. For example, if the device in the figures is flipped, an element described as "beneath" or "below" another element or feature would then be oriented "above" the other element or feature. Thus, the exemplary term "beneath" can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein are to be interpreted accordingly.

[0042] As used herein, the phrase "at least one of A, B, and C" should be interpreted to represent the logic (A or B or C) using non-exclusive logical "or", and should not be interpreted as "at least one of A, at least one of B, and at least one of C".

[0043] Unless otherwise expressly stated, when describing the scope of the present disclosure, all numerical values indicating mechanical / thermal properties, percentages by composition, dimensions, and / or tolerances or other properties should be understood to be modified by the word "about" or "approximately". Such modification is desirable for various reasons, including industrial practice, manufacturing techniques, and testing capabilities.

[0044] The terms used herein are for the purpose of describing particular examples only and are not intended to be limiting. The singular forms "a", "an", and "the" may also be intended to include the plural forms, unless the context clearly indicates otherwise. The terms "comprising" and "having" are inclusive and thus specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. The method steps, processes, and operations described herein should not be construed as necessarily requiring them to be performed in the particular order discussed or shown, unless specifically identified as an order of performance. It should also be understood that additional or alternative steps may be employed.

[0045] The description of the present disclosure is merely exemplary in nature and, thus, examples not departing from the substance of the present disclosure are intended to be within the scope of the present disclosure. Such examples should not be regarded as departing from the spirit and scope of the present disclosure. The broad teachings of the present disclosure may be implemented in a variety of forms. Therefore, although the present disclosure includes specific examples, the true scope of the present disclosure should not be so limited because other modifications will become apparent after studying the drawings, the specification, and the appended claims.

Claims

1. A method of constructing an electrostatic chuck, comprising the steps of: forming at least one groove into an upper surface of a lower substrate; depositing an electrode material onto the upper surface of the lower substrate and into the at least one groove; removing excess electrode material from the lower substrate, thereby leaving the electrode material within at least one groove of the substrate to form an electrode; and forming an upper substrate by depositing a ceramic material and fixing the upper substrate to the lower substrate without hot pressing using a layering process; wherein the electrostatic chuck is configured to operate at a voltage of 300 - 12000 volts during semiconductor operations; and the electrostatic chuck is constructed in a manner that does not employ hot pressing.

2. The method according to claim 1, wherein The excess electrode material is removed by a process selected from the group consisting of chemical mechanical planarization / polishing (CMP), etching, and polishing.

3. The method according to claim 1, further comprising at least one support portion within the at least one groove.

4. The method according to claim 1, further comprising depositing an oxide layer onto the upper surface of the upper substrate.

5. The method according to claim 1, wherein Fixing the upper substrate to the lower substrate includes bonding the upper substrate to the lower substrate such that a bonding region is formed through the bonding, and the bonding region is recessed from a lower surface of the upper substrate.

6. The method according to claim 1, wherein The layering process is selected from the group consisting of thick film, thin film, thermal spraying, and sol - gel.

7. The method according to claim 6, wherein The layering process is thermal spraying.

8. The method according to claim 1, wherein The electrode is flat.

9. The method according to claim 1, further comprising forming a mesa on an outer surface of the upper substrate.

10. The method according to claim 9, further comprising depositing a yttrium oxide layer onto the outer surface of the upper substrate and the mesa.

11. The method according to claim 1, wherein The at least one groove is formed by a process selected from the group consisting of laser ablation process, shot peening process, machining, 3D sintering / printing / additive manufacturing, green state, molding, water injection, hybrid laser / water, and dry plasma etching.

12. The method according to any one of claims 1 to 11, wherein, The electrode material is deposited onto the substrate and into the at least one groove by a layering process.

13. The method according to claim 12, wherein, The layering process is selected from thick film, thin film, thermal spraying, and sol - gel process.

14. The method according to claim 1, wherein The electrode material is deposited by melting a metal foil into the at least one groove.

15. The method according to claim 1, wherein The lower substrate is a ceramic selected from the group consisting of aluminum nitride and alumina, and the electrode material is selected from the group consisting of titanium, molybdenum, tungsten, nickel, aluminum, and their alloys.

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