Drive pulse generation circuit and lidar

By combining the differentiator circuit and AND gate in the driving pulse generation circuit, an extremely narrow driving pulse is generated, which solves the problems of high cost and insufficient pulse width in the prior art and realizes the high-frequency emission requirement of the lidar system.

CN114527450BActive Publication Date: 2026-03-27NORTH-CHINA INTEGRATED CIRCUIT CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-03-21
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

In existing technologies, the use of FPGA to generate laser driving pulses is costly and the pulse width cannot reach 1-2ns, which cannot meet the actual needs of lidar systems.

Method used

A drive pulse generation circuit consisting of an initial pulse generation unit, a differentiating unit, and an AND gate is used. The differentiating circuit generates a sharp pulse, and the AND gate is used to AND the initial pulse to generate an extremely narrow drive pulse. Combined with a current limiting unit, the waveform quality is improved.

Benefits of technology

It achieves extremely narrow drive pulse generation, reduces costs, and meets the requirements of lidar systems for faster emission repetition rate, making it suitable for complex emission timing synchronization of multi-line and MEMS lidar.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the field of laser technology and provides a driving pulse generation circuit and a laser radar, wherein the driving pulse generation circuit comprises an initial pulse generating unit, a differential unit and an AND gate; the output ends of the initial pulse generating unit are connected with the input ends of the differential unit and the first input end of the AND gate respectively; the output end of the differential unit is connected with the second input end of the AND gate; the initial pulse generating unit is used for generating an initial pulse; and the output end of the AND gate outputs a target driving pulse. The application adopts a differential circuit to generate a sharp pulse, and then adopts an AND gate to perform AND operation with the initial pulse, so that not only a pulse with extremely narrow pulse width can be generated, but also the circuit structure is simple, the cost is low, and the target driving pulse generated has a strict time sequence relationship with the initial pulse, so that complex light emission time sequence control can be conveniently realized in the laser radar system.
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Description

Technical Field

[0001] This invention belongs to the field of laser technology, and particularly relates to a driving pulse generation circuit and a lidar. Background Technology

[0002] The laser driving circuit is a crucial component of a lidar system. With the widespread application of multi-line lidar, the repetition rate (RePR) requirements for laser diode emission are becoming increasingly stringent. To address this, narrow pulses are typically used in the driving signal to reduce average power, thereby minimizing thermal damage to the laser diode and extending the overall lifespan of the lidar system.

[0003] In existing technologies, FPGAs can be used to increase their reference clock frequency to generate laser driving pulses of less than 5ns. However, this method is costly and the pulse width cannot reach 1-2ns, which cannot meet the needs of practical applications. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a driving pulse generation circuit and a lidar to solve the problems of high cost and poor performance of using FPGA to generate laser driving pulses in the prior art.

[0005] A first aspect of the present invention provides a driving pulse generation circuit, comprising: an initial pulse generation unit, a differentiating unit, and an AND gate;

[0006] The output of the initial pulse generation unit is connected to the input of the differentiating unit and the first input of the AND gate, respectively.

[0007] The output of the differentiating unit is connected to the second input of the AND gate;

[0008] The initial pulse generation unit is used to generate the initial pulse;

[0009] The output of the AND gate outputs the target drive pulse.

[0010] Optionally, the differentiating unit includes: a first resistor and a first capacitor;

[0011] The first terminal of the first capacitor is connected to the input terminal of the differentiating unit, and the second terminal of the first capacitor is connected to the first terminal of the first resistor and the output terminal of the differentiating unit, respectively.

[0012] The second terminal of the first resistor is grounded.

[0013] Optionally, the drive pulse generation circuit may further include: a unidirectional conduction element;

[0014] The anode of the unidirectional conducting element is grounded, and the cathode of the unidirectional conducting element is connected to the second terminal of the first capacitor, the first terminal of the first resistor, and the output terminal of the differentiating unit, respectively.

[0015] Optionally, the unidirectional conducting element is a fast recovery Schottky diode.

[0016] Optionally, the drive pulse generation circuit may also include: a current limiting unit;

[0017] The input of the current limiting unit is connected to the output of the AND gate, and the output of the current limiting unit outputs a drive pulse.

[0018] Optionally, the current limiting unit includes: a second resistor;

[0019] The first end of the second resistor is connected to the input end of the current limiting unit, and the second end of the second resistor is connected to the output end of the current limiting unit.

[0020] Optionally, the resistance of the second resistor is less than 10Ω.

[0021] Optional, initial pulse width T w The range of values ​​for is:

[0022] 5τ <T w <10τ

[0023] τ=RC

[0024] Where R is the resistance of the first resistor, C is the capacitance of the first capacitor, and τ is the time constant.

[0025] Optionally, the resistance of the first resistor is in the range of 10Ω to 30Ω, and the capacitance of the first capacitor is in the range of 330pF to 560pF.

[0026] A second aspect of the present invention provides a lidar, including any of the driving pulse generation circuits and laser diode driving devices described in the first aspect of the present invention;

[0027] The output of the AND gate in the drive pulse generation circuit is connected to the laser diode driver.

[0028] This invention provides a driving pulse generation circuit and a lidar. The driving pulse generation circuit includes an initial pulse generation unit, a differentiating unit, and an AND gate. The output of the initial pulse generation unit is connected to the input of the differentiating unit and the first input of the AND gate. The output of the differentiating unit is connected to the second input of the AND gate. The initial pulse generation unit generates an initial pulse. The output of the AND gate outputs a target driving pulse. This invention uses a differentiating circuit to generate a sharp pulse, and then uses an AND gate to AND the initial pulse, which can generate a pulse with an extremely narrow pulse width. The circuit structure is simple and the cost is low. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of a driving pulse generation circuit provided in an embodiment of the present invention;

[0031] Figure 2 yes Figure 1 The waveform diagram corresponding to the drive pulse generation circuit shown.

[0032] Figure 3 This is a circuit schematic diagram of a driving pulse generation circuit provided in an embodiment of the present invention;

[0033] Figure 4 This is a waveform diagram of the driving pulse generation circuit provided in this embodiment of the invention when no unidirectional conduction element is provided;

[0034] Figure 5 This is a waveform diagram corresponding to the setting of a unidirectional conduction element in the drive pulse generation circuit provided in the embodiment of the present invention;

[0035] Figure 6 This is a schematic diagram of another driving pulse generation circuit provided in an embodiment of the present invention. Detailed Implementation

[0036] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0037] To illustrate the technical solution described in this invention, specific embodiments are described below.

[0038] refer to Figure 1 The present invention provides a driving pulse generation circuit, including: an initial pulse generation unit 11, a differentiating unit 12 and an AND gate U1;

[0039] The output terminal of the initial pulse generation unit 11 is connected to the input terminal of the differentiating unit 12 and the first input terminal A of the AND gate U1, respectively.

[0040] The output of the differentiating unit 12 is connected to the second input B of the AND gate U1;

[0041] The initial pulse generation unit 11 is used to generate an initial pulse;

[0042] The output terminal C of AND gate U1 outputs the target drive pulse.

[0043] In this embodiment of the invention, a differential unit 12 is used to generate a sharp pulse wave, and the rise time of this sharp pulse is short, exhibiting good high-frequency characteristics. For example, refer to... Figure 2 Based on the characteristics of AND gate U1, when both inputs are high, AND gate U1 outputs a high level. ANDing the aforementioned spike pulse with the initial pulse (tens of ns) can output an extremely narrow driving pulse (1-2 ns). The circuit structure is simple, low-cost, and the pulse width can meet the requirements for faster light emission repetition rate, making it suitable for practical applications.

[0044] At the same time, refer to Figure 2 Because the sharp pulse generated by the differential unit has a fast rising edge, it has a strict timing relationship with the initial pulse, which in turn makes the driving pulse have a strict timing relationship with the initial pulse. This allows complex emission timing and MEMS synchronous emission timing to be easily realized in multi-line lidar and MEMS lidar, reducing the clock requirements of the initial pulse generation unit and lowering the cost.

[0045] In some embodiments, reference is made to Figure 3 Differential unit 12 may include: a first resistor R1 and a first capacitor C1;

[0046] The first terminal of the first capacitor C1 is connected to the input terminal of the differentiating unit 12, and the second terminal of the first capacitor C1 is connected to the first terminal of the first resistor R1 and the output terminal of the differentiating unit 12 respectively.

[0047] The second terminal of the first resistor R1 is grounded.

[0048] In this embodiment of the invention, a capacitor-resistor differentiating circuit can be used, which is simple in components, low in cost, and effective. Since the pulse width is related to the time constant of the differentiating circuit, the time constant can be adjusted by adjusting the parameters of the first capacitor C1 and the first resistor R1, thereby adjusting the width of the target driving pulse.

[0049] In some embodiments, the first capacitor C1 can be a non-polarized capacitor.

[0050] In some embodiments, reference is made to Figure 3 The driving pulse generation circuit may also include: a unidirectional conducting element D1;

[0051] The anode of the unidirectional conducting element D1 is grounded, and the cathode of the unidirectional conducting element D1 is connected to the second terminal of the first capacitor C1, the first terminal of the first resistor R1, and the output terminal of the differential unit 12, respectively.

[0052] In this embodiment of the invention, reference Figure 4 At the falling edge of the initial pulse, the differentiating unit 12 generates a negative spike pulse. This negative spike pulse is input to the AND gate U1, which may have a certain impact on the AND gate U1, causing damage to the AND gate U1. Therefore, refer to Figure 3 In this embodiment of the invention, a unidirectional conducting element D1 is provided. When the differentiating unit 12 generates a negative spike pulse, the unidirectional conducting element D1 is turned on, clamping the voltage at the second input terminal B of the AND gate U1, preventing the potential at that point from becoming too low and thus preventing it from affecting the AND gate U1 and damaging the device. Simultaneously, under the action of the differentiating unit 12, the potential at that point gradually recovers to 0V, for example, referring to... Figure 5 .

[0053] In some embodiments, reference is made to Figure 3 The unidirectional conducting element D1 can be a Schottky diode.

[0054] Schottky diodes offer excellent switching characteristics and short reverse recovery time, meeting the requirements of high-frequency applications. Furthermore, the low forward voltage drop of Schottky diodes, meaning low clamping voltage, ensures the safety of AND gate U1 and improves the quality of the input waveform.

[0055] In some embodiments, the forward voltage drop of the Schottky diode can be 0.35V.

[0056] In some embodiments, the recovery time of the Schottky diode can be less than 20 ns.

[0057] The Schottky diode clamps the voltage at the second input terminal B of AND gate U1 to -0.35V, ensuring the safety of AND gate U1.

[0058] In some embodiments, reference is made to Figure 6 The driving pulse generation circuit may also include: a current limiting unit 13;

[0059] The input terminal of the current limiting unit 13 is connected to the output terminal C of the AND gate U1, and the output terminal of the current limiting unit 13 outputs a drive pulse.

[0060] When the drive pulse generation circuit is used to drive the laser diode driving device, the rapid switching of the laser diode driving device generates an oscillation signal, which affects the waveform of the drive pulse. Therefore, in this embodiment of the invention, a current limiting unit 13 is connected to the output terminal C of the AND gate U1 to prevent the influence of the oscillation signal and improve the waveform of the drive signal.

[0061] In some embodiments, reference is made to Figure 3 The current limiting unit 13 may include: a second resistor R2;

[0062] The first end of the second resistor R2 is connected to the input end of the current limiting unit 13, and the second end of the second resistor R2 is connected to the output end of the current limiting unit 13.

[0063] In some embodiments, the resistance of the second resistor R2 may be less than 10Ω.

[0064] The current limiting unit 13 can be a resistor. To improve the waveform quality of the target drive pulse and eliminate overshoot and ringing, the second resistor R2 should not be too large, and should generally be less than 10Ω.

[0065] Furthermore, the resistance of the second resistor R2 can also be 0Ω to ensure the fastest frequency response.

[0066] In some embodiments, the initial pulse width T w The range of values ​​for can be:

[0067] 5τ <T w <10τ

[0068] τ=RC

[0069] Where R is the resistance of the first resistor R1, C is the capacitance of the first capacitor C1, and τ is the time constant.

[0070] In this embodiment of the invention, the differentiating unit 12 is formed by a resistor and a capacitor. Based on the characteristics of the differential property of a resistor and capacitor, if... The pulse waveform output by the differentiating unit 12 is relatively wide, and after passing through the AND gate U1, it cannot generate a narrower drive pulse; however, if The output pulse waveform of the differentiating unit 12 is too narrow, and similarly, it cannot generate an ideal driving pulse after passing through the AND gate U1; when the initial pulse width T w Satisfy 5τ <T w When the value is less than 10τ, the waveform output by the differential unit 12 is good and can be used to generate drive pulses that meet the requirements of practical applications.

[0071] Furthermore, since τ = RC, the initial pulse width T w The range of values ​​for the first resistor R1 and the first capacitor C1 is limited, when the initial pulse width T w When determined, the parameters of the first resistor R1 and the first capacitor C1 can be fine-tuned within the above range to adjust the width of the target driving pulse.

[0072] In some embodiments, the resistance value of the first resistor R1 can be in the range of 10Ω to 30Ω, and the capacitance value of the first capacitor C1 can be in the range of 330pF to 560pF.

[0073] When the resistance of the first resistor R1 is 10Ω and the capacitance of the first capacitor C1 is 560pF, a target drive pulse with a width of approximately 2ns can be output. Adjusting the first resistor R1 and the first capacitor C1 can output a target drive pulse with a width of 1ns.

[0074] Corresponding to any of the above-mentioned driving pulse generation circuits, this embodiment of the invention also provides a lidar, which includes any of the above-mentioned driving pulse generation circuits and a laser diode driving device.

[0075] The output of the AND gate in the drive pulse generation circuit is connected to the laser diode driver.

[0076] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A drive pulse generating circuit characterized by comprising: The application relates to a drive pulse generation circuit and a laser diode driving device. The drive pulse generation circuit comprises an initial pulse generation unit, a differential unit and an AND gate. The output end of the initial pulse generation unit is connected with the input end of the differential unit and the first input end of the AND gate. The output end of the differential unit is connected with the second input end of the AND gate. The initial pulse generation unit is used for generating an initial pulse. The output end of the AND gate outputs a target drive pulse. The differential unit comprises a first resistor and a first capacitor. The first end of the first capacitor is connected with the input end of the differential unit, and the second end of the first capacitor is connected with the first end of the first resistor and the output end of the differential unit. The second end of the first resistor is grounded. the initial pulse width ranges from 0.1 to 0.

5. wherein, is the resistance value of the first resistor, is the capacitance value of the first capacitor, is the time constant.

2. The drive pulse generating circuit of claim 1, wherein The drive pulse generation circuit further comprises a unidirectional conducting element. The anode of the unidirectional conducting element is grounded, and the cathode of the unidirectional conducting element is connected with the second end of the first capacitor, the first end of the first resistor and the output end of the differential unit.

3. The drive pulse generating circuit of claim 2, wherein The unidirectional conducting element is a fast recovery Schottky diode.

4. The drive pulse generating circuit of claim 1, wherein, The drive pulse generation circuit further comprises a current limiting unit. The input end of the current limiting unit is connected with the output end of the AND gate, and the output end of the current limiting unit outputs the drive pulse.

5. The drive pulse generating circuit of claim 4, wherein, The current limiting unit comprises a second resistor. The first end of the second resistor is connected with the input end of the current limiting unit, and the second end of the second resistor is connected with the output end of the current limiting unit.

6. The drive pulse generating circuit of claim 5, wherein, The resistance value of the second resistor is less than 10 ohm.

7. The drive pulse generating circuit of claim 1, wherein, The resistance value of the first resistor ranges from 10 ohm to 30 ohm, and the capacitance value of the first capacitor ranges from 330 pF to 560 pF.

8. A lidar, comprising: The application further discloses a laser diode driving device. The output end of the AND gate of the drive pulse generation circuit is connected with the laser diode driving device.

Citation Information

Patent Citations

  • Laser pulse type generating circuit

    CN103457580A

  • Signal processing method for laser radar and laser radar

    CN111337904A

  • Drive pulse generation circuit and laser radar

    CN217085258U