A semiconductor device and a manufacturing method thereof

Abstract

The application provides a semiconductor device and a manufacturing method thereof. The semiconductor device comprises a substrate and a lower electrode. A landing pad is formed in the substrate. The lower electrode mainly comprises two parts, one of which is a columnar structure formed on the substrate and in contact with the landing pad, and the other of which is a cylindrical structure formed on the columnar structure and in contact with the upper end surface of the columnar structure. The lower electrode is composed of the two parts, i.e. the columnar structure at the lower part and the cylindrical structure at the upper part. Since the columnar structure at the lower part is a solid structure, it has good rigidity and stability, and can support the lower electrode in the form of the cylindrical structure at the upper part, preventing the whole lower electrode from tilting. When a medium layer and an upper electrode are deposited on the lower electrode in subsequent processes, the lower electrode in the form of the columnar structure at the lower part also prevents the whole lower electrode from being deformed by bending, thereby preventing the capacitor from collapsing.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor device and its manufacturing method. Background Technology

[0002] A capacitor is a component that can store electrical charge and energy. Different voltages can be applied to the two electrodes of a capacitor, causing it to store different amounts of charge. Based on this, capacitors can be used to store different types of data. Therefore, the quality of a capacitor directly affects the data storage performance of semiconductor devices.

[0003] To improve memory drive performance, the capacitance of capacitors needs to be increased. A common way to increase capacitor capacitance is to increase the capacitor's height. However, increasing the capacitor's height leads to an increase in its aspect ratio. An increased aspect ratio can cause problems such as capacitor tilting, bending, or even collapse during the wet cleaning process. Summary of the Invention

[0004] This invention provides a semiconductor device and a method for manufacturing the same, used to prevent capacitors from tilting, bending, or collapsing.

[0005] In a first aspect, the present invention provides a semiconductor device comprising a substrate and a lower electrode. A landing pad is formed in the substrate. The lower electrode mainly comprises two parts: one part is a columnar structure formed on the substrate and in contact with the landing pad, and the other part is a cylindrical structure formed on the columnar structure and in contact with the upper end face of the columnar structure.

[0006] In the above scheme, the lower electrode consists of two parts: a columnar structure at the bottom and a cylindrical structure at the top. Since the columnar structure at the bottom is solid, it has good rigidity and stability, supporting the cylindrical lower electrode at the top and preventing the entire lower electrode from tilting. In subsequent processes, when depositing the dielectric layer and the upper electrode on the lower electrode, the columnar lower electrode also prevents the entire lower electrode from bending and deforming, thereby preventing capacitor collapse. In application, because the columnar lower electrode provides good support for the entire lower electrode, the capacitor structure is relatively robust, allowing for a suitable increase in the aspect ratio of the stacked capacitor to increase capacitance and improve storage performance.

[0007] In one specific implementation, the outer edge of the columnar structure coincides with the outer edge of the cylindrical structure, thereby enabling better connection and contact between the lower electrode of the columnar structure and the lower electrode of the cylindrical structure, and improving the support effect of the columnar structure on the cylindrical structure.

[0008] In one specific implementation, an etch barrier layer is deposited on the substrate, and the columnar structure penetrates the etch barrier layer and contacts the landing pad. By depositing an etch barrier layer on the substrate, the substrate quality is ensured by preventing subsequent etching or cleaning operations from affecting the substrate.

[0009] In one specific implementation, the columnar structure is made of the same material as the cylindrical structure to ensure identical electrical properties, thus maintaining relatively consistent electrical performance across the entire lower electrode. When specifically selecting the materials for the columnar and cylindrical structures, titanium nitride or polycrystalline silicon can be chosen to improve the electrical performance of the lower electrode.

[0010] In one specific implementation, the height of the columnar structure is h1, and the height of the cylindrical structure is h2; wherein (h1+h2)×50%≤h1≤(h1+h2)×70%. This ensures the support effect of the columnar lower electrode on the entire lower electrode, while simultaneously increasing the capacitance of the capacitor.

[0011] In one specific embodiment, an upper electrode and a dielectric layer insulating the lower electrode from the upper electrode are formed on the outer wall of the columnar structure and the bottom and inner walls of the cylindrical structure. By providing capacitor structures on both the inner and outer sides of the lower electrode, the capacitance of the capacitor is increased, thereby improving the storage effect.

[0012] In one specific implementation, the semiconductor device is a dynamic random access memory (DRAM) to prevent the capacitor in the DRAM from collapsing due to tilting, bending, or other reasons related to the lower electrode.

[0013] In a second aspect, the present invention also provides a method for manufacturing a semiconductor device, the method comprising: providing a substrate in which a landing pad is formed; forming a lower electrode with a columnar structure in contact with the landing pad on the substrate; and forming a lower electrode with a cylindrical structure in contact with the upper end face of the columnar structure on the columnar structure.

[0014] In the above scheme, the lower electrode consists of two parts: a columnar structure at the bottom and a cylindrical structure at the top. Since the columnar structure at the bottom is solid, it has good rigidity and stability, supporting the cylindrical lower electrode at the top and preventing the entire lower electrode from tilting. In subsequent processes, when depositing the dielectric layer and the upper electrode on the lower electrode, the columnar lower electrode also prevents the entire lower electrode from bending and deforming, thereby preventing capacitor collapse. In application, because the columnar lower electrode provides good support for the entire lower electrode, the capacitor structure is relatively robust, allowing for a suitable increase in the aspect ratio of the stacked capacitor to increase capacitance and improve storage performance.

[0015] In one specific embodiment, forming a columnar lower electrode in contact with a landing pad on a substrate includes: forming a sacrificial film layer covering the substrate above the substrate; etching the sacrificial film layer from top to bottom to form a capacitor via communicating with the landing pad; forming the columnar lower electrode in contact with the landing pad within the capacitor via, wherein the columnar lower electrode does not completely fill the capacitor via. This facilitates the formation of the columnar lower electrode while ensuring that the outer edge of the cylindrical structure formed in subsequent processes coincides with the outer edge of the columnar structure.

[0016] In one specific implementation, forming a columnar lower electrode that contacts the landing pad within the capacitor via, with the columnar structure not completely filling the capacitor via, involves: filling the capacitor via with a lower electrode material layer until the via is completely filled; then removing a portion of the lower electrode material layer from the capacitor via to form the columnar lower electrode. This process ensures that the columnar lower electrode, which does not completely fill the capacitor via, is a solid structure.

[0017] In one specific embodiment, removing a portion of the lower electrode material layer within the capacitor hole to form a columnar lower electrode structure involves: using plasma etching or wet etching to etch a portion of the lower electrode material layer within the capacitor hole from top to bottom, retaining a portion of the lower electrode material layer within the capacitor hole to form a columnar lower electrode structure. This facilitates etching out the columnar lower electrode structure that does not completely fill the capacitor hole.

[0018] In one specific embodiment, forming a cylindrical lower electrode on a columnar structure that contacts the upper end face of the columnar structure includes: depositing a lower electrode material layer on the sidewall of the capacitor hole, the upper end face of the columnar structure, and the surface of the sacrificial film layer; removing the lower electrode material layer outside the capacitor hole using plasma etching or wet etching to form a cylindrical lower electrode; and removing the sacrificial film layer. This facilitates the formation of the cylindrical lower electrode. Attached Figure Description

[0019] Figure 1a This is a schematic diagram of one step in the manufacturing process of a capacitor in the prior art;

[0020] Figure 1b This is a schematic diagram of another step in the manufacturing process of capacitors in the prior art;

[0021] Figure 1c This is a schematic diagram of another step in the manufacturing process of capacitors in the prior art;

[0022] Figure 1d This is a schematic diagram of another step in the manufacturing process of capacitors in the prior art;

[0023] Figure 1e This is a schematic diagram of another step in the manufacturing process of capacitors in the prior art;

[0024] Figure 2a This is a schematic diagram of the structure of a semiconductor device provided in an embodiment of the present invention;

[0025] Figure 2b for Figure 2a A schematic diagram of a semiconductor device as seen from a top view is provided in the image.

[0026] Figure 3 This is a schematic diagram of a step in a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0027] Figure 4a This is a schematic diagram of another step in a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0028] Figure 4b for Figure 4a A schematic diagram of a semiconductor device as seen from a top view is provided in the image.

[0029] Figure 5 This is a schematic diagram of another step in a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0030] Figure 6 This is a schematic diagram of another step in a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0031] Figure 7 This is a schematic diagram of another step in a method for manufacturing a semiconductor device according to an embodiment of the present invention;

[0032] Figure 8 This is a schematic diagram of another step in a method for manufacturing a semiconductor device according to an embodiment of the present invention.

[0033] Figures 1a-1e Figure labels in the diagram:

[0034] 1-Substrate 2-Etching barrier layer 3-Sacrificial film layer

[0035] 4-Capacitor hole; 5-Lower electrode material layer; 6-Lower electrode

[0036] Figure 2~ Figure 8 Figure labels

[0037] 10-Substrate 11-Landing Pad 12-Isolation Section

[0038] 20 - Lower electrode; 21 - Columnar structure; 22 - Cylindrical structure

[0039] 221-Disc body 222-Cylinder body 30-Capacitor port

[0040] 41-Etching barrier layer; 42-Sacrificial film layer; 43-Lower electrode material layer Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0042] To facilitate understanding of the semiconductor device provided in the embodiments of the present invention, the application scenario of the semiconductor device provided in the embodiments of the present invention will be described first. This semiconductor device is applied in a memory with capacitors. The semiconductor device will then be described in detail with reference to the accompanying drawings.

[0043] refer to Figure 2a and Figure 2b The semiconductor device provided in this embodiment of the invention includes a substrate 10 and a lower electrode 20. A landing pad 11 is formed in the substrate 10. The lower electrode 20 mainly comprises two parts: one part is a columnar structure 21 formed on the substrate 10 and in contact with the landing pad 11; the other part is a cylindrical structure 22 formed on the columnar structure 21 and in contact with the upper end face of the columnar structure 21.

[0044] In the above-described design, the lower electrode 20 consists of a lower columnar structure 21 and an upper cylindrical structure 22. Since the lower columnar structure 21 is solid, it has good rigidity and stability, supporting the upper cylindrical structure 22 and preventing the entire lower electrode 20 from tilting. In subsequent processes, when depositing the dielectric layer and the upper electrode on the lower electrode 20, the lower columnar structure 21 also prevents the entire lower electrode 20 from bending and deforming, thus preventing capacitor collapse. In application, because the lower columnar structure 21 provides good support for the entire lower electrode 20, the capacitor structure is relatively robust, allowing for a suitable increase in the aspect ratio of the stacked capacitor to increase capacitance and improve storage performance. The arrangement of these components will be described in detail below with reference to the accompanying drawings.

[0045] When setting up base 10, refer to Figure 2a The substrate 10 can be a structure comprising a single semiconductor material, such as a monocrystalline silicon substrate 10, a polycrystalline silicon substrate 10, etc. The substrate 10 can also be a stacked structure in which a partial semiconductor structure has already been formed. For example, see reference... Figure 2aThe substrate 10 may include at least a semiconductor substrate, a transistor, a bit line structure, a memory contact, an insulating portion, a landing pad 11, and an isolation portion 12. The transistor may be formed on the semiconductor substrate of the semiconductor device. The bit line structure may be formed above the transistor. The memory contact and the insulating portion are formed between adjacent bit line structures. The memory contact contacts the source or drain region of the transistor. The insulating portion isolates two adjacent memory contacts. Simultaneously, each landing pad 11 is formed on its corresponding memory contact. The landing pad 11 is electrically connected to the source or drain region of the transistor through the memory contact. The isolation portion 12 is formed on the bit line structure and the insulating portion, and the isolation portion 12 isolates two adjacent landing pads 11.

[0046] When setting the lower electrode 20, refer to Figure 2a and Figure 2b The lower electrode 20 mainly comprises two parts: one part is a columnar structure 21 formed on the substrate 10 and in contact with the landing pad 11; the other part is a cylindrical structure 22 formed on the columnar structure 21 and in contact with the upper end face of the columnar structure 21. The columnar structure 21 is a solid structure, which can be a cylinder, prism, or other similar columnar structure. The lower end face of the columnar structure 21 contacts the landing pad 11, and the upper end face contacts the lower end face of the cylindrical structure 22. The cylindrical structure 22 is a hollow structure, including a disk 221 in contact with the upper end face of the columnar structure 21, and a cylindrical body 222 connected to the edge of the disk 221. The cylindrical body 222 is a hollow, thin-walled structure. The disk 221 is a solid thin-walled structure that contacts the upper end face of the columnar structure 21, thereby enabling the columnar structure 21 of the lower electrode 20 to make better contact with the cylindrical structure 22 and reduce resistivity.

[0047] Existing methods for manufacturing capacitors include: Figures 1a-1e As shown, for reference Figure 1a First, an etching barrier layer 2 and a sacrificial film layer 3 are deposited on substrate 1; then, referencing Figure 1b Etching the sacrificial film layer 3 and the barrier layer 2 forms the capacitor hole 4; then, referencing Figure 1c Electrode material layer 5 is deposited on the sacrificial film layer 3, the inner wall and bottom wall of the capacitor hole 4; then, referring to Figure 1d Remove the lower electrode material layer 5 outside the capacitor hole 4 to form the lower electrode 6; then, refer to Figure 1e The sacrificial film layer 3 is removed; subsequently, a dielectric layer and an upper electrode are deposited on the lower electrode 6 to form a capacitor.

[0048] By using existing technologies Figure 1e The semiconductor device shown is related to the present invention. Figure 2aCompared to the semiconductor device shown, the arrangement disclosed in this invention, with its solid columnar structure 21 at the bottom, exhibits better rigidity and stability, supporting the lower electrode 20 of the upper cylindrical structure 22 and preventing the entire lower electrode 20 from tilting. In subsequent processes, when depositing the dielectric layer and the upper electrode on the lower electrode 20, the lower electrode 20 with its columnar structure 21 further prevents bending and deformation, thus preventing capacitor collapse. In application, because the lower electrode 20 with its columnar structure 21 provides good support for the entire lower electrode 20, the capacitor structure is more robust, allowing for a suitable increase in the aspect ratio of the stacked capacitors to increase capacitance and improve storage performance.

[0049] In addition, the outer edge of the columnar structure 21 can be aligned with the outer edge of the cylindrical structure 22, that is, the upper end face of the columnar structure 21 and the lower end face of the disk 221 in the cylindrical structure 22 are the same size and shape, and the outer edge of the upper end face of the columnar structure 21 and the outer edge of the lower end face of the disk 221 are aligned, so that the lower electrode 20 of the columnar structure 21 and the lower electrode 20 of the cylindrical structure 22 can be better connected and contacted, thereby improving the support effect of the columnar structure 21 on the cylindrical structure 22 and reducing the resistivity of the conductive connection between the columnar structure 21 and the cylindrical structure 22.

[0050] When determining the materials for the columnar structure 21 and the cylindrical structure 22, the materials of the columnar structure 21 and the cylindrical structure 22 can be made the same to ensure that their electrical properties are identical, thus maintaining relatively consistent electrical performance across the entire lower electrode 20. Specifically, titanium nitride or polycrystalline silicon can be chosen as the materials for the columnar structure 21 and the cylindrical structure 22 to improve the electrical performance of the lower electrode 20. It should be understood that the materials of the columnar structure 21 and the cylindrical structure 22 can also be different; for example, the columnar structure 21 can be made of polycrystalline silicon, and the cylindrical structure 22 can be made of titanium nitride.

[0051] Continue to refer to Figure 2a and Figure 2b An etch barrier layer 41 can be deposited on the substrate 10, and a columnar structure 21 penetrates the etch barrier layer 41 and contacts the landing pad 11. Specifically, a capacitor via 30 is present on the etch barrier layer 41, and this capacitor via 30 communicates with the landing pad 11. The columnar structure 21 penetrates the capacitor via 30 and contacts the landing pad 11. By depositing the etch barrier layer 41 on the substrate 10, subsequent etching or cleaning operations can be prevented from affecting the substrate 10, ensuring the quality of the substrate 10.

[0052] When continuing to set the dielectric layer and the upper electrode to complete the manufacturing of the entire capacitor, the upper electrode and the dielectric layer that insulates and isolates the lower electrode 20 from the upper electrode can be formed on the outer wall of the columnar structure 21 and the bottom and inner walls of the cylindrical structure 22. That is, the dielectric layer and the upper electrode are formed on the outer wall of the columnar structure 21 of the lower electrode 20, and the dielectric layer and the upper electrode are formed not only on the inner and bottom walls of the cylindrical structure 22 of the lower electrode 20, but also on the outer wall. By setting the capacitor structure on both the inner and outer sides of the lower electrode 20, the capacitance of the capacitor is increased, and the storage effect is improved. It should be understood that the method of setting the dielectric layer and the upper electrode is not limited to the above method. In addition, other methods can be used. For example, the dielectric layer and the upper electrode can be formed only on the inner and bottom walls of the cylindrical structure 22 of the lower electrode 20, and the dielectric layer and the upper electrode can be left unformed on the outer wall of the cylindrical structure 22 of the lower electrode 20.

[0053] When determining the heights of the two main parts of the lower electrode 20, reference is made to... Figure 2a We can assume that the height of the columnar structure 21 of the lower electrode 20 is h1, that is, the vertical distance between the lower end face of the columnar structure 21 that contacts the landing pad 11 and the upper end face of the columnar structure 21 that contacts the disk body 221 of the cylindrical structure 22 is h1. The height of the cylindrical structure 22 of the lower electrode 20 is h2, that is, the vertical distance between the lower end face of the disk body 221 and the upper end face of the cylinder body 222 in the cylindrical structure 22 is h2. We can set h1 and h2 to satisfy (h1+h2)×50%≤h1≤(h1+h2)×70%, that is, the height h1 of the columnar structure 21 accounts for 50% to 70% of the total height of the lower electrode 20. Specifically, h1 can be set to any value between 50% and 70% of the total height of the lower electrode 20, such as h1 = (h1+h2)×50%, h1 = (h1+h2)×55%, h1 = (h1+h2)×60%, h1 = (h1+h2)×65%, h1 = (h1+h2)×70%. When the relationship between the heights of the two parts of the lower electrode 20 satisfies the above relationship, the height of the columnar structure 21 is kept at a reasonable height, and the columnar structure 21 can provide good support for the entire lower electrode 20, ensuring the support effect of the columnar structure 21 on the entire lower electrode 20. At the same time, the height of the cylindrical structure 22 is made more suitable, since the upper electrode can be set on both the inner and outer walls of the cylindrical structure 22, thereby increasing the surface area of ​​the lower electrode 20 relative to the upper electrode position and increasing the capacitance of the capacitor.

[0054] When determining the type of semiconductor device, it can be a dynamic random access memory (DRAM) to prevent capacitor collapse caused by tilting or bending of the lower electrode 20. The semiconductor device can also be a static random-access memory (SRAM), flash memory, or other memory that uses capacitors as storage cells.

[0055] The lower electrode 20 consists of a lower columnar structure 21 and an upper cylindrical structure 22. Since the lower columnar structure 21 is solid, it has good rigidity and stability, supporting the upper cylindrical structure 22 and preventing the entire lower electrode 20 from tilting. In subsequent processes, when depositing the dielectric layer and the upper electrode on the lower electrode 20, the lower columnar structure 21 also prevents the entire lower electrode 20 from bending and deforming, thus preventing capacitor collapse. In application, because the lower columnar structure 21 provides good support for the entire lower electrode 20, the capacitor structure is relatively robust, allowing for a suitable increase in the aspect ratio of the stacked capacitor to increase capacitance and improve storage performance.

[0056] In addition, embodiments of the present invention also provide a method for manufacturing a semiconductor device, see reference. Figures 2a to 8 The manufacturing method includes:

[0057] Step 1: Provide a substrate 10, and form a landing pad 11 in the substrate 10;

[0058] Step 2: Form a lower electrode 20 with a columnar structure 21 on the substrate 10 that contacts the landing pad 11;

[0059] Step 3: Form a lower electrode 20 on the columnar structure 21, which is in the shape of a cylindrical structure 22 and contacts the upper end face of the columnar structure 21.

[0060] In the above scheme, the lower electrode 20 consists of two parts: a columnar structure 21 located below and a cylindrical structure 22 located above. Since the columnar structure 21 is a solid structure, it has good rigidity and stability, supporting the lower electrode 20 of the upper cylindrical structure 22 and preventing the entire lower electrode 20 from tilting. In subsequent processes, when depositing the dielectric layer and the upper electrode on the lower electrode 20, the columnar structure 21 also prevents the entire lower electrode 20 from bending and deforming, thereby preventing the capacitor from collapsing. In application, because the columnar structure 21 provides good support for the entire lower electrode 20, the capacitor structure is relatively robust, allowing for an appropriate increase in the aspect ratio of the stacked capacitor to increase capacitance and improve storage performance. The following is a detailed description of each step in conjunction with the accompanying drawings.

[0061] First, refer to Figure 3 A substrate 10 is provided, in which landing pads 11 are formed. The substrate 10 can be a structure comprising a single semiconductor material, such as a monocrystalline silicon substrate 10, a polycrystalline silicon substrate 10, etc. The substrate 10 can also be a stacked structure in which partial semiconductor structures have already been formed. For example, see reference... Figure 2a The substrate 10 may include at least a semiconductor substrate, a transistor, a bit line structure, a memory contact, an insulating portion, a landing pad 11, and an isolation portion 12. The transistor may be formed on the semiconductor substrate of the semiconductor device. The bit line structure may be formed above the transistor. The memory contact and the insulating portion are formed between adjacent bit line structures. The memory contact contacts the source or drain region of the transistor. The insulating portion isolates two adjacent memory contacts. Simultaneously, each landing pad 11 is formed on its corresponding memory contact. The landing pad 11 is electrically connected to the source or drain region of the transistor through the memory contact. The isolation portion 12 is formed on the bit line structure and the insulating portion, and the isolation portion 12 isolates two adjacent landing pads 11.

[0062] Next, a lower electrode 20 with a columnar structure 21 that contacts the landing pad 11 is formed on the substrate 10. For specific fabrication, refer to... Figure 3 First, a sacrificial film layer 42 covering the substrate 10 can be formed on top of the substrate 10; then, refer to Figure 4a and Figure 4b The sacrificial film layer 42 is etched from top to bottom to form a capacitor via 30 communicating with the landing pad 11; then, referring to Figure 6A lower electrode 20 with a columnar structure 21 is formed within the capacitor hole 30, contacting the landing pad 11, and the lower electrode 20 with the columnar structure 21 does not completely fill the capacitor hole 30. By forming the lower electrode 20 with the columnar structure 21 in contact with the landing pad 11 within the capacitor hole 30, the lower electrode 20 with the columnar structure 21 is formed; the columnar structure 21 does not completely fill the capacitor hole 30, and at the same time, the outer edge of the cylindrical structure 22 formed in the subsequent process coincides with the outer edge of the columnar structure 21.

[0063] Continue to refer to Figure 3 , Figure 4a , Figure 4b and Figure 6 An etching barrier layer 41 can be deposited between the sacrificial film layer 42 and the substrate 10. In this case, the sacrificial film layer 42 is not directly disposed on the substrate 10; the sacrificial film layer 42 and the substrate 10 are separated by the etching barrier layer 41. By stacking the etching barrier layer 41 between the sacrificial film layer 42 and the substrate 10, subsequent etching or cleaning operations can be prevented from affecting the substrate 10, ensuring the quality of the substrate 10. When determining the material of the etching barrier layer 41, SiN, SiBN, or SiCN can be selected to improve the blocking effect during etching. At this time, when forming the capacitor hole 30, the sacrificial film layer 42 and the etching barrier layer 41 are etched sequentially from top to bottom, so that the capacitor hole 30 is connected to the landing pad 11, and the lower end face of the columnar structure 21 formed in the capacitor hole 30 contacts the landing pad 11. It should be noted that the sacrificial film layer 42 can also be in direct contact with the substrate 10, that is, the sacrificial film layer 42 and the substrate 10 can be separated by an etch barrier layer 41.

[0064] When the lower electrode 20, which is processed into a columnar structure 21, does not completely fill the capacitor hole 30, refer to Figure 5 First, the lower electrode material layer 43 is filled into the capacitor hole 30, and the lower electrode material layer 43 completely fills the capacitor hole 30; (Refer to...) Figure 6Next, a portion of the lower electrode material layer 43 within the capacitor hole 30 is removed to form a lower electrode 20 with a columnar structure 21. By first filling the capacitor hole 30 with the lower electrode material layer 43 and then removing a portion of the lower electrode material layer 43 within the capacitor hole 30, a columnar structure that does not completely fill the capacitor hole 30 is formed, thus facilitating the formation of the lower electrode 20 with a columnar structure 21 that does not completely fill the capacitor hole 30, ensuring that the columnar structure 21 is a solid structure. When removing a portion of the lower electrode material layer 43 within the capacitor hole 30 to form the lower electrode 20 with a columnar structure 21, plasma etching or wet etching can be used to etch a portion of the lower electrode material layer 43 within the capacitor hole 30 from top to bottom, retaining a portion of the lower electrode material layer 43 within the capacitor hole 30 to form the lower electrode 20 with a columnar structure 21. By using plasma etching or wet etching, the lower electrode 20 with a columnar structure 21 that does not completely fill the capacitor hole 30 can be etched out. It should be understood that the method of forming the lower electrode 20 with a columnar structure 21 that fills the capacitor hole 30 is not limited to the method shown above of filling first and then partially removing. Other methods can also be used. For example, the lower electrode material layer 43 can be left unfilled in the capacitor hole 30, thus directly forming the effect of the lower electrode 20 with a columnar structure 21 that does not fill the capacitor hole 30.

[0065] refer to Figure 5 and Figure 6 When removing the lower electrode material layer 43 inside the capacitor hole 30, the lower electrode material layer 43 deposited on the sacrificial film layer 42 can also be removed at the same time. Alternatively, the lower electrode material layer 43 located outside the capacitor hole 30 can be removed together when the lower electrode 20 of the cylindrical structure 22 is subsequently formed.

[0066] Next, a lower electrode 20, forming a cylindrical structure 22 in contact with the upper end face of the columnar structure 21, is formed on the columnar structure 21. When forming the lower electrode 20, forming a cylindrical structure 22 in contact with the upper end face of the columnar structure 21, reference is made. Figure 7 A lower electrode material layer 43 can be deposited on the sidewalls of the capacitor hole 30, the upper end face of the columnar structure 21, and the surface of the sacrificial film layer 42. The lower electrode material layer 43 deposited in this step is a relatively thin material layer deposited on the sidewalls of the capacitor hole 30, the upper end face of the columnar structure 21, and the surface of the sacrificial film layer 42. This process is different from the process of depositing the lower electrode material layer 43 during the process of filling the capacitor hole 30 described above. Then, refer to... Figure 8 Remove the lower electrode material layer 43 outside the capacitor hole 30 to form a lower electrode 20 with a cylindrical structure 22; then, refer to Figure 2a and Figure 2bThe sacrificial film layer 42 is removed to form the lower electrode 20, which consists of a columnar structure 21 and a cylindrical structure 22. When removing the lower electrode material layer 43 and the sacrificial film layer 42 outside the capacitor hole 30, plasma etching or wet etching can be used to remove the lower electrode material layer 43 and the sacrificial film layer 42 outside the capacitor hole 30, so as to form the lower electrode 20 with a cylindrical structure 22.

[0067] The lower electrode 20 consists of a lower columnar structure 21 and an upper cylindrical structure 22. Since the lower columnar structure 21 is solid, it has good rigidity and stability, supporting the upper cylindrical structure 22 and preventing the entire lower electrode 20 from tilting. In subsequent processes, when depositing the dielectric layer and the upper electrode on the lower electrode 20, the lower columnar structure 21 also prevents the entire lower electrode 20 from bending and deforming, thus preventing capacitor collapse. In application, because the lower columnar structure 21 provides good support for the entire lower electrode 20, the capacitor structure is relatively robust, allowing for a suitable increase in the aspect ratio of the stacked capacitor to increase capacitance and improve storage performance.

[0068] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A semiconductor device, characterized in that, include: A landing pad is formed in a substrate, the substrate further including an isolation portion, a storage contact portion and a transistor, the landing pad is formed on the storage contact portion, the landing pad is electrically connected to the source region or drain region of the transistor through the storage contact portion, and the isolation portion is used to isolate two adjacent landing pads; The lower electrode includes: A columnar structure is formed on the substrate and in contact with the landing pad, wherein an etch barrier layer is deposited on the substrate, and the columnar structure penetrates the etch barrier layer and then contacts the landing pad; A cylindrical structure is formed on the columnar structure and in contact with the upper end face of the columnar structure, wherein the outer edge of the columnar structure coincides with the outer edge of the cylindrical structure, and the diameter of the landing pad is larger than the diameter of both the columnar structure and the cylindrical structure. The height of the columnar structure is h1, and the height of the cylindrical structure is h2; wherein, (h1+h2)×50%≤h1≤(h1+h2)×70%.

2. The semiconductor device as claimed in claim 1, characterized in that, The columnar structure is made of the same material as the cylindrical structure.

3. The semiconductor device as described in claim 2, characterized in that, Both the columnar and cylindrical structures are made of titanium nitride or polycrystalline silicon.

4. The semiconductor device as claimed in claim 1, characterized in that, An upper electrode and a dielectric layer that insulates and isolates the lower electrode from the upper electrode are formed on the outer wall of the columnar structure and the outer wall of the cylindrical structure, as well as on the bottom wall and inner wall of the cylindrical structure.

5. A method for manufacturing a semiconductor device, characterized in that, include: A substrate is provided in which landing pads are formed. The substrate also includes an isolation portion, a storage contact portion, and a transistor. The landing pads are formed on the storage contact portion and are electrically connected to the source or drain region of the transistor through the storage contact portion. The isolation portion is used to isolate two adjacent landing pads. A columnar lower electrode is formed on the substrate and contacts the landing pad. An etch barrier layer is deposited on the substrate, and the columnar structure penetrates the etch barrier layer and contacts the landing pad. A lower electrode in the form of a cylindrical structure is formed on the columnar structure and contacts the upper end face of the columnar structure. The outer edge of the columnar structure coincides with the outer edge of the cylindrical structure. The height of the columnar structure is h1, and the height of the cylindrical structure is h2. Wherein, (h1+h2)×50%≤h1≤(h1+h2)×70%, and the diameter of the landing pad is greater than the diameter of the columnar structure and the cylindrical structure.

6. The manufacturing method as described in claim 5, characterized in that, The lower electrode, which has a columnar structure formed on the substrate and contacts the landing pad, includes: A sacrificial film layer is formed over the substrate to cover the substrate; The sacrificial film layer is etched from top to bottom to form a capacitor via communicating with the landing pad; A columnar lower electrode is formed within the capacitor hole, contacting the landing pad, and the columnar lower electrode does not completely fill the capacitor hole.

7. The manufacturing method as described in claim 6, characterized in that, The lower electrode with a columnar structure formed within the capacitor hole and in contact with the landing pad, wherein the columnar structure does not completely fill the capacitor hole, specifically means: The lower electrode material layer is filled into the capacitor hole, and the lower electrode material layer completely fills the capacitor hole; Remove a portion of the lower electrode material layer within the capacitor hole to form the columnar lower electrode.

8. The manufacturing method as described in claim 7, characterized in that, The step of removing a portion of the lower electrode material layer within the capacitor hole to form the columnar lower electrode specifically involves: The lower electrode material layer inside the capacitor hole is etched from top to bottom using plasma etching or wet etching, while retaining part of the lower electrode material layer inside the capacitor hole to form the columnar lower electrode.

9. The manufacturing method as described in claim 6, characterized in that, The lower electrode, which has a cylindrical structure formed on the columnar structure and contacts the upper end face of the columnar structure, includes: The lower electrode material layer is deposited on the sidewall of the capacitor hole, the upper end face of the columnar structure, and the surface of the sacrificial film layer; The lower electrode material layer outside the capacitor hole is removed by plasma etching or wet etching to form the lower electrode with a cylindrical structure. Remove the sacrificial film layer.

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