Display device

Abstract

Display device. According to one aspect of this disclosure, a display device includes: a stretchable lower substrate and a plurality of first substrates disposed on the lower substrate. The display device further includes a plurality of second substrates, the plurality of second substrates connecting adjacent first substrates among the plurality of first substrates. The display device further includes a plurality of pixels disposed on the plurality of first substrates. The display device further includes a plurality of connecting lines disposed on the plurality of second substrates and connecting the plurality of pixels. The display device further includes a protective layer disposed on each of the plurality of pixels.

Description

Technical Field

[0001] This disclosure relates to a display device, and more particularly, to a stretchable display device including a protective layer for protecting pixels. Background Technology

[0002] Display devices used in computers, TVs, mobile phones, etc., include self-emissive organic light-emitting displays (OLEDs) and liquid crystal displays (LCDs) that require a separate light source.

[0003] As display devices are increasingly used in a wide variety of fields such as computer monitors, TVs, and personal mobile devices, display devices with large effective area and reduced size and weight have been studied.

[0004] Recently, as the next generation of display devices, there has been much attention focused on display devices that form display elements, circuits, etc. on flexible substrates made of flexible plastic and can be stretched in a specific direction to form various shapes. Summary of the Invention

[0005] The purpose of this disclosure is to provide a display device that will not be damaged even if repeatedly stretched.

[0006] Another objective of this disclosure is to provide a display device that can improve light extraction efficiency.

[0007] Another objective of this disclosure is to provide a display device capable of suppressing misalignment of light-emitting diodes.

[0008] The purpose of this disclosure is not limited to the above-mentioned purposes, and other purposes not mentioned above will be clearly understood by those skilled in the art through the following description.

[0009] These objectives are addressed by the features of the independent claims. Preferred embodiments are given in the dependent claims.

[0010] According to one aspect of this disclosure, a display device includes a stretchable lower substrate and a plurality of first substrates disposed on the lower substrate. The display device also includes a plurality of second substrates connecting adjacent first substrates. The display device further includes a plurality of pixels disposed on the plurality of first substrates. The display device also includes a plurality of connecting lines disposed on the plurality of second substrates and connecting the plurality of pixels. The display device further includes a protective layer disposed on each of the plurality of pixels.

[0011] According to another aspect of this disclosure, the display device includes: a stretchable substrate that is reversibly expandable and contractable; a plurality of rigid substrates that are spaced apart from each other on the stretchable substrate; a plurality of pixels disposed on the plurality of rigid substrates; a plurality of connecting lines disposed on the plurality of rigid substrates and connecting the plurality of pixels; a protective layer that covers the plurality of pixels; and a plurality of tips disposed outside the protective layer.

[0012] Further details of the exemplary embodiments are included in the detailed description and drawings. The following optional features may be combined, alone or in combination, with any of the aspects mentioned above.

[0013] In one or more preferred embodiments, the multiple connecting lines may extend on multiple first substrates.

[0014] In one or more preferred embodiments, the protective layer may overlap with multiple connecting lines.

[0015] In one or more preferred embodiments, the multiple connecting lines may extend on multiple first substrates.

[0016] In one or more preferred embodiments, the protective layer may not overlap with multiple connecting lines.

[0017] In one or more preferred embodiments, the protective layer may include multiple patterns, each having a triangular cross-section.

[0018] In one or more preferred embodiments, the plurality of pixels may include light-emitting LEDs and embankments defining the plurality of pixels.

[0019] In one or more preferred embodiments, the display device may include an upper substrate that is stretchable and can be disposed on a protective layer.

[0020] In one or more preferred embodiments, there may be a contact area between the protective layer and the upper substrate.

[0021] The contact area mentioned above can be smaller than the contact area between the protective layer and the LED and the embankment.

[0022] In one or more preferred embodiments, there is no step difference between the upper surface of the LED and the upper surface of the embankment.

[0023] In other words, the height of the upper surface of the LED and the upper surface of the embankment can be the same.

[0024] In one or more preferred embodiments, a step difference may exist between the upper surface of the LED and the upper surface of the embankment.

[0025] In one or more preferred embodiments, the display device may further include a plurality of protrusions disposed on at least two sides of a plurality of pixels.

[0026] In one or more preferred embodiments, the multiple protrusions may be embossed patterns protruding from the protective layer and / or may contact the side surface of the LED.

[0027] In one or more preferred embodiments, the multiple tips may not overlap with the multiple connecting lines.

[0028] In one or more preferred embodiments, the protective layer may include multiple prism patterns or multiple conventional tetrahedral patterns.

[0029] In one or more preferred embodiments, the display device may further include a plurality of protrusions that protrude downward from the protective layer.

[0030] In one or more preferred embodiments, the plurality of protrusions may contact an LED included in each of the plurality of pixels.

[0031] According to this disclosure, the light-emitting diodes (LEDs) will not be damaged when the display device is repeatedly stretched. Therefore, stretching reliability can be improved.

[0032] According to this disclosure, light extraction efficiency is improved. Therefore, the brightness of the display device can be increased.

[0033] According to public information, this allows for more precise LED delivery. Therefore, it can increase the output of the delivery process.

[0034] The effects of this disclosure are not limited to those illustrated above, and this specification includes many more effects. Attached Figure Description

[0035] The above and other aspects, features and other advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0036] Figure 1 This is an exploded perspective view of a display device according to an exemplary embodiment of the present disclosure;

[0037] Figure 2 This is an enlarged plan view of the display area of ​​a display device according to an exemplary embodiment of the present disclosure;

[0038] Figure 3 It is along Figure 2 A schematic cross-sectional view taken from line III-III′;

[0039] Figure 4 This is a circuit diagram of a sub-pixel of a display device according to an exemplary embodiment of the present disclosure;

[0040] Figure 5 This is an enlarged plan view of the display area of ​​a display device according to another exemplary embodiment of the present disclosure;

[0041] Figure 6 It is along Figure 5 A schematic cross-sectional view of line VI-VI′;

[0042] Figure 7 This is an enlarged plan view of the display area of ​​a display device according to yet another exemplary embodiment of the present disclosure;

[0043] Figure 8 It is along Figure 7 A schematic cross-sectional view of line VIII-VIII′; and

[0044] Figure 9 This is a cross-sectional view of a display device according to yet another exemplary embodiment of the present disclosure. Detailed Implementation

[0045] The advantages and features of this disclosure, as well as methods for implementing it, will become clearer from the exemplary embodiments described below with reference to the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments described below, but can be implemented in various different forms. Exemplary embodiments are provided only to complete the disclosure and to fully provide the scope of this disclosure to those skilled in the art, and this disclosure is defined by the appended claims.

[0046] The shapes, dimensions, ratios, angles, quantities, etc., shown in the accompanying drawings for the purpose of describing exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, similar reference numerals generally refer to similar elements. Furthermore, in the following description of this disclosure, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of other components, unless these terms are used in conjunction with the term “only.” Any reference to the singular may include the plural unless explicitly stated otherwise.

[0047] Even if not explicitly mentioned, components are interpreted as including the normal error range.

[0048] When using terms such as “up,” “above,” “below,” or “next” to describe the positional relationship between two parts, one or more parts may be located between the two parts unless these terms are used together with the terms “close to” or “directly.”

[0049] When a component or layer is referred to as being "on" another component or layer, the component may be located directly on the other component or layer, or there may be an intermediate component or layer.

[0050] Although the terms "first," "second," etc., are used to describe various components, these components are not bound by these terms. These terms are only used to distinguish one component from others. Therefore, in the technical concept of this disclosure, the first component mentioned below can be the second component.

[0051] Throughout the specification, the same reference numerals refer to the same elements.

[0052] Since the dimensions and thicknesses of each component illustrated in the accompanying drawings are presented for ease of interpretation, this disclosure is not necessarily limited to the dimensions and thicknesses of each component shown.

[0053] The features of the various embodiments of this disclosure may be partially or wholly linked or combined with each other, and may be technically interlocked and operated in various ways, and the embodiments may be implemented independently or in association with each other.

[0054] In the following, various exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0055] <Display Device>

[0056] A display device can display images even when bent or stretched and can be called a stretchable display device. Display devices can have greater flexibility than typical conventional display devices and can be stretchable. Therefore, a display device can freely deform through user manipulation (such as bending or stretching). For example, when a user grasps the end of the display device and pulls it, the display device can be stretched in the direction of the pull. When a user places the display device on an uneven outer surface, the display device can bend along the shape of the outer surface of the wall. Furthermore, when the force applied by the user is removed, the display device can return to its original shape.

[0057] Figure 1 This is an exploded perspective view of a display device according to an exemplary embodiment of the present disclosure. (Refer to...) Figure 1 The display device 100 includes a lower substrate 111, an upper substrate 112, a plurality of first substrates 121, a plurality of second substrates 122, a plurality of third substrates 123 and 124, and a printed circuit board 130. Furthermore, the display device 100 includes a plurality of pixels PX, a gating driver GD, and a data driver DD.

[0058] The lower substrate 111 is a substrate used to support and protect the various components of the display device 100. In addition, the upper substrate 112 is a substrate used to cover and protect the various components of the display device 100.

[0059] Each of the lower substrate 111 and the upper substrate 112 is a stretchable substrate. It is made of a flexible or stretchable insulating material. For example, each of the lower substrate 111 and the upper substrate 112 may be made of silicone rubber such as polydimethylsiloxane (PDMS) and elastomers such as polyurethane (PU), polytetrafluoroethylene (PTFE), etc. Each of the lower substrate 111 and the upper substrate 112 may have flexible properties. Furthermore, the lower substrate 111 and the upper substrate 112 may be made of the same material, but are not limited thereto, and may also be made of different materials.

[0060] Each of the lower substrate 111 and the upper substrate 112 is a stretchable substrate and can reversibly expand and contract. Therefore, the lower substrate 111 can also be referred to as the lower stretchable substrate or the first stretchable substrate.

[0061] The upper substrate 112 can also be called the upper extended substrate or the second extended substrate.

[0062] The lower substrate 111 and the upper substrate 112 may have an elastic modulus in the range of several MPa to several hundred MPa.

[0063] The lower substrate 111 and the upper substrate 112 may have a ductile fracture rate of 100% or higher. Here, the ductile fracture rate refers to the distance the stretched object extends when it breaks or fractures.

[0064] The lower substrate can have a thickness of 10 μm to 1 mm, but is not limited to this.

[0065] The lower substrate 111 may have a display area AA and a non-display area NA surrounding the display area AA.

[0066] The display area AA is the area on the display device 100 where an image is displayed. Multiple pixels PX are set within the display area AA.

[0067] Each pixel PX may include a display element and various driving elements for driving the display element. These driving elements may refer to at least one thin-film transistor (TFT) and a capacitor, but are not limited to these. Each of the multiple pixel PXs may be connected to various lines. For example, each of the multiple pixel PXs may be connected to various lines such as gating lines, data lines, high-potential power lines, low-potential power lines, and reference voltage lines.

[0068] A protective layer can be applied to each pixel PX to protect each pixel PX.

[0069] The non-display area NA is a region where no image is displayed. The non-display area NA can be an area adjacent to and at least partially or completely surrounding the display area AA, but is not limited to this. The non-display area NA is the area in the lower substrate 111 excluding the display area AA. It can be transformed and separated into various shapes. Driving elements for driving multiple pixels PX disposed in the display area AA can be provided in the non-display area NA. A gating driver GD comprising one or more chips can be provided in the non-display area NA. Furthermore, multiple pads connected to the gating driver GD and / or the data driver DD can be provided in the non-display area NA. Each pad can be connected to one or more pixels PX disposed in the display area AA.

[0070] On the lower substrate 111, a plurality of first substrates 121, a plurality of second substrates 122, and a plurality of third substrates 123 and 124 are disposed.

[0071] A plurality of first substrates 121 are disposed in the display area AA of the lower substrate 111, and a plurality of pixels PX are disposed on the plurality of first substrates 121. Therefore, each of the plurality of first substrates 121 may include one or more pixels PX. In addition, a plurality of third substrates 123, 124 are disposed in the non-display area NA of the lower substrate 111. A gating driver GD and / or a plurality of pads are formed on the plurality of third substrates 123, 124.

[0072] like Figure 1 As shown, the gate driver GD can be mounted on the third substrate 123 located on one side of the display area AA in the X-axis direction among a plurality of third substrates 123, 124. When various components are manufactured on the first substrate 121, the gate driver GD can be formed on the third substrate 123 in a gate-in-plane (GIP) manner. Therefore, various circuit components constituting the gate driver GD (such as various transistors, capacitors, lines, etc.) can be disposed on the plurality of third substrates 123, 124. However, this disclosure is not limited thereto. The gate driver GD can be mounted in a chip-on-film (COF) manner. Moreover, the plurality of third substrates 123, 124 can be disposed in the non-display area NA located on the other side of the display area AA in the X-axis direction. The gate driver GD can also be mounted on the plurality of third substrates 123, 124 located on the other side of the display area AA in the X-axis direction.

[0073] Reference Figure 1The plurality of third substrates 123 and 124 may be larger in size than the plurality of first substrates 121. Specifically, each of the plurality of third substrates 123 and 124 may be larger in size than each of the plurality of first substrates 121. As described above, a gate driver GD may be disposed on each of the plurality of third substrates 123 and 124. For example, a stage of the gate driver GD may be disposed on each of the plurality of third substrates 123 and 124. Therefore, the area of ​​the various circuit components constituting a stage of the gate driver GD is relatively larger than the area of ​​the first substrate 121 on which the pixel PX is disposed. Therefore, each of the plurality of third substrates 123 and 124 may be larger in size than each of the plurality of first substrates 121.

[0074] Figure 1 An example is shown where, in the non-display area NA, a plurality of third substrates 124 are disposed on one side in the Y-axis direction and a third substrate 123 is disposed on one side in the X-axis direction. However, this disclosure is not limited thereto. The plurality of third substrates 123, 124 can be disposed in any part of the non-display area NA. Moreover, Figure 1 An example is shown where each of the plurality of first substrates 121 and the plurality of third substrates 123, 124 has a quadrilateral shape. However, this disclosure is not limited thereto. Each of the plurality of first substrates 121 and / or the plurality of third substrates 123, 124 may have various shapes.

[0075] Each of the plurality of second substrates 122 connects adjacent first substrates 121, adjacent third substrates 123, or adjacent first substrates 121 and third substrates 123, 124. Therefore, each of the plurality of second substrates 122 can also be referred to as a connecting substrate. That is, the plurality of second substrates 122 are disposed between the plurality of first substrates 121, between the plurality of third substrates 123, 124, or between the plurality of first substrates 121 and the plurality of third substrates 123, 124.

[0076] The distance between adjacent first substrates 121 can be greater than or equal to the size of the first substrates 121 in the same direction X or Y.

[0077] Reference Figure 1 The plurality of second substrates 122 have curved shapes. For example, the plurality of second substrates 122 may have a sinusoidal shape. However, the shape of the plurality of second substrates 122 is not limited to this. The plurality of second substrates 122 may have various shapes. For example, the plurality of second substrates 122 may extend in a Z-shape, or the plurality of rhomboid substrates may extend by connecting to each other at their vertices. Figure 1 The number and shape of the plurality of second substrates 122 shown are provided as an example. The number and shape of the plurality of second substrates 122 can vary depending on the design.

[0078] The plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123, 124 are rigid substrates. That is, the plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123, 124 are more rigid than the lower substrate 111 and / or the upper substrate. The plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123, 124 may have a higher elastic modulus than the lower substrate 111. The elastic modulus is a parameter that represents the proportion of substrate deformation caused by stress applied to the substrate, and when the elastic modulus is relatively high, the hardness can be relatively high. Therefore, the first substrates 121, the second substrates 122, and the third substrates 123 may also be referred to as the first rigid substrate, the second rigid substrate, and the third rigid substrate, respectively. The elastic modulus of the plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123, 124 may be 1000 times or more of the elastic modulus of the lower substrate 111, but is not limited thereto.

[0079] The plurality of first substrates 121, second substrates 122, and third substrates 123, 124, which serve as rigid substrates, can be made of a plastic material having less flexibility than the lower substrate 111. For example, the plurality of first substrates 121, second substrates 122, and third substrates 123, 124 can be made of polyimide (PI), polyacrylate, polyacetate, etc. Here, the plurality of first substrates 121 and third substrates 123, 124 can be made of the same material, but are not limited thereto. The plurality of first substrates 121 and third substrates 123, 124 can also be made of different materials.

[0080] In some exemplary embodiments, the lower substrate 111 may be defined as including a plurality of first lower patterns and second lower patterns. The plurality of first lower patterns may be disposed in the region of the lower substrate 111 overlapping with the plurality of first substrates 121 and the plurality of third substrates 123, 124. Furthermore, the second lower patterns may be disposed in regions other than those in which the plurality of first substrates 121 and the plurality of third substrates 123, 124 are disposed. Alternatively, the second lower patterns may be disposed over the entire area of ​​the display device 100.

[0081] In this configuration, the multiple first lower patterns can have a higher elastic modulus than the multiple second lower patterns. For example, the multiple first lower patterns can be made of the same material as the multiple first substrates 121 and the multiple third substrates 123, 124. Moreover, the second lower pattern can be made of a material having a lower elastic modulus than the multiple first substrates 121 and the multiple third substrates 123, 124. Therefore, the first and second lower patterns can be used to reinforce the substrate or adapt the substrate to its flexibility.

[0082] In other words, the first pattern can be made of polyimide (PI), polyacrylate, polyacetate, etc. The second pattern can be made of silicone rubber such as polydimethylsiloxane (PDMS) and elastomers such as polyurethane (PU) and polytetrafluoroethylene (PTFE).

[0083] A gating driver (GD) is a component used to provide gating voltages to multiple pixels (PX) disposed in a display area (AA). The gating driver GD includes multiple stages formed on multiple third substrates (123, 124). The stages of the gating driver GD can be electrically connected to each other. Therefore, a gating voltage output from one stage can be transferred to another stage. Furthermore, each stage can sequentially provide gating voltages to the multiple pixels (PX) connected to that stage.

[0084] A power supply can be connected to a gating driver GD and can provide a gating drive voltage and a gating clock voltage to the gating driver GD. Furthermore, the power supply can be connected to multiple pixels PX and can provide a pixel drive voltage to each of the multiple pixels PX. That is, the power supply can also be formed on multiple third substrates 123, 124. The power supply can be formed adjacent to the gating driver GD on an external substrate (not shown). Furthermore, the power supplies formed on the multiple third substrates 123, 124 can be electrically connected to each other. That is, the multiple power supplies formed on the multiple third substrates 123, 124 can be connected via gating power connection lines and pixel power connection lines. Therefore, each of the multiple power supplies can provide a gating drive voltage, a gating clock voltage, and a pixel drive voltage.

[0085] The printed circuit board 130 is configured to transmit signals and voltages from the controller to the display element for driving the display element. Therefore, the printed circuit board 130 can also be referred to as a driving substrate. A controller, such as an IC chip or circuit, can be mounted on the printed circuit board 130. Furthermore, a memory, processor, etc., can also be mounted on the printed circuit board 130. The printed circuit board 130 disposed in the display device 100 may include a stretchable area and a non-stretchable area to ensure stretchability. Moreover, IC chips, circuits, memory, processors, etc., can be mounted on the non-stretchable area. Furthermore, lines electrically connected to the IC chips, circuits, memory, and processor can be provided in the stretchable area. Additionally, the printed circuit board 130 can be bonded to multiple pads of multiple third substrates 123, 124 disposed in the non-display area NA.

[0086] The data driver DD is a component that provides data voltage to multiple pixels PX disposed in the display area AA. The data driver DD can be configured as an IC chip and is therefore also referred to as a data integrated circuit (D-IC). Furthermore, the data driver DD can be disposed in a non-stretchable area of ​​the printed circuit board 130. That is, the data driver DD can be mounted on the printed circuit board 130 as a chip-on-board (COB). Moreover, the data driver DD provides data voltage to each of the multiple pixels PX disposed in the display area AA via multiple pads disposed on multiple third substrates 123, 124. Figure 1 An example of mounting a data drive DD in COB mode is shown. However, this disclosure is not limited thereto. The data drive DD can also be mounted in COF mode, COG mode, or tape-on-cable (TCP) mode.

[0087] and, Figure 1 An example is shown where a third substrate 124 is disposed in a non-display area AA above the display area AA, corresponding to a first substrate 121 disposed in a row within the display area AA. Furthermore, Figure 1 An example is shown where the data driver DD is disposed on a printed circuit board 130 connected to the third substrate 124. However, this disclosure is not limited thereto. That is, the third substrate 124 and the data driver DD may be disposed to correspond to the first substrate 121 disposed in multiple rows.

[0088] In the following text, reference will be made to Figure 2 and Figure 3 The display area AA of the display device 100 according to an exemplary embodiment of the present disclosure will be described in more detail.

[0089] <Planar and Cross-sectional Structure of the Display Area>

[0090] Figure 2 This is an enlarged plan view of the display area of ​​a display device according to an exemplary embodiment of the present disclosure. Figure 3 It is along Figure 2 A schematic cross-sectional view taken from line III-III′. For ease of description, reference will also be made below. Figure 1 .

[0091] Reference Figure 1 and Figure 2 A plurality of first substrates 121 are disposed on a lower substrate 111 in the display area AA. The plurality of first substrates 121 are configured to be spaced apart from each other on the lower substrate 111. For example, as... Figure 1 As shown, a plurality of first substrates 121 may be arranged in a matrix on the lower substrate 111, but are not limited thereto.

[0092] Reference Figure 2 and Figure 3The pixels, including multiple sub-pixels (SPX), are disposed on the first substrate 121. Each sub-pixel SPX may include an LED 170 as a display element, and a driving transistor 160 and a switching transistor 150 for driving the LED 170. However, the display element in each sub-pixel SPX is not limited to LEDs and may be an organic light-emitting diode (OLED). Furthermore, the multiple sub-pixels SPX may include red, green, and blue sub-pixels, but are not limited to these. The multiple sub-pixels SPX may include pixels of various colors (e.g., white) as needed.

[0093] Multiple sub-pixels SPX can be connected to multiple connection lines 180. Multiple sub-pixels SPX can be electrically connected to a first connection line 181 extending in the X-axis direction. Furthermore, multiple sub-pixels SPX can be electrically connected to a second connection line 182 extending in the Y-axis direction.

[0094] Furthermore, the protective layer 190 can be disposed on a pixel PX comprising multiple sub-pixels SPX to cover the pixel PX comprising multiple sub-pixels SPX. Specifically, as... Figure 2 As shown, the protective layer 190 overlaps with a plurality of sub-pixels SPX and may also overlap with a plurality of connecting lines 180 extending on the first substrate 121. Furthermore, the shape of the protective layer 190 is illustrated as a quadrilateral pattern with the same shape as the first substrate 121, but is not limited thereto. The protective layer 190 may have various shapes on the first substrate 121.

[0095] In the following text, reference will be made to Figure 3 Describe the cross-sectional structure of the display area in detail.

[0096] Reference Figure 3 Multiple inorganic insulating layers are disposed on multiple first substrates 121. For example, the multiple inorganic insulating layers may include a buffer layer 141, a gate insulating layer 142, a first interlayer insulating layer 143, a second interlayer insulating layer 144, and a passivation layer 145. However, this disclosure is not limited thereto. Various inorganic insulating layers may be disposed on the multiple first substrates 121. One or more of the buffer layer 141, gate insulating layer 142, first interlayer insulating layer 143, second interlayer insulating layer 144, and passivation layer 145 may be omitted.

[0097] Specifically, a buffer layer 141 is disposed on a plurality of first substrates 121. The buffer layer 141 is formed on the plurality of first substrates 121 to protect the various components of the display device 100 from the infiltration of moisture (H2O) and oxygen (O2) from the exterior of the lower substrate 111 and the plurality of first substrates 121. The buffer layer 141 may be made of an insulating material. For example, the buffer layer 141 may be formed as a single layer or multiple layers of at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). However, depending on the structure or characteristics of the display device 100, the buffer layer 141 may be omitted.

[0098] In this case, the buffer layer 141 may be formed only in the region where the buffer layer 141 overlaps with the plurality of first substrates 121 and / or the plurality of third substrates 123, 124. As described above, the buffer layer 141 may be made of an inorganic material. Therefore, the buffer layer 141 may be easily damaged, such as easily breaking, when the display device 100 is stretched. Therefore, the buffer layer 141 may not be formed in the region between the plurality of first substrates 121 and the plurality of third substrates 123, 124. The buffer layer 141 may be patterned to the shape of the plurality of first substrates 121 and the plurality of third substrates, and formed only on the upper portion of the plurality of first substrates 121 and / or the plurality of third substrates 123, 124. Therefore, in the display device 100 according to an exemplary embodiment of the present disclosure, the buffer layer 141 is formed only in the region where the buffer layer 141 overlaps with the plurality of first substrates 121 and / or the plurality of third substrates 123, 124, which are rigid substrates. Therefore, even when the display device 100 is deformed (such as bent or stretched), damage to the buffer layer 141 can be suppressed. That is, the buffer layer 141 is formed only in the regions of the rigid first substrate 121 and / or the third substrates 123, 124.

[0099] Reference Figure 3 A switching transistor 150, including a gate 151, an active layer 152, a source 153, and a drain 154, is formed on a buffer layer 141. Furthermore, a driving transistor 160, including a gate 161, an active layer 162, a source 163, and a drain 164, is formed on the buffer layer 141.

[0100] Reference Figure 3 The active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 are disposed on the buffer layer 141. For example, each of the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 may be made of oxide semiconductor. Alternatively, each of the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 may be made of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), organic semiconductor, etc.

[0101] A gate insulating layer 142 is disposed on the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160. The gate insulating layer 142 is configured to electrically insulate the gate 151 of the switching transistor 150 from the active layer 152 of the switching transistor 150 and to electrically insulate the gate 161 of the driving transistor 160 from the active layer 162 of the driving transistor 160. Furthermore, the gate insulating layer 142 may be made of an insulating material. For example, the gate insulating layer 142 may be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0102] The gate 151 of the switching transistor 150 and the gate 161 of the driving transistor 160 are disposed on the gate insulating layer 142. The gate 151 of the switching transistor 150 and the gate 161 of the driving transistor 160 are spaced apart from each other on the gate insulating layer 142. Furthermore, the gate 151 of the switching transistor 150 overlaps with the active layer 152 of the switching transistor 150. The gate 161 of the driving transistor 160 overlaps with the active layer 162 of the driving transistor 160.

[0103] Each of the gate 151 of the switching transistor 150 and the gate 161 of the driving transistor 160 may be made of any of the following metallic materials: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, each of the gate 151 of the switching transistor 150 and the gate 161 of the driving transistor 160 may be made of an alloy of two or more of them, or of multiple layers thereof, but is not limited thereto.

[0104] A first interlayer insulating layer 143 is disposed on the gate 151 of the switching transistor 150 and the gate 161 of the driving transistor 160. The first interlayer insulating layer 143 insulates the gate 161 of the driving transistor 160 from the intermediate metal layer IM. The first interlayer insulating layer 143 may also be made of an inorganic material, like the buffer layer 141. For example, the first interlayer insulating layer 143 may be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0105] An intermediate metal layer IM is disposed on the first interlayer insulating layer 143. Furthermore, the intermediate metal layer IM overlaps with the gate 161 of the driving transistor 160. Therefore, a storage capacitor is formed in the region where the intermediate metal layer IM overlaps with the gate 161 of the driving transistor 160. Specifically, the gate 161 of the driving transistor 160, the first interlayer insulating layer 143, and the intermediate metal layer IM form a storage capacitor. However, the location of the intermediate metal layer IM is not limited to this. The intermediate metal layer IM can overlap with another electrode in various ways to form a storage capacitor.

[0106] The intermediate metal layer IM can be made of any of the following metallic materials: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the intermediate metal layer IM can be made of an alloy of two or more of these, or of multiple layers thereof, but is not limited thereto.

[0107] The second interlayer insulating layer 144 is disposed on the intermediate metal layer IM. The second interlayer insulating layer 144 insulates the gate 151 of the switching transistor 150 from the source 153 and drain 154 of the switching transistor 150. Furthermore, the second interlayer insulating layer 144 insulates the intermediate metal layer IM from the source and drain 164 of the driving transistor 160. The second interlayer insulating layer 144 may also be made of an inorganic material, like the buffer layer 141. For example, the first interlayer insulating layer 143 may be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0108] The source 153 and drain 154 of the switching transistor 150 are disposed on the second interlayer insulating layer 144. Similarly, the source and drain 164 of the driving transistor 160 are disposed on the second interlayer insulating layer 144. The source 153 and drain 154 of the switching transistor 150 are configured to be spaced apart from each other on the same layer. Although... Figure 3 The source of driving transistor 160 is not shown, but the source and drain of driving transistor 160 are also spaced apart from each other on the same layer. In switching transistor 150, the source 153 and drain 154 can be electrically connected to active layer 152 to contact active layer 152. Similarly, in driving transistor 160, the source and drain 164 can be electrically connected to active layer 162 to contact active layer 162. Furthermore, the drain 154 of switching transistor 150 can be electrically connected to the gate 161 of driving transistor 160 to contact active layer 162 of driving transistor 160.

[0109] Source 153 and drain 154 and 164 can be made of any of the following metallic materials, for example: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, source 153 and drain 154 and 164 can be made of an alloy of two or more of them, or of multiple layers thereof, but are not limited thereto.

[0110] In this disclosure, the driving transistor 160 is described as having a coplanar structure, but various types of transistors having interleaved structures, etc., may also be used.

[0111] Although Figure 3 As not shown, the gating pad and data pad can be disposed on the second interlayer insulating layer 144. The gating pad is used to transmit gating voltage to multiple sub-pixels SPX. The gating voltage can be transmitted from the gating pad to the gate 151 of the switching transistor 150 via gating lines formed on the first substrate 121. The data pad is used to transmit data voltage to multiple sub-pixels SPX. The data voltage can be transmitted from the data pad to the source 153 of the switching transistor 150 via data lines formed on the first substrate 121. The gating pad and data pad can be made of the same material as the source 153 and the drains 154 and 164, but are not limited thereto.

[0112] Reference Figure 3 A passivation layer 145 is formed on the switching transistor 150 and the driving transistor 160. That is, the passivation layer 145 covers the switching transistor 150 and the driving transistor 160 to protect them from the penetration of moisture and oxygen. The passivation layer 145 can be made of inorganic materials and formed as a single layer or multiple layers, but is not limited thereto.

[0113] Any one or all of the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can be patterned and formed only in the regions where they overlap with the plurality of first substrates 121. The gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can also be made of inorganic materials, like the buffer layer 141. Therefore, when the display device 100 is stretched, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 may be easily damaged (e.g., easily cracked). Therefore, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 may not be formed in the regions between the plurality of first substrates 121 or outside the first substrates 121. The gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144 and the passivation layer 145 can be patterned into the shape of a plurality of first substrates 121 and formed only on the upper part of the plurality of first substrates 121.

[0114] A planarization layer 146 is formed on the passivation layer 145. The planarization layer 146 is used to planarize the upper portion of the switching transistor 150 and the driving transistor 160. The planarization layer 146 can be formed as a single layer or multiple layers and can be made of organic materials. Therefore, the planarization layer 146 can also be referred to as an organic insulating layer. For example, the planarization layer 146 can be made of acrylic organic materials, but is not limited thereto.

[0115] Reference Figure 3A planarization layer 146 is disposed on a plurality of first substrates 121 to cover the upper and side surfaces of a buffer layer 141, a gate insulating layer 142, a first interlayer insulating layer 143, a second interlayer insulating layer 144, and a passivation layer 145. Furthermore, the planarization layer 146, together with the plurality of first substrates 121, surrounds the buffer layer 141, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145. Specifically, the planarization layer 146 may be configured to cover the upper and side surfaces of the passivation layer 145, the side surfaces of the first interlayer insulating layer 143, the second interlayer insulating layer 144, the side surfaces of the gate insulating layer 142, the side surfaces of the buffer layer 141, and a portion of the upper surfaces of the plurality of first substrates 121. Therefore, the planarization layer 146 can compensate for the steps between the side surfaces of the buffer layer 141, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145. Moreover, the planarization layer 146 can enhance the adhesion strength between the planarization layer 146 and the connection lines 180 disposed on the side surface of the planarization layer 146.

[0116] Reference Figure 3 The tilt angle of the side surface of the planarization layer 146 can be smaller than that of the side surfaces of the buffer layer 141, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145. For example, the side surface of the planarization layer 146 can have a smaller tilt angle than that of the side surfaces of the passivation layer 145, the first interlayer insulating layer 143, the second interlayer insulating layer 144, the gate insulating layer 142, and the buffer layer 141. Therefore, the connecting line 180 in contact with the side surface of the planarization layer 146 is configured to have a small tilt angle. Therefore, when the display device 100 is stretched, the stress generated in the connecting line 180 can be reduced. Moreover, cracks in the connecting line 180 or peeling of the connecting line 180 from the side surface of the planarization layer 146 can be suppressed.

[0117] Reference Figure 2 and Figure 3 The connection line 180 refers to a line that electrically connects to pads disposed on a plurality of first substrates 121. The connection line 180 is disposed on a plurality of second substrates 122. Furthermore, the connection line 180 can also be connected to the plurality of first substrates 121 to electrically connect to pads disposed on the plurality of first substrates 121. The pads disposed on the first substrates 121 refer to gating pads and data pads.

[0118] The connecting line 180 includes a first connecting line 181 and a second connecting line 182. The first connecting line 181 and the second connecting line 182 are disposed between a plurality of first substrates 121. Specifically, the first connecting line 181 refers to the line in the connecting line 180 that extends along the X-axis direction between the plurality of first substrates 121. The second connecting line 182 refers to the line in the connecting line 180 that extends along the Y-axis direction between the plurality of first substrates 121.

[0119] The connecting wire 180 can be made of a metallic material such as copper (Cu), aluminum (Al), titanium (Ti), or molybdenum (Mo). Alternatively, the connecting wire 180 can have a laminated structure of metallic materials such as copper / molybdenum-titanium (Cu / MoTi) or titanium / aluminum / titanium (Ti / Al / Ti), but is not limited to these.

[0120] In a typical display device, various lines, such as multiple gate lines and multiple data lines, extend in straight lines and are arranged between multiple sub-pixels. Furthermore, multiple sub-pixels are connected to a single signal line. Therefore, in a typical display device, various lines, such as gate lines, data lines, high-potential power lines, and reference voltage lines, extend continuously from one side of the organic light-emitting display device to the other on the substrate.

[0121] In contrast, in the display device 100 according to an exemplary embodiment of the present disclosure, various lines, such as gate lines, data lines, high-potential power lines, and reference voltage lines formed as straight lines and considered to be used in general organic light-emitting display devices, are only provided on the plurality of first substrates 121 and the plurality of third substrates 123, 124. That is, in the display device 100 according to an exemplary embodiment of the present disclosure, lines formed as straight lines are only provided on the plurality of first substrates 121 and the plurality of third substrates 123, 124.

[0122] In the display device 100 according to an exemplary embodiment of the present disclosure, pads on two adjacent first substrates 121 or two adjacent third substrates 123 can be connected by connecting lines 180 to connect discontinuous lines on the first substrates 121 or third substrates 123. That is, the connecting lines 180 electrically connect pads on two adjacent first substrates 121, two adjacent third substrates 123, and first substrates 121 and third substrates 123 that are adjacent to each other. Therefore, the display device 100 according to an exemplary embodiment of the present disclosure may include multiple connecting lines 180 to electrically connect various lines such as gate lines, data lines, high-potential power lines, and reference voltage lines between multiple first substrates 121, between multiple third substrates 123, 124, and between multiple first substrates 121 and multiple third substrates 123, 124. For example, gate lines may be provided on multiple first substrates 121 that are adjacent to each other in the X-axis direction. Moreover, gate pads may be provided at both ends of the gate lines. In this configuration, multiple gate pads on a plurality of first substrates 121 arranged adjacent to each other in the X-axis direction can be connected to each other via a first connecting line 181 serving as a gate line. Therefore, the gate lines provided on the plurality of first substrates 121 and the first connecting line 181 provided on the third substrate 123 can be used as a single gate line. Furthermore, lines such as light-emitting signal lines, low-potential power lines, and high-potential power lines extending in the X-axis direction, which can be included in the display device 100, can also be electrically connected via the first connecting line 181 as described above.

[0123] Reference Figure 2 and Figure 3 The first connection line 181 can connect to pads on two first substrates 121 arranged side-by-side among a plurality of pads on first substrates 121 arranged adjacent to each other in the X-axis direction. Each first connection line 181 can serve as a gate line, a light-emitting signal line, a high-potential power line, or a low-potential power line, but is not limited thereto. For example, the first connection line 181 can be used as a gate line and electrically connected to gate pads on two first substrates 121 arranged side-by-side in the X-axis direction. Therefore, as described above, gate pads on a plurality of first substrates 121 arranged in the X-axis direction can be connected by the first connection line 181 used as a gate line. A single gate voltage can be transmitted to the gate pad.

[0124] The second connection line 182 can connect to pads on two first substrates 121 arranged side-by-side among a plurality of first substrates 121 arranged adjacent to each other in the Y-axis direction. Each second connection line 182 can be used as a data line, a high-potential power line, a low-potential power line, or a reference voltage line, but is not limited thereto. For example, the second connection line 182 can be used as a data line and electrically connected to data lines on two first substrates 121 arranged side-by-side in the Y-axis direction. Therefore, as described above, the internal lines on the plurality of first substrates 121 arranged in the Y-axis direction can be connected by multiple second connection lines 182 used as data lines. A single data voltage can be transmitted to the data line.

[0125] Reference Figure 1 The connecting line 180 may also include a third connecting line, which connects the pads on the plurality of first substrates 121 and the plurality of third substrates 123, 124, or connects the pads on two third substrates 123, 124 arranged side by side among the pads on the plurality of third substrates 123 arranged adjacent to each other in the Y-axis direction.

[0126] like Figure 3 As shown, each first connection line 181 can contact the upper surface and side surface of the planarization layer 146 disposed on the first substrate 121 and can extend to the upper surface of the second substrate 122. Similarly, each second connection line 182 can contact the upper surface and side surface of the planarization layer 146 disposed on the first substrate 121 and can extend to the upper surface of the second substrate 122.

[0127] Reference Figure 3 A dam 147 is formed on the connection pad PD, the connection line 180, and the planarization layer 146. The dam 147 is a component that distinguishes or separates adjacent sub-pixels SPX. The dam 147 is configured to cover at least a portion of the connection pad PD, the connection line 180, and the planarization layer 146. The dam 147 can be made of an insulating material. Furthermore, the dam 147 can contain a black material. Because the dam 147 contains a black material, it is used to hide lines visible through the active display area AA. The dam 147 can be made of, for example, a transparent carbon-based mixture. Specifically, the dam 147 can contain carbon black, but is not limited thereto. The dam 147 can also be made of a transparent insulating material. Furthermore, although... Figure 3 The example illustrates that the embankment 147 and LED 170 have the same height, but this disclosure is not limited thereto. The embankment 147 may have a lower height than LED 170.

[0128] Reference Figure 3LED 170 is disposed on the connection pad PD and the first connection line 181. LED 170 includes an n-type layer 171, an active layer 172, a p-type layer 173, an n-electrode 174, and a p-electrode 175. The LED 170 of the display device 100 according to an exemplary embodiment of the present disclosure has a flip-chip structure, wherein the n-electrode 174 and the p-electrode 175 are formed on one of its surfaces.

[0129] An n-type layer 171 can be formed by implanting an n-type impurity into gallium nitride (GaN) with excellent crystallinity. The n-type layer 171 can be disposed on a separate substrate made of a light-emitting material.

[0130] An active layer 172 is disposed on the n-type layer 171. The active layer 172 is the light-emitting layer that emits light in the LED 170 and can be made of a nitride semiconductor (e.g., indium gallium nitride (InGaN)). A p-type layer 173 is disposed on the active layer 172. The p-type layer 173 can be formed by implanting p-type impurities into gallium nitride (GaN).

[0131] As described above, an LED 170 according to an exemplary embodiment of the present disclosure is manufactured by sequentially stacking an n-type layer 171, an active layer 172, and a p-type layer 173, and then etching predetermined regions of these layers to form n-electrodes 174 and p-electrodes 175. In this case, the predetermined regions are the spaces that separate the n-electrodes 174 and p-electrodes 175 from each other and are etched to expose a portion of the n-type layer 171. In other words, the surface of the LED 170 on which the n-electrodes 174 and p-electrodes 175 are disposed may not be flat and may have different horizontal heights.

[0132] The n-electrode 174 is disposed on the etched area, and the n-electrode 174 may be made of a conductive material. Similarly, the p-electrode 175 is disposed on the non-etched area, and the p-electrode 175 may also be made of a conductive material. For example, the n-electrode 174 is disposed on the n-type layer 171 exposed by etching, and the p-electrode 175 is disposed on the p-type layer 173. The p-electrode 175 may be made of the same material as the n-electrode 174.

[0133] An adhesive layer AD is disposed on the upper surface of the connecting pad PD and the first connecting line 181, and between the connecting pad PD and the first connecting line 181. Therefore, the LED 170 can be bonded to the connecting pad PD and the first connecting line 181. In this case, the n-electrode 174 can be disposed on the first connecting line 181 and the p-electrode 175 can be disposed on the connecting pad PD.

[0134] The adhesive layer AD can be a conductive adhesive layer formed by dispersing conductive balls in an insulating substrate. Therefore, when heat or pressure is applied to the adhesive layer AD, the conductive balls are electrically connected to have conductive properties in the portions of the adhesive layer AD where heat or pressure is applied. Regions of the adhesive layer AD where no pressure is applied can have insulating properties. For example, the n-electrode 174 is electrically connected to the first connection line 181 via the adhesive layer AD, and the p-electrode 175 is electrically connected to the connection pad PD via the adhesive layer AD. After the adhesive layer AD is applied to the upper surfaces of the first connection line 181 and the connection pad PD by an inkjet method or the like, the LED 170 can be transferred onto the adhesive layer AD. The LED 170 can then be pressed and heated, thereby electrically connecting the connection pad PD to the p-electrode 175 and the first connection line 181 to the n-electrode 174. However, the adhesive layer AD has insulating properties in portions other than those between the n-electrode 174 and the first connection line 181, and between the p-electrode 175 and the connection pad PD. Meanwhile, the adhesive layer AD can be individually applied to each of the connecting pads PD and the first connecting line 181.

[0135] Furthermore, the connection pad PD is electrically connected to the drain 164 of the driving transistor 160 and receives the driving voltage for driving the LED 170 from the driving transistor 160. Additionally, a low-potential driving voltage for driving the LED 170 is applied to the first connection line 181. Therefore, when the display device 100 is turned on, different voltage levels applied to each of the connection pad PD and the first connection line 181 are transmitted to the n-electrode 174 and the p-electrode 175. Consequently, the LED 170 emits light.

[0136] Reference Figure 3 The protective layer 190 is provided on the embankment 147 and LED 170.

[0137] The protective layer 190 covers and protects the LED 170. Specifically, the protective layer 190 may include multiple prism patterns and / or multiple conventional tetrahedral patterns. That is, the protective layer 190 may include multiple patterns, preferably each pattern having a triangular cross-section. In other words, in the cross-sectional view of the protective layer 190, multiple triangular patterns may be arranged in a row.

[0138] Furthermore, the protective layer 190 can be formed as an organic insulating layer. More specifically, the protective layer 190 can be made of an acrylic organic material, but is not limited thereto. For example, the protective layer 190 can be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). Alternatively, the protective layer 190 can be formed as a multilayer in which organic and inorganic layers are stacked.

[0139] Therefore, the upper surface of the protective layer 190 can have a smaller contact area than the lower surface of the protective layer 190. Thus, the contact area between the upper surface of the protective layer 190 and the upper substrate 112 can be smaller than the contact area between the lower surface of the protective layer 190 and the LED 170 and the embankment 147.

[0140] Therefore, when the display device 100 is stretched, not all the tensile stress applied to the upper substrate 112 is transferred to the protective layer 190. Since the protective layer 190 includes multiple patterns, each with a triangular cross-section, the tensile stress transferred to the protective layer 190 can be eliminated. Therefore, the tensile stress applied to the LED 170 can be reduced.

[0141] Therefore, even when the display device 100 according to the exemplary embodiment of this disclosure is repeatedly stretched, damage to the LED 170 can be suppressed. Thus, the stretching reliability of the display device 100 can be improved.

[0142] Therefore, by providing a layer between the LED170 and the upper substrate 112, which further supports bending, damage is prevented or minimized during bending of the display device. The damage-preventing layer has different contact areas on its upper and lower sides, thereby reducing the risk of cracking during bending.

[0143] Furthermore, since the protective layer 190 includes multiple patterns, each having a triangular cross-section, the extraction efficiency of light emitted above the LED 170 can be improved. Therefore, the brightness of the display device 100 according to the exemplary embodiment of this disclosure can be increased. In addition, the drive current required to achieve uniform brightness in the display device 100 according to the exemplary embodiment of this disclosure can be reduced. Therefore, the power consumption of the display device 100 according to the exemplary embodiment of this disclosure can be reduced.

[0144] In addition, the upper substrate 112 is disposed on the protective layer 190.

[0145] The upper substrate 112 is used to support and / or cover various components disposed below the upper substrate 112. Specifically, the upper substrate 112 can be formed by coating and hardening the material forming the upper substrate 112 on the lower substrate 111 and the first substrate 121. Therefore, the upper substrate 112 can be configured to contact the lower substrate 111, the first substrate 121, the second substrate 122 and the connecting line 180.

[0146] The upper substrate 112 can be made of the same material as the lower substrate 111. For example, the upper substrate 112 can be made of silicone rubber such as polydimethylsiloxane (PDMS) and elastomers such as polyurethane (PU) and polytetrafluoroethylene (PTFE). Therefore, the upper substrate 112 can be flexible. However, the material of the upper substrate 112 is not limited to this.

[0147] At the same time, although Figure 3 Although not shown, a polarizing layer may also be provided on the upper substrate 112. The polarizing layer polarizes light incident from outside the display device 100 and reduces the reflection of external light. In addition, other optical films may be provided on the upper substrate 112 instead of a polarizing layer.

[0148] Furthermore, a filler layer 113 can be disposed on the front surface of the lower substrate 111 to fill the space between the upper substrate 112 and the components disposed on the lower substrate 111. The filler layer can be made of a curable adhesive. Specifically, the material of the filler layer can be coated on the front surface of the lower substrate 111 and then cured to form the filler layer. Therefore, the filler layer 113 can be disposed between the upper substrate 112 and the components disposed on the lower substrate 111.

[0149] <Circuit Structure of Display Area>

[0150] Figure 4 This is a circuit diagram of a sub-pixel of a display device according to an exemplary embodiment of the present disclosure.

[0151] In the following description, for ease of description, the structure and operation of a pixel circuit in which the sub-pixel SPX of a display device according to an exemplary embodiment of the present disclosure is a 2T (transistor) 1C (capacitor) pixel circuit will be described. However, the present disclosure is not limited thereto.

[0152] Reference Figure 3 and Figure 4 In a display device according to an exemplary embodiment of the present disclosure, each sub-pixel SPX may include a switching transistor 150, a driving transistor 160, a storage capacitor C, and an LED 170.

[0153] In response to the strobe signal SCAN provided via the first connection line 181, the switching transistor 150 applies the data signal DATA provided via the second connection line 182 to the driving transistor 160 and the storage capacitor C.

[0154] The gate 151 of the switching transistor 150 is electrically connected to the first connection line 181. Furthermore, the source 153 of the switching transistor 150 is connected to the second connection line 182. Additionally, the drain 154 of the switching transistor 150 is connected to the gate 161 of the driving transistor 160.

[0155] The driving transistor 160 can be operated in response to the data voltage DATA stored in the storage capacitor C, causing a driving current to flow based on the high potential power supply VDD provided through the first connection line 181 and the data voltage DATA provided through the second connection line 182.

[0156] Furthermore, the gate 161 of the driving transistor 160 is electrically connected to the drain 154 of the switching transistor 150. Additionally, the source of the driving transistor 160 is connected to the first connection line 181. Furthermore, the drain 164 of the driving transistor 160 is connected to the LED 170.

[0157] LED 170 can operate to emit light according to the drive current generated by drive transistor 160. Moreover, as described above, the n electrode 174 of LED 170 can be connected to the first connection line 181, so a low potential power supply VSS can be applied. In addition, the p electrode 174 of LED 170 can be connected to the drain 164 of drive transistor 160, so a drive voltage corresponding to the drive current can be applied.

[0158] As an example, each sub-pixel SPX of the display device according to an exemplary embodiment of the present disclosure is configured to have a 2T1C structure including a switching transistor 150, a driving transistor 160, a storage capacitor C, and an LED 170. However, when a compensation circuit is added, each sub-pixel SPX can be configured in various ways such as 3T1C, 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, or 7T2C.

[0159] As described above, a display device according to an exemplary embodiment of the present disclosure may include a plurality of sub-pixels on a first substrate, which is a rigid substrate. Each of the plurality of sub-pixels SPX may include a switching transistor, a driving transistor, a storage capacitor, and an LED.

[0160] Therefore, the display device according to the exemplary embodiments of this disclosure can be stretched due to the lower substrate. Furthermore, each first substrate includes a pixel circuit with a 2T1C structure. Therefore, light can be emitted according to the data voltage at each gating timing.

[0161] Hereinafter, a display device 500 according to another exemplary embodiment of the present disclosure will be described in detail. The display device 500 according to another exemplary embodiment of the present disclosure differs from the display device 100 according to the exemplary embodiment of the present disclosure only in terms of the placement of the protective layer. Therefore, detailed descriptions of components identical to those of the display device 100 according to the exemplary embodiment of the present disclosure will be omitted, and the above-mentioned differences will be described in detail.

[0162] <Another exemplary embodiment of this disclosure - a second exemplary embodiment>

[0163] Figure 5 This is an enlarged plan view of the display area of ​​a display device according to another exemplary embodiment of the present disclosure. Figure 6 It is along Figure 5 A schematic cross-sectional view of line VI-VI′.

[0164] like Figure 5 As shown, in a display device 500 according to another exemplary embodiment of the present disclosure, a protective layer 590 may be disposed on a pixel comprising a plurality of sub-pixels SPX to cover the pixel comprising the plurality of sub-pixels SPX. Specifically, the protective layer 590 may overlap with the plurality of sub-pixels SPX, but may not overlap with the plurality of connecting lines 180 extending on the first substrate 121. Therefore, the protective layer 590 may have a shape including tips disposed between the plurality of connecting lines 180.

[0165] Reference Figure 6 The protective layer 590 is installed on the embankment 147 and LED 170.

[0166] The protective layer 590 covers and protects the LED 170. Specifically, the upper surface of the protective layer 590 can contact the upper substrate 112, while the lower surface of the protective layer 590 can contact the embankment 147 and the LED 170. That is, the protective layer 590 can fill the space between the upper substrate 112 and the embankment 147 and the LED 170.

[0167] Furthermore, the protective layer 590 can be formed as an organic insulating layer. More specifically, the protective layer 590 can be made of an acrylic organic material, but is not limited thereto. For example, the protective layer 590 can be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). Alternatively, the protective layer 590 can be formed as a multilayer in which organic and inorganic layers are stacked.

[0168] In other words, in the display device 500 according to another exemplary embodiment of the present disclosure, the tip 590a, which is part of the protective layer 590, can be disposed between the multiple connecting lines 180. Therefore, when the LED 170 is transferred to the display device 500 according to another exemplary embodiment of the present disclosure, the LED 170 can be aligned based on the tip 590a of the protective layer 590. Therefore, the LED 170 can be transferred to the display device 500 according to another exemplary embodiment of the present disclosure more accurately. Therefore, the throughput of the transfer process can be increased.

[0169] Hereinafter, a display device 700 according to yet another exemplary embodiment of the present disclosure will be described in detail. The display device 700 according to yet another exemplary embodiment of the present disclosure differs from the display device 100 according to the exemplary embodiment of the present disclosure only in terms of the placement of the protective layer. Therefore, detailed descriptions of components identical to those of the display device 100 according to the exemplary embodiment of the present disclosure will be omitted, and the above-mentioned differences will be described in detail.

[0170] <Another exemplary embodiment of this disclosure - a third exemplary embodiment>

[0171] Figure 7 This is an enlarged plan view of the display area of ​​a display device according to yet another exemplary embodiment of the present disclosure. Figure 8 It is along Figure 7 A schematic cross-sectional view of line VIII-VIII′.

[0172] like Figure 7 As shown, in a display device 700 according to another exemplary embodiment of the present disclosure, a protective layer 790 may be disposed on a pixel comprising a plurality of sub-pixels SPX to cover the pixel comprising the plurality of sub-pixels SPX. Specifically, the protective layer 790 may overlap with the plurality of sub-pixels SPX, but may not overlap with the plurality of connecting lines 180 extending on the first substrate 121. Therefore, the protective layer 790 may have a shape including tips disposed between the plurality of connecting lines 180.

[0173] Furthermore, multiple protrusions 791 can be positioned on the sides of multiple sub-pixels SPX. For example... Figure 7 As shown, the plurality of protrusions 791 can be disposed on all four sides of the plurality of sub-pixels SPX, but are not limited thereto. The plurality of protrusions 791 can be disposed on at least two of the four sides of the plurality of sub-pixels SPX. For example, the plurality of protrusions 791 can be disposed on the upper and lower sides of the plurality of sub-pixels SPX along the Y-axis. Alternatively, the plurality of protrusions 791 can be disposed on the left and right sides of the plurality of sub-pixels SPX along the X-axis.

[0174] Reference Figure 8 The protective layer 790 is installed on the embankment 147 and LED 170.

[0175] The protective layer 790 covers and protects the LED 170. Specifically, the upper surface of the protective layer 790 can contact the upper substrate 112, while the lower surface of the protective layer 790 can contact the embankment 147 and the LED 170. That is, the protective layer 790 can fill the space between the upper substrate and the embankment 147 and the LED 170.

[0176] Furthermore, the plurality of protrusions 791 may be embossed patterns protruding downward from the protective layer 790. Therefore, the plurality of protrusions 791 may contact the side surface of the LED 170 disposed below the protective layer 790. Moreover, the plurality of protrusions 791 may contact the side surface of the embankment 147 disposed below the protective layer 790.

[0177] More specifically, refer to Figure 8Multiple protrusions 791 can be disposed between the LED 170 and the embankment 147 disposed below the protective layer 790 and can contact the LED 170 and the embankment 147.

[0178] However, this disclosure is not limited thereto. The plurality of protrusions 791 may contact only the side surface of the LED 170 disposed below the protective layer 790, but may not contact the side surface of the embankment 147.

[0179] Furthermore, the protective layer 790 and all the plurality of protrusions 791 can be formed as an organic insulating layer. More specifically, the protective layer 790 and all the plurality of protrusions 791 can be made of an acrylic organic material, but are not limited thereto. For example, the protective layer 790 can be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). Alternatively, the protective layer 790 can be formed as a multilayer in which organic and inorganic layers are stacked.

[0180] In other words, in the display device 700 according to another exemplary embodiment of the present disclosure, the tip 790a, which is part of the protective layer 790, can be disposed between the multiple connecting lines 180. Therefore, when an LED is transferred to the display device 700 according to another exemplary embodiment of the present disclosure, the LED 170 can be aligned based on the tip 790a of the protective layer 790. Therefore, the LED 170 can be transferred to the display device 700 according to another exemplary embodiment of the present disclosure more precisely. Therefore, the throughput of the transfer process can be increased.

[0181] Furthermore, in another exemplary embodiment of the display device 700 according to the present disclosure, a plurality of protrusions 791 protruding downward from the protective layer 790 can be provided on both sides of the LED 170. Therefore, due to the plurality of protrusions 791, the LED will not be misaligned and can be positioned in an accurate area. Furthermore, even when the LED is bonded to the connection pad PD, the LED can be aligned based on the plurality of protrusions 791. Therefore, in another exemplary embodiment of the display device 700 according to the present disclosure, the throughput of the LED bonding process can be increased.

[0182] Hereinafter, a display device 900 according to another exemplary embodiment of the present disclosure will be described in detail. The display device 900 according to another exemplary embodiment of the present disclosure differs from the display device 100 according to the exemplary embodiment of the present disclosure only in terms of the placement of the protective layer 790. Therefore, components identical to those of the display device 100 according to the exemplary embodiment of the present disclosure will be omitted, and the above differences will be described in detail.

[0183] <Another exemplary embodiment of this disclosure - a fourth exemplary embodiment>

[0184] Figure 9 This is a cross-sectional view of a display device according to yet another exemplary embodiment of the present disclosure.

[0185] like Figure 9 As shown, in a display device 900 according to another exemplary embodiment of the present disclosure, the embankment 947 may have a lower height than the LED 170.

[0186] Furthermore, the protective layer 990 overlaps with multiple sub-pixels SPX and may also overlap with multiple connecting lines 180 extending on the first substrate 121. Moreover, the protective layer 990 may have a quadrilateral pattern with the same shape as the first substrate 121, but is not limited thereto. The protective layer 990 may have various shapes on the first substrate 121.

[0187] Furthermore, the protective layer 990 is provided on the dike 947 and LED 170.

[0188] The protective layer 990 covers and protects the LED 170. Specifically, the upper surface of the protective layer 990 can contact the upper substrate 112, while the lower surface of the protective layer 990 can contact the embankment 947 and the LED 170.

[0189] However, as described above, the embankment 947 can have a lower height than the LED 170, thus creating a step difference between the upper surface of the embankment 947 and the upper surface of the LED 170. Therefore, the protective layer 990 contacts the upper surfaces of the embankment 947 and the LED 170, which have this step difference. Consequently, the protective layer 990 can have a blanket-like shape covering the entire pixel, including multiple sub-pixels.

[0190] like Figure 9 As shown, the separation space that cannot be covered by the protective layer 990 can be formed at the side surface of the embankment 947 and the side surface of the LED 170. However, this disclosure is not limited thereto. The protective layer 990 can be formed conformally along the side surface of the embankment 947 and the side surface of the LED 170.

[0191] Furthermore, the protective layer 990 can be formed as an organic insulating layer. More specifically, the protective layer 990 can be made of an acrylic organic material, but is not limited thereto. For example, the protective layer 990 can be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). Alternatively, the protective layer 990 can be formed as a multilayer in which organic and inorganic layers are stacked.

[0192] In other words, in the display device 900 according to another exemplary embodiment of the present disclosure, the protective layer 990 can be formed to cover the entire surface of a pixel comprising a plurality of pixels. Therefore, even when the display device 900 according to another exemplary embodiment of the present disclosure is stretched, the LED 170 can be more securely fixed by the protective layer 990. Therefore, even when the display device 900 according to another exemplary embodiment of the present disclosure is repeatedly stretched, the LED 170 can be stably engaged. Therefore, the stretching reliability of the display device 900 according to another exemplary embodiment of the present disclosure can be improved.

[0193] The embodiments of this disclosure can also be described as follows:

[0194] According to one aspect of this disclosure, a display device includes: a stretchable lower substrate and a plurality of first substrates disposed on the lower substrate. The display device further includes a plurality of second substrates connecting adjacent first substrates. The display device further includes a plurality of pixels disposed on the plurality of first substrates. The display device further includes a plurality of connecting lines disposed on the plurality of second substrates and connecting the plurality of pixels. The display device further includes a protective layer disposed on each of the plurality of pixels.

[0195] Multiple connecting lines can extend on multiple first substrates, and the protective layer can overlap with the multiple connecting lines.

[0196] Multiple connecting lines can extend on multiple first substrates, and the protective layer can be independent of the multiple connecting lines.

[0197] The protective layer may include multiple patterns, each having a triangular cross-section.

[0198] Multiple pixels may include light-emitting LEDs and embankments defining the multiple pixels, and a stretchable upper substrate may be disposed on a protective layer.

[0199] The contact area between the protective layer and the upper substrate can be smaller than the contact area between the protective layer and the LED and between the protective layer and the embankment.

[0200] There can be no step difference between the upper surface of the LED and the upper surface of the embankment.

[0201] There can be a step difference between the upper surface of the LED and the upper surface of the embankment.

[0202] The display device may also include a plurality of protrusions disposed on at least two sides of a plurality of pixels.

[0203] Multiple protrusions may be embossed patterns protruding from the protective layer and / or may contact the side surface of the LED.

[0204] According to another aspect of this disclosure, the display device includes: a stretchable substrate that is reversibly expandable and contractable; a plurality of rigid substrates that are spaced apart from each other on the stretchable substrate; a plurality of pixels disposed on the plurality of rigid substrates; a plurality of connecting lines disposed on the plurality of rigid substrates and connecting the plurality of pixels; and a protective layer that covers the plurality of pixels, wherein the protective layer includes a plurality of tips disposed on the outside of the protective layer.

[0205] Multiple tips may not overlap with multiple connecting lines.

[0206] The protective layer may include multiple prism patterns or multiple conventional tetrahedral patterns.

[0207] The display device may also include multiple protrusions that project downwards from the protective layer.

[0208] Multiple protrusions can contact the LEDs included in each of the multiple pixels.

[0209] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are exemplary in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted as the appended claims, and all technical concepts within the equivalent scope thereof should be understood to fall within the scope of protection of the present disclosure.

[0210] This application claims priority to Korean Patent Application No. 10-2020-0158267, filed with the Korean Intellectual Property Office on November 23, 2020.

Claims

1. A display device, the display device comprising: Stretchable lower substrate; A plurality of first substrates are disposed on the lower substrate; A plurality of second substrates, wherein the plurality of second substrates are connected to adjacent first substrates among the plurality of first substrates; Multiple pixels, wherein the multiple pixels are disposed on the multiple first substrates; Multiple connecting lines are disposed on the multiple second substrates and connect the multiple pixels; as well as A protective layer is disposed on each of the plurality of pixels. The protective layer comprises multiple patterns, each having a triangular cross-section.

2. The display device according to claim 1, wherein, The multiple connecting lines extend on the multiple first substrates.

3. The display device according to claim 2, wherein, The protective layer may overlap with the multiple connecting lines, or the protective layer may not overlap with the multiple connecting lines.

4. The display device according to claim 1, wherein, The plurality of pixels includes an LED that emits light and a dam that defines the plurality of pixels.

5. The display device according to claim 4, wherein the display device further comprises a stretchable upper substrate disposed on the protective layer.

6. The display device according to claim 5, wherein, The contact area between the protective layer and the upper substrate is smaller than the contact area between the protective layer and the LED and the embankment.

7. The display device according to claim 5, wherein, There is no step difference between the upper surface of the LED and the upper surface of the embankment.

8. The display device according to claim 5, wherein, There is a step difference between the upper surface of the LED and the upper surface of the embankment.

9. The display device according to claim 5, further comprising a plurality of protrusions disposed on at least two sides of the plurality of pixels.

10. The display device according to claim 9, in, The plurality of protrusions are embossed patterns that protrude from the protective layer and contact the side surface of the LED.

11. The display device according to claim 10, wherein, The plurality of protrusions contact the side surface of the embankment located beneath the protective layer.

12. The display device according to claim 5, wherein, Each pixel includes multiple sub-pixels, and each sub-pixel includes a driving transistor and a switching transistor for driving the LED, wherein the active layer of the switching transistor and the active layer of the driving transistor are disposed on the same layer.

13. A display device, the display device comprising: A stretchable substrate, wherein the stretchable substrate is reversibly expandable and contractable; A plurality of rigid substrates, the plurality of rigid substrates being spaced apart from each other on the stretchable substrate; Multiple pixels, wherein the multiple pixels are disposed on the multiple rigid substrates; Multiple connecting lines, wherein the multiple connecting lines are disposed on the multiple rigid substrates and connect the multiple pixels; and A protective layer that covers the plurality of pixels. The protective layer includes multiple tips, which are disposed on the outside of the protective layer. The plurality of tips do not overlap with the plurality of connecting lines.

14. The display device according to claim 13, wherein, The protective layer includes multiple prism patterns or multiple conventional tetrahedral patterns.

15. The display device according to claim 13, further comprising a plurality of protrusions protruding downward from the protective layer.

16. The display device according to claim 15, wherein, The plurality of protrusions contact an LED included in each of the plurality of pixels.

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