A common-gate in-ga-as array photodetector structure

Abstract

The present application relates to a kind of co-gate indium gallium arsenide array photodetector structures, the sidewall of pixel microtable is deposited with strong conductive metal coating to form gate electrode, the direction and size of the electric field of sidewall surface are controlled using gate electrode, pixel gate electrode is connected in parallel to form equipotential co-gate structure, reduce the carrier concentration of sidewall surface accumulation or inversion type.The present application can significantly reduce the surface leakage current of device, reduce the total dark current and noise of detector, suitable for the manufacture of indium gallium arsenide unit and array detector chip, improve the sensitivity and application level of short-wave infrared detection system such as low-light-level night vision, spectral imaging, substance spectral detection.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of infrared photoelectric devices, and particularly relates to a structure of a common-gate-controlled indium gallium arsenide array photodetector. BACKGROUND

[0002] The short-wave infrared spectrum of the wavelength range of 1 to 3 microns contains important molecular vibration characteristic spectra such as C-H, H-O and N-O, and is also the infrared spectrum with the strongest energy in environmental radiation, and therefore has wide applications in low-light night vision, spectral imaging, substance spectral detection and industrial temperature measurement fields. The indium gallium arsenide detector is the photoelectric detector with the best comprehensive performance in the short-wave infrared band. The material thereof is mainly obtained by heteroepitaxy on an indium phosphide substrate. From the basic device structure, there are mesa type and planar type two structures.

[0003] The mesa type pixel structure has the important advantage of obtaining lower crosstalk than the planar type device when applied to a focal plane detector. With the development of short-wave infrared imaging technology towards high resolution, the pixel size is gradually reduced, the pixel density is continuously improved, and the requirement for suppressing crosstalk is more prominent. Compared with the deep buried PN junction structure of the planar junction, the mesa type pixel structure naturally exposes the atoms of the semiconductor junction region, and the dark current caused by the surface state thereof has always been the main limiting factor for the sensitivity improvement. Even if a good dielectric film passivation process is used, the leakage current at the interface between the convex platform and the cutoff film is still difficult to eliminate. Especially at low temperature, the surface dark current of the pixel usually becomes the dominant component of the total dark current, increases the total dark current of the device, reduces the junction impedance of the device, and is the main factor restricting the detection sensitivity.

[0004] In order to suppress the dark current of the mesa type InGaAs detector, the relevant person has explored and proposed a series of methods, including using aluminum oxide and silicon nitride composite passivation layer to reduce interface state density (invention patent application number: 201910030239.6), using the structure of the chirped digital graded buffer layer to reduce the dislocation defect density in the InGaAs epitaxial layer (invention patent application number: ZL201611153882.0). In 2009, it is proposed that the ion-coupled inductively coupled plasma etching process can realize lower mesa dark current than traditional electron cyclotron resonance (APPLIED PHYSICS LETTERS 94, 053506 (2009)). In addition, in 2015, it is also reported that the low-temperature ion-coupled inductively coupled plasma chemical vapor deposition process can reduce the surface dark current of the mesa type extended wavelength InGaAs detector (Japanese Journal of Applied Physics 54, 04DG09 (2015)). The above-mentioned patents or research ideas are all based on the improvement of traditional materials or processes. Due to the natural existence of the mesa junction surface state, the above-mentioned measures can only achieve a relative reduction of the surface dark current to a certain extent, and it is still difficult to fully eliminate the surface dark current. SUMMARY

[0005] The technical problem to be solved by the present application is to provide a structure for reducing the dark current of an indium gallium arsenide array photodetector. The indium gallium arsenide array photodetector with the structure has reduced dark current and dark noise, and can be applied to different wavelength bands and different array structures of short-wave infrared detectors such as conventional wavelength InGaAs, extended wavelength InGaAs, etc., to improve the application level of short-wave infrared detector systems such as low-light night vision, spectral imaging, material spectral detection, and industrial temperature measurement. 0.53 Ga 0.47 As, extended wavelength In x Ga 1-x As, etc., to improve the application level of short-wave infrared detector systems such as low-light night vision, spectral imaging, material spectral detection, and industrial temperature measurement.

[0006] The structure for reducing the dark current of the indium gallium arsenide array photodetector comprises a metal plating layer with strong conductivity deposited on the sidewall surface of the indium gallium arsenide detector pixel to form a gate electrode. A bias voltage is applied to the gate electrode to change the size of the dark current of the pixel.

[0007] The structure of the indium gallium arsenide array photodetector is as follows:

[0008] The pixel structure of the detector is a micro-papillary structure, and the sidewall surface of the papillary structure is coated with an insulating dielectric film layer.

[0009] All the metal gate electrodes of the array pixel mesa are interconnected to form an equipotential structure, and are commonly connected to a common annular metal gate electrode.

[0010] The positive and negative and size of the voltage applied on the common metal gate electrode control the direction and size of the surface electric field of the mesa sidewall, and control the dark current level of the pixel.

[0011] When the interface between the pixel mesa sidewall and the dielectric film is positively charged, the gate electrode applies a positive bias to reduce the dark current.

[0012] When the interface between the pixel mesa sidewall and the dielectric film is negatively charged, the gate electrode applies a negative bias to reduce the dark current.

[0013] The metal plating material is titanium, gold, platinum, cadmium, aluminum or an alloy thereof.

[0014] The array photodetector is a PIN structure, the light absorption layer material is indium gallium arsenide, the indium component is between 0 and 1, and the window layer material is indium aluminum arsenide, indium arsenic phosphorus or indium phosphide.

[0015] The present application utilizes the field-induced charge effect, and simultaneously utilizes the high dielectric constant characteristics of the passivation layer of the mesa pixel structure, to generate an equipotential metal gate on the array mesa sidewall, to induce or deplete the carriers at the interface, to reduce the surface dark current of the mesa, and to reduce the device dark noise. Specifically, it includes:

[0016] (1) Surface dark current suppression idea

[0017] The indium gallium arsenide array detector adopting the mesa junction structure usually adopts wet chemical etching or dry plasma etching to form the mesa, and the mesa sidewall surface usually has more or less residual etching products. The residual products usually introduce donor-like states and acceptor-like states, so that the surface has low resistivity, and then the surface leakage current of the device is significantly increased. On the other hand, even in the case of little residual etching products, the mesa structure of the pixel naturally exposes the sidewall semiconductor atoms, and the exposed semiconductor atoms will generate bound states of electrons or holes due to the breaking of the atomic lattice periodicity, which will generate surface trapping and surface accumulation of electrons or holes. For example, a higher concentration of n-type electron accumulation is formed on the surface of a lightly doped n-type indium gallium arsenide light absorption layer material, or a higher concentration of p-type hole accumulation is formed on the surface of a lightly doped p-type indium gallium arsenide light absorption layer material; it is also possible to form p-type hole accumulation on the surface of a lightly doped n-type indium gallium arsenide light absorption layer material, or to form n-type electron accumulation on the surface of a lightly doped p-type indium gallium arsenide light absorption layer material, that is, to form a surface inversion layer. The accumulation of these surface charges will also significantly increase the surface current, and then increase the dark current of the detector. Even if a dielectric passivation film is deposited, it can only passivate the dangling bonds to a certain extent, and cannot completely eliminate them. The dielectric film has no effect on suppressing the leakage current related to the residual etching product.

[0018] The electric field can effectively regulate the interface charge state between the mesa sidewall and the dielectric film, without distinguishing whether the interface charge is caused by etching residues or interface dangling bonds, that is, it is effective for eliminating the surface dark current caused by the two mechanisms. For the case of surface electron accumulation, a negative electric field can be applied to deplete the surface electrons, so that the surface returns to a high resistance state. For the case of surface hole accumulation, a positive electric field can be applied to deplete the surface holes, so that the surface also returns to a high resistance state. Further, the surface dark current of the detector is effectively reduced.

[0019] (2) Design idea of detector structure

[0020] According to the above design idea, for the traditional array indium gallium arsenide detector structure, on the basis of the existing dielectric film of the pixel mesa, a metal gate electrode structure is designed. Specifically, a high-conductivity metal layer is used to physically cover the insulating dielectric film layer of the sidewall of the pixel micro-mesa to form a pixel floating gate electrode, the gate electrode of the pixel is led out, a common gate electrode is designed to connect and conduct the gate electrodes of all pixels, and an equipotential common gate metal structure is formed. Taking an N*2 element scale array indium gallium arsenide detector structure as an example, the top view and side view structure schematic diagram of the array indium gallium arsenide detector with a common gate structure finally formed are shown in Figs. 1 and 2, respectively. Figure 1 and Fig. 2. Figure 2 Without changing the readout mode of the traditional array indium gallium arsenide detector and the interconnection mode with the readout circuit, by applying a direct current bias voltage on the common gate electrode, the surface charge distribution of the array pixel micro-mesa is changed, the surface leakage current is eliminated, and the average dark signal of the array detector is significantly reduced. The normal response rate of the array detector is not affected. Finally, the detection rate is improved. The above common gate controlled array detector structure embodies the design idea of being compatible with the traditional array detector structure.

[0021] Beneficial effects

[0022] (1) The structure of the mesa type short-wave infrared indium gallium arsenide array detector is improved and innovated in the present application. The designed gate controlled array detector structure realizes the adjustment of the surface charge concentration of the pixel micro-mesa by applying a gate voltage, which is beneficial to reduce the mesa side dark current, solves the process difficulty that the surface dark current of the mesa structure cannot be fully eliminated by the existing process, and improves the sensitivity of the detector.

[0023] (2) The gate electrode structure preparation process of the present application is compatible with the existing mesa type indium gallium arsenide detector manufacturing process, that is, the gate electrode metal can use the same metal plating layer as the P electrode and the common N electrode, and is made synchronously with the P and N electrodes after the dielectric film opening step, without additional processing cost and process steps.

[0024] (3) The pixel floating gate electrode of the gate-controlled indium gallium arsenic array detector structure is an equipotential common structure, which can be flexibly adapted to pixel array scales of different row and column numbers and different sizes, and only one bias voltage control is needed, so that the control is simple, and the array scale compatibility is high.

[0025] (4) The gate-controlled indium gallium arsenic array detector structure design has wide applicability. It can be applied to the preparation of indium gallium arsenic units and focal plane detectors, and can also be applied to Ge / Si, InAs, InAs / GaSb, HgCdTe and other IV, III-V and II-VI mesa type detector material systems, to suppress the surface dark current of the detector and improve the performance of the device. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 It is a top view structure schematic diagram of the common gate-controlled array indium gallium arsenic detector structure chip prepared after the N*2 element scale of the present application;

[0027] In the figure:

[0028] 1-P electrode;

[0029] 2-SiN x passivation film;

[0030] 3-mesa sidewall metal layer;

[0031] 4-common N electrode;

[0032] 5-common gate electrode;

[0033] 6-pixel photosensitive region.

[0034] Figure 2 It is a side view structure schematic diagram of the common gate-controlled array indium gallium arsenic detector structure chip prepared after the N*2 element scale of the present application;

[0035] Figure 3 It is a top view of the 32*640 element scale indium gallium arsenic array detector chip prepared after the embodiment 1 of the present application;

[0036] Figure 4 It is a side view of the 32*640 element scale indium gallium arsenic array detector chip prepared after the embodiment 1 of the present application;

[0037] Figure 5 It is a top view of the 32*32 element scale indium gallium arsenic array detector chip prepared after the embodiment 2 of the present application;

[0038] Figure 6 It is a side view of the 32*32 element scale indium gallium arsenic array detector chip prepared after the embodiment 2 of the present application. DETAILED DESCRIPTION

[0039] In order to make the objects, technical solutions and advantages of the present application clearer, the present application will be further described in detail below with reference to specific examples. It should be understood that the specific examples described herein are only used to explain the present application and should not be used to limit the present application.

[0040] Example 1

[0041] This example provides a 32x640 element scale 5 μm center distance common gate control indium gallium arsenide array detector structure, which adopts an InGaAs absorption layer with an indium component of 0.83. Figure 3 and Figure 4 The top view and side view structural schematic diagrams of the structure are respectively shown as follows:

[0042] (1) Pixel specification: the array detector pixel has 32 rows and 640 columns, the center distance in the row direction is 50 μm, and the center distance in the column direction is 100 μm.

[0043] (2) The detector substrate is InP, the thickness is 300 μm, and the conductive type is semi-insulating;

[0044] (3) The detector buffer layer is In x Al 1-x As, the thickness is 2 μm, and x is increased from 0.53 to 0.83. The doping concentration is N type 5E18cm -3 .

[0045] (4) The detector absorption layer is In 0.83 Ga 0.17 As, the thickness is 2 μm, and the doping concentration is N type 5E15cm -3 .

[0046] (5) The detector window layer is In 0.83 Al 0.17 As, the thickness is 1 μm, and the doping concentration is P type 1E19cm -3 .

[0047] (6) The pixel mesa is square, the side length is 30 μm, and the sidewall coating passivation film is SiN x , the thickness is 300 nm.

[0048] (7) The pixel gate electrode is square, coats the pixel mesa, and is coated inward along the pixel front mesa step edge by 2 μm. The electrode material is Au, and the thickness is 300 nm.

[0049] (8) The 32x640 element pixel gate electrode is connected to the annular common gate electrode. The electrode material is Au, and the thickness is 300 nm.

[0050] (9)32x640 pixels are connected to independent P-metal electrodes at the center of the mesa, and In 0.83 Al 0.17 As window layer forms a contact, and the contact area is square with a width of 5 μm. The P-metal electrode is circular with a diameter of 30 μm.

[0051] (10) The common N-electrode of the detector is ring-shaped, and In x Al 1-x As is connected to the In 0.53 Ga 0.47 As window layer.

[0052] The above structure forms an array InGaAs detector chip with a common gate control structure and a response range covering the wavelength range of 1-2.5 microns. The dark current of the detector can be reduced by applying a forward bias to the gate electrode, and the dark current and noise ratio are significantly lower than those of traditional detector structures.

[0053] Example 2

[0054] This embodiment provides a 32x32 element scale 5 μm center distance common gate control InGaAs array detector structure, which uses an InGaAs absorption layer with an indium composition of 0.53. Figure 5 and Figure 6 The top view and side view structure schematic diagrams of the structure are shown respectively, and the specific structure is as follows:

[0055] (1) Pixel specification: the array detector pixel has 32 rows and 32 columns, the center distance in the row direction is 50 μm, and the center distance in the column direction is 80 μm.

[0056] (2) The detector substrate is InP with a thickness of 300 μm and a conductivity type of semi-insulating;

[0057] (3) The detector absorption layer is In 0.53 Ga 0.47 As with a thickness of 2 μm and a doping concentration of N-type 5E18 cm -3 .

[0058] (4) The detector window layer is InP with a thickness of 1 μm and a doping concentration of P-type 1E19 cm -3 .

[0059] (5) The pixel mesa is square with a side length of 20 μm. The sidewall passivation film is SiN x with a thickness of 300 nm.

[0060] (6) The pixel gate electrode is square and covers the pixel mesa, and is covered inward along the pixel front step edge by 2 μm. The electrode material is Au with a thickness of 300 nm.

[0061] (7) The 32x32 element pixel gate electrode is connected to the ring-shaped common gate electrode, and the electrode material is Au with a thickness of 300 nm.

[0062] (8) 32x32 element pixels lead independent P metal electrodes in the center of the mesa, respectively, and form contact with the InP window layer. The contact area is square, with a width of 3 μm. The P metal electrode is circular, with a diameter of 20 μm.

[0063] (9) The common N electrode of the detector is ring-shaped and is in conduction with the N-type InP.

[0064] The above structure forms an array indium gallium arsenide detector chip with a common gate control structure, with a response range covering the wavelength range of 0.9-1.7 microns. The detector dark current can be reduced by applying a forward bias to the gate electrode, and the dark current and noise ratio are significantly lower than those of traditional detector structures.

[0065] The above describes the specific embodiments of the present application, and the protection scope of the present application is defined by the appended claims. Those skilled in the art can make various changes or modifications to these embodiments without departing from the principles and essence of the present application, and such changes and modifications are within the protection scope of the present application.

Claims

1. A common-gate controlled indium gallium arsenide array photodetector structure, characterized in that: The photodetector has a PIN structure, the light absorption layer material is indium gallium arsenide, the indium composition is between 0 and 1, the window layer material is indium aluminum arsenide, indium arsenide phosphorus or indium phosphide; the P electrode (1) is led out from the window layer, the common metal gate electrode (5) located at the bottom of the step is led out from the metal plating layer (3) on the side wall of the platform, and the common N electrode (4) is located outside the common metal gate electrode. The pixel structure of the photodetector is a micro-protrusion structure. The sidewall surface of the protrusion is covered with an insulating dielectric film layer (2) and a metal plating layer (3) with strong conductivity. The material of the metal plating layer (3) is gold, platinum, aluminum or their alloys. The metal gate electrodes of all array pixel mesa are interconnected, forming an equipotential structure, and are all connected to the same annular common metal gate electrode (5). The sign and magnitude of the voltage applied to the common metal gate electrode (5) control the direction and magnitude of the electric field on the surface of the boss sidewall, thereby controlling the dark current level of the pixel.

2. The common-gate controlled indium gallium arsenide array photodetector structure according to claim 1, characterized in that: When positive charge accumulates at the interface between the pixel protrusion sidewall and the dielectric film, the common metal gate electrode (5) is positively biased; when negative charge accumulates at the interface between the pixel protrusion sidewall and the dielectric film, the common metal gate electrode (5) is negatively biased.

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