Nucleation layer structure, semiconductor device, and method for manufacturing nucleation layer structure

Abstract

The present application provides a nucleation layer structure, a semiconductor device, and a manufacturing method of the nucleation layer structure. The nucleation layer structure includes: forming at least two first nucleation layers and at least two second nucleation layers on a substrate layer; the first nucleation layers and the second nucleation layers are alternately and spacedly arranged, and the substrate layer is in contact with the first nucleation layers; the second nucleation layers are doped with metal impurities, and the metal impurities include metals that can form positive ions. A multilayer structure is formed by intermittently supplying ammonia gas, and metal compound metal impurities are doped when ammonia gas is not supplied. In this way, while reducing the pre-reaction of trimethylaluminum and ammonia gas, metal positive ions are present in the nucleation layer structure, so that while improving the crystal quality of the nucleation layer, the influence of deep-level holes in the nucleation layer structure on the two-dimensional electron gas can be reduced.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular, to a nucleation layer structure, a semiconductor device, and a manufacturing method of the nucleation layer structure. Background Art

[0002] Due to the characteristics of wide bandgap, high electron saturation drift velocity, high breakdown field strength, and good thermal conductivity of the semiconductor material gallium nitride, it has become a current research hotspot. Gallium nitride materials are more suitable for manufacturing high-temperature, high-frequency, high-voltage, and high-power devices than silicon and gallium arsenide. For example, high electron mobility transistors (HEMTs). Therefore, gallium nitride-based electronic devices have good application prospects.

[0003] HEMT devices perform very well in high-frequency and high-power applications. However, there are problems such as large thermal mismatch and lattice mismatch between the substrate and the epitaxial layer, resulting in huge stress during the growth of the epitaxial layer. In some existing technologies, a high-temperature AlN nucleation layer is grown between the substrate layer and the GaN epitaxial layer to alleviate the lattice mismatch. However, there is also large stress in the continuously grown AlN nucleation layer, resulting in residual stress during the GaN epitaxial growth, causing deformation of the epitaxial layer and a decrease in uniformity, thereby having a negative impact on the reliability of the device. Moreover, during the growth of the high-temperature AlN nucleation layer, the pre-reaction of trimethylaluminium (TMAl) and ammonia (NH3) will also intensify, thereby deteriorating the quality of AlN itself. In addition, impurities will be introduced more or less during the heteroepitaxial process. For example, O atoms, unintentionally doped impurities, and N vacancies are the main sources of background carriers. These impurities or defects introduced from the AlN layer will form various energy levels. When the HEMT device is in the working state, these energy levels will capture the two-dimensional electron gas in the device channel, resulting in the decline of device performance such as current and output power, and seriously deteriorating the electrical performance of the device. Summary of the Invention

[0004] In order to overcome the above deficiencies in the prior art, one of the purposes of the present application is to provide a nucleation layer structure, and the nucleation layer structure includes:

[0005] At least two first nucleation layers and at least two second nucleation layers are formed on the substrate layer; the first nucleation layer and the second nucleation layer are alternately arranged at intervals, and the substrate layer is in contact with the first nucleation layer;

[0006] The second nucleation layer is doped with metal impurities, and the metal impurities include metals that can form positive ions.

[0007] In a possible implementation manner, the metal doped in the second nucleation layer is iron or magnesium.

[0008] In a possible implementation, the concentration order of magnitude of the metal impurities doped in the second nucleation layer is 1e14 per cubic centimeter, and the concentration of the metal impurities doped in the penultimate second nucleation layer farthest from the substrate layer side is lower than the concentration of the metal impurities doped in the first second nucleation layer closest to the substrate layer.

[0009] In a possible implementation, the number of the first nucleation layers is equal to the number of the second nucleation layers, and the thickness of the second nucleation layer is greater than the thickness of the first nucleation layer.

[0010] In a possible implementation, the total thickness of the nucleation layer structure is 70 to 110 nanometers.

[0011] In a possible implementation, the thickness difference between at least two of the second nucleation layers is less than or equal to 10 nm.

[0012] In a possible implementation, the thickness difference between at least two of the first nucleation layers is less than or equal to 10 nm.

[0013] Another object of the present application is to provide a semiconductor device, which includes:

[0014] A substrate layer;

[0015] The nucleation layer structure provided by the present application formed on the substrate layer;

[0016] A buffer layer formed on the nucleation layer structure;

[0017] A channel layer formed on the buffer layer;

[0018] A barrier layer formed on the channel layer;

[0019] An electrode formed on the barrier layer.

[0020] Another object of the present application is to provide a manufacturing method of a nucleation layer structure, and the method includes:

[0021] On a substrate layer, a plurality of nucleation layers are sequentially stacked by intermittently supplying ammonia gas to trimethylaluminum. When supplying ammonia gas, a first nucleation layer is formed by trimethylaluminum and ammonia gas, and when not supplying ammonia gas, metal impurities are doped into trimethylaluminum to form a second nucleation layer;

[0022] Among them, the first of the first nucleation layers is formed on the substrate layer, and the metal doped in the second nucleation layer is a metal that can form positive ions.

[0023] In a possible implementation, the step of doping metal impurities into trimethylaluminum when not supplying ammonia gas includes:

[0024] When ammonia gas is not supplied, metal impurities containing iron element or magnesium element are doped into trimethylaluminum.

[0025] Compared with the prior art, the present application has the following beneficial effects:

[0026] The embodiment of the present application provides a nucleation layer structure, a semiconductor device and a manufacturing method of the nucleation layer structure. When growing the nucleation layer, a multi-layer structure is formed by intermittently supplying ammonia gas, and metal impurities are doped when ammonia gas is not supplied. In this way, metal positive ions can be present in the nucleation layer structure, so that while improving the crystal quality of the nucleation layer, the influence of deep-level holes in the nucleation layer structure on the two-dimensional electron gas can be reduced. Description of the Drawings

[0027] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.

[0028] Figure 1 Schematic diagram of the nucleation layer structure provided by the embodiment of the present application;

[0029] Figure 2 Schematic diagram of the semiconductor device structure provided by the embodiment of the present application;

[0030] Figure 3 One of the growth schematic diagrams of the nucleation layer structure provided by the embodiment of the present application;

[0031] Figure 4 Another growth schematic diagram of the nucleation layer structure provided by the embodiment of the present application;

[0032] Figure 5 Schematic diagram of the first and second-to-last nucleation layers provided by the embodiment of the present application;

[0033] Figure 6 Schematic diagram of the thickness of the first and second nucleation layers provided by the embodiment of the present application;

[0034] Figure 7 Flow chart of the manufacturing method of the nucleation layer structure provided by the embodiment of the present application.

[0035] Reference numerals: 10 - substrate layer; 20 - nucleation layer structure; 21 - first nucleation layer; 22 - second nucleation layer; 30 - buffer layer; 40 - channel layer; 50 - barrier layer. Detailed Embodiments

[0036] To make the objectives, technical solutions and advantages of the embodiments of this application clearer, the following will clearly and completely describe the technical solutions in the embodiments of this application with reference to the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are some, but not all, of the embodiments of this application. Components of the embodiments of this application usually described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.

[0037] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of this application claimed, but merely represents selected embodiments of this application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of this application without creative efforts fall within the scope of protection of this application.

[0038] It should be noted that like reference numerals and letters denote like items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0039] In the description of this application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the inventive product is usually placed during use. It is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. In addition, the terms "first", "second", "third", etc. are only used for descriptive distinction and should not be construed as indicating or implying relative importance.

[0040] In the description of this application, it should also be noted that unless otherwise clearly specified and limited, the terms "set", "installed", "connected", "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0041] To form a high-quality semiconductor epitaxial structure, it is necessary to improve the crystal quality in the nucleation layer. In some existing solutions, a nucleation method of forming AlN at a high temperature is mainly adopted. By controlling the growth temperature of the nucleation layer at about 1000 °C, the surface migration force of Al atoms can be increased, the density of AlN nucleation islands can be increased, laying a good foundation for the 3D merging process during the subsequent growth of the buffer layer, thereby improving the crystal quality.

[0042] However, the high-temperature environment will exacerbate the pre-reaction between TMAl and NH3, thus deteriorating the quality of AlN, and further affecting the growth of the subsequent buffer layer. On the other hand, there are still many defects in the AlN nucleation layer. For example, O atoms, unintentionally doped impurities, and N vacancies form various energy levels. When the semiconductor device operates, the holes in these deep energy levels will capture the two-dimensional electron gas in the channel layer, affecting the output power of the device and resulting in a decline in device performance.

[0043] In view of this, this embodiment provides a nucleation layer structure, a semiconductor device, and a manufacturing method of the nucleation layer structure. By intermittently supplying ammonia during the growth of the nucleation layer and doping metal impurities when ammonia is not supplied, the crystal quality of the nucleation layer can be improved while reducing the influence of deep energy level holes in the nucleation layer on the two-dimensional electron gas. The solution provided in this embodiment will be elaborated in detail below.

[0044] Please refer to Figure 1 , Figure 1 which is a schematic diagram of a nucleation layer structure provided in this embodiment. The nucleation layer structure can be formed on a substrate layer 10, and the substrate layer 10 can include one or a combination of gallium nitride, aluminum gallium nitride, indium gallium nitride, aluminum indium gallium nitride, indium phosphide, gallium arsenide, silicon carbide, diamond, sapphire, germanium, silicon, or any other material capable of growing group III nitrides.

[0045] The nucleation layer structure 20 can include a semiconductor material based on group III-V compounds. The nucleation layer structure includes at least two first nucleation layers 21 and at least two second nucleation layers 22. The first nucleation layers 21 and the second nucleation layers 22 are alternately arranged at intervals. The first of the first nucleation layers 21 is formed on the substrate layer 10 and is in contact with the substrate layer 10. The second nucleation layer 22 is doped with metal impurities, and the metal impurities include metals that can form positive ions. For example, the first nucleation layer 21 can be aluminum nitride AlN, and the second nucleation layer 22 can be AlN doped with metal.

[0046] In this embodiment, please refer to Figure 2 , on the basis of the nucleation layer structure 20 provided in this embodiment, structures such as a buffer layer 30, a channel layer 40, and a barrier layer 50 can be sequentially formed. The nucleation layer structure 20 provided in this embodiment can reduce the stress generated between the substrate layer 10 and the buffer layer 30 due to lattice mismatch and thermal expansion coefficient mismatch.

[0047] In this embodiment, when growing the nucleation layer structure 20, NH3 can be intermittently supplied to TMAl multiple times, and metal impurities can be doped into TMAl when NH3 is not supplied.

[0048] For example, please refer to Figure 3 , NH3 can be supplied to TMAl on the basis of the substrate layer 10 first, and AlN formed rapidly by the reaction of TMAl and NH3 at high temperature is used as the first nucleation layer 21. Then, without supplying NH3, the second nucleation layer 22 is formed when metal impurities are doped in TMAl. Please refer to Figure 4 , and then the subsequent first nucleation layers 21 and second nucleation layers 22 with alternating intervals can be continuously formed by intermittently supplying NH3 and doping metal impurities.

[0049] For the first nucleation layer 21 directly formed on the substrate layer 10, it provides nucleation centers with the same crystal orientation as the substrate layer 10, avoiding the direct contact between the buffer layer 30 and the substrate layer 10, thereby avoiding the mismatch stress caused by the lattice mismatch between the buffer layer 30 and the substrate layer 10 and the stress caused by the mismatch of the thermal expansion coefficient. In this way, the overall quality of the crystal can be improved, and the structural stability of the entire semiconductor device is improved.

[0050] For the first nucleation layer 21 not directly formed on the substrate layer 10 (i.e., the first nucleation layer 21 formed on the second nucleation layer 22), it is mainly because the loop - type growth is used to further release some residual stress. Because NH3 is supplied intermittently, the pre - reaction between TMAl and NH3 in the high - temperature environment is reduced, thereby enhancing the merging mode of AlN nucleation islands and the 2D growth mode, obtaining an AlN layer with better surface morphology and crystal quality, which plays a crucial role in growing GaN on the AlN layer subsequently.

[0051] Each of the second nucleation layers 22 is formed by doping metal impurities in TMAl without supplying NH3.

[0052] Due to the non - supply of NH3, the strong adhesion and weak mobility of Al atoms will make the lateral growth of AlN slower, forming high - density 3D islands. Furthermore, impurity atoms (such as oxygen atoms) under the substrate will diffuse upward to form shallow donors, and a buried charge layer will be formed between the AlN nucleation layer structure 20 and the buffer layer 30, forming a leakage path. When the semiconductor device works, it will capture the two - dimensional electron gas in the channel layer 40, affecting the output power of the device and resulting in a decline in device performance.

[0053] Therefore, in this embodiment, when growing the second nucleation layer 22, a metal impurity is doped into TMAl, and the metal element in the metal impurity can form a metal ion with a positive valence. Since the energy level of the positive-valent metal ion is relatively shallow compared to the deep-level hole (e.g., nitrogen hole), and the speed of releasing electrons is relatively fast, the electrons captured by the deep-level hole (e.g., nitrogen hole) can be reduced, acting as a recombination center, reducing the carrier lifetime, and thus reducing the background carrier mobility.

[0054] Based on the above design, the nucleation layer structure 20 provided in this embodiment forms the first nucleation layer 21 and the second nucleation layer 22 with alternating intervals by intermittently supplying NH3 and doping metal impurities when ammonia is not supplied. Since there are metal positive ions in the second nucleation layer 22, the influence of deep-level holes in the nucleation layer structure 20 on the two-dimensional electron gas can be reduced.

[0055] Optionally, in some possible implementation manners, the metal doped in the second nucleation layer 22 is iron or magnesium. For example, when growing the second nucleation layer 22, ferrocene or magnesium bis(cyclopentadienyl) can be doped into TMAl without supplying NH3, so that the second nucleation layer 22 has metal impurities of iron or magnesium.

[0056] Optionally, in some possible implementation manners, the concentration order of magnitude of the metal impurities doped in the second nucleation layer 22 is 1e14 per cubic centimeter. By doping metal elements with a relatively high concentration in a layered and spaced manner, the influence of the memory effect of the doped metal elements on the electrical performance of the device can be reduced.

[0057] Optionally, in some possible implementation manners, the concentration of the metal impurities doped in the penultimate second nucleation layer farthest from the substrate layer 10 is lower than the concentration of the metal impurities doped in the first second nucleation layer closest to the substrate layer 10. For example, please refer to Figure 5 , among at least two of the second nucleation layers, the second nucleation layer 22A is the first second nucleation layer closest to the substrate layer 10, the second nucleation layer 22X is the penultimate second nucleation layer farthest from the substrate layer 10, and the concentration of the metal impurities doped in the second nucleation layer 22A is greater than the concentration of the metal impurities doped in the second nucleation layer 22X.

[0058] Optionally, in some possible implementation manners, the number of the first nucleation layers 21 is equal to the number of the second nucleation layers 22, and the thickness of the second nucleation layer 22 is greater than the thickness of the first nucleation layer 21. For example, please refer to Figure 6 , the thickness of the first nucleation layer 21 is d1, the thickness of the second nucleation layer 22 is d2, and d2 > d1.

[0059] Thus, for the second nucleation layer 22, an increase in thickness can increase the Hall mobility in the heterojunction formed on the second nucleation layer 22 and reduce the background carrier concentration, providing certain positive assistance for the subsequent realization of the buffer layer 30 (GaN layer) with a relatively high resistivity.

[0060] Optionally, in this embodiment, the total thickness of the entire nucleation layer structure 20 is 70 to 110 nanometers. Exemplarily, it can be 70nm, 80nm, 90nm, 100nm, or 110nm. For example, the nucleation layer structure 20 may include two first nucleation layers 21 and two second nucleation layers 22. The total thickness of the entire nucleation layer structure 20 can be about 80nm, the thickness of the first nucleation layer 21 can be about 15nm, and the thickness of the second nucleation layer 22 can be about 25nm. For example, the total thickness of the entire nucleation layer structure 20 can be about 100nm, and the thickness of the second nucleation layer 22 can be about 30nm.

[0061] The thicknesses of the respective first nucleation layers 21 can be approximately equal, and the difference cannot be too large. For example, the thickness difference between the respective first nucleation layers 21 is less than or equal to 10nm. The thicknesses of the respective second nucleation layers 22 can also be approximately equal, and the difference cannot be too large. For example, the thickness difference between the respective second nucleation layers 22 is less than or equal to 10nm.

[0062] This embodiment also provides a semiconductor device. The semiconductor device includes a substrate layer 10, a nucleation layer structure 20, a buffer layer 30, a channel layer 40, and a barrier layer 50. Among them, the nucleation layer structure 20 is the nucleation layer structure 20 provided above in this embodiment, which will not be elaborated here.

[0063] The buffer layer 30 is formed on the nucleation layer structure 20. The main functions of the buffer layer 30 include bonding the semiconductor material layer that needs to be grown next and protecting the substrate layer material from being invaded by some metal ions. At the same time, it can reduce the leakage current and achieve a pinch-off effect. In this embodiment, the material of the buffer layer 30 can be a group III nitride material such as AlGaN, GaN, or AlGaInN. In this embodiment, the buffer layer 30 is taken as an example of a GaN material for subsequent description.

[0064] The channel layer 40 is formed on the side of the buffer layer 30 away from the nucleation layer structure 20. The material of the channel layer 40 can be a nitride, including at least one of GaN, AlN, InAlN, AlGaN, InAlGaN or other semiconductor materials. The main function of the channel layer 40 is to provide a channel for two-dimensional electron gas. By setting oxygen atoms with a reasonable concentration in the channel layer 40, the scattering effect of impurities generated by oxygen atom ionization on the two-dimensional electron gas is reduced, the mobility of the two-dimensional electron gas is ensured, and the performance of the semiconductor device is ensured to be stable. In this embodiment, the channel layer 40 is taken as an example of GaN material.

[0065] The barrier layer 50 is formed on the channel layer 40. The preparation material of the barrier layer 50 can include nitrides. For example, it includes at least one of AlN, InAlN, AlGaN, InAlGaN or other semiconductor materials. The main function of the barrier layer 50 is to form a two-dimensional electron gas between the barrier layer 50 and the channel layer 40. In this embodiment, the barrier layer 50 is taken as an example of AlGaN material.

[0066] Please refer to Figure 7 , this embodiment also provides a manufacturing method of a nucleation layer structure, and the method includes the following steps.

[0067] Step S110, on a substrate layer, a plurality of nucleation layers are sequentially stacked by intermittently supplying ammonia gas to trimethylaluminum. When supplying ammonia gas, a first nucleation layer is formed by trimethylaluminum and ammonia gas. When not supplying ammonia gas, metal impurities are doped into trimethylaluminum to form a second nucleation layer.

[0068] In this embodiment, the nucleation layer structure formed by the above method can be seen in Figure 1 the shown structure, which will not be elaborated here.

[0069] Optionally, in some possible implementation manners, the metal impurities doped in the second nucleation layer 22 can be compounds containing iron element (Fe) or magnesium element (Mg). For example, the metal impurities can be ferrocene (CP2Fe) or magnesium bis(cyclopentadienyl) (CP2Mg).

[0070] In summary, the embodiments of the present application provide a nucleation layer structure, a semiconductor device and a manufacturing method of a nucleation layer structure. When growing the nucleation layer, a multi-layer structure is formed by intermittently supplying ammonia gas, and metal impurities are doped when not supplying ammonia gas. In this way, metal positive ions can be made to exist in the nucleation layer structure, thereby reducing the influence of deep-level holes in the nucleation layer structure on the two-dimensional electron gas.

[0071] It should be noted that in this document, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprising", "including" or any other variant thereof are intended to cover non-exclusive inclusion, such that a process, method, article or device comprising a series of elements not only includes those elements but also includes other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising a..." does not exclude the presence of additional identical elements in the process, method, article or device comprising said element.

[0072] As described above, the above are only various embodiments of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art within the technical scope disclosed in the present application can easily think of changes or substitutions, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A nucleation layer structure, characterized in that, The nucleation layer structure includes: forming at least two first nucleation layers and at least two second nucleation layers on a substrate layer; the first nucleation layers and the second nucleation layers are alternately arranged at intervals, and the substrate layer is in contact with the first nucleation layers; the second nucleation layers are doped with metal impurities, and the metal impurities include metals that can form positive ions; the concentration order of magnitude of the metal impurities doped in the second nucleation layers is 1e14 per cubic centimeter, and the concentration of the metal impurities doped in the penultimate second nucleation layer farthest from the substrate layer side is lower than the concentration of the metal impurities doped in the first second nucleation layer closest to the substrate layer; 2. The nucleation layer structure according to claim 1, characterized in that, the metal doped in the second nucleation layers is iron or magnesium; 3. The nucleation layer structure according to claim 1, characterized in that, the number of the first nucleation layers is equal to the number of the second nucleation layers, and the thickness of the second nucleation layers is greater than the thickness of the first nucleation layers; 4. The nucleation layer structure according to claim 1, characterized in that, the total thickness of the nucleation layer structure is 70 to 110 nanometers; 5. The nucleation layer structure according to claim 1, characterized in that, the thickness difference between the at least two second nucleation layers is less than or equal to 10 nm; 6. The nucleation layer structure according to claim 1, characterized in that, the thickness difference between the at least two first nucleation layers is less than or equal to 10 nm; 7. A semiconductor device, characterized in that, The semiconductor device includes: a substrate layer; the nucleation layer structure as described in any one of claims 1-6 formed on the substrate layer; a buffer layer formed on the nucleation layer structure; a channel layer formed on the buffer layer; a barrier layer formed on the channel layer; an electrode formed on the barrier layer; 8. A manufacturing method of a nucleation layer structure, characterized in that, The method is used to manufacture the nucleation layer structure as described in any one of claims 1-6, and the method includes: on a substrate layer, forming multiple nucleation layers by sequentially laminating through intermittently supplying ammonia gas to trimethylaluminum. When supplying ammonia gas, a first nucleation layer is formed by trimethylaluminum and ammonia gas, and when not supplying ammonia gas, metal impurities are doped into trimethylaluminum to form a second nucleation layer; wherein, the first of the first nucleation layers is formed on the substrate layer, and the metal doped in the second nucleation layers is a metal that can form a positive ion; 9. The method according to claim 8, characterized in that, The step of doping metal impurities into trimethylaluminum when not supplying ammonia gas includes: doping metal impurities containing iron element or magnesium element into trimethylaluminum when not supplying ammonia gas.

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