LED epitaxial wafer, epitaxial growth method and LED chip

Abstract

The present invention provides an LED epitaxial wafer, an epitaxial growth method, and an LED chip. The epitaxial growth method includes controlling the growth temperature to gradually decrease from a high temperature to a low temperature when growing a P-type contact layer, and at the same time, doping Mg, controlling the Mg introduction concentration to be higher than the Mg concentration of the P-type GaN layer, and gradually increasing the Mg introduction concentration as the growth temperature decreases. This is because growing the Mg-doped GaN layer at a higher temperature can obtain a Mg-doped GaN layer with higher crystal quality. At the same time, at high temperatures, Mg is more easily doped into the GaN layer, but at low temperatures, the Mg doping efficiency decreases significantly. By increasing the introduction Mg concentration at low temperatures, the problem of low Mg doping concentration at low temperatures can be improved. Furthermore, since Mg is gradually incorporated during the cooling process from high temperature to low temperature, the lattice mismatch of the Mg-doped GaN layer is effectively reduced, thereby reducing the contact resistance of the P-type contact layer while ensuring the crystal quality.

Description

Technical Field

[0001] The present invention relates to the field of LED technology, and in particular to an LED epitaxial wafer, an epitaxial growth method and an LED chip. Background Art

[0002] As we all know, GaN-based compound semiconductor materials are typical third-generation wide-bandgap semiconductor materials. GaN-based semiconductors can achieve band gaps ranging from 0.7eV to 6.2eV by regulating the composition of Group III atoms (In, Al, Ga). Therefore, GaN-based materials have been widely used in various optoelectronic devices.

[0003] The operating voltage of a GaN-based light-emitting diode (LED) includes theoretically calculated voltage, contact resistance, and the bulk resistance of the material. Therefore, reducing the LED's contact resistance can reduce the LED's voltage. Typically, GaN-based LEDs are connected to metal. When the semiconductor contact layer has a high doping concentration, carriers can tunnel through the potential barrier and connect to the metal, generating current. Therefore, preparing a highly doped P-type GaN contact layer is an important method for reducing contact resistance.

[0004] Currently, there are two main ways to increase the doping concentration of the P-type contact layer: 1. During the growth of the P-type contact layer, the doping concentration of the P-type contact layer is increased by increasing the concentration of the MO source Mg. However, heavy doping will lead to crystal defects (N vacancies), which will compensate for the Mg doping, thereby affecting the Mg doping concentration and the energy level height of Mg; 2. Mg doping in GaN at low temperature can easily break the Mg-H bond through annealing to increase the activated Mg concentration, but the low-temperature grown Mg-doped GaN layer has a lattice mismatch problem, which affects the aging performance of the LED. Summary of the Invention

[0005] Based on this, the purpose of the present invention is to provide an LED epitaxial wafer, an epitaxial growth method and an LED chip, aiming to solve the problem in the prior art that the contact resistance is reduced by doping Mg in the P-type contact layer, but this may lead to crystal defects or lattice mismatch.

[0006] According to an embodiment of the present invention, a method for epitaxial growth of an LED epitaxial wafer is characterized in that the epitaxial growth method includes:

[0007] When growing the P-type contact layer, the growth temperature is controlled to gradually decrease from high temperature to low temperature. At the same time, Mg is doped and the Mg concentration is controlled to be higher than the Mg concentration of the P-type GaN layer. As the growth temperature decreases, the Mg concentration gradually increases.

[0008] Preferably, the epitaxial growth method further comprises:

[0009] Providing a sapphire substrate required for growth;

[0010] epitaxially growing a buffer layer, an unintentionally doped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type GaN layer and a P-type contact layer on the sapphire substrate in sequence;

[0011] The P-type contact layer is annealed in N2.

[0012] Preferably, when growing the P-type contact layer, controlling the growth temperature to gradually decrease from a high temperature to a low temperature, and at the same time controlling the Mg concentration to be higher than the Mg concentration of the P-type GaN layer, and gradually increasing the Mg concentration as the growth temperature decreases, specifically includes:

[0013] The growth temperature of the P-type contact layer is reduced from 900° C. to 1000° C. to 700° C. At the same time, as the growth temperature of the P-type contact layer decreases, the Mg concentration is increased from 1E19 to 5E20, and the growth pressure of the P-type contact layer is 100 torr to 600 torr.

[0014] Preferably, the growth temperature of the N-type GaN layer is 1100° C., and the Si doping concentration is 1E19-2E19.

[0015] Preferably, the P-type GaN layer is a Mg-doped GaN layer, the Mg concentration is 1E19, and the growth temperature is 900°C to 1000°C.

[0016] According to an embodiment of the present invention, an LED epitaxial wafer is produced by the above-mentioned LED epitaxial wafer epitaxial growth method. The LED epitaxial wafer includes a P-type contact layer, which is a high-concentration Mg-doped layer. The thickness of the P-type contact layer is 1nm to 20nm.

[0017] Preferably, the LED epitaxial wafer comprises a sapphire substrate, a buffer layer, an unintentionally doped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer;

[0018] The buffer layer, the unintentionally doped GaN layer, the N-type GaN layer, the multi-quantum well layer, the electron blocking layer, the P-type GaN layer and the P-type contact layer are epitaxially grown in sequence on the sapphire substrate.

[0019] Preferably, the thickness of the buffer layer is 10nm to 30nm, the thickness of the unintentionally doped GaN layer is 2um to 3um, the thickness of the N-type GaN layer is 2um to 3um, the thickness of the multi-quantum well layer is 11nm to 15.5nm, the thickness of the electron blocking layer is 10nm to 40nm, and the thickness of the P-type GaN layer is 5nm to 20nm.

[0020] Preferably, the multi-quantum well layer includes an InGaN quantum well layer and an AlGaN quantum barrier layer, and is a periodic structure formed by alternating growth of the InGaN quantum well layer and the AlGaN quantum barrier layer.

[0021] An LED chip according to an embodiment of the present invention includes the above-mentioned LED epitaxial wafer.

[0022] Compared with the existing technology: by controlling the growth temperature of the P-type GaN contact layer to gradually decrease from high temperature to low temperature, and at the same time, doping Mg, controlling the Mg concentration to be higher than the Mg concentration of the P-type GaN layer, and the Mg concentration gradually increases as the temperature decreases, because growing the Mg-doped GaN layer at a higher temperature can obtain a Mg-doped GaN layer with higher crystal quality. At the same time, at high temperature, Mg is easier to be doped into the GaN layer, but at low temperature, the efficiency of Mg doping decreases a lot. By increasing the Mg concentration at low temperature, the problem of low Mg doping concentration at low temperature can be improved. Since Mg is gradually incorporated in the process of cooling from high temperature to low temperature, the lattice mismatch of the Mg-doped GaN layer is effectively reduced, thereby reducing the contact resistance of the P-type contact layer while ensuring the crystal quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 Schematic diagram of the structure of the LED epitaxial wafer in the first embodiment of the present invention;

[0024] Figure 2 This is a flow chart of the epitaxial growth method of an LED epitaxial wafer in the second embodiment of the present invention. DETAILED DESCRIPTION

[0025] To facilitate understanding of the present invention, the present invention will be described more fully below with reference to the accompanying drawings. The drawings illustrate several embodiments of the present invention. However, the present invention may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the present invention.

[0026] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is referred to as being "connected to" another element, it may be directly connected to the other element or there may be an intermediate element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0028] Example 1

[0029] See also Figure 1 , shown is an LED epitaxial wafer in Example 1 of the present invention, including a sapphire substrate 10, and a buffer layer 20, an unintentionally doped GaN layer 30, an N-type GaN layer 40, a multi-quantum well layer 50, an electron blocking layer 60, a P-type GaN layer 70 and a P-type contact layer 80 epitaxially grown in sequence on the sapphire substrate 10.

[0030] In this embodiment, the P-type contact layer 80 is a high-concentration Mg-doped layer. By way of example and not limitation, in some preferred embodiments of this embodiment, the thickness of the P-type contact layer 80 is 1 nm to 20 nm, such as 2 nm, 4 nm, or 6 nm. The thickness of the buffer layer 20 is 10 nm to 30 nm, such as 12 nm, 14 nm, or 16 nm. The thickness of the unintentionally doped GaN layer 30 is 2 μm to 3 μm, such as 2.2 μm, 2.4 μm, or 2.6 μm. The thickness of the N-type GaN layer 40 is 2um to 3um, for example, 2.2um, 2.4um, 2.6um, etc.; the thickness of the multi-quantum well layer 50 is 11nm to 15.5nm, for example, 12nm, 13nm, 14nm, etc.; the thickness of the electron blocking layer 60 is 10nm to 40nm, for example, 15nm, 20nm, 35nm, etc.; the thickness of the P-type GaN layer 70 is 5nm to 20nm, for example, 8nm, 10nm, 12nm, etc.

[0031] Specifically, the multi-quantum well layer 50 includes an InGaN quantum well layer and an AlGaN quantum barrier layer, and is a periodic structure formed by alternating growth of the InGaN quantum well layer and the AlGaN quantum barrier layer. For example, but not limitation, in some preferred embodiments of this embodiment, the thickness of the InGaN quantum well layer is 2 to 3.5 nm, for example, 2.4 nm, 2.8 nm, 3.2 nm, etc.; the Al x Ga 1-x The thickness of the N quantum barrier layer is 9-12 nm, for example, 9.5 nm, 10 nm, 10.5 nm, etc. The alternating periods of the quantum well layers in the multi-quantum well layer 50 are 6-12, for example, 9, that is, the multi-quantum well layer 50 has 9 layers in total.

[0032] Example 2

[0033] See also Figure 2 , shown is a method for epitaxial growth of an LED epitaxial wafer proposed in the second embodiment of the present invention, which is used to prepare the LED epitaxial wafer in the first embodiment above. The method specifically includes steps S201 to S209, wherein:

[0034] Step S201: providing a sapphire substrate required for growth.

[0035] Step S202 : growing a buffer layer with a thickness of 10 nm to 30 nm.

[0036] It should be noted that the material of the buffer layer can be AlN or GaN. In this embodiment, the AlN buffer layer is deposited by applied material PVD, and its thickness is 15 nm.

[0037] Step S203 , growing an unintentionally doped GaN layer with a thickness of 2 μm to 3 μm.

[0038] Specifically, a sapphire substrate coated with an AlN buffer layer is placed on a graphite tray and placed into a reaction chamber for epitaxial material growth. The unintentionally doped GaN layer is grown at a temperature of 1100°C and a pressure of 100 torr to 600 torr.

[0039] In this embodiment, an AMEC A7 MOCVD (Metal-organic Chemical Vapor Deposition) device was used to grow LED epitaxial wafers. A sapphire substrate, already sputtered with an AlN buffer layer, was placed in the MOCVD process. Epitaxial growth was performed using one of the following carrier gases: high-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2. High-purity NH3 served as the N source, trimethylgallium (TMGa) and triethylgallium (TEGa) served as the gallium source, trimethylindium (TMIn) served as the indium source, trimethylaluminum (TMAl) served as the aluminum source, silane (SiH4) served as the N-type dopant, and bis(cyclopentadienyl)magnesium (CP2Mg) served as the P-type dopant.

[0040] Step S204 , growing an N-type GaN layer with a thickness of 2 μm to 3 μm.

[0041] Specifically, the growth temperature of the N-type GaN layer is 1100° C., and the layer is doped with Si, wherein the Si doping concentration is 1E19-2E19.

[0042] Step S205 , growing a multi-quantum well layer with a growth thickness of 11 nm to 15.5 nm.

[0043] In this embodiment, the multi-quantum well layer is an alternately stacked InGaN quantum well layer and an AlGaN quantum barrier layer, with a stacking period of 6 to 12. The InGaN quantum well layer is grown at a temperature of 790°C to 810°C and a thickness of 2nm to 3.5nm. x Ga 1-x The growth temperature of the N quantum barrier layer is 850° C. to 900° C., the growth thickness is 9 nm to 12 nm, and the Al composition x is 0.01 to 0.1.

[0044] Step S206 , growing an electron blocking layer with a thickness of 10 nm to 40 nm.

[0045] The electron blocking layer is AlInGaN, and the growth temperature is 900°C to 1000°C.

[0046] Step S207 , growing a P-type GaN layer with a thickness of 5 nm to 20 nm.

[0047] Specifically, the P-type GaN layer is a Mg-doped GaN layer, the Mg concentration is 1E19, and the growth temperature is 900° C. to 1000° C.

[0048] Step S208 , growing a P-type contact layer with a thickness of 1 nm to 20 nm.

[0049] Among them, the growth pressure of the P-type contact layer is 100torr~600torr, the growth temperature of the P-type contact layer gradually changes from 900℃~1000℃ when growing the P-type GaN layer to 700℃, the cooling time is 3min~10min, and the cooling rate is 100℃ / min~30℃ / min. At the same time, the concentration of Mg introduced is controlled to gradually increase as the temperature decreases. It should be noted that the initial concentration of Mg introduced should be greater than the Mg concentration in the P-type GaN layer, that is, the Mg concentration introduced gradually increases from 1E19 to 5E20, and the final thickness of the P-type contact layer is controlled to be 1nm~20nm. Because the P-type contact layer is a heavily doped Mg layer, if the thickness of this layer is too thick, it will produce a light absorption effect on the LED light emission, thereby reducing the luminous efficiency of the LED.

[0050] In this embodiment, the growth temperature during the growth of the P-type contact layer gradually changes from 980°C to 700°C, the cooling time is 5 minutes, and the cooling rate is 56°C / min. At the same time, the Mg concentration introduced is increased from 1E19, which is higher than the Mg concentration of the P-type GaN layer, to 5E20 as the temperature decreases. The Mg concentration increase rate is 1E20 / min, and the Mg concentration increase time is 5 minutes. It can be understood that the start and end times of the temperature decrease and the Mg concentration increase during the growth of the P-type contact layer are consistent.

[0051] Step S209: performing annealing in N2.

[0052] It should be noted that the P-type contact layer is annealed in N2 because Mg doping easily forms Mg-H complexes at low temperatures, and annealing in N2 can easily break the Mg-H bonds and increase the activated Mg concentration, effectively reducing the contact resistance of the P-type contact layer and lowering the LED operating voltage.

[0053] In summary, the LED epitaxial wafer and epitaxial growth method thereof in the embodiments of the present invention control the growth temperature of the P-type GaN contact layer from high temperature to low temperature, and at the same time, dope Mg, control the Mg concentration to be higher than the Mg concentration of the P-type GaN layer, and the Mg concentration gradually increases as the temperature decreases, because growing the Mg-doped GaN layer at a higher temperature can obtain a Mg-doped GaN layer with higher crystal quality. At the same time, at high temperature, Mg is easier to be doped into the GaN layer, but at low temperature, the efficiency of Mg doping decreases a lot. By increasing the concentration of Mg introduced at low temperature, the problem of low Mg doping concentration at low temperature can be improved. Since Mg is gradually incorporated in the process of cooling from high temperature to low temperature, the lattice mismatch of the Mg-doped GaN layer is effectively reduced, thereby reducing the contact resistance of the P-type contact layer while ensuring the crystal quality.

[0054] Example 3

[0055] A third embodiment of the present invention provides an LED chip, comprising the LED epitaxial wafer of the first embodiment. The LED epitaxial wafer can be epitaxially grown using the epitaxial growth method of the LED epitaxial wafer of the second embodiment.

[0056] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention shall be determined by the appended claims.

Claims

1. A method for epitaxial growth of LED epitaxial wafers, characterized in that: The epitaxial growth method comprises: Providing a sapphire substrate required for growth; epitaxially growing a buffer layer, an unintentionally doped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer, a P-type GaN layer and a P-type contact layer on the sapphire substrate in sequence; Annealing the P-type contact layer in N2; When growing the P-type contact layer, the growth temperature is controlled to gradually decrease from a high temperature to a low temperature. At the same time, Mg is doped, and the Mg injection concentration is controlled to be higher than the Mg concentration of the P-type GaN layer. As the growth temperature decreases, the Mg injection concentration gradually increases. The growth temperature of the P-type contact layer decreases from 900°C to 1000°C to 700°C. At the same time, as the growth temperature of the P-type contact layer decreases, the Mg injection concentration increases from 1E19 to 5E20. The growth pressure of the P-type contact layer is 100torr to 600torr.

2. The epitaxial growth method of an LED epitaxial wafer according to claim 1, wherein: The growth temperature of the N-type GaN layer is 1100° C., and the Si doping concentration is 1E19-2E19.

3. The epitaxial growth method of an LED epitaxial wafer according to claim 1, wherein: The P-type GaN layer is a Mg-doped GaN layer, the Mg concentration is 1E19, and the growth temperature is 900° C. to 1000° C.

4. An LED epitaxial wafer, produced by the epitaxial growth method of an LED epitaxial wafer according to any one of claims 1 to 3, characterized in that: The LED epitaxial wafer includes a P-type contact layer, which is a high-concentration Mg-doped layer. The thickness of the P-type contact layer is 1 nm to 20 nm.

5. The LED epitaxial wafer according to claim 4, characterized in that: The LED epitaxial wafer includes a sapphire substrate, a buffer layer, an unintentionally doped GaN layer, an N-type GaN layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer; The buffer layer, the unintentionally doped GaN layer, the N-type GaN layer, the multi-quantum well layer, the electron blocking layer, the P-type GaN layer and the P-type contact layer are epitaxially grown in sequence on the sapphire substrate.

6. The LED epitaxial wafer according to claim 5, characterized in that: The thickness of the buffer layer is 10nm to 30nm, the thickness of the unintentionally doped GaN layer is 2um to 3um, the thickness of the N-type GaN layer is 2um to 3um, the thickness of the multi-quantum well layer is 11nm to 15.5nm, the thickness of the electron blocking layer is 10nm to 40nm, and the thickness of the P-type GaN layer is 5nm to 20nm.

7. The LED epitaxial wafer according to claim 6, characterized in that: The multi-quantum well layer includes an InGaN quantum well layer and an AlGaN quantum barrier layer, and is a periodic structure formed by alternating growth of the InGaN quantum well layer and the AlGaN quantum barrier layer.

8. An LED chip, characterized in that: The LED epitaxial wafer comprises the LED epitaxial wafer according to any one of claims 4 to 7.

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