A three-level inverter circuit

Abstract

The application discloses a three-level inverter circuit, which comprises power switches, capacitors and AC filter inductors. The inverter circuit outputs three-level voltage, and the harmonic content is reduced compared with a two-level structure. In the energy transmission mode of the positive half cycle and the negative half cycle of the power grid, only one switch tube has current flowing therethrough, and the switching loss is reduced. The charging circuit of the input DC source to the switch capacitor is separated from the freewheeling circuit of the power grid, and the power grid current does not pass through the switch capacitor in the freewheeling mode of the 0 level, so that the switch capacitor voltage of the circuit will not rise sharply under non-unit power factor. The neutral point of the inverter circuit power grid is directly connected with the negative electrode of a photovoltaic cell panel to form a common ground structure, and the generation of leakage current is effectively inhibited. Therefore, the inverter circuit has good application value as a non-isolated inverter in a small and medium power non-isolated photovoltaic grid-connected inverter system.

Description

Technical Field

[0001] This invention relates to a three-level inverter circuit technology, belonging to the field of inverter circuit topology technology. Background Technology

[0002] Driven by the global new energy revolution, countries around the world have set clear goals for new energy power generation. The EU Energy Department has proposed that by 2050, new energy power generation should account for 80% of total power generation in the EU, while my country expects new energy power generation to account for about 60% by 2050. Photovoltaics, as an important member of the new energy source, has broad development prospects. However, the traditional isolated photovoltaic grid-connected inverter structure, due to the inclusion of power frequency or high-frequency transformers, reduces the overall efficiency and power density of the photovoltaic system, hindering the large-scale popularization of photovoltaic power generation systems in the future.

[0003] Non-isolated grid-connected photovoltaic (PV) inverters have no transformer, giving them a significant advantage in overall efficiency and power density compared to isolated PV inverters. However, because non-isolated PV inverters lack a transformer, parasitic capacitance between the PV array and ground, as well as a common-mode loop between the PV inverter and ground, can generate high-frequency leakage currents, posing a risk to equipment and personnel safety.

[0004] Currently, to suppress leakage current in non-isolated grid-connected photovoltaic inverter circuits, two-level full-bridge inverter circuits with bipolar modulation, half-bridge circuits, or common-ground circuits are commonly used. However, the two-level full-bridge inverter circuit with bipolar modulation suffers from poor differential mode characteristics and high harmonic distortion of the output current due to its two-level output. The half-bridge circuit's peak output voltage is half of the input DC voltage, with an output voltage utilization rate of only 50%, increasing the design difficulty of the inverter's front-end boost circuit. The common-ground inverter circuit requires more components to connect the grid neutral line to the photovoltaic panels, and it is prone to voltage rise in the switched capacitors during non-unity power factor periods, which is detrimental to improving output power quality. Summary of the Invention

[0005] The purpose of this invention is to provide a three-level inverter circuit and its modulation method that features fewer components, simpler control, and lower leakage current. It can suppress the rise in switched capacitor voltage under both unity power factor and non-unity power factor conditions, maintaining stable voltage balance and ensuring high-quality power output for subsequent stages, making it suitable for application in small-to-medium power non-isolated photovoltaic grid-connected inverter systems.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows: a three-level inverter circuit includes: a photovoltaic DC power supply, a first capacitor, a second capacitor, a first power switch, a back-to-back second power switch, a bidirectional third power switch, a fourth power switch, an AC filter inductor, and a single-phase AC distribution network.

[0007] The three-level inverter circuit is characterized in that: the positive terminal of the photovoltaic DC power supply is connected to the positive terminal of the first capacitor, the drain of the first power switch, and the collector of the bidirectional third power switch; the source of the first power switch is connected to one end of the source of the back-to-back second power switch, the negative terminal of the second capacitor, and the output port a of the inverter circuit; the positive terminal of the second capacitor is connected to the drain of the fourth power switch and the emitter of the bidirectional third power switch; the negative terminal of the photovoltaic DC power supply is connected to the source of the fourth power switch, the negative terminal of the first capacitor, the other end of the source of the back-to-back second power switch, and the neutral point of the AC distribution network; the inverter output port a is connected to the left end of the AC filter inductor; and the right end of the AC filter inductor is connected to one end of the AC distribution network.

[0008] The beneficial effects of this invention are as follows: The inverter circuit of this invention can directly connect the grid neutral line and the negative terminal of the photovoltaic panel using only a few components, forming a common ground structure to eliminate leakage current; the control of this invention is simple, with two switches having completely identical switching states, thus reducing the use of one drive circuit; in the power transfer modes of the positive and negative half-cycles of the grid, only one switching device exists in the current flow loop, which can effectively improve efficiency; in the grid freewheeling phase at 0 level, the charging circuit of the switched capacitor is separated from the grid freewheeling circuit, realizing the voltage stability of the switched capacitor under unity power factor and non-unity power factor, and improving the reactive power compensation capability of the inverter. Attached Figure Description

[0009] Figure 1 This is a schematic diagram of the three-level inverter circuit in this embodiment;

[0010] Figure 2 This is a schematic diagram of the power switch drive signal in this embodiment;

[0011] Figure 3(a) shows the working mode 1 of the power transfer during the positive half-cycle of the grid voltage in this embodiment;

[0012] Figure 3(b) shows the grid freewheeling mode 2 in this embodiment;

[0013] Figure 3(c) shows the power transfer mode 3 during the negative half-cycle of the grid voltage in this embodiment;

[0014] Figure 4(a) shows the operating waveform under unity power factor in this embodiment;

[0015] Figure 4(b) shows the operating waveform when the grid current leads the voltage by 20° in this embodiment;

[0016] Figure 4(c) shows the operating waveform when the grid current lags the voltage by 20° in this embodiment;

[0017] Figure 5(a) shows the waveform of the first capacitor voltage under unity power factor in this embodiment;

[0018] Figure 5(b) shows the operating waveform when the grid current leads the voltage by 20° in this embodiment;

[0019] Figure 5(c) shows the operating waveform when the grid current lags the voltage by 20° in this embodiment. Detailed Implementation

[0020] The present invention will now be described in detail with reference to the accompanying drawings and embodiments thereof.

[0021] See appendix Figure 1 The present invention provides a three-level inverter circuit comprising: a photovoltaic DC power supply U pv The components include: first capacitor C1, second capacitor C2, first power switch S1, back-to-back second power switch S2, bidirectional third power switch S3, fourth power switch S4, AC filter inductor L1, and single-phase AC distribution network u. g .

[0022] The aforementioned three-level inverter circuit, photovoltaic DC power supply U pv The positive terminal of the first capacitor C1 is connected to the positive terminal of the first power switch S1, the drain of the first power switch S1, and the collector of the bidirectional third power switch S3; the source of the first power switch S1 is connected to one end of the source of the back-to-back second power switch S2, the negative terminal of the second capacitor C2, and the output port a of the inverter circuit of this invention; the positive terminal of the second capacitor C2 is connected to the drain of the fourth power switch S4 and the emitter of the bidirectional third power switch S3; the photovoltaic DC power supply U pv The negative terminal of the first capacitor C1 is connected to the source of the fourth power switch S4, the negative terminal of the first capacitor C1, the source of the second power switch S2 (back-to-back), and the AC power distribution network u. g The neutral point is connected; the output port a of the inverter circuit of this invention is connected to the left end of the AC filter inductor L1; the right end of the AC filter inductor L1 is connected to the AC power distribution network u. g One end is connected.

[0023] Figure 2 The diagram shows the drive signal for the power switch transistor in a three-level inverter circuit, where the modulation wave v M For power frequency (50Hz), v tri It is a 50kHz high-frequency triangular carrier signal. M With v tri The modulation generates drive signals S1, S2, S3, and S4. Among these, power switches S2 and S3 share the same high-frequency drive signal, while power switches S1 and S4 operate at high frequencies during the positive and negative half-cycles of the power grid, respectively. Figure 2As can be seen from the driving modulation of each switch, the driving control of the present invention is simple. The power switches S2 and S3 have the same driving signal and share a signal driving circuit, which reduces costs.

[0024] This embodiment has three operating modes.

[0025] Mode 1, as shown in Figure 3(a), represents the energy transfer mode during the positive half-cycle of the power grid. The first power switch S1 is turned on, while the back-to-back second power switch S2, the bidirectional third power switch S3, and the fourth power switch S4 are turned off. At this time, current flows only through switch S1, and the photovoltaic DC power supply U... pv Directly connected in series to the power grid to transfer energy, the output voltage of the three-level inverter circuit is equal to the photovoltaic DC power supply U. pv .

[0026] Mode 2, as shown in Figure 3(b), is the mode for grid freewheeling and charging the second capacitor C2. The back-to-back second power switch S2 and the bidirectional third power switch S3 are turned on, while the first power switch S1 and the fourth power switch S4 are turned off. At this time, the photovoltaic DC power supply U... pv The outflowing current charges capacitor C2 through the conduction circuit formed by switches S3 and S2. Simultaneously, in this mode, after switch S2 is turned on, the output ports a and N of the inverter have equal potentials, and the output voltage is 0V.

[0027] Mode 3, as shown in Figure 3(c), is the energy transfer mode during the negative half-cycle of the power grid. The fourth power switch S4 is turned on, while the back-to-back second power switch S2 and the bidirectional third power switch S3 are turned off. The second capacitor C2 provides reverse voltage to the power grid, and at this time, current only flows through switch S4. Thus, the output voltage of the three-level inverter circuit is equal to the negative value of the second capacitor voltage. Simultaneously, in freewheeling mode 2, the photovoltaic DC power supply U... pv The second capacitor is charged, so the second capacitor operates at the switching frequency scale of the negative half cycle to maintain the voltage of the second capacitor at a stable DC voltage value.

[0028] In the positive half-cycle power transfer mode shown in Figure 3(a) and the negative half-cycle power transfer mode shown in Figure 3(c), only one switching device is present in the current flow loop, reducing power loss caused by current flowing through the switching device and improving efficiency. In the freewheeling mode shown in Figure 3(b), capacitor C2 is connected in parallel with the photovoltaic power source, and the charging loop of capacitor C2 is separated from the grid freewheeling loop. Under non-unity power factor conditions, this avoids the grid charging capacitor C2 and the resulting large voltage rise across capacitor C2, thus stabilizing the voltage across capacitor C2 and improving the reactive power compensation capability of the inverter circuit.

[0029] Figure 4 shows the operating waveforms of the three-level inverter circuit in this embodiment under unity power factor and non-unity power factor conditions when operating at three-level output. Figure 4(a) shows the operating waveform under unity power factor, Figure 4(b) shows the operating waveform when the grid current leads the voltage by 20°, and Figure 4(c) shows the operating waveform when the grid current lags the voltage by 20°. Wherein, u aN The peak voltage and the photovoltaic DC power supply voltage U pv The voltage is consistently 400V, u g The peak voltage is 311V, and the grid current is i g The peak value is 6.43A, and the power frequency is 50Hz.

[0030] Figure 5 shows the waveform of the voltage of the second capacitor C2 in the three-level inverter circuit of this embodiment. Figure 5(a) shows the waveform of the voltage of the first capacitor at unity power factor; Figure 5(b) shows the operating waveform when the grid current leads the voltage by 20°; and Figure 5(c) shows the operating waveform when the grid current lags the voltage by 20°. It can be seen that when the capacitance of the second capacitor C2 is 0.1mF, at a switching frequency of 50kHz, the voltage of the second capacitor C2 is stabilized at 400V under different power factors, resulting in a stable and high-quality grid-connected current. Therefore, the three-level inverter circuit has a good ability to transmit reactive power to the grid.

[0031] In this embodiment, power switches S1 and S4 are metal-oxide-semiconductor field-effect transistors (MOSFETs), insulated-gate bipolar transistors (IGBTs), or silicon carbide field-effect transistors; power switch S2 is a MOSFET connected back-to-back; and power switch S3 is an insulated-gate bipolar transistor (IGBT) or a MOSFET switch connected back-to-back.

[0032] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A three-level inverter circuit, characterized in that: Including photovoltaic DC power supply ( ), first capacitor ( ), second capacitor ( ), first power switch ( ), back-to-back second power switching transistors ( ), bidirectional third power switch ( ), fourth power switch ( ) and AC filter inductor ( ); The photovoltaic DC power supply ( The positive terminal of ) is respectively connected to the first capacitor ( The positive terminal of ) and the first power switch ( The drain of the ) and the bidirectional third power switch ( The collectors of the electrodes are connected; First power switch ( The source of ) is respectively connected to the back-to-back second power switch ( One end of the source, the second capacitor ( The negative terminal of the inverter is connected to the output port a of the inverter circuit; Second capacitor ( The positive terminals of the four transistors are respectively connected to the fourth power switch. Drain and bidirectional third power switch ( The emitters are connected; Photovoltaic DC power supply ( The negative terminals of the transistors are respectively connected to the fourth power switch transistor ( The source of the capacitor ( ), the first capacitor ( ) The negative terminal of ) and the back-to-back second power switch ( The source of the AC distribution network () Connect the neutral points of ) The output port a of the inverter circuit and the AC filter inductor ( Connect the left end of the AC filter inductor () The right end of the AC distribution network ( Connect one end of the ) to the other end; The first power switch ( ), fourth power switch ( The second power switch uses a metal-oxide-semiconductor field-effect transistor, an insulated-gate bipolar transistor, or a silicon carbide field-effect transistor; The third power switch is a MOSFET connected in a back-to-back configuration. () is an insulated gate bipolar transistor or a MOSFET switch connected back-to-back; The AC filter inductor is an inductive filter, a capacitive filter, or an inductor-capacitor combination filter.

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