LED drivers for LED lighting systems that replace high-intensity discharge lamps

Abstract

An LED driver for an LED lamp, the LED lamp also including an LED load. The LED driver is adapted to be connected to an input source at a first terminal and a second terminal. The LED driver includes a switch arrangement configured to enable a controller to control at least the amplitude and phase of a voltage between the first terminal and the second terminal. The phase of the voltage between the first terminal and the second terminal can be defined to control the amount of power flowing from the input source to power the LED lamp.

Description

Technical Field

[0001] The present invention relates to the field of LED drivers, and in particular to the field of LED drivers for LED lamps retrofitting power supplies designed for high intensity discharge lamps. Background Art

[0002] In the lighting sector, there is growing interest in LED lamps for replacing or retrofitting older lamps, particularly high-intensity discharge (HID) lamps.

[0003] These retrofit LED lamps need to be designed appropriately so that they can draw power from power supplies that were originally designed to power HID lamps. While power ultimately comes from the mains supply, i.e., the utility grid, a power supply is any power source to which an LED driver for an LED lamp can be connected to draw power, and may include the mains supply, ballast, compensation capacitors, igniter, etc. The LED lamp and any components that connect the LED lamp to the mains supply, such as the ballast and / or compensation capacitor, form an LED lighting system.

[0004] Existing LED lamps typically include a diode bridge coupled to a power source to rectify AC power. The rectified AC output is stored by a (buffer) capacitor. This provides a DC (direct current) output for powering the LED load. Controlling the LED lamp's power consumption, for example to achieve a desired average power consumption, can be performed by periodically shunting some of the AC power to ground / reference voltage. Controlling the amount of shunted AC power can control the power provided to the LED load, for example, for dimming purposes.

[0005] However, shunting the AC power can lead to poor power characteristics of the entire LED lighting system, with insufficient power factor and the introduction of harmonic distortion in the mains current.Shunting can also cause greater voltage drops between components of the power supply, causing them to draw more current, which can lead to overheating or thermal breakdown.

[0006] It would be desirable to provide an LED driver for an LED lamp that overcomes at least some of these drawbacks. Summary of the Invention

[0007] The invention is defined by the claims.

[0008] According to an example according to one aspect of the present invention, there is provided an LED driver for generating output power for driving an LED load from a power supply adapted to provide an AC input current. The proposed LED driver is particularly useful if the power supply is originally adapted to power an HID lamp.

[0009] The LED driver comprises: an input arrangement comprising a first terminal and a second terminal for receiving an AC input current from a power supply; an output node for providing output power for driving an LED load; a capacitor connected between the output node and a ground / reference voltage, wherein the capacitor is configured such that a voltage across the capacitor is substantially constant when the LED driver is powered; a switch arrangement adapted to controllably connect the first terminal to the output node or the ground / reference voltage and the second terminal to the output node or the ground / reference voltage, thereby enabling control of the amplitude and phase of the voltage between the first terminal and the second terminal relative to the AC input current phase; and a controller adapted to control the switch arrangement, thereby controlling the amplitude of the voltage between the first terminal and the second terminal and the phase of the voltage between the first terminal and the second terminal relative to the AC input current phase, such that energy transfer between the input arrangement and the output node is bidirectionally controllable, thereby controlling the average amplitude of the output power, wherein the controller is adapted to control the frequency of the voltage between the first terminal and the second terminal to be equal to the frequency of the AC input current.

[0010] Using a switch arrangement to control whether the first terminal or the second terminal is connected to the output node or the ground reference voltage enables control of the voltage between the first terminal and the second terminal. In particular, this configuration allows power to be returned from the capacitor to the first terminal or the second terminal and power to be provided from the first terminal or the second terminal to the capacitor, i.e., enables bidirectional control of energy transfer between the input arrangement and the output node.

[0011] The ability to (temporarily) return power to the first or second terminal enables the power factor of the entire LED lighting system (i.e., the combination of the LED lamp and the power supply, excluding the mains supply) to be improved relative to the mains supply. The present invention therefore relies on the ability to allow current to flow from the first or second terminal to the output node / from the output node to the first or second terminal.

[0012] The controller is capable of defining the phase relationship between the voltage between the first and second terminals and the current supplied to the input arrangement. This allows the controller to modify or define the power factor and other performance criteria (e.g., harmonic distortion) of the entire LED lighting system, thereby at least improving the power factor. The phase relationship can be adjusted so that the net energy (per mains cycle) matches the desired output power level.

[0013] The controller may be adapted to control the phase of the voltage between the first terminal and the second terminal in response to a control signal indicating a desired amount of light to be output by an LED load connectable to the output node. The inventors have recognized that the phase of the voltage between the first terminal and the second terminal can be modified to control the (average) power supplied to the connected LED load, and therefore the (average) brightness of the light output by the LED load.

[0014] The switch arrangement may include: a first switch connecting the first terminal directly to the output node; a second switch connecting the second terminal directly to the output node; a third switch connecting the first terminal directly to ground / reference voltage; and a fourth switch connecting the second terminal directly to ground / reference voltage.

[0015] Therefore, in some embodiments, the switch arrangement does not include any inductive or capacitive elements and is connected to receive AC input current directly from an input source (e.g., directly from a ballast of a power supply). This provides an inexpensive and efficient LED driver that can be dimmed (by adjusting the phase of the voltage between the first terminal and the second terminal) without affecting the power factor or other performance criteria of the overall LED lighting system.

[0016] The controller may be adapted to control the voltage between the first terminal and the second terminal by being operable in at least two modes, the at least two modes comprising at least:

[0017] a first mode in which the controller allows current to flow through the first and fourth switches and blocks current from flowing through the second and third switches such that the voltage between the first and second terminals is equal in magnitude and polarity to the voltage across the capacitor; and a second mode in which the controller allows current to flow through the second and third switches and blocks current from flowing through the second and fourth switches such that the voltage between the first and second terminals is equal in magnitude and opposite in polarity to the voltage across the capacitor.

[0018] In other words, the controller may be adapted to control the voltage between the first terminal and the second terminal to effectively switch between a first value, which is actually the voltage across the capacitor (i.e., between the output node and the ground / reference voltage), and an opposite second value, which is the same in magnitude but opposite in polarity as the voltage across the capacitor.

[0019] The controller may be adapted to operate in the first mode for substantially the same period as the second mode during each cycle of the AC input current.

[0020] In the context of the present invention, "substantially the same" means within practical limits or circumstances. Thus, there may be slight variations (e.g., ±1% or ±3%) between values considered to be substantially the same (e.g., the time periods identified above), which may be due to inherent difficulties in practical implementation (e.g., in controlling timing), noise, or other slight variations.

[0021] This ensures that the average power delivery from the power supply to the LED load is equal for both polarities of the AC input current, which means that the power drawn from the input source (and ultimately the mains) is consistent.

[0022] Preferably, the controller is also operable in a third mode in which the controller controls the switch arrangement such that the first terminal and the second terminal are effectively shorted together.

[0023] This effectively enables the controller to control the duty cycle of the voltage at the first terminal. The duty cycle at the first terminal is the proportion of time that charge can flow between the first terminal and the capacitor, for example, during each cycle of the AC input current (i.e., when the voltage between the first terminal and ground / reference voltage is maintained by the switching arrangement to be substantially equal to the voltage across the capacitor). This is equal to the proportion of time per cycle of the AC input current that the controller operates in the first mode.

[0024] This embodiment similarly enables the controller to control the duty cycle of the voltage at the second terminal. The duty cycle at the second terminal is the proportion of time that charge can flow between the second terminal and the capacitor, for example, during each cycle of the AC input current (i.e., when the voltage between the second terminal and the ground / reference voltage is maintained by the switching arrangement to be substantially equal to the voltage across the capacitor). This is effectively equivalent to the proportion of time per cycle of the AC input current that the controller operates in the second mode.

[0025] In embodiments where the third mode includes connecting the first terminal or the second terminal to a ground / reference voltage, the duty cycle at the first terminal or the second terminal is the duty cycle of the voltage between the first terminal or the second terminal and the ground / reference voltage. Thus, these duty cycles effectively represent the proportion of time that the voltage between the first terminal or the second terminal and the ground / reference voltage is at a predetermined non-zero value (e.g., the proportion of time that the voltage between the first terminal or the second terminal and the ground / reference voltage is maintained at a magnitude and polarity equal to the voltage across the capacitor).

[0026] For clarity, the proportion of time that the voltage between the first and second terminals is non-zero is equal to the sum of the two duty cycles described. Therefore, if the two duty cycles are equal, the duty cycle at the first or second terminal can be calculated by halving the amount of time that the voltage between the first and second terminals is non-zero per cycle of the AC input current.

[0027] The duty cycle of the voltage between the first terminal and the second terminal is equal to the duty cycle of the voltage at the first terminal and the duty cycle of the voltage at the second terminal. Therefore, the duty cycle of the voltage between the first terminal and the second terminal is the proportion of time that the voltage between the first terminal and the second terminal is non-zero per cycle of the AC input current.

[0028] The inventors have realised that controlling the duty cycle of the voltage at the first and / or second terminals enables the controller to regulate / control the harmonic content of the voltage between the first and second terminals (and hence the harmonic content of the AC input current and ultimately the mains supply).

[0029] To operate in the third mode, the controller may be configured to allow current to flow through the first switch and the second switch and / or to allow current to flow through the third switch and the fourth switch.

[0030] The controller may be adapted such that the accumulated time the controller operates in the first mode or the second mode is between 1 and 9 times the accumulated time the controller operates in the third mode, preferably between 2.8 and 3.6 times the accumulated time the controller operates in the third mode.

[0031] These durations control the voltage between the first terminal and the ground / reference voltage and the voltage between the second terminal and the ground / reference voltage to have an optimal duty cycle, thereby being particularly effective in reducing the harmonic content of the voltage between the first terminal and the second terminal. In particular, it has been determined that such durations enable the LED lighting system to meet international standards such as IEC 61000-3-2.

[0032] The controller may be adapted to iteratively perform the sequence of: operating in the first mode during a first time period; operating in the third mode during a subsequent second time period; operating in the second mode during a subsequent third time period; and operating in the third mode during a subsequent fourth time period.

[0033] The control method reduces large step changes in the voltage between the first terminal and the second terminal, reducing the amount of audible noise that may be caused by such step changes.

[0034] Preferably, the second time period and the fourth time period have substantially the same duration. Preferably, the first time period and the third time period have substantially the same duration. This helps ensure that the voltage between the first terminal and the second terminal is symmetrical, thereby reducing its harmonic content.

[0035] Again, in the context of the present invention, "substantially" means within practical limits or circumstances. Thus, there may be slight variations (e.g., ±1% or ±3%) between the time periods listed above, for example due to inherent difficulties in controlling timing.

[0036] The controller is adapted to operate in a first mode during at least a portion of the time when the current flowing from the AC input current to the first terminal is positive, and to operate in a second mode during at least a portion of the time when the current flowing from the AC input current to the first terminal is negative. This helps ensure that at least some charge flows from the power supply to the capacitor (and ultimately to the LED load).

[0037] Preferably, the controller operates in the first mode for a period of time that is at least half the time that the current flowing from the AC input current to the first terminal is positive. Preferably, the controller operates in the second mode for a period of time that is at least half the time that the current flowing from the AC input current to the first terminal is negative. This limitation helps maintain charge flow from the AC input current to the LED load, ensuring that the LED load is powered. As a result, during one cycle of the mains power supply, more charge / energy is moved from the power supply to the output node, and vice versa.

[0038] In some embodiments, the switch arrangement includes: a first inductive element connecting a first terminal to a first intermediate node; a first switch connecting the first intermediate node to an output node; a second switch connecting the second terminal to the output node; a third switch connecting the first intermediate node to ground / reference voltage; and a fourth switch connecting the second terminal to ground / reference voltage.

[0039] According to a pulse width modulation scheme for controlling the amplitude of the voltage between the first terminal and the second terminal, the controller can be adapted to: control the first switch and the third switch so that when the third switch allows current to flow, the first switch blocks current flow, and vice versa; control the second switch and the fourth switch so that when the fourth switch allows current to flow, the second switch blocks current flow, and vice versa; controllably switch the second switch and the fourth switch between blocking current flow and allowing current flow at a frequency of the AC input current; and controllably switch the first switch and the third switch between blocking current flow and allowing current flow at a frequency higher than the frequency of the AC input current.

[0040] In some embodiments, the switching arrangement may include: a first inductive element connecting the first terminal to the first intermediate node; a second inductive element connecting the second terminal to the second intermediate node; a first switch connecting the first intermediate node to the output node; a second switch connecting the second intermediate node to the output node; a third switch connecting the first intermediate node to ground / reference voltage; and a fourth switch connecting the second intermediate node to ground / reference voltage.

[0041] Of course, according to a pulse width modulation scheme for controlling the amplitude of the voltage between the first terminal and the second terminal, the controller can be adapted to: control the first switch and the third switch so that when the third switch allows current to flow, the first switch prevents current from flowing, and vice versa; control the second switch and the fourth switch so that when the fourth switch allows current to flow, the second switch prevents current from flowing, and vice versa; controllably switch the second switch and the fourth switch between preventing current flow and allowing current flow at a frequency higher than the frequency of the AC input current, and controllably switch the first switch and the third switch between preventing current flow and allowing current flow at a frequency higher than the frequency of the AC input current.

[0042] According to an example according to one aspect of the present invention, there is provided an LED lamp comprising: any of the herein described embodiments of an LED driver; and an LED load connected to an output node (of the LED driver).

[0043] According to an example according to an aspect of the present invention, there is provided an LED lighting system comprising an LED lamp and an electromagnetic ballast adapted to be connected to a mains power supply to provide an AC input current to an input arrangement of an LED driver.

[0044] These and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] For a better understanding of the invention, and in order to show more clearly how it may be put into practice, reference will now be made, by way of example only, to the accompanying drawings, in which:

[0046] Figure 1 An LED lighting system is shown;

[0047] Figure 2 An LED lamp with an LED driver according to a known example is shown;

[0048] Figure 3 An LED lamp with an LED driver according to an embodiment of the present invention is shown;

[0049] Figure 4 shows a control signal of an LED driver according to an embodiment of the present invention;

[0050] Figures 5 to 7 Shown Figure 3 Some simulation results for an arbitrary version of the LED lamp shown;

[0051] Figure 8 An LED lamp having an LED driver according to another embodiment of the present invention is shown; and

[0052] Figure 9 An LED lamp having an LED driver according to another embodiment of the present invention is shown. DETAILED DESCRIPTION

[0053] The present invention will be described with reference to the accompanying drawings.

[0054] It should be understood that the detailed description and specific examples, while indicating exemplary embodiments of the devices, systems, and methods, are intended for illustrative purposes only and are not intended to limit the scope of the present invention. These and other features, aspects, and advantages of the devices, systems, and methods of the present invention will be better understood from the following description, the appended claims, and the accompanying drawings. It should be understood that the figures are merely schematic and not drawn to scale. It should also be understood that the same reference numerals are used throughout the drawings to indicate the same or similar parts.

[0055] The present invention provides an LED driver for an LED lamp, the LED lamp also including an LED load. The LED driver is adapted to be connected to an input source at a first terminal and a second terminal. The LED driver includes a switch arrangement configured to enable a controller to control at least the amplitude and phase of a voltage between the first terminal and the second terminal. The phase of the voltage between the first terminal and the second terminal can be defined to control the amount of power flowing from the input source to power the LED lamp.

[0056] Embodiments of the present invention may be used in LED lamps to replace existing HID lamps to form LED lighting systems.

[0057] Figure 1 An LED system 1 is shown comprising an LED lamp 10 and a power supply 15 , the configuration of the LED system 1 being common in the prior art.

[0058] The power supply 15 includes a mains power supply 15A. In addition, the power supply 15 is originally designed for powering an HID lamp and includes a number of other components designed for use with such an HID lamp. These components include at least an EM ballast L em and may include a compensation capacitor C comp and igniter 15B. Different types of igniters may be used, such as parallel, semi-parallel and / or series igniters.

[0059] LED lamp 10 and the components of power supply 15 (excluding mains supply 15A itself) together form LED lighting system 19. When evaluating power characteristics in the context of the present invention, it is the power characteristics of LED lighting system 19 with respect to mains supply 15A that are considered.

[0060] The LED lamp 10 is adapted to draw power from a power source 15. When at least the element L emand optionally other elements C comp and 15B, the LED lamp 10 should include a driver suitable for properly driving the LED string.

[0061] The power supply 15 provides an AC input current I to the LED lamp 10. em AC input current I em The frequency of φ is the same as the frequency provided by the mains supply 15 A. Harmonic distortion in the AC input current (eg caused by the LED lamp 10) may result in undesirable harmonic distortion in the mains supply.

[0062] The present invention relates to a new embodiment of an LED lamp 10 and in particular to a new driver for an LED lamp.For comparison purposes, an example of a known LED lamp 10 will be briefly described.

[0063] Figure 2 The LED lamp 20 according to a known example is shown. The LED lamp 20 is suitable for use with other components including L em 、C comp , 15B power supply 15 - this capability is often referred to as "Type A".

[0064] The LED lamp 20 and some components of the power supply together form the entire LED lighting system.

[0065] The LED lamp 20 includes an LED driver 25 and an LED load D6 driven by the LED driver 25. The LED driver 25 includes a diode bridge D1, D2, D3, D4, a shunt switch M1, a snubber capacitor C2, and a rectifier diode D5.

[0066] Diode bridge D1, D2, D3, D4 rectifies the (differential) input provided by power supply 15. This rectified input is provided to buffer capacitor C2 via rectifier diode D5. The buffer capacitor stores charge for powering LED load D6 via output node 26. In the example shown, the voltage across the buffer capacitor is substantially equal to the forward voltage of the LED load (not accounting for any voltage losses due to wire resistance, etc.).

[0067] In this manner, the LED driver 25 provides a substantial DC voltage to power the LED load D6, thereby acting as an AC-DC converter.

[0068] In some examples (not shown), the output node 26 can be connected to the LED load D6 via one or more additional circuit components, such as a switch mode power supply (which will enable the voltage at the output node 26 to be decoupled / independent from the voltage across the LED load D6).

[0069] Shunt switch M1 allows control of the average amount of charge delivered to output node 26, and thereby the brightness of LED load D6. Shunt switch M1 is controlled to couple the output of diode bridge D1, D2, D3, and D4 to ground for a portion of a half-cycle of the AC input current provided by the power supply. This allows current (provided by the power supply) to continue to flow, but sometimes blocks current from flowing to buffer capacitor C2 and the LED load. By adjusting the duration that the shunt switch performs shunting within each half-cycle, the average charge delivered to output node 26, and thereby the average current flowing through the LED load, can be controlled to achieve a desired brightness (e.g., for dimming purposes).

[0070] To prevent activation of the shunt switch M1 from discharging the snubber capacitor C2 to ground, a blocking diode D5 is connected between the shunt switch and the snubber capacitor C2.

[0071] The LED lamp also includes a coupling capacitor C1 to reduce electromagnetic interference noise. It also serves to limit the time derivative of the voltage across the capacitor, which if too high may cause audible noise in the EM ballast (winding).

[0072] The above driver can effectively control the LED brightness to the desired level, but it will cause the mains power factor to be much lower than 0.9 (especially at low dimming levels) and a large amount of undesirable harmonic distortion in the mains current (especially at the reduced amplitude of the 1st harmonic, corresponding to the lower power consumption).

[0073] Furthermore, at low dimming levels (i.e., when most of the AC input current is shunted), the ballast L em The current will increase (as the total impedance decreases), which may lead to ballast overheating or at least power loss in the EM ballast.

[0074] It is desirable that LED lamps consume less energy per unit time when in operation than the HID lamps they are replacing. When using the diode bridge D1, D2, D3, D4 in an LED lamp, it may be necessary to use an LED load with a very low forward voltage (i.e., a low voltage on the output node) to achieve the desired low power consumption. However, at such a low LED forward voltage and hence buffer capacitor C2 voltage, the voltage across the EM ballast and hence the voltage across the EM ballast L2 is low. em The current will be higher than during HID operation, resulting in increased power losses in the EM ballast and possibly overheating of the EM ballast. On the other hand, using a higher LED forward (and C2) voltage will require a lower average current through the LED load to achieve the desired energy savings, which means that most of the AC input current provided to the LED lamp will need to be diverted to achieve the lower average LED load current, which will negatively impact the power characteristics of the entire LED lighting system.

[0075] The present invention relates to a new type of LED lamp, and in particular to a new driver for an LED lamp that alleviates at least some of these problems.

[0076] Figure 3 The LED lamp 30 includes an LED load D6 and an LED driver 31 according to an embodiment of the present invention. The LED lamp 30 can be used to replace Figure 1 and Figure 2 The LED lamp 10 is shown.

[0077] The LED driver 31 comprises an input arrangement 32, an output node 33, a switch arrangement 34 and a controller 35. A (buffer) capacitor C2 connects the output node 33 to ground / reference voltage. The LED load D6 of the LED lamp 30 is powered by the output node 33.

[0078] The input arrangement 32 comprises a first terminal AC1 and a second terminal AC2 and receives power from a power source (eg Figure 1 The power supply shown) receives an AC input current I em .

[0079] AC input current I em The value of is here measured at the first terminal AC1, where positive current moves towards the rest of the LED driver and negative current moves away from the rest of the LED driver. Of course, there is a corresponding current at the second terminal AC2, which is the same as the AC input current I em The measurements are opposite in polarity.

[0080] For convenience, any LED driver described herein can be conceptually divided into an "AC side" and a "DC side." The AC side is the portion of the LED driver between the power supply (when connected to the power supply) and the switching arrangement. The DC side is the portion of the LED driver between the switching arrangement and the LED load (when connected to the LED load).

[0081] The illustrated switch arrangement 34 includes a first switch M1 connecting a first terminal directly to the output node; a second switch M2 connecting a second terminal directly to the output node; a third switch M3 connecting a first terminal directly to ground / reference voltage; and a fourth switch M4 connecting a second terminal directly to ground / reference voltage.

[0082] The switching arrangement may also include a coupling capacitor C1 to reduce (electromagnetic interference) noise between the first and second terminals. It also serves to limit the time derivative of the voltage between the first and second terminals, which may cause audible noise in the EM ballast (winding) if it is too high.

[0083] The first switch, the second switch, the third switch, and the fourth switch may comprise transistors (such as BJTs, JFETs, or MOSFETs). In the context of the present invention, the term "switch" refers to any component that can be controlled to selectively allow or prevent charge from flowing between two nodes. A skilled person will readily be able to adapt any such transistor for such a purpose, for example, by including an anti-parallel diode for the BJT.

[0084] The controller 35 is adapted to control the operation of the switches M1-M4 of the switch arrangement, for example by controlling the gate / base voltages of the transistors, which are often referred to as control electrodes of the switches.Other methods of controlling the switches will be apparent to those skilled in the art.

[0085] The switching arrangement shown provides 4-quadrant operation of the power at the input arrangement by appropriate control of the switches M1-M4. 4-quadrant operation means that the phase of the voltage between the first terminal AC1 and the second terminal AC2 (measured from AC1 to AC2) can be adjusted relative to the AC input current I em Take control.

[0086] In practice, 4-quadrant operation means that when the voltage between the first terminal and the second terminal is positive, the input current can be negative or positive (not at the same time), and conversely, when the voltage between the first terminal and the second terminal is negative, the input current can be positive or negative.

[0087] In other words, the switching arrangement is capable of operating in four different current states.

[0088] When the AC input current I em The first state exists when the AC input current is positive and the voltage between the first terminal AC1 and the second terminal AC2 is positive (i.e., V(AC1) > V(AC2)). This is achieved by turning on the first switch M1 and the fourth switch M4 (and preventing the second and third switches from turning on) when the AC input current is positive, allowing charge to flow from the AC side of the LED driver to the DC side of the driver (i.e., power is transferred). Consequently, current flows from the first terminal AC1 to the output node. This phase, when the AC1 and AC2 voltages are positive and the current is positive, can also be referred to as the "power delivery" phase. This can be referred to as "first quadrant" operation.

[0089] When the AC input current is positive I emWhen the voltage between the first terminal AC1 and the second terminal AC2 is negative, there is a second state. This is achieved by turning on the second switch M2 and the third switch M3 (and preventing the first switch and the fourth switch from turning on) so that the voltage between the first terminal and the second terminal is forced to be negative. In particular, we return power from the buffer capacitor C2 to the AC side of the switch arrangement 33 to keep the voltage between AC1 and AC2 negative. Thus, current flows from the output node to the second terminal AC2. When the AC1 and AC2 voltages are negative and the current is positive, this can also be referred to as the "power return" phase. This can be called "second quadrant" operation.

[0090] When the AC input current I em is negative and the voltage between the first terminal AC1 and the second terminal AC2 is negative (i.e., V(AC1) < V(AC2)), there is a third state. This is achieved by (when the AC input current is negative) turning on the second switch M2 and the third switch M3 (and preventing the first switch and the fourth switch from turning on) so that charge flows from the AC side of the LED driver to the DC side of the driver. Thus, current flows from the second terminal AC2 to the output node. When the AC1 and AC2 voltages are negative and the current is negative, this can also be referred to as the "power delivery" phase. This can be called "third quadrant" operation.

[0091] When the AC input current I em is negative and the voltage between the first terminal AC1 and the second terminal AC2 is positive, there is a fourth state. This is achieved by turning on the first switch M1 and the fourth switch M4 (and preventing the second switch and the third switch from turning on) so that the voltage between the first terminal and the second terminal is forced to be positive. In particular, we return power from the buffer capacitor C2 to the AC side of the switch arrangement 33 to keep the voltage between AC1 and AC2 positive. Thus, current flows from the output node to the first terminal AC1. When the AC1 and AC2 voltages are positive and the current is negative, this can also be referred to as the "power return" phase. This can be called "fourth quadrant" operation.

[0092] In this first state and the fourth state (for Figure 3 the circuit shown), the voltage between the first terminal AC1 and the second terminal AC2 is maintained at an amplitude and polarity substantially equal to the voltage across the (buffer) capacitor C2. This voltage is configured to be substantially constant, e.g., equal to the forward voltage of the connected LED load, unless there is some slight discharge of the capacitor.

[0093] In the second state and the third state (for Figure 3In the circuit shown, the voltage between the first terminal AC1 and the second terminal AC2 is maintained equal in magnitude but opposite in polarity to the voltage across the (buffer) capacitor C2. This voltage is configured to be substantially constant, for example, equal to the forward voltage of the directly connected LED load, unless some slight discharge of the capacitor occurs.

[0094] We have described how, in the first through fourth states, the magnitude of the voltage between the first and second terminals is effectively / substantially equal to the voltage across the (snubber) capacitor. In this context, "substantially equal" means effectively the same, given practical circumstances and implementation requirements (i.e., component non-idealities). Thus, the magnitude of the voltage can be the same, except for any voltage drops across circuit elements between the terminals and the capacitor (such as across switches M1-M4), any noise introduced (e.g., EMI noise), and so on. In some cases, the magnitude of the voltage between the first and second terminals can be the same as the voltage across the capacitor, ±1% or ±3%.

[0095] Therefore, 4-quadrant operation is enabled and the net power (energy per mains half-cycle) can be controlled by adjusting the balance between the return power (DC to DC side) and the delivery power (AC to AC side) by adjusting the switching moments of switches M1-M4.

[0096] In this way, 4-quadrant operation enables the controller to control the amplitude and phase of the voltage between the first terminal AC1 and the second terminal AC2 (by selectively allowing the charge stored by the (buffer) capacitor C2 to flow back to these terminals). This can control the power provided to the LED load D6 without shunting the power to the ground / reference voltage, thereby improving the power factor and reducing the amount of current flowing through the power supply (which may overheat the power supply's ballast).

[0097] One option for appropriately controlling the switch arrangement to control the power provided by the AC side to the DC side may be to have the controller switch between two modes: a first mode in which the controller allows current to flow through the first and fourth switches and prevents current from flowing through the second and third switches, such that the magnitude and polarity of the voltage between the first and second terminals are equal to the voltage across the capacitor; and a second mode in which the controller allows current to flow through the second and third switches and prevents current from flowing through the second and fourth switches, such that the voltage between the first and second terminals is equal in magnitude but opposite in polarity to the voltage across the capacitor.

[0098] When the controller operates in the first mode, the switch arrangement operates in the fourth state and / or the first state.Thus, the voltage between the first terminal and the second terminal is maintained substantially equal in magnitude and polarity to the (substantially constant) voltage across the capacitor.

[0099] When the controller operates in the second mode, the switch arrangement operates in the second state and / or the third state.Thus, the voltage between the first terminal and the second terminal is maintained to be substantially equal in magnitude but opposite in polarity to the (substantially constant) voltage across the capacitor.

[0100] Thus, switching the controller between the first mode and the second mode effectively results in the generation of a square wave voltage between the first and second terminals having an amplitude substantially equal to the voltage across the (buffer) capacitor C2 and therefore, in the example shown, substantially equal to the forward voltage of the LED load D6.

[0101] The square wave should have a frequency equal to the mains frequency, and the phase adjusted to balance the amount of return and delivery energy per mains half cycle to match the desired amount of energy per mains half cycle to be delivered to the LED load.

[0102] Thus, control of the phase of the voltage between the first terminal and the second terminal allows control of the power provided to the LED load, and thereby allows control of the brightness of the light output by the LED load.

[0103] For example, if the phase of the voltage between the first terminal and the second terminal is equal to the phase of the AC input current, current continuously flows from the AC side of the LED driver to the DC side of the LED driver (and the average current through the LED load is maximized). This causes the LED load to output light at maximum brightness.

[0104] If there is a phase difference between the AC input current and the voltage between the first and second terminals, the average amount of power delivered to the DC side is reduced (because the DC side periodically delivers power back to the AC side). As a result, the amount of power available to power the LED load is reduced (compared to the in-phase example), thereby reducing the brightness of the light output by the LED load.

[0105] The voltage between the first terminal and the second terminal (ie, AC1, AC2 voltage) is formed into a square wave and is adjusted according to the EM ballast current I em Adjusting the phase of the square wave enables us to achieve a significantly improved power factor at a suitably chosen string voltage and allows us to control the (average) LED current, provided that the conduction of each switch pair M1, M4 and M2, M3 starts from returning power (i.e., current flows from the DC side to the AC side) and ends with receiving power (i.e., current flows from the AC side to the DC side).

[0106] This effectively causes the voltage between the first and second terminals to lead the AC input current from the power supply. emThis causes the LED lamp to appear to have a partially inductive impedance, which effectively increases the EM ballast inductance, thereby reducing the EM ballast current and lamp current, and reducing EM ballast losses.

[0107] If the voltage between the first and second terminals lags the AC input current, the LED lamp exhibits a partially capacitive behavior. Since the LED lamp is in series with the inductance of the EM ballast, this capacitive behavior of the LED lamp effectively subtracts from the inductive impedance of the EM ballast, resulting in higher currents and, therefore, greater losses in the EM ballast.

[0108] Therefore, in order to improve the power factor of the entire LED lighting system, the controller should control the phase of the voltage between the first terminal and the second terminal so that it leads the AC input current. This can be performed by appropriately timing the switching between the first mode and the second mode.

[0109] With reference to the possible states of the switch arrangement (described previously), the switch arrangement may thus be moved from the fourth state to the first state, to the second state, to the third state.This process should be repeated iteratively.

[0110] However, simulations have shown that forming the voltage between the first and second terminals into a square wave still results in undesirable THD (total harmonic distortion) levels for the entire LED lamp and individual harmonics on the mains supply (ultimately powering the LED lamp). It has been recognized that this THD must be caused by the harmonic content of the square wave voltage between the first and second terminals, as it is effectively the only source of harmonic distortion in the system.

[0111] A complete square wave voltage contains a large number of harmonics; for example, the third harmonic is 33% (1 / 3) of the first harmonic, the fifth harmonic is 20% (1 / 5) of the first harmonic, the seventh harmonic is 14% (1 / 7) of the first harmonic, and so on.

[0112] It has been recognized that the harmonic content of a square wave signal depends on the duty cycle of the square wave. By adjusting the duty cycle of the voltage (between the first and second terminals), the harmonic content of the square wave voltage can be adjusted or controlled and thereby regulate the EM ballast and mains current.

[0113] Switch arrangement 33 provides the option of shunting or shorting the first terminal AC1 from the second terminal AC2. This can be achieved by simultaneously turning on both M1 and M2, or both M3 and M4. Preferably, for ease of gate drive, the shunting phase is achieved by simultaneously turning on the third and fourth switches.

[0114] When the first and second terminals are shorted together, the voltage between the first terminal AC1 and the second terminal AC2 is practically / substantially zero.

[0115] Thus, by appropriate gate drive operation, the switching arrangement is capable of 4-quadrant operation and a shunt phase and thereby capable of synthesizing a duty cycle limited voltage between the first terminal and the second terminal.

[0116] The controller may thus operate in a third mode in which it controls the switch arrangement such that the first terminal and the second terminal are effectively shorted together.

[0117] Preferably, the controller is adapted to iteratively perform the sequence of: operating in the first mode during a first time period; operating in the third mode during a subsequent second time period; operating in the second mode during a subsequent third time period; and operating in the third mode during a subsequent fourth time period.

[0118] This effectively causes the switch arrangement to move from operating in the fourth state / first state, to operating in the shunt phase, to operating in the second state / third state, and back to operating in the shunt phase.

[0119] Referring to the possible states of the switch arrangement (described previously), in order to ensure that the voltage between the first terminal and the second terminal leads the AC input current (thereby improving the power characteristics of the entire LED lighting system), the switch arrangement can be controlled to operate in the fourth state, then in the first state, then in a shunt phase, then in the second state, then in the third state, and then in another shunt phase. This process is repeated iteratively.

[0120] In other words, the switching arrangement will move sequentially between the following phases: through the power return and then the delivery phase via M1 and M4, where the AC1, AC2 voltages are positive; through the first shunt phase via M3 and M4; through the power return and then the delivery phase via M2 and M4, where the AC1, AC2 voltages are negative; and through the second shunt phase via M3 and M4.

[0121] Preferably, the combined duration of the first and second periods is equal to the combined duration of the third and fourth periods. Preferably, the durations of the first and third periods are substantially the same. Preferably, the durations of the second and fourth periods are substantially the same. Meeting all of these preferences will produce a symmetrical signal, resulting in reduced harmonics.

[0122] The preferred control sequence is Figure 4 As shown in Figure 4 The period of the control sequence and the effect on the voltage V(AC1, AC2) between the first and second terminals are shown. For comparison purposes, a diagram of the AC input current is also provided.

[0123] The control signals M1-M4 shown represent control of the voltage at the gate of the respective switches M1-M4 (ie, gate drive signals). Methods of controlling switches in this manner are well known to those skilled in the art.

[0124] For both "high-side" switches (M1, M2), the gate drive signals are relative to the sources of the switches (here, the first and second terminals, respectively). Therefore, the switch arrangement can include a level shifter to shift the gate drive signals from ground / reference level to the respective sources. Such control methods are known to those skilled in the art.

[0125] For both “low-side” switches (M3, M4), the gate drive signals are relative to the ground / reference voltage.

[0126] Initially, between time t0 and time t1, the controller operates in the first mode. The voltage V(AC1, AC2) is thereby maintained at a constant positive voltage level (i.e., the voltage across the capacitor, which may effectively be equal to the forward voltage of the LED string directly connected to the capacitor). When the AC input current is negative, i.e., between time t0 and t1, the controller operates in the first mode. 0' Between t0 and t2, current flows from the capacitor to the first terminal to maintain the voltage V(AC1, AC2) at a positive voltage level. 0' When the AC input current is positive, that is, at time t 0' Between t1 and t2, current flows from the first terminal to the capacitor. The voltage V(AC1, AC2) is maintained at a positive voltage level by the buffering effect of C2. Therefore, at time t 0' Between t1 and t2, charge flows from the AC side to the DC side of the LED driver.

[0127] Between time t1 and time t2, the controller then operates in the third mode.Thus, the voltage V(AC1, AC2) is maintained at zero because the first and second terminals are effectively short-circuited.

[0128] Between time t2 and time t3, the controller operates in the second mode. Thus, the voltage V(AC1, AC2) is maintained at a constant negative voltage level (which is equal in magnitude to the voltage across the capacitor, which may actually be equal to the forward voltage of the LED string directly connected to the capacitor, but opposite in polarity). When the AC input current is positive, that is, between time t2 and t3, the controller operates in the second mode. Thus, the voltage V(AC1, AC2) is maintained at a constant negative voltage level (which is equal in magnitude to the voltage across the capacitor, which may actually be equal to the forward voltage of the LED string directly connected to the capacitor, but opposite in polarity). 2' Between t2 and t3, current flows from the capacitor to the second terminal to maintain the voltage V(AC1, AC2) at a negative voltage level. This is because the current at the second terminal is opposite in polarity to the AC input current provided at the first terminal. Therefore, between time t2 and t 2'When the AC input current is negative, that is, at time t 2' Between t and t3, current flows from the second terminal to the capacitor. The voltage V(AC1, AC2) is maintained at a negative voltage level by the buffering effect of C2. Therefore, at time t 2' Between t and t3, charge flows from the AC side to the DC side of the LED driver.

[0129] Between time t3 and time t4, the controller then operates in the third mode.Thus, the voltage V(AC1, AC2) is maintained at zero because the first and second terminals are effectively short-circuited.

[0130] from Figure 4 As can be seen, the proposed control method enables the amplitude of the voltage between the first terminal and the second terminal to be switched between three voltage levels (barring any minor variations due to capacitor discharge or voltage drops across switches M1-M4). This allows control of the phase of the voltage between the first terminal and the second terminal, as well as the duty cycle of the voltage at the first terminal and the duty cycle of the voltage at the second terminal. The precise interpretation of the term "duty cycle" has been described above. It is thus possible to achieve a phase difference between the voltage between the first terminal and the second terminal and the AC input current (as shown in the figure).

[0131] It may be important to select an appropriate duty cycle to achieve a desired THD level (i.e., THD below a predetermined value) and / or individual harmonics (e.g., individual harmonic percentages below predefined limits). In particular, the duty cycle may be selected to enable the LED driver to meet certain predetermined performance criteria while still enabling a certain amount of power to be delivered to the LED load.

[0132] The duration of the first time period is controlled to be equal to the duration of the third time period. Therefore, the duty cycle of the voltage at the first terminal AC1 (e.g., reference ground / reference voltage / node) and the duty cycle of the voltage at the second terminal AC2 (e.g., reference ground / reference voltage / node) are substantially the same.

[0133] The duty cycle defines the duration of the first time period / the third time period relative to the other time periods. Thus, the duty cycle defines the length of time in one cycle that the voltage between the first terminal and the second terminal is at a predetermined non-zero voltage, i.e., the proportion of time that the voltage is at the voltage level of the buffer capacitor or at a voltage level of opposite polarity but equal magnitude to the voltage level of the buffer capacitor.

[0134] The duty cycle can be calculated by dividing the duration of the first period by the sum of the durations of the first, second, third, and fourth periods. In another example, the duty cycle can be calculated by dividing the duration of the third period by the sum of the durations of the first, second, third, and fourth periods.

[0135] It should also be noted that the performance characteristics of the LED driver depend on the voltage across the (buffer) capacitor. It may therefore be necessary to select and / or control the voltage across the buffer capacitor to optimize the performance of the overall LED lamp.

[0136] Figures 5 to 7 Shown Figure 3 Some simulation results for an arbitrary version of the circuit are shown to aid in the appropriate selection of the duty cycle. Here, the duty cycle refers to the duty cycle at the first terminal, which is the proportion of time that charge is allowed to flow between the first terminal and the buffer capacitor. The duty cycle at the second terminal is assumed to be essentially the same as the duty cycle at the first terminal.

[0137] Figure 5 : shows the amplitudes of the 3rd, 5th, 7th and 9th harmonics in the voltage between the first terminal and the second terminal caused by the control of the voltage between the first terminal and the second terminal according to the above scheme, which are normalized with respect to the 1st harmonic. Figure 5 As shown, the amplitude of each harmonic is illustrated using different dot-dash line combinations.

[0138] Figure 6 : shows the amplitudes of the 3rd, 5th, 7th and 9th harmonics in the AC input current caused by the control of the voltage between the first terminal and the second terminal according to the above scheme, which are normalized with respect to the 1st harmonic. Figure 6 As shown, the amplitude of each harmonic is illustrated using different dot-dash line combinations.

[0139] Figure 7 : shows the amplitudes of the 3rd, 5th, 7th and 9th harmonics in the AC input current caused by the control of the voltage between the first terminal and the second terminal according to the above scheme, which are normalized with respect to the 1st harmonic. Figure 7 As shown, the amplitude of each harmonic is illustrated using different dot-dash line combinations.

[0140] exist Figure 7 In the IEC 61000-3-2 standard, each harmonic amplitude is further divided by the allowed percentage for that harmonic. This helps to illustrate which harmonic is dominant in meeting the requirements of this standard (for the purpose of an illustrative example).

[0141] Figure 7 Also shown is an indication of the THD of the current (THD9), which is based on the first 9 harmonics only.

[0142] from Figures 5 to 7 It can be seen that at a 33% duty cycle, controlling the voltage between the first and second terminals does not introduce any 3rd and 9th harmonic content. In contrast, at a 33% duty cycle, there is significant 5th and 7th harmonic content. For some applications, this is acceptable; for others, the 5th and / or 7th harmonics generated in the mains current are higher than desired.

[0143] Figure 7 It is shown that at a duty cycle of approximately 38%, the 5th harmonic is very low, and the 3rd, 7th, and 9th harmonics are almost normalized to their required levels and also form the required minimum values. Therefore, it is proposed that if the harmonic requirements cannot be met at a duty cycle of around 38%, it is unlikely that these requirements will be met at other duty cycles.

[0144] As mentioned previously, the overall performance of the LED lamp depends on the selected duty cycle and the voltage of the snubber capacitor C2.

[0145] The example of calculating the appropriate duty cycle (and buffer capacitor C2 voltage) is provided in the context of identifying appropriate values that enable the lamp to output power (from the mains) in the range of 95 W. Of course, the values of the appropriate duty cycle and LED string voltage depend on the configuration of the power supply.

[0146] Possibly attractive combinations of duty cycle and voltage across the (buffer) capacitor C2 (i.e., maximum voltage between the first and second terminals) are searched, the phase shift required to obtain the desired LED power (e.g., a specific wattage, such as 95 W) is determined, and the relevant key performance parameters are determined.

[0147] Table 1 shows the search results for the first power source (HPI). Table 2 shows the search results for different second power sources (SON).

[0148] Tables 1 and 2 show various performance parameters (power factor, THD, H3, H5, H7, H9, H11) for different LED loads and duty cycles. PF represents the power factor of the LED lighting system (i.e., the combination of the LED lamp and the non-mains power components of the power supply), THD represents the total harmonic distortion introduced into the mains by the LED lighting system, and H3-H11 represent the harmonic current as a percentage of the mains input current due to the different harmonics introduced by operation at the identified duty cycle (e.g., H3 corresponds to the 3rd harmonic, H5 corresponds to the 5th harmonic, etc.).

[0149] In the case of LED lighting system including igniter, C2 voltage V CPreferably (and for the exemplary table: is) low enough to prevent or inhibit the igniter from generating an ignition pulse. Thus, in this case, the igniter has a negligible effect on the values provided in the table.

[0150] refer to Figure 1 , for Table 1, the following component values are used for the first power supply: L em : 250mH and C comp : 15μF, For Table 2, the following component values are used for the second power supply: L em :214mH and C comp : 32μF. In both cases, the target output power of LED load D6 is 95W.

[0151] From these tables, the appropriate duty cycle and snubber capacitor voltage V can be selected for the LED lamp. C to meet the expected performance standards.

[0152] For example, consider a situation where the desired performance criteria are maintaining a power factor greater than 0.9, total harmonic distortion less than 20%, and harmonic values meeting the IEC 61000-3-2 standard (H3 < 27%, H5 < 10%, H7 < 7%, H9 < 5%, and H11 < 3%).

[0153] It can be seen from Table 1 that for the LED lamp connected to the first power supply, the buffer capacitor voltage V C Only one combination of 140V and 0.38 duty cycle (respectively) meets these desired performance criteria.

[0154]

[0155] Table 1

[0156] As can be seen from Table 2, there are five combinations of string voltage and duty cycle that meet the desired performance criteria for the LED lamp connected to the second power source.

[0157] From the above, it is clear that the optimum duty cycle of the switching arrangement is 0.25 to 0.5, more preferably between 0.3 and 0.4, more preferably between 0.33 and 0.39, even more preferably between 0.37 and 0.39, yet more preferably 0.38.

[0158] Similarly, the preferred combined length of operation in the first mode and the second mode can be 1 to 9 times the cumulative time of the controller operating in the third mode, more preferably 1.5 to 4 times the cumulative time, more preferably 1.9 to 3.6 times the cumulative time, more preferably 2.8 to 3.6 times the cumulative time, and more preferably 3.17 times the cumulative time.

[0159]

[0160] Table 2

[0161] These results indicate that for different power supply types, it is desirable (or even necessary) to operate at different (buffer) capacitor C2 voltages. This can be achieved by switching the string voltage (e.g., by selectively bypassing one or more components of the LED load) or by placing a power converter between the buffer capacitor C2 and the LED string.

[0162] To avoid causing the igniter 15B of the power supply to operate (if present), there may be a maximum allowed forward voltage of the LED load (and therefore a maximum voltage between the first terminal AC1 and the second terminal AC2). The maximum allowed voltage may depend on the trigger voltage of the igniter 15B (i.e., the voltage that will trigger the igniter).

[0163] For example, some igniters may start generating ignition pulses when the voltage at the input arrangement exceeds 190 V, while other igniters may start at a higher voltage. It is therefore desirable to prevent the maximum voltage between the first and second terminals from exceeding such a limit.

[0164] Figure 8 An LED lamp 80 including an LED load D6 and an LED driver 81 according to another embodiment of the present invention is shown.

[0165] The LED driver 81 again comprises an input arrangement 82 , an output node 83 , a switch arrangement 84 and a controller 85 .

[0166] LED driver 81 and Figure 3 The LED driver 31 described in differs in that the switch arrangement 84 further includes a first inductive element L1 connecting the first terminal to the first intermediate node N1, wherein the first switch is coupled to the first intermediate node N1 (instead of being directly connected to the first terminal) and the third switch is coupled to the first intermediate node (instead of being directly connected to the first terminal).

[0167] This effectively enables the LED driver 81 to operate as a switch-mode power supply. This avoids the need for a switch-mode power supply elsewhere in the LED lighting system (e.g., connected to the output node). This also means that the voltage across capacitor C2 can be directly controlled, enabling any LED load D6 to be connected directly to the output node 83.

[0168] Figure 3 All switches M1-M4 of the LED driver 31 described in FIG. 3 are switched at the mains frequency (ie, the frequency of the AC input current). Figure 8 In the LED driver 81 , at least two of the switches M1 - M4 are switched at a frequency substantially higher than the mains frequency.

[0169] Various switching schemes can be used to control the AC input current I em The flow of current or power between and (snubber) capacitor C2.

[0170] In one example that has been identified as reducing electromagnetic interference (EMI), a switching scheme includes alternately switching the second M2 and fourth M4 switches at the mains frequency. In this switching scheme, when the voltage of AC1 is positive relative to AC2, the fourth switch M4 should be turned on (and the second switch M2 should be turned off). When AC2 is positive relative to AC1, the second switch M2 should be turned on (and the fourth switch should be turned off). The decision of when AC1 and AC2 should be positive or negative is to achieve the desired phase of the voltage between AC1 and AC2 (relative to the AC input current I em ).

[0171] Therefore, the second switch and the fourth switch are switched at the commercial power frequency (ie, the AC input current I em frequency) for switching.

[0172] The first and third switches M1, M3 control whether the intermediate node is connected to (buffer) capacitor C2 (effectively held at a constant voltage, in the example shown the forward voltage of LED load D6) or to ground / reference voltage. Inductor L1 together with capacitor C1 acts as a low pass filter.

[0173] Controlling the voltage at the intermediate node using, for example, a pulse width modulation (PWM) technique allows controlling the voltage at the first terminal AC1 in a pseudo-sinusoidal manner. This allows controlling the voltage between the first and second terminals to generate a quasi-sinusoidal voltage.

[0174] In other words, the conductivity of the first M1 and third switches M3 is controlled to change the duty cycle of the voltage at the first intermediate node N1 (eg relative to ground / reference voltage) to match the (average HF) voltage to be generated between the AC1 and AC2 terminals.

[0175] A suitable method of obtaining the desired AC voltage signal between the first terminal and the second terminal may be adapted from a method employed in a Class D (switch mode) audio amplifier. The controller 85 may be adapted to employ such an approach.

[0176] The role of the coupling capacitor C1 is to further smooth any high-frequency voltage between the AC1 terminal and the AC2 terminal to further reduce the high-frequency harmonic content of the LED lamp (ie, between the AC1 terminal and the AC2 terminal).

[0177] Figure 9 An LED lamp 90 including an LED load D6 and an LED driver 91 according to another embodiment of the present invention is shown.

[0178] The LED driver 91 again comprises an input arrangement 92 , an output node 93 , a switch arrangement 94 and a controller 95 .

[0179] LED driver 91 and Figure 8 The LED driver 81 described in differs in that the switch arrangement 94 further comprises a second inductive element L2 connecting the second terminal AC2 to the second intermediate node N2, wherein the second switch is coupled to the second intermediate node N2 (instead of being directly connected to the second terminal) and the fourth switch is coupled to the second intermediate node (instead of being directly connected to the second terminal).

[0180] This allows the controller to use other switching schemes, such as those used with a full-bridge Class D amplifier, to further improve control of the voltage level between the AC1 and AC2 terminals. Those skilled in the art will be able to employ such schemes to control the voltage level between the first terminal AC1 and the second terminal AC2.

[0181] In such a control scheme, both branches M1, M3 and M2, M4 are switched at high frequency, with the duty cycle of the node voltage between M2 and M4 varying inversely to the duty cycle of the node voltage between M1 and M3. Preferably, when the second intermediate node N2 is controlled to be connected to the ground / reference voltage, the first intermediate node N1 is controlled to be connected to the (buffer) capacitor C2, and vice versa. This can be achieved, for example, by synchronously driving M1 and M4 in the on-state (and synchronously driving M2 and M3 in the off-state) and synchronously driving M2 and M3 in the on-state (and synchronously driving M1 and M4 in the off-state) to complement the on-state control of M1 and M4.

[0182] Then use with Figure 8 The same PWM method described in LED lamp 80 is used to generate these duty cycles.

[0183] It has been discussed how the control method of a class D amplifier is applicable to the present invention.

[0184] The main difference between the Class D amplifier and the proposed 4-quadrant SMPS converter is that the load of the Class D amplifier is usually a loudspeaker, resulting in the average power / energy flow in the Class D amplifier being from the DC side (i.e., power supply) to the AC side (speaker).

[0185] In contrast, the proposed 4-quadrant SMSP converter is connected at its AC side to the first AC1 and second AC2 terminals, where the class-D amplifier is connected to the speaker, and is connected at its DC side capacitor C2 to the LED load D6, where the D amplifier is connected to its DC power supply.

[0186] Therefore, both the Class-D amplifier and the proposed 4-quadrant SMPS converter synthesize the AC voltage on their AC side from the DC voltage on their DC side. However, the average power / energy flow is opposite: in the Class-D amplifier, it is from the DC side to the AC side, and in our proposed 4-quadrant SMPS converter, it is from the AC side to the DC side.

[0187] In the proposed embodiment using the first inductive element and the optional second inductive element, the voltage waveform synthesized between the nodes AC1 and AC2 is ideally a perfect sine wave (having a voltage with the same voltage as the AC input current I em substantially or preferably exactly the same frequency and with a controllable phase shift relative to the AC input current).

[0188] That being said, the voltage waveform (between the first and second terminals) does not need to be a perfect sine wave, but may contain higher harmonics, as long as the harmonics in the AC1 and AC2 voltages do not cause the AC input current I em The harmonic currents in the mains current (and therefore the mains current) exceed the requirements for mains current harmonics.

[0189] The embodiment using the first inductive element and the optional second inductive element can be adapted so that the switch arrangement can also operate as a power factor correction stage by suitable control of the switches. If it is desired that the LED lamp be suitable for connection to one or more additional components other than the mains supply (e.g. a ballast L em , compensation capacitor C comp ) power supply, which will be particularly useful.

[0190] In case the power supply comprises mains power only (ie the LED lamp 90 is directly connected to the mains power supply), the switch arrangement 94 may be controlled according to known control mechanisms, for example using a 2-quadrant control method.

[0191] These embodiments thus enable the use of a single-stage converter LED driver (eg, including or omitting a ballast LED) that can be used with different power supplies. em and / or compensation capacitor C comp ), the only difference lies in the control method of driving the power switches M1 to M4.

[0192] One disadvantage of the 4-quadrant SMSP converter is that when the power supply includes an EM ballast, the inductive element L1 (and L2) should be able to handle the full average AC input current I em , and should not be around the I em The inductor saturates at 2.5 times the peak current. Inductor saturation indicates that the SMSP converter cannot operate properly as an SMPS. This current is significantly higher than the AC input current drawn from the mains supply alone (i.e., excluding the EM ballast).

[0193] In some examples, if the power supply includes an EM ballast, the switching arrangement can be operated at the frequency of the AC input current (i.e., the current of the mains supply), and if the power supply includes only the mains supply, i.e., does not include an EM ballast, the switching arrangement can be operated as power factor correction (i.e., in conventional switched-mode power supply operation). This can allow the use of smaller inductive components.

[0194] Embodiments that do not employ the first (and optionally the second) inductive element in the switch arrangement benefit from having a reduced number of components (particularly expensive and / or bulky inductive components) while still improving the performance characteristics of the overall LED lamp. Such embodiments also have reduced power losses (e.g., due to power losses in the inductive element) compared to embodiments employing an inductive element.

[0195] By studying the drawings, the disclosure and the appended claims, variations to the disclosed embodiments can be understood and implemented by those skilled in the art in practicing the claimed invention. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. A single processor or other unit may perform the functions of several items listed in the claims. The fact that certain measures are listed in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. If a computer program is discussed above, it may be stored / distributed on a suitable medium, such as an optical storage medium or solid-state medium provided with or as part of other hardware, but may also be distributed in other forms, such as via the Internet or other wired or wireless telecommunications systems. If the term "suitable for" is used in a claim or description, note that the term "suitable for" is intended to be equivalent to the term "configured to". Any figure signs in the claims should not be construed as limiting the scope.

Claims

1. An LED driver for generating output power for driving an LED load from a power supply adapted to provide an AC input current, the LED driver comprising: an input arrangement comprising a first terminal and a second terminal for receiving said AC input current from said power source; an output node, configured to provide output power for driving the LED load; a capacitor connected between the output node and a ground / reference voltage, wherein the capacitor is configured such that a voltage across the capacitor is constant when the LED driver is powered; Switch arrangement, including: a first switch directly connecting the first terminal to the output node; a second switch directly connecting the second terminal to the output node; a third switch connecting the first terminal directly to the ground / reference voltage; and a fourth switch connecting the second terminal directly to the ground / reference voltage, wherein the switch arrangement is adapted to: controllably connect the first terminal to the output node or the ground / reference voltage; and controllably connect the second terminal to the output node or the ground / reference voltage, thereby enabling control of the magnitude and phase of the voltage between the first and second terminals relative to the phase of the AC input current; and a controller adapted to control the switch arrangement to control the magnitude of the voltage between the first terminal and the second terminal and the phase of the voltage between the first terminal and the second terminal relative to the phase of the AC input current, such that energy transfer between the input arrangement and the output node is bidirectionally controllable, thereby controlling the average magnitude of the output power, wherein the controller is adapted to control the frequency of the voltage between the first terminal and the second terminal to be equal to the frequency of the AC input current, The controller is adapted to be operable in the following modes: a first mode in which the controller allows current to flow through the first switch and the fourth switch and blocks current to flow through the second switch and the third switch such that a voltage between the first terminal and the second terminal and a voltage across the capacitor are equal in magnitude and polarity; a second mode in which the controller allows current to flow through the second switch and the third switch and blocks current to flow through the second switch and the fourth switch such that a voltage between the first terminal and the second terminal is equal in magnitude but opposite in polarity to a voltage across the capacitor; and a third mode in which the controller controls the switch arrangement such that the first terminal and the second terminal are effectively shorted together, The controller is adapted such that a cumulative time for the controller to operate in the first mode or the second mode is between 1 and 9 times a cumulative time for the controller to operate in the third mode.

2. The LED driver according to claim 1, wherein the controller is adapted to have a cumulative time for which the controller operates in the first mode or the second mode be between 2.8 and 3.6 times the cumulative time for which the controller operates in the third mode.

3. The LED driver of claim 1 , wherein the controller is adapted to control the phase of the voltage between the first terminal and the second terminal in response to a control signal, the control signal being indicative of a desired amplitude of light to be output by an LED load connectable to the output node.

4. The LED driver according to claim 1 , wherein the controller is adapted to operate in the first mode for the same period of time in each cycle of the AC input current as it operates in the second mode for the same period of time in each cycle of the AC input current.

5. The LED driver according to any one of the preceding claims, wherein the controller is adapted to iteratively perform a sequence of: For a first time period, operating in the first mode; for a subsequent second time period, operating in the third mode; for a subsequent third time period, operating in the second mode; For a subsequent fourth time period, the system operates in the third mode. 6 . The LED driver according to claim 5 , wherein the duration of the second time period is the same as the duration of the fourth time period. 7 . The LED driver according to claim 6 , wherein the duration of the first time period and the duration of the third time period are the same.

8. The LED driver according to any one of claims 4, 6 and 7, wherein the controller is adapted to: operating in the first mode during at least a portion of the time that current flowing from the AC input current to the first terminal is positive; and The second mode is operated during at least a portion of the time when current flowing from the AC input current to the first terminal is negative.

9. An LED lamp comprising: The LED driver according to any one of claims 1 to 8; as well as LED load, connected to the output node.

10. An LED lighting system comprising an LED lamp according to claim 9 and an electromagnetic ballast, the electromagnetic ballast being adapted to be connected to a mains power supply to provide an AC input current to the input arrangement of the LED driver.

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