Display substrate and display device
By designing sub-pixel areas with different density on the display substrate and adopting specific pixel arrangement methods, the problem of poor imaging quality of under-screen cameras is solved, and the display effect with high light transmittance and high resolution is achieved.
Patent Information
- Application Number
- CN202210226103.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-06-30
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2040-06-30
AI Technical Summary
In OLED display technology, the imaging quality of the under-screen camera is affected by the low light transmittance of the screen, making it difficult to achieve high-quality under-screen camera function.
A display substrate is designed, including a first display area and a second display area. The sub-pixel density of the first display area is smaller than that of the second display area. The pixel arrangement method of Real GRB and GGRB is adopted to reduce the resolution of the first display area to increase the light transmittance, and at the same time improve the resolution and display effect of the second display area.
The high light transmittance of the first display area is realized, and while supporting the under-screen camera function, the second display area has a higher resolution and display effect, extending the service life of the sub-pixels of the first display area.
Smart Images

Figure CN114597247B_ABST
Abstract
Description
[0001] This application is a divisional application of the Chinese invention patent application (application number: 202010617909.7, application date: June 30, 2020, invention name: display substrate and display device). Technical Field
[0002] Embodiments of the present disclosure relate to a display substrate and a display device. Background Art
[0003] With the continuous development of display technology, organic light emitting diode (OLED) display technology has been increasingly used in various electronic products due to its advantages such as self-luminescence, wide viewing angle, high contrast, low power consumption and high response speed.
[0004] On the other hand, with the continuous development of organic light-emitting diode display technology, people's requirements for the screen-to-body ratio of electronic products are getting higher and higher. Therefore, the design of placing some functional components of electronic products under the screen has become a new research hotspot. For example, the camera of an electronic product can be placed under the screen, that is, the under-screen camera design. Summary of the invention
[0005] The embodiment of the present disclosure provides a display substrate and a display device. The display substrate includes: a substrate substrate including a first display area and a second display area, the second display area at least partially surrounding the first display area; and a plurality of sub-pixels located on the substrate substrate and located in the first display area and the second display area, the density of the sub-pixels in the first display area is less than the density of the sub-pixels in the second display area, each sub-pixel includes a pixel circuit, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel and a third sub-pixel, the plurality of sub-pixels include a plurality of first pixel groups and a plurality of second pixel groups, the plurality of first pixel groups are located in the first display area, the plurality of second pixel groups are located in the second display area, the first display area includes a plurality of sub-display areas and a sub-light-transmitting area located between the plurality of sub-display areas, the plurality of first pixel groups are arranged in one-to-one correspondence with the plurality of sub-display areas, each first pixel group includes a first sub-pixel, a second sub-pixel and a third sub-pixel arranged in sequence along a first direction, each second pixel group includes a first sub-pixel, a second sub-pixel pair and a third sub-pixel arranged along the first direction, and the second sub-pixel pair includes two second sub-pixels arranged along the second direction. The display substrate adopts the pixel arrangement of Real GRB in the first display area and the pixel arrangement of GGRB in the second display area; on the one hand, the display substrate can reduce the resolution or PPI (Pixel Per Inch) of the first display area, thereby increasing the light transmittance of the first display area; on the other hand, the second display area of the display substrate has a higher resolution and display effect. In addition, since the first display area adopts the pixel arrangement of Real GRB, the light-emitting area of the second sub-pixel in the first pixel group is larger, thereby having a longer service life.
[0006] At least one embodiment of the present disclosure provides a display substrate, comprising: a base substrate, comprising a first display area and a second display area, wherein the second display area at least partially surrounds the first display area; and a plurality of sub-pixels, located on the base substrate and in the first display area and the second display area, wherein the density of the sub-pixels in the first display area is less than the density of the sub-pixels in the second display area, each of the sub-pixels comprises a pixel circuit, the plurality of sub-pixels comprise a first sub-pixel, a second sub-pixel and a third sub-pixel, the plurality of sub-pixels comprise a plurality of first pixel groups and a plurality of second pixel groups, the plurality of first pixel groups are located in the first display area, the plurality of second pixel groups are located in the second display area, the first display area comprises a plurality of sub-display areas and a sub-light-transmitting area between the plurality of sub-display areas, the plurality of first pixel groups are arranged in one-to-one correspondence with the plurality of sub-display areas, each of the first pixel groups comprises a first sub-pixel, a second sub-pixel and a third sub-pixel arranged in sequence along a first direction, each of the second pixel groups comprises a first sub-pixel, a second sub-pixel pair and a third sub-pixel arranged along the first direction, and the second sub-pixel pair comprises two second sub-pixels arranged along a second direction.
[0007] For example, a display substrate provided by an embodiment of the present disclosure also includes: multiple first light-shielding layers, which are arranged one-to-one corresponding to the multiple sub-display areas, and each of the first light-shielding layers is located on the side of the corresponding first pixel group close to the base substrate; and a second light-shielding layer, which is located in the second display area and on the side of the multiple second pixel groups close to the base substrate.
[0008] For example, in a display substrate provided in one embodiment of the present disclosure, each of the sub-pixels also includes a power line extending along the second direction, the power line is connected to the pixel circuit and is configured to apply a constant voltage to the pixel circuit, the power line of at least one of the sub-pixels in each of the first pixel groups is electrically connected to the corresponding first light-shielding layer, and the power line of at least one of the sub-pixels in each of the second pixel groups is electrically connected to the second light-shielding layer.
[0009] For example, in a display substrate provided by an embodiment of the present disclosure, the power lines of the first sub-pixels in each of the first pixel groups are electrically connected to the corresponding first light-shielding layer, and the power lines of the first sub-pixels, the second sub-pixels and the third sub-pixels in each of the second pixel groups are electrically connected to the corresponding second light-shielding layer.
[0010] For example, in a display substrate provided in an embodiment of the present disclosure, each of the sub-display areas includes three unit areas, the first sub-pixel, the second sub-pixel and the third sub-pixel in the first pixel group are respectively arranged in the three unit areas, a first spacing area is arranged between the first pixel groups adjacent to each other in the first direction, the first spacing area includes one unit area, a second spacing area is arranged between the first pixel groups adjacent to each other in the second direction, the second spacing area includes the three unit areas arranged along the first direction, and the sub-light-transmitting area includes the first spacing area and the second spacing area.
[0011] For example, in a display substrate provided by an embodiment of the present disclosure, the power line of the second sub-pixel in each of the first pixel groups passes through the second spacing area and is connected to the power line of the second sub-pixel in the first pixel group adjacent in the second direction, and the power line of the first sub-pixel and the power line of the third sub-pixel in each of the first pixel groups are disconnected from the power line of the first sub-pixel and the power line of the third sub-pixel in the first pixel group adjacent in the second direction.
[0012] For example, in a display substrate provided by an embodiment of the present disclosure, the pixel circuit of the sub-pixel in each of the first pixel groups includes a first initialization signal line, a first reset signal line, a gate line, an emission control line, a second initialization signal line, and a second reset signal line extending along the first direction; in each of the first pixel groups, the first initialization signal line of the first sub-pixel, the first initialization signal line of the second sub-pixel, and the first initialization signal line of the third sub-pixel are connected; in each of the first pixel groups, the first reset signal line of the first sub-pixel, the first reset signal line of the second sub-pixel, and the first reset signal line of the third sub-pixel are connected; In each of the first pixel groups, the gate line of the first sub-pixel, the gate line of the second sub-pixel and the gate line of the third sub-pixel are connected, in each of the first pixel groups, the emission control line of the first sub-pixel, the emission control line of the second sub-pixel and the emission control line of the third sub-pixel are connected, in each of the first pixel groups, the second initialization signal line of the first sub-pixel, the second initialization signal line of the second sub-pixel and the second initialization signal line of the third sub-pixel are connected, and in each of the first pixel groups, the second reset signal line of the first sub-pixel, the second reset signal line of the second sub-pixel and the second reset signal line of the third sub-pixel are connected.
[0013] For example, in a display substrate provided by an embodiment of the present disclosure, the power line of the first sub-pixel in each of the first pixel groups is electrically connected to the corresponding first light-shielding layer through a first light-shielding layer via, and the power lines of the first sub-pixel, the second sub-pixel and the third sub-pixel in each of the second pixel groups are electrically connected to the second light-shielding layer through a second light-shielding layer via, respectively, and the orthographic projection of the first light-shielding layer via on the base substrate is located on the side of the second reset signal line away from the emission signal line.
[0014] For example, in a display substrate provided by an embodiment of the present disclosure, one of the first pixel groups includes only one first light shielding layer via hole.
[0015] For example, in a display substrate provided by an embodiment of the present disclosure, the pixel circuit of the first sub-pixel includes: a wiring area, wherein the first initialization signal line, the first reset signal line, the gate line, the emission control line, the second initialization signal line and the second reset signal line are arranged in the wiring area; and a via area, located on a side of the wiring area close to the second spacing area, wherein the first light shielding layer via is arranged in the via area.
[0016] For example, in a display substrate provided by an embodiment of the present disclosure, the pixel circuit of the sub-pixel in each of the second pixel groups includes a first initialization signal line, a first reset signal line, a gate line and an emission control line extending along the first direction, and an extension line of the second initialization signal line and the second reset signal line of the first sub-pixel in the first pixel group is located between the first emission control line of the first sub-pixel in the second pixel group in the same row and the first reset signal line of the first sub-pixel in the second pixel group in the next row.
[0017] For example, in a display substrate provided by an embodiment of the present disclosure, the first initialization signal line of the third sub-pixel in each of the first pixel groups is connected to the first initialization signal line of the first sub-pixel in the first pixel group adjacent in the first direction through a first connection line, the first reset signal line of the third sub-pixel in each of the first pixel groups is connected to the first reset signal line of the first sub-pixel in the first pixel group adjacent in the first direction through a second connection line, the gate line and the second reset signal line of the third sub-pixel in each of the first pixel groups are connected through a third connection line, and are connected to the gate line and the second reset signal line of the first sub-pixel in the first pixel group adjacent in the first direction through the third connection line, the emission control line of the third sub-pixel in each of the first pixel groups is connected to the emission control line of the first sub-pixel in the first pixel group adjacent in the first direction through a fourth connection line, the second initialization signal line of the third sub-pixel in each of the first pixel groups is connected to the second initialization signal line of the first sub-pixel in the first pixel group adjacent in the first direction through a fifth connection line, and the first connection line, the second connection line, the third connection line, the fourth connection line and the fifth connection line are gathered in the first spacing area.
[0018] For example, in a display substrate provided by an embodiment of the present disclosure, the first connection line, the third connection line and the fifth connection line are arranged in the same layer as the power line, and in a different layer from the first initialization signal line, the gate line and the second initialization signal line.
[0019] For example, in a display substrate provided by an embodiment of the present disclosure, the second connection line and the first reset signal line are arranged on the same layer and are integrally formed, and the fourth connection line and the emission control line are arranged on the same layer and are integrally formed.
[0020] For example, in a display substrate provided by an embodiment of the present disclosure, the first connection line, the second connection line, the third connection line, the fourth connection line and the fifth connection line are arranged in sequence in the second direction.
[0021] For example, in a display substrate provided by an embodiment of the present disclosure, the pixel circuit also includes a data line extending along the second direction, the data line of the first sub-pixel in each of the first pixel groups is connected to the data line of the first sub-pixel in the first pixel group adjacent to the second direction through a sixth connecting line, the data line of the second sub-pixel in each of the first pixel groups is connected to the data line of the second sub-pixel in the first pixel group adjacent to the second direction through a seventh connecting line, the data line of the third sub-pixel in each of the first pixel groups is connected to the data line of the third sub-pixel in the first pixel group adjacent to the second direction through an eighth connecting line, and the sixth connecting line, the seventh connecting line and the eighth connecting line are converged in the second spacing area.
[0022] For example, in a display substrate provided by an embodiment of the present disclosure, the sixth connecting line and the first initialization signal line are arranged on the same layer, and are arranged on a different layer from the data line; the seventh connecting line and the data line are arranged on the same layer and are integrally formed; the eighth connecting line and the first reset signal line are arranged on the same layer, and are arranged on a different layer from the data line.
[0023] For example, in a display substrate provided by an embodiment of the present disclosure, the sixth connecting line, the seventh connecting line and the eighth connecting line are arranged in sequence in the first direction.
[0024] For example, in a display substrate provided by an embodiment of the present disclosure, the sub-light-transmitting area is not provided with the sub-pixel.
[0025] For example, in a display substrate provided by an embodiment of the present disclosure, the first direction is substantially perpendicular to the second direction.
[0026] For example, in a display substrate provided by an embodiment of the present disclosure, the first sub-pixel is configured to emit light of a first color, the second sub-pixel is configured to emit light of a second color, and the third sub-pixel is configured to emit light of a third color.
[0027] For example, in a display substrate provided by an embodiment of the present disclosure, the first color is red, the second color is green, and the third color is blue.
[0028] At least one embodiment of the present disclosure further provides a display device, comprising the above-mentioned display substrate.
[0029] For example, a display device provided by an embodiment of the present disclosure further includes: a photosensitive functional element located on a side of the multiple sub-pixels close to the base substrate, wherein the orthographic projection of the photosensitive functional element on the base substrate at least partially overlaps with the first display area. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.
[0031] Figure 1 A schematic plan view of a display substrate provided according to an embodiment of the present disclosure;
[0032] Figure 2 A schematic plan view of another display substrate provided according to an embodiment of the present disclosure;
[0033] Figure 3 A display substrate provided according to an embodiment of the present disclosure Figure 2 Schematic diagram of the cross section in the AA direction;
[0034] Figure 4 A partial plan view of another display substrate provided according to an embodiment of the present disclosure;
[0035] Figure 5 A partial plan view of a display substrate provided according to an embodiment of the present disclosure;
[0036] Figure 6 for Figure 5 An enlarged schematic diagram of a first pixel group in; and
[0037] Figure 7 It is a schematic diagram of a display device provided according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0038] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.
[0039] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The words "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. The words "include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.
[0040] As people's requirements for the screen-to-body ratio of electronic products become higher and higher, the design of under-screen cameras has also become a research hotspot for major manufacturers. The technical difficulty of under-screen camera design is mainly due to the low light transmittance of the screen, which seriously affects the imaging quality of the camera placed under the screen.
[0041] As consumers' requirements for screen integrity increase, under-screen cameras are becoming more and more popular. Currently in the OLED field, the technical difficulty of under-screen cameras is mainly the low screen transmittance, which seriously affects the imaging quality of the camera placed under the screen. For example, the display screen can be divided into a first display area and a second display area, the camera can be set in the first display area, and the second display area can be a normal display area; by reducing the resolution of the first display area, the density of sub-pixels in the first display area can be reduced, thereby increasing the transmittance, and then realizing the under-screen camera function.
[0042] The embodiment of the present disclosure also provides a display substrate and a display device. The display substrate includes: a substrate substrate including a first display area and a second display area, the second display area at least partially surrounding the first display area; and a plurality of sub-pixels located on the substrate substrate and located in the first display area and the second display area, the density of the sub-pixels in the first display area is less than the density of the sub-pixels in the second display area, each sub-pixel includes a pixel circuit, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel and a third sub-pixel, the plurality of sub-pixels include a plurality of first pixel groups and a plurality of second pixel groups, the plurality of first pixel groups are located in the first display area, the plurality of second pixel groups are located in the second display area, the first display area includes a plurality of sub-display areas and a sub-light-transmitting area located between the plurality of sub-display areas, the plurality of first pixel groups are arranged in one-to-one correspondence with the plurality of sub-display areas, each first pixel group includes a first sub-pixel, a second sub-pixel and a third sub-pixel arranged in sequence along a first direction, each second pixel group includes a first sub-pixel, a second sub-pixel pair and a third sub-pixel arranged along the first direction, and the second sub-pixel pair includes two second sub-pixels arranged along the second direction. The display substrate adopts the Real GRB pixel arrangement in the first display area and the GGRB pixel arrangement in the second display area; on the one hand, the display substrate can reduce the resolution or PPI (Pixel Per Inch) of the first display area, thereby increasing the light transmittance of the first display area; on the other hand, the second display area of the display substrate has a higher resolution and display effect. In addition, since the first display area adopts the RealGRB pixel arrangement, the light-emitting area of the green sub-pixel is larger, thereby having a longer service life.
[0043] The display substrate and the display device provided by the embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.
[0044] Figure 1FIG. 1 is a schematic plan view of a display substrate provided according to an embodiment of the present disclosure. Figure 1 As shown, the display substrate 100 includes a base substrate 110 and a plurality of sub-pixels 120; the base substrate 110 includes a first display area 112 and a second display area 114, and the second display area 114 at least partially surrounds the first display area 112; the plurality of sub-pixels 120 are located on the base substrate 110, and are located in the first display area 112 and the second display area 114, and the density of the sub-pixels in the first display area 112 is less than the density of the sub-pixels in the second display area 114; each sub-pixel 120 includes a pixel circuit. The multiple sub-pixels 120 include a first sub-pixel 121, a second sub-pixel 122 and a third sub-pixel 123, the multiple sub-pixels 120 include a multiple first pixel group 141 and a multiple second pixel group 142, the multiple first pixel groups 141 are located in the first display area 112, and the multiple second pixel groups 142 are located in the second display area 114; the first display area 112 includes a multiple sub-display area 1124 and a sub-light-transmitting area 1126 located between the multiple sub-display areas 1124, the multiple first pixel groups 141 are arranged in a one-to-one correspondence with the multiple sub-display areas 1124, each first pixel group 141 includes a first sub-pixel 121, a second sub-pixel 122 and a third sub-pixel 123 arranged in sequence along the first direction, each second pixel group 142 includes a first sub-pixel 121, a second sub-pixel pair 1220 and a third sub-pixel 123 arranged along the first direction, and the second sub-pixel pair 1220 includes two second sub-pixels 122 arranged along the second direction.
[0045] In the display substrate provided in the embodiment of the present disclosure, the first display area 112 includes a plurality of sub-display areas 1124 and a sub-light-transmitting area 1126 located between the plurality of sub-display areas 1124, and a plurality of first pixel groups 141 are arranged in one-to-one correspondence with the plurality of sub-display areas 1124. At this time, the plurality of sub-display areas in the first display area 112 can be used for display, and the sub-light-transmitting area 1126 allows light to pass through, so the first display area 112 can be provided with a photosensitive functional element, such as a camera. Each first pixel group 141 includes a first sub-pixel 121, a second sub-pixel 122, and a third sub-pixel 123 arranged in sequence along a first direction; it can be seen that the sub-pixels in the first display area 112 can adopt the pixel arrangement method of Real GRB; at this time, the light-emitting area of the second sub-pixel is larger, so it has a longer service life. Each second pixel group 142 includes a first sub-pixel 121, a second sub-pixel pair 1220 and a third sub-pixel 123 arranged along the first direction, and the second sub-pixel pair 1220 includes two second sub-pixels 122 arranged along the second direction; it can be seen that the sub-pixels in the second display area 114 can adopt the GGRB pixel arrangement method, so as to have a higher resolution and better display effect. It should be noted that since the number of sub-pixels in the first display area is small, in order to make the brightness of the entire display substrate uniform, the brightness of the sub-pixels in each first pixel group is greater than the brightness of the sub-pixels in the second pixel group. Therefore, by increasing the light-emitting area of the second sub-pixels in the first pixel group, the display substrate can have a longer service life.
[0046] For example, Figure 1 As shown, the shape of the orthographic projection of the first display area 112 on the base substrate 110 is a rectangle, and the second display area 114 surrounds three edges of the first display area 112. Of course, the embodiments of the present disclosure include but are not limited to this. The shape of the orthographic projection of the first display area 112 on the base substrate 110 can also be other shapes, such as a circle or a teardrop shape; in addition, the second display area 114 can also surround all edges of the first display area 112.
[0047] In some examples, the sub-light-transmitting area 1126 is not provided with a sub-pixel 120. Thus, the sub-light-transmitting area 1126 may have a higher light transmittance.
[0048] In some examples, the first direction is substantially perpendicular to the second direction. It should be noted that the first direction is substantially perpendicular to the second direction includes the case where the angle between the first direction and the second direction is 90 degrees and the case where the angle between the first direction and the second direction is in the range of 80-100 degrees.
[0049] In some examples, first subpixel 121 is configured to emit light of a first color, second subpixel 122 is configured to emit light of a second color, and third subpixel 123 is configured to emit light of a third color.
[0050] For example, the first color is red, the second color is green, and the third color is blue.
[0051] Figure 2 A schematic plan view of another display substrate provided according to an embodiment of the present disclosure; Figure 3 A display substrate provided according to an embodiment of the present disclosure Figure 2 Schematic diagram of the cross section along the AA direction.
[0052] like Figure 2 and Figure 3 As shown, the display substrate 100 further includes a plurality of first light shielding layers 151 and a second light shielding layer 152; the plurality of first light shielding layers 151 are arranged in one-to-one correspondence with the plurality of sub-display areas 1124; each first light shielding layer 151 is located on the side of the corresponding first pixel group 141 close to the base substrate 110; the second light shielding layer 152 is located in the second display area 114, and is located on the side of the plurality of second pixel groups 142 close to the base substrate 110. Thus, the first light shielding layer 151 can prevent the light emitted by the first pixel group 141 from entering the photosensitive functional element arranged in the first display area 112; similarly, the second light shielding layer 152 can also prevent the light emitted by the second pixel group 142 from entering the photosensitive functional element arranged in the first display area 112, thereby ensuring that the photosensitive functional element can realize its function with high quality. For example, the above-mentioned photosensitive functional element can be a camera.
[0053] For example, the orthographic projections of the pixel circuits 130 of the multiple sub-pixels 120 in the first pixel group 141 on the base substrate 110 fall within the orthographic projections of the corresponding first light-shielding layer 151 on the base substrate 110, so that the first light-shielding layer 151 can block the pixel circuits 130 of the multiple sub-pixels 120 in the first pixel group 141, preventing light from diffracting through the slits between the signal lines of the pixel circuits 130 and entering the photosensitive functional elements.
[0054] For example, Figure 2 and Figure 3 As shown, adjacent sub-display areas 1124 are arranged at intervals. Of course, the embodiments of the present disclosure include but are not limited to this, and two or more adjacent sub-display areas can be closely arranged to form a larger area.
[0055] In some examples, such as Figure 2 and Figure 3 As shown, the second light shielding layer 152 may occupy the entire area of the second display area 114, while the first light shielding layer 151 only occupies the area of the sub-display area 1124 in the first display area 112, thereby ensuring that the first display area 112 has a certain light transmittance.
[0056] In some examples, such as Figure 2As shown, each sub-display area 1124 includes three unit areas 200, and the first sub-pixel 121, the second sub-pixel 122 and the third sub-pixel 123 in the first pixel group 141 are respectively arranged in these three unit areas 200; that is, one sub-pixel 120 is arranged in one unit area 200. A first spacing area 161 is arranged between the adjacent first pixel groups 141 in the first direction, and the first spacing area 161 includes one unit area 200. A second spacing area 162 is arranged between the adjacent first pixel groups 141 in the second direction, and the second spacing area 162 includes three unit areas 200 arranged along the first direction. The sub-light-transmitting area 1126 includes the first spacing area 161 and the second spacing area 162. In the display substrate provided in this example, the pixel density of the first display area is approximately 3 / 8 of the pixel density of the second display area, and the PPI of the first display area is approximately 1 / 2 of the PPI of the second display area. As a result, the first display area has a higher light transmittance, so that the photosensitive functional element arranged in the first display area can have better performance.
[0057] Figure 4 A partial plan view of another display substrate provided according to an embodiment of the present disclosure. Figure 4 Only the power supply lines and pixel circuits of the first pixel group and the second pixel group are shown. Figure 4 As shown, each sub-pixel 120 further includes a power line 128 extending along the second direction, the power line 128 is connected to the pixel circuit 130, and is configured to apply a constant voltage to the pixel circuit 130, the power line 128 of at least one sub-pixel 120 in each first pixel group 141 is electrically connected to the corresponding first light shielding layer 151, and the power line 128 of at least one sub-pixel 128 in each second pixel group 142 is electrically connected to the second light shielding layer 152. In the display substrate provided in this example, the first light shielding layer and the second light shielding layer are both connected to the power line, which can avoid the first light shielding layer and the second light shielding layer being in a floating state during display, thereby improving the display quality of the display substrate.
[0058] In some examples, such as Figure 4 As shown, in order to reduce the area of each first pixel group 141, the power line 128 of the first sub-pixel 121 in each first pixel group 141 is connected to the corresponding first light shielding layer 151, and the power line 128 of the second sub-pixel 122 and the power line 128 of the third sub-pixel 123 in each first pixel group 141 are not connected to the corresponding first light shielding layer 151. Therefore, only the power line 128 of the first sub-pixel 121 in each first pixel group 141 applies a constant voltage to the first light shielding layer 151 corresponding to the first pixel group 141.
[0059] In some examples, such as Figure 4As shown, the power lines 128 of the first sub-pixel 121, the second sub-pixel 122 and the third sub-pixel 123 in each second pixel group 142 are all electrically connected to the corresponding second light shielding layer 152. Of course, the embodiments of the present disclosure include but are not limited to this, and each second pixel group may also have only some sub-pixels whose power lines are connected to the corresponding second light shielding layer.
[0060] Figure 5 A partial plan view of a display substrate provided according to an embodiment of the present disclosure; Figure 6 for Figure 5 An enlarged schematic diagram of a first pixel group in FIG. Figure 5 and Figure 6 As shown, the power line 128 of the second sub-pixel 122 in each first pixel group 141 passes through the second spacing area 162 and is connected to the power line 128 of the second sub-pixel 122 in the first pixel group 141 adjacent in the second direction. The power line 128 of the first sub-pixel 121 and the power line 128 of the third sub-pixel 123 in each first pixel group 141 are disconnected from the power line 128 of the first sub-pixel 121 and the power line 128 of the third sub-pixel 123 in the first pixel group 141 adjacent in the second direction. In other words, the power line 128 of the first sub-pixel 121 in each first pixel group 141 is not connected to the power line 128 of the first sub-pixel 121 in the first pixel group 141 adjacent in the second direction, and the power line 128 of the third sub-pixel 123 in each first pixel group 141 is not connected to the power line 128 of the third sub-pixel 123 in the first pixel group 141 adjacent in the second direction. As a result, the display substrate can reduce the number of wirings in the second spacing area, thereby improving the light transmittance of the second spacing area.
[0061] It should be noted that if Figure 5 and Figure 6 As shown, the power line 128 of the first sub-pixel 121 , the power line 128 of the second sub-pixel 122 , and the power line 128 of the third sub-pixel 123 in each first pixel group 141 may be electrically connected to each other through the second gate layer in the pixel circuit.
[0062] In some examples, such as Figure 5 and Figure 6As shown, the pixel circuit 130 of the sub-pixel 120 in each first pixel group 141 includes a first initialization signal line 1311, a first reset signal line 1321, a gate line 133, an emission control line 134, a second initialization signal line 1312, and a second reset signal line 1322 extending along a first direction. In each first pixel group 141, the first initialization signal line 1311 of the first sub-pixel 121, the first initialization signal line 1311 of the second sub-pixel 122, and the first initialization signal line 1311 of the third sub-pixel 123 are connected; in each first pixel group 141, the first reset signal line 1321 of the first sub-pixel 121, the first reset signal line 1321 of the second sub-pixel 122, and the first reset signal line 1321 of the third sub-pixel 123 are connected; in each first pixel group 141, the gate line 133 of the first sub-pixel 121, the gate line 133 of the second sub-pixel 122, and the gate line 133 of the third sub-pixel 123 are connected; In the pixel group 141, the emission control line 134 of the first sub-pixel 121, the emission control line 134 of the second sub-pixel 122 and the emission control line 134 of the third sub-pixel 123 are connected; in each first pixel group 141, the second initialization signal line 1312 of the first sub-pixel 121, the second initialization signal line 1312 of the second sub-pixel 122 and the second initialization signal line 1312 of the third sub-pixel 123 are connected; in each first pixel group 141, the second reset signal line 1322 of the first sub-pixel 121, the second reset signal line 1322 of the second sub-pixel 122 and the second reset signal line 1322 of the third sub-pixel 123 are connected.
[0063] It should be noted that, in order to more clearly illustrate the connection relationship of these signal lines, the present disclosure divides them into signal line segments corresponding to each sub-pixel. However, each signal line in each first pixel group may be integrally formed. Figure 5As shown, in each first pixel group 141, the first initialization signal line 1311 of the first sub-pixel 121, the first initialization signal line 1311 of the second sub-pixel 122, and the first initialization signal line 1311 of the third sub-pixel 123 are integrally formed; the first reset signal line 1321 of the first sub-pixel 121, the first reset signal line 1321 of the second sub-pixel 122, and the first reset signal line 1321 of the third sub-pixel 123 are integrally formed; the gate line 133 of the first sub-pixel 121, the gate line 133 of the second sub-pixel 122, and the gate line 133 of the third sub-pixel 123 are integrally formed. type; the emission control line 134 of the first sub-pixel 121, the emission control line 134 of the second sub-pixel 122 and the emission control line 134 of the third sub-pixel 123 are integrally formed; the second initialization signal line 1312 of the first sub-pixel 121, the second initialization signal line 1312 of the second sub-pixel 122 and the second initialization signal line 1312 of the third sub-pixel 123 are integrally formed; the second reset signal line 1322 of the first sub-pixel 121, the second reset signal line 1322 of the second sub-pixel 122 and the second reset signal line 1322 of the third sub-pixel 123 are integrally formed.
[0064] In some examples, such as Figure 4 , Figure 5 and Figure 6 As shown, the power line 128 of the first sub-pixel 121 in each first pixel group 141 is electrically connected to the corresponding first light shielding layer 151 through the first light shielding layer via 171; for example, Figure 4 , Figure 5 and Figure 6 As shown, a first pixel group 141 includes only one first light shielding layer via 171. The power lines 128 of the first sub-pixel 121, the second sub-pixel 122 and the third sub-pixel 123 in each second pixel group 142 are electrically connected to the second light shielding layer 152 through the second light shielding layer via 172 respectively; the orthographic projection of the first light shielding layer via 171 on the base substrate 110 is located on the side of the second reset signal line 1322 away from the emission signal line 134. As a result, the second initialization signal line 1312 and the second reset signal line 1322 can be arranged closer to the emission signal line 134, thereby reducing the area occupied by the pixel circuit, thereby reducing the area of the first light shielding layer and improving the transmittance of the first display area. In some examples, such as Figure 5 and Figure 6As shown, the pixel circuit 130 of the first sub-pixel 121 includes a wiring area 1215 and a via area 1217; the first initialization signal line 1311, the first reset signal line 1321, the gate line 133, the emission control line 134, the second initialization signal line 1312 and the second reset signal line 1322 are arranged in the wiring area 1215; the via area 1217 is located on the side of the wiring area 1215 close to the second spacing area 162, and the first light shielding layer via 171 is arranged in the via area 1217. Therefore, since the first light shielding layer via 171 is arranged in the via area 1217, the first initialization signal line 1311, the first reset signal line 1321, the gate line 133, the emission control line 134, the second initialization signal line 1312 and the second reset signal line 1322 can be arranged more densely in the wiring area 1215. Therefore, the display substrate can reduce the area occupied by the pixel circuit, thereby reducing the area of the first light shielding layer and improving the transmittance of the first display area.
[0065] In some examples, such as Figure 5 and Figure 6 As shown, the pixel circuit 130 of the sub-pixel 120 in each second pixel group 142 includes a first initialization signal line 1311, a first reset signal line 1321, a gate line 133 and an emission control line 134 extending along a first direction, and an extension line of the second initialization signal line 1312 and the second reset signal line 1322 of the first sub-pixel 121 in the first pixel group 141 is located between the first emission control line 134 of the first sub-pixel 121 in the second pixel group 142 in the same row and the first reset signal line 1311 of the first sub-pixel 121 in the second pixel group 142 in the next row. In the display substrate, the pixel circuits of the sub-pixels in each second pixel group do not need to be provided with the second initialization signal line and the second reset signal line, but the first initialization signal line and the first reset signal line of the sub-pixels in the second pixel group in the next row serve as the second initialization signal line and the second reset signal line of the sub-pixels in the second pixel group in the previous row; at this time, since the extension lines of the second initialization signal line and the second reset signal line of the first sub-pixel in the first pixel group are located between the first emission control line of the first sub-pixel in the second pixel group in the same row and the first reset signal line of the first sub-pixel in the second pixel group in the next row, the display substrate can reduce the area occupied by the pixel circuits of each sub-pixel in the first pixel group, thereby reducing the area of the first light-shielding layer and improving the transmittance of the first display area.
[0066] In some examples, such as Figure 5 and Figure 6As shown, the first initialization signal line 1311 of the third sub-pixel 123 in each first pixel group 141 is connected to the first initialization signal line 1311 of the first sub-pixel 121 in the first pixel group 141 adjacent in the first direction through the first connection line 181; the first reset signal line 1321 of the third sub-pixel 123 in each first pixel group 141 is connected to the first reset signal line 1321 of the first sub-pixel 121 in the first pixel group 141 adjacent in the first direction through the second connection line 182; the gate line 133 and the second reset signal line 1322 of the third sub-pixel 123 in each first pixel group 141 are connected through the third connection line 183, and are connected to the first pixel group 141 adjacent in the first direction through the third connection line 183. The gate line 133 of the first sub-pixel 121 in each first pixel group 141 is connected to the second reset signal line 1322; the emission control line 124 of the third sub-pixel 123 in each first pixel group 141 is connected to the emission control line 124 of the first sub-pixel 121 in the first pixel group 141 adjacent in the first direction through the fourth connection line 184; the second initialization signal line 1312 of the third sub-pixel 123 in each first pixel group 141 is connected to the second initialization signal line 1312 of the first sub-pixel 121 in the first pixel group 141 adjacent in the first direction through the fifth connection line 185, and the first connection line 181, the second connection line 182, the third connection line 183, the fourth connection line 184 and the fifth connection line 185 are gathered in the first spacing area 161. For example, the "gathering" of the present disclosure means that the arrangement density of the connection lines is less than the arrangement density of the various signal lines connected to the connection lines. For example, the first to fifth connection lines 181-185 are densely arranged in the second direction, while the various signal lines connected thereto are more sparsely arranged in the second direction. Therefore, the display substrate can reduce the area occupied by the first connecting line, the second connecting line, the third connecting line, the fourth connecting line and the fifth connecting line by gathering them in the first spacing area, thereby improving the transmittance of the first display area.
[0067] In some examples, such as Figure 5 and Figure 6 As shown, the first connection line 181, the third connection line 183 and the fifth connection line 185 are arranged in the same layer as the power line 128, and are arranged in different layers from the first initialization signal line 1311, the gate line 133 and the second initialization signal line 1312. For example, the first connection line 181, the third connection line 183 and the fifth connection line 185 can be electrically connected to the first initialization signal line 1311, the gate line 133 and the second initialization signal line 1312 through vias.
[0068] In some examples, such as Figure 5 and Figure 6As shown, the second connection line 182 and the first reset signal line 1321 are arranged in the same layer and are integrally formed, and the fourth connection line 184 and the emission control line 134 are arranged in the same layer and are integrally formed. Thus, the first connection line, the third connection line and the fifth connection line are located in the same layer, and the second connection line and the fourth connection line are located in the same layer; the first connection line, the third connection line and the fifth connection line are located in different film layers from the second connection line and the fourth connection line, therefore, under the premise of ensuring mutual insulation, the first connection line, the second connection line, the third connection line, the fourth connection line and the fifth connection line can be closely arranged, thereby further reducing the area occupied by the first connection line, the second connection line, the third connection line, the fourth connection line and the fifth connection line.
[0069] In some examples, such as Figure 5 and Figure 6 As shown, the first connection line 181, the second connection line 182, the third connection line 183, the fourth connection line 184 and the fifth connection line 185 are sequentially arranged in the second direction. Thus, under the premise of ensuring mutual insulation, the first connection line, the second connection line, the third connection line, the fourth connection line and the fifth connection line can be closely arranged, thereby further reducing the area occupied by the first connection line, the second connection line, the third connection line, the fourth connection line and the fifth connection line.
[0070] In some examples, such as Figure 5 and Figure 6 As shown, the pixel circuit 130 also includes a data line 136 extending along the second direction; the data line 136 of the first sub-pixel 121 in each first pixel group 141 is connected to the data line 136 of the first sub-pixel 121 in the first pixel group 141 adjacent to the second direction through the sixth connection line 186, the data line 136 of the second sub-pixel 122 in each first pixel group 141 is connected to the data line 136 of the second sub-pixel 122 in the first pixel group 141 adjacent to the second direction through the seventh connection line 187, the data line 136 of the third sub-pixel 123 in each first pixel group 141 is connected to the data line 136 of the third sub-pixel 123 in the first pixel group 141 adjacent to the second direction through the eighth connection line 188, and the sixth connection line 186, the seventh connection line 187 and the eighth connection line 188 are gathered in the second spacing area 162. Thus, the display substrate can reduce the area occupied by the sixth connecting line, the seventh connecting line and the eighth connecting line by gathering the sixth connecting line, the seventh connecting line and the eighth connecting line in the second spacing area, thereby improving the light transmittance of the first display area.
[0071] In some examples, such as Figure 5 and Figure 6As shown, the sixth connection line 186 and the first initialization signal line 1311 are arranged in the same layer, and are arranged in a different layer from the data line 136; the seventh connection line 187 and the data line 136 are arranged in the same layer and are integrally formed; the eighth connection line 188 and the first reset signal line 1321 are arranged in the same layer, and are arranged in a different layer from the data line 136. For example, the sixth connection line 186 and the eighth connection line 188 can be electrically connected to the corresponding data line 136 through vias. Thus, the sixth connection line and the eighth connection line are arranged in different layers from the data line, and the seventh connection line is located in the same layer as the data line; that is, the film layer where the sixth connection line and the eighth connection line are located and the film layer where the seventh connection line is located are different film layers. Therefore, under the premise of ensuring mutual insulation, the sixth connection line, the seventh connection line and the eighth connection line can be closely arranged, so that the area occupied by the sixth connection line, the seventh connection line and the eighth connection line can be further reduced.
[0072] In some examples, such as Figure 6 As shown, the sixth connection line 186, the eighth connection line 188 and the seventh connection line 187 are arranged sequentially in the first direction.
[0073] It should be noted that the number of first pixel groups in the first display area in the display substrate provided in the embodiment of the present disclosure is not limited to the specific number of first pixel groups in the first display area in the above drawings, but is set according to the specific size of the product.
[0074] An embodiment of the present disclosure further provides a display device. Figure 7 FIG. 1 is a schematic diagram of a display device provided according to an embodiment of the present disclosure. Figure 7 As shown, the display device 300 includes the above-mentioned display substrate 100. Therefore, the display device has the technical effect corresponding to the beneficial technical effect of the display substrate, and the details can refer to the relevant description of the above-mentioned display substrate.
[0075] For example, the display device can be a display device such as an organic light-emitting diode (OLED) display, as well as any product or component with a display function, such as a television, a digital camera, a mobile phone, a watch, a tablet computer, a laptop computer, a navigator, etc. that includes these display devices.
[0076] In some examples, such as Figure 7 As shown, the display device 300 further includes a light-sensing functional element 310, which is located on a side of the multiple sub-pixels 120 close to the substrate 110, and the orthographic projection of the light-sensing functional element 310 on the substrate 110 at least partially overlaps with the first display area 112. The light-sensing functional element 310 is configured to receive light from a side of the display substrate where the multiple sub-pixels are located, thereby realizing various functions.
[0077] For example, the above-mentioned photosensitive functional element 310 can be a camera, so that the display device can realize functions such as camera while realizing a full-screen design.
[0078] There are a few points to note:
[0079] (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can refer to the general design.
[0080] (2) In the absence of conflict, features in the same embodiment or in different embodiments of the present disclosure may be combined with each other.
[0081] The above description is merely an exemplary embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure. The protection scope of the present disclosure is determined by the appended claims.
Claims
1. A display substrate, comprising: A base substrate, comprising a first display area and a second display area, wherein the second display area at least partially surrounds the first display area, and the first display area comprises a plurality of sub-display areas and a sub-light-transmitting area located between the plurality of sub-display areas; A plurality of sub-pixels are located on the base substrate and in the first display area and the second display area, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel and a third sub-pixel, the plurality of sub-pixels include a plurality of first pixel groups, the plurality of first pixel groups are located in the plurality of sub-display areas, and at least one first pixel group in the plurality of first pixel groups includes at least one first sub-pixel, at least one second sub-pixel and at least one third sub-pixel arranged along a first direction; as well as A plurality of first light shielding layers are located in the plurality of sub-display areas, and the orthographic projections of the plurality of first pixel groups on the base substrate are located within the orthographic projections of the plurality of first light shielding layers on the base substrate. The sub-pixel includes a pixel circuit, and the pixel circuit includes a first reset signal line, a gate line, an emission control line, and a second reset signal line extending along the first direction; The first reset signal line of the third sub-pixel in the first pixel group is connected to the first reset signal line of the first sub-pixel in the first pixel group adjacent to the first direction through a second connection line; The gate line of the third sub-pixel in the first pixel group and the second reset signal line are connected through a third connection line, and are connected to the gate line and the second reset signal line of the first sub-pixel in the first pixel group adjacent in the first direction through the third connection line; The emission control line of the third sub-pixel in the first pixel group is connected to the emission control line of the first sub-pixel in the first pixel group adjacent in the first direction through a fourth connection line; The second connecting line, the third connecting line and the fourth connecting line converge in the first direction, The plurality of sub-pixels further include a plurality of second pixel groups, and the plurality of second pixel groups are located in the second display area; the display substrate further includes a second light shielding layer located in the second display area, and the second light shielding layer is located on a side of the plurality of second pixel groups close to the base substrate, The sub-pixel further includes a power line extending along a second direction, the power line is connected to the pixel circuit and is configured to apply a constant voltage to the pixel circuit, the first direction and the second direction intersect, and the power line in the second pixel group is electrically connected to the second light shielding layer; The pixel circuit further includes a data line extending along the second direction, wherein the data line of the first sub-pixel in the first pixel group is connected to the data line of the first sub-pixel in the first pixel group adjacent to the second direction through a sixth connecting line. The data line of the second sub-pixel in the first pixel group is connected to the data line of the second sub-pixel in the first pixel group adjacent to the second direction through a seventh connecting line; The data line of the third sub-pixel in the first pixel group is connected to the data line of the third sub-pixel in the first pixel group adjacent to the second direction through an eighth connecting line; The sixth connecting line, the seventh connecting line and the eighth connecting line are gathered in the second direction.
2. The display substrate according to claim 1, wherein: A first spacing region is provided between the first pixel groups adjacent to each other in the first direction, a second spacing region is provided between the first pixel groups adjacent to each other in the second direction, the sub-light-transmitting region includes the first spacing region and the second spacing region, and the second direction intersects with the first direction.
3. The display substrate according to claim 1, wherein: The first pixel group satisfies at least one of the following: The first reset signal line of the first sub-pixel, the first reset signal line of the second sub-pixel and the first reset signal line of the third sub-pixel are connected; The gate line of the first sub-pixel, the gate line of the second sub-pixel and the gate line of the third sub-pixel are connected; The emission control line of the first sub-pixel, the emission control line of the second sub-pixel, and the emission control line of the third sub-pixel are connected; and The second reset signal line of the first sub-pixel, the second reset signal line of the second sub-pixel, and the second reset signal line of the third sub-pixel are connected.
4. The display substrate according to claim 3, wherein: The power line of at least one of the sub-pixels in the first pixel group is connected to the power line of at least one of the sub-pixels in the first pixel group adjacent to the second direction.
5. The display substrate according to claim 1, wherein: The second connection line, the third connection line and the fourth connection line are arranged in sequence in the second direction.
6. The display substrate according to claim 1, wherein: The sixth connection line and the data line are arranged in different layers, and the eighth connection line and the data line are arranged in different layers.
7. The display substrate according to claim 2, wherein: The power line of the first sub-pixel in each of the first pixel groups is electrically connected to the corresponding first light shielding layer through a first light shielding layer via hole. The orthographic projection of the first light shielding layer via hole on the base substrate is located on a side of the second reset signal line away from the emission control line.
8. The display substrate according to claim 7, wherein: One of the first pixel groups includes only one via hole of the first light shielding layer.
9. The display substrate according to claim 7, wherein: The pixel circuit further includes a first initialization signal line and a second initialization signal line extending along the first direction, and the pixel circuit of the first sub-pixel includes: a wiring region, in which the first initialization signal line, the first reset signal line, the gate line, the emission control line, the second initialization signal line, and the second reset signal line are arranged; and The via region is located at a side of the wiring region close to the second spacing region, and the first light shielding layer via is arranged in the via region.
10. The display substrate according to any one of claims 1 to 6, wherein: The sub-light-transmitting area is not provided with sub-pixels.
11. The display substrate according to any one of claims 1 to 6, wherein: The first direction and the second direction are perpendicular to each other.
12. The display substrate according to any one of claims 1 to 6, wherein: The first sub-pixel is configured to emit light of a first color, the second sub-pixel is configured to emit light of a second color, and the third sub-pixel is configured to emit light of a third color.
13. The display substrate according to claim 12, wherein: The first color is red, the second color is green, and the third color is blue.
14. The display substrate according to any one of claims 1 to 6, wherein: The plurality of first light shielding layers are arranged in one-to-one correspondence with the plurality of sub-display areas, and each of the first light shielding layers is located at a side of the corresponding first pixel group close to the base substrate.
15. A display device comprising the display substrate according to any one of claims 1 to 14.
16. The display device according to claim 15, further comprising: A photosensitive functional element is located on a side of the plurality of sub-pixels close to the substrate. Wherein, the orthographic projection of the photosensitive functional element on the base substrate at least partially overlaps with the first display area.
17. The display device according to claim 16, wherein: The photosensitive functional element includes a camera.
Citation Information
Patent Citations
Display panel and display device
CN110061014A
Display panel and display device
CN110189627A