LED driving device, driving circuit and driving method thereof

Abstract

Disclosed are an LED driving device, a driving circuit and a driving method thereof, wherein the LED driving circuit comprises: an input detection module, which generates a first control signal according to a DC bus voltage and a first preset voltage; a bypass module, which is connected between the DC bus voltage and a ground terminal, the input terminal of the bypass module receives the first control signal, and the bypass module generates a bypass current sampling signal and a first voltage signal according to the DC bus voltage; a power supply module, which generates a power supply voltage and a power supply current according to the first voltage signal; an input detection module, which generates a second control signal representing the DC bus voltage state according to the DC bus voltage and the bypass current sampling signal; and a driving module, which is connected to the input detection module, receives the second control signal, and is used to generate a driving signal according to the second control signal. The present application does not need to add a pin specifically used for leakage detection, and uses the same pin to realize leakage detection and power supply for the driving circuit, thereby increasing the configurable pins of the chip.

Description

Technical Field

[0001] The present invention relates to power electronics related fields, and in particular, to an LED driving device, a driving circuit and a driving method thereof. Background Art

[0002] LED lights are increasingly used in the lighting field, such as in classrooms, shopping malls, office buildings, etc., including fluorescent lamps. The two ends of fluorescent lamps are connected to the mains through the neutral wire and the live wire. When installing, usually one end is installed first, and then the other end. If the operator accidentally touches the electrode at the other end with his hand or other parts of the body when installing one end, a loop will be formed between the human body and the power grid, which will cause electric shock. At present, leakage protection is added to solve this problem.

[0003] In the prior art, when an LED driving circuit with leakage protection function detects that an electric shock is present at the input, the LED driving circuit is controlled to be in a closed state; and when no electric shock is present at the input, the LED driving circuit operates normally and lights up the LED lamp.

[0004] However, the leakage detection and power supply terminals of the LED driving circuit use two pins, which reduces the available pins for the chip. Summary of the invention

[0005] In view of the above, an object of the present invention is to provide an LED driving device, a driving circuit and a driving method thereof, which use the same pin to realize leakage detection and power supply for the driving circuit, thereby increasing the configurable pins of the chip.

[0006] According to a first aspect of the present invention, there is provided an LED driving circuit, comprising: an input detection module, connected to an input detection terminal, and generating a first control signal according to a DC bus voltage and a first preset voltage; a bypass module, connected between the input detection terminal and a ground terminal, the input terminal of the bypass module receiving the first control signal, the bypass module generating a bypass current sampling signal and a first voltage signal according to the DC bus voltage; a power supply module, connected to the bypass module, and generating a power supply voltage according to the first voltage signal; the input detection module generating a second control signal representing a DC bus voltage state according to the DC bus voltage and the bypass current sampling signal; and a driving module, connected to the input detection module, receiving the second control signal, and used to generate a driving signal according to the second control signal.

[0007] Preferably, the power supply module is also connected to the input detection module, and generates a power supply voltage according to the first control signal and the first voltage signal.

[0008] Preferably, when the first control signal is valid, the bypass module outputs a bypass current sampling signal to form a leakage detection loop with the input detection module.

[0009] Preferably, the bypass module outputs a first voltage signal to form a power supply loop with the power supply module.

[0010] Preferably, when the first control signal is valid, when the bypass current sampling signal and the DC bus voltage both meet preset conditions, the DC bus voltage state is judged to be normal; when either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, the DC bus voltage state is judged to be abnormal.

[0011] Preferably, when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, the DC bus voltage state is judged to be normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal, and the first moment is different from the second moment.

[0012] Preferably, when the DC bus voltage is greater than a third threshold and the bypass current sampling signal at the current moment is greater than a second threshold, the DC bus voltage state is judged to be normal; when the DC bus voltage is less than or equal to the third threshold, and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal.

[0013] Preferably, when the DC bus voltage is greater than a first preset voltage, the input detection module generates a first control signal, and the first control signal is a pulse signal.

[0014] Preferably, when the first control signal is valid, the leakage detection state is entered; when the first control signal is invalid, the leakage detection state is exited.

[0015] Preferably, when the second control signal indicates that the DC bus voltage state is normal, the driving module is controlled to operate; when the second control signal indicates that the DC bus voltage state is abnormal, the driving module is controlled to shut down.

[0016] Preferably, the DC bus voltage state includes any one of a normal state, a leakage state and a poor contact state.

[0017] Preferably, the bypass module includes a clamping unit, a first transistor, a second transistor and a second sampling resistor, wherein the first transistor, the second transistor and the second sampling resistor are connected in series between the input detection terminal and the ground terminal; the control terminal of the first transistor is connected to the clamping unit; the control terminal of the second transistor is connected to the input detection module and is turned on and off according to a first control signal; the first node between the first transistor and the second transistor outputs a first voltage signal; and the second node between the second transistor and the second sampling resistor outputs a bypass current sampling signal.

[0018] Preferably, the bypass module includes a clamping unit, a first transistor, a second transistor and a second sampling resistor, wherein the first transistor is connected between the input detection end and the power supply module; the second transistor and the second sampling resistor are connected in series between the input detection end and the ground end; the first end of the first transistor is connected to the input detection end, the second end outputs a first voltage signal, and the control end is connected to the clamping unit; the control end of the second transistor is connected to the input detection module and is turned on and off according to the first control signal; the second node between the second transistor and the second sampling resistor outputs a bypass current sampling signal.

[0019] Preferably, the power supply module includes a second diode, a third transistor, a fourth transistor, a voltage regulator, a first resistor and a second resistor; wherein the anode of the second diode is connected to the first voltage signal, the cathode is connected to the power supply end via the first resistor and the voltage regulator, and is connected to the power supply end via the third transistor and the second resistor; the control end of the third transistor is connected to the third node between the first resistor and the voltage regulator; the fourth transistor is connected between the third node and the ground terminal, and its control end is connected to the input detection module for receiving the first control signal.

[0020] Preferably, the power supply module includes a second diode, a third transistor, a voltage regulator, a first resistor and a second resistor; wherein the anode of the second diode is connected to the first voltage signal, the cathode is connected to the power supply end via the first resistor and the voltage regulator, and is connected to the power supply end via the third transistor and the second resistor; the control end of the third transistor is connected to the third node between the first resistor and the voltage regulator.

[0021] Preferably, the input detection module includes a pulse generating unit and an input detection unit, wherein the pulse generating unit is used to generate the first control signal according to the DC bus voltage and the first preset voltage; and the input detection unit is used to generate the second control signal according to the DC bus voltage and the bypass current sampling signal within the preset time during which the first control signal remains valid.

[0022] Preferably, the input detection unit includes: a voltage detection unit, which generates a voltage detection signal based on the voltage division of the DC bus voltage and a first reference voltage; a current detection unit, which generates a current detection signal based on the bypass current sampling signal and a second reference voltage; and a latch unit, which generates a second control signal based on the first control signal, the voltage detection signal and the current detection signal.

[0023] Preferably, the pulse generating unit includes a third resistor, a fourth resistor, a first comparator, a timer, a logic OR gate, a first monostable pulse unit and a second monostable pulse unit; wherein, the third resistor and the fourth resistor are connected in series between the DC bus voltage and the ground terminal, and the first node between the third resistor and the fourth resistor outputs a first voltage; the first input terminal of the first comparator is connected to the first node, the second input terminal receives a first preset voltage, and the output terminal outputs a first comparison signal; the input terminal of the first monostable pulse unit receives the first comparison signal, and the first monostable pulse unit generates a second pulse signal; the timer is used to generate a clock signal; the logic OR gate is respectively connected to the output terminal of the first monostable pulse unit and the timer, and generates a first logic signal according to the first comparison signal and the clock signal; the second monostable pulse unit generates a first control signal according to the first logic signal.

[0024] Preferably, the voltage detection unit includes a third resistor, a fourth resistor, a subtractor, a sampling and holding unit and a second comparator, wherein the third resistor and the fourth resistor are connected in series between the DC bus voltage and the ground terminal, and the first node between the third resistor and the fourth resistor outputs a first voltage; the sampling and holding unit samples and holds the divided voltage of the DC bus voltage when the first control signal triggers an edge; the subtractor is respectively connected to the second comparator and the sampling and holding unit, receives the divided voltage of the DC bus voltage and the first voltage, and outputs a difference voltage between the divided voltage of the DC bus voltage and the first voltage; the first input terminal of the second comparator receives the difference voltage, the second input terminal receives the first reference voltage, and the output terminal outputs a second comparison signal as a voltage detection signal.

[0025] Preferably, the voltage detection unit includes a third resistor, a fourth resistor and a second comparator, wherein the third resistor and the fourth resistor are connected in series between the DC bus voltage and the ground terminal, and the first node between the third resistor and the fourth resistor outputs the divided voltage of the DC bus voltage; the first input terminal of the second comparator receives the divided voltage of the DC bus voltage, the second input terminal receives the first reference voltage, and the output terminal outputs a second comparison signal as a voltage detection signal.

[0026] Preferably, the current detection unit includes a third comparator and a third monostable pulse unit; wherein, the first input terminal of the third comparator receives a bypass current sampling signal, the second input terminal receives a second reference voltage, and the output terminal outputs a third comparison signal; the third comparison signal outputs a current detection signal via the third monostable pulse unit.

[0027] Preferably, the latch unit includes a logic AND gate, a judgment module and an RS trigger; wherein the input end of the logic AND gate is respectively connected to the voltage detection unit and the current detection unit to generate a second logic signal according to the voltage detection signal and the current detection signal; the judgment module judges whether the second logic signal is a high level multiple times according to the first control signal to generate a detection signal; the set end of the RS trigger is connected to the judgment unit, the reset end is grounded, and the output end outputs the second control signal.

[0028] Preferably, when the judgment unit judges that the second logic signal is at a high level for multiple consecutive times, the output detection signal is at a high level, indicating that the input is normal; if the second logic signal is at a low level during multiple consecutive judgments, the output detection signal is at a low level, indicating that the input is abnormal.

[0029] According to a second aspect of the present invention, there is provided an LED driving device, comprising: a rectifier bridge circuit, used for rectifying an AC input voltage to obtain a DC bus voltage; the above-mentioned LED driving circuit, connected to the rectifier bridge circuit; and a power conversion circuit, connected to the LED driving circuit; wherein the LED driving circuit controls the power conversion circuit to convert the DC bus voltage into a DC output signal.

[0030] Preferably, the power supply module is also connected to the input detection module, and generates a power supply voltage according to the first control signal and the first voltage signal.

[0031] Preferably, when the first control signal is valid, the bypass module outputs a bypass current sampling signal to form a leakage detection loop with the input detection module.

[0032] Preferably, the bypass module outputs a first voltage signal to form a power supply loop with the power supply module.

[0033] Preferably, when the first control signal is valid, when the bypass current sampling signal and the DC bus voltage both meet preset conditions, the DC bus voltage state is judged to be normal; when either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, the DC bus voltage state is judged to be abnormal.

[0034] Preferably, when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, the DC bus voltage state is judged to be normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal, and the first moment is different from the second moment.

[0035] Preferably, when the DC bus voltage is greater than a third threshold and the bypass current sampling signal at the current moment is greater than a second threshold, the DC bus voltage state is judged to be normal; when the DC bus voltage is less than or equal to the third threshold, and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal.

[0036] Preferably, when the DC bus voltage is greater than a first preset voltage, the input detection module generates a first control signal, and the first control signal is a pulse signal.

[0037] Preferably, when the first control signal is valid, the leakage detection state is entered; when the first control signal is invalid, the leakage detection state is exited.

[0038] Preferably, when the second control signal indicates that the DC bus voltage state is normal, the driving module is controlled to operate; when the second control signal indicates that the DC bus voltage state is abnormal, the driving module is controlled to shut down.

[0039] Preferably, the DC bus voltage state includes any one of a normal state, a leakage state and a poor contact state.

[0040] According to a third aspect of the present invention, there is provided an LED driving method, comprising: generating a first control signal according to a DC bus voltage and a first preset voltage; generating a bypass current sampling signal according to the first control signal and the DC bus voltage and generating a first voltage signal according to the DC bus voltage; generating a power supply voltage according to the first voltage signal; generating a second control signal representing a DC bus voltage state according to the DC bus voltage and the bypass current sampling signal; and generating a driving signal according to the second control signal.

[0041] Preferably, the driving method further comprises: generating a power supply voltage according to the first control signal and the first voltage signal.

[0042] Preferably, when the first control signal is valid, when the bypass current sampling signal and the DC bus voltage both meet preset conditions, the DC bus voltage state is judged to be normal; when either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, the DC bus voltage state is judged to be abnormal.

[0043] Preferably, when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, the DC bus voltage state is judged to be normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal, and the first moment is different from the second moment.

[0044] Preferably, when the DC bus voltage is greater than a third threshold and the bypass current sampling signal at the current moment is greater than a second threshold, the DC bus voltage state is judged to be normal; when the DC bus voltage is less than or equal to the third threshold, and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal.

[0045] Preferably, when the DC bus voltage is greater than a first preset voltage, the input detection module generates a first control signal, and the first control signal is a pulse signal.

[0046] Preferably, when the first control signal is valid, the leakage detection state is entered; when the first control signal is invalid, the leakage detection state is exited.

[0047] Preferably, when the second control signal indicates that the DC bus voltage state is normal, the driving module is controlled to operate; when the second control signal indicates that the DC bus voltage state is abnormal, the driving module is controlled to shut down.

[0048] The LED driving device, driving circuit and driving method provided by the present invention do not need to add a pin specifically used for leakage detection, and use the same pin to realize leakage detection and power supply for the driving circuit, thereby increasing the configurable pins of the chip.

[0049] Furthermore, the DC bus voltage is obtained by using the same pin, and a first control signal is generated according to the DC bus voltage and a preset voltage, and leakage detection is performed during the period when the first control signal is valid; the drive circuit is powered during the period when the first control signal is invalid.

[0050] Furthermore, the bypass module is reused to perform leakage detection and power the drive circuit. During leakage detection, the input detection module determines whether there is leakage based on the DC bus voltage and the bypass module; during non-leakage detection, the bypass module provides power supply current to the power supply module to form a power supply loop.

[0051] Furthermore, the power supply module obtains the first voltage signal via the input detection terminal VH and the bypass module, and generates a power supply voltage and a power supply current according to the first voltage signal, thereby reducing the number of pins of the driving circuit and lowering the cost.

[0052] Furthermore, the power supply module reuses the first transistor, thereby reducing costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings.

[0054] Figure 1 A circuit diagram of an LED driving device in the prior art is shown;

[0055] Figure 2 A circuit diagram of an LED driving device according to an embodiment of the present invention is shown;

[0056] Figure 3 A circuit diagram of a bypass module provided according to a first embodiment of the present invention is shown;

[0057] Figure 4 A circuit diagram of a bypass module according to a second embodiment of the present invention is shown;

[0058] Figure 5 A circuit diagram of a power supply module provided according to an embodiment of the present invention;

[0059] Figure 6 A waveform diagram of an LED driving device provided according to an embodiment of the present invention;

[0060] Figure 7 A circuit diagram of an input detection module provided according to an embodiment of the present invention;

[0061] Figure 8 A circuit diagram of a pulse generating unit provided by a first embodiment of the present invention is shown;

[0062] Fig. 9 A circuit diagram of an input detection unit provided by a first embodiment of the present invention is shown;

[0063] Fig.10 A circuit diagram of an input detection unit provided according to a second embodiment of the present invention;

[0064] Fig.11A waveform diagram showing the pulse generating unit provided by an embodiment of the present invention when an alternating current is input;

[0065] Fig.12 A waveform diagram showing the pulse generating unit provided by an embodiment of the present invention when a direct current is input;

[0066] Fig.13 shows a waveform diagram of the input detection unit provided by the first embodiment of the present invention when the input is normal;

[0067] Fig.14 shows a waveform diagram of the input detection unit provided by the first embodiment of the present invention when an electric shock occurs;

[0068] Fig.15 A waveform diagram showing a poor contact of the DC bus voltage in the input detection unit provided by the first embodiment of the present invention;

[0069] Fig.16 shows a waveform diagram of the input detection unit provided by the second embodiment of the present invention when the input is normal;

[0070] Fig.17 shows a waveform diagram of the input detection unit provided by the second embodiment of the present invention when an electric shock occurs;

[0071] Fig.18 A circuit diagram of an LED driving device provided by another embodiment of the present invention is shown;

[0072] Fig.19 A circuit diagram of a power supply module provided in another embodiment of the present invention is shown;

[0073] Fig. 20 A flow chart of an LED driving method provided by an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0074] Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by the same or similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale.

[0075] Figure 1 FIG. 2 shows a circuit diagram of an LED driving device in the prior art. Figure 1 The LED driving device includes a rectifier bridge circuit 110, a driving circuit 120, a power conversion circuit 130, and a load 140.

[0076] The input end of the rectifier bridge circuit 110 receives the AC input voltage Vac, and the output end of the rectifier bridge circuit 110 is connected to the input capacitor Cin. The AC input voltage Vac is rectified by the rectifier bridge circuit 110 to output a DC bus voltage Vbus. The DC bus voltage Vbus is a half-sine wave signal.

[0077] The driving circuit 120 includes a built-in power switch tube M0 (not shown in the figure), a current sampling terminal CS, a control terminal DRAIN, a power supply terminal VCC, a leakage detection terminal REC, a power supply terminal Vin and a ground terminal GND. The current sampling terminal CS is connected to the ground terminal via a first sampling resistor Rs1. The power switch tube M0 is connected between the control terminal DRAIN and the current sampling terminal CS. The power supply terminal Vcc is grounded via a first capacitor C1. The leakage detection terminal REC is connected to the positive output terminal of the rectifier bridge circuit 110 to detect whether there is leakage; the power supply terminal Vin is connected to the positive end of the input capacitor Cin to supply power to the driving circuit 120.

[0078] The power conversion circuit 130 includes a freewheeling diode D0, an inductor L0, and an output capacitor Cout. The freewheeling diode D0 and the inductor L0 are connected in series between the positive end and the negative end of the output voltage Vout; the output capacitor Cout is connected between the positive end and the negative end of the output voltage Vout. The node between the freewheeling diode D0 and the inductor L0 is connected to the control terminal DRAIN of the drive circuit 120.

[0079] The load 140 is connected between the positive terminal and the negative terminal of the output voltage Vout.

[0080] The leakage detection and power supply ends of the LED driving circuit use two pins, which will reduce the available pins for the chip.

[0081] Figure 2 FIG. 2 shows a circuit diagram of an LED driving device provided by an embodiment of the present invention. Figure 2 As shown, the LED driving circuit 220 includes an input detection module 221 , a bypass module 222 , a power supply module 223 and a driving module 224 .

[0082] The LED driving circuit 220 includes an input detection terminal VH, a current sampling terminal CS, a control terminal DRAIN, a power supply terminal VCC and a ground terminal GND.

[0083] The input detection module 221 is connected to the input detection terminal VH, receives the DC bus voltage Vbus, is used to generate a first control signal Ctrl1 representing a detection state according to the DC bus voltage Vbus, and performs leakage detection according to the first control signal Ctrl1.

[0084] In this embodiment, when the DC bus voltage Vbus is greater than the first preset voltage Vr1, the input detection module 121 generates a first control signal Ctrl1, which is a pulse signal. When the first control signal Ctrl1 is valid, the leakage detection state is entered, and the bypass module 122 generates a bypass current sampling signal Vs; the input detection module 121 obtains the bypass current sampling signal Vs from the bypass module 122, and generates a second control signal Ctrl2 representing the DC bus voltage state according to the bypass current sampling signal Vs and the DC bus voltage Vbus within the preset time when the first control signal remains valid, and the DC bus voltage state includes a normal state and an abnormal state, and the abnormal state includes a leakage state and a poor contact state; when the first control signal Ctrl1 is invalid, the leakage detection state is exited.

[0085] Specifically, in the leakage detection state, when the bypass current sampling signal Vs and the DC bus voltage Vbus both meet the preset conditions, the DC bus voltage state is judged to be normal; when any one of the bypass current sampling signal Vs and the DC bus voltage Vbus does not meet the preset conditions, the DC bus voltage state is judged to be abnormal, such as a leakage state or a poor contact state. The preset condition is, for example, that the amplitude change of the DC bus voltage Vbus at different moments is less than a threshold value and the bypass current sampling signal Vs reaches a threshold value. Specifically, the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold value, and the bypass current sampling signal at the second moment is greater than the second threshold value, and the DC bus voltage state is judged to be normal, and the first moment is different from the second moment.

[0086] The input detection module 221 also generates a second control signal Ctrl2 representing the state of the DC bus voltage according to the DC bus voltage Vbus and the bypass current sampling signal Vs. The second control signal Ctrl2 is used to control the driving module 224 to work or shut down.

[0087] When the second control signal Ctrl2 indicates that the DC bus voltage is normal, the driving module 130 is controlled to work normally; when the second control signal Ctrl2 indicates that the DC bus voltage is abnormal, the driving module 130 is controlled to be turned off and leakage detection is continued.

[0088] In a preferred embodiment, the first control signal Ctrl1 is also used to control whether the power supply module 223 is working.

[0089] In this embodiment, when the first control signal Ctrl1 is invalid, the power supply module 223 works.

[0090] The bypass module 222 is connected between the DC bus voltage Vbus and the ground terminal, and its input terminal is connected to the input detection module 221 to receive the first control signal Ctrl1. The bypass module 222 generates a bypass current sampling signal Vs and a first voltage signal Vn according to the DC bus voltage.

[0091] When the first control signal Ctrl1 is valid, the bypass module 222 outputs the bypass current sampling signal Vs to form a leakage detection loop with the input detection module 221 .

[0092] The bypass module 222 outputs a first voltage signal Vn to form a power supply loop with the power supply module 223 .

[0093] The power supply module 223 is connected to the input detection module 221 and the bypass module 222 respectively, and is used to obtain the first voltage signal Vn from the bypass module 222, and generate a power supply voltage Vcc and a power supply current Icc according to the first control signal Ctrl1 and the first voltage signal Vn.

[0094] In this embodiment, the first voltage signal Vn supplies power to the power supply module 223. When the first control signal Ctrl1 is valid, the power supply module 223 does not generate the power supply voltage Vcc and the power supply current Icc; when the first control signal Ctrl1 is invalid, the power supply module 223 generates the power supply voltage Vcc and the power supply current Icc.

[0095] The driving module 224 generates a driving signal according to the second control signal Ctrl2 representing the input state to control the on and off of the power switch tube M0 , thereby adjusting the current provided to the load 240 .

[0096] In a preferred embodiment, the LED driving device further includes a first diode D1, which is located between the positive output end of the rectifier bridge 110 and the output capacitor Cin, and the anode of the first diode D1 is connected to the positive output end of the rectifier bridge 110, and the cathode is connected to one end of the output capacitor Cin, mainly to isolate direct current and prevent the sine wave voltage from being filtered by the capacitor. The LED driving device and the driving circuit provided by the present invention do not need to add a separate pin specifically used for leakage detection, and the same pin is used to realize leakage detection and power supply for the driving circuit, thereby increasing the configurable pins of the chip.

[0097] Furthermore, the DC bus voltage is obtained by using the same pin, and a control signal is generated according to the DC bus voltage and a preset voltage, and leakage detection is performed while the control signal is valid; and power is supplied to the drive circuit while the control signal is invalid.

[0098] Furthermore, the bypass module is reused to perform leakage detection and power the drive circuit. During leakage detection, the input detection module determines whether there is leakage based on the DC bus voltage and the bypass module; during non-leakage detection, the bypass module provides power supply current to the power supply module to form a power supply loop.

[0099] Furthermore, the power supply module obtains the first voltage signal via the input detection terminal VH and the bypass module, and generates a power supply voltage and a power supply current according to the first voltage signal, thereby reducing the number of pins of the driving circuit and lowering the cost.

[0100] Furthermore, the power supply module reuses the first transistor in the bypass module, thereby reducing costs.

[0101] Figure 3 FIG. 2 shows a circuit diagram of a bypass module according to a first embodiment of the present invention. Figure 3 As shown, the bypass module 222 includes a clamping unit, a first transistor Q1, a second transistor Q2 and a second sampling resistor Rs2.

[0102] The first transistor Q1, the second transistor Q2 and the second sampling resistor Rs2 are connected in series between the input detection terminal VH and the ground terminal GND; the control end of the first transistor Q1 is connected to the clamping unit; the control end of the second transistor Q2 is connected to the input detection module 221, and is turned on and off according to the first control signal Ctrl1. The first node between the first transistor Q1 and the second transistor Q2 outputs the first voltage signal Vn. The second node between the second transistor Q2 and the second sampling resistor Rs2 outputs the bypass current sampling signal Vs. The clamping unit is used to clamp the first voltage signal Vn to a low voltage.

[0103] In this embodiment, see Figure 6 When the first control signal Ctrl1 is valid, the second transistor Q2 is turned on, the rectifier bridge 110, the first transistor Q1, the second transistor Q2 and the second sampling resistor Rs2 form a leakage detection loop, and leakage detection is performed. The bypass module 222 provides a bypass current sampling signal Vs to the input detection module 221. When the first control signal Ctrl1 is invalid, the second transistor Q2 is turned off, and the leakage detection is exited. The bypass module 222 provides a first voltage signal Vn to the power supply module 223, and the rectifier bridge 110, the first transistor Q1 and the power supply module 223 form a power supply loop.

[0104] The clamping unit can be an active clamp or a passive voltage regulator clamp. The first transistor Q1 and the second transistor Q2 can be NMOS transistors or NPN transistors.

[0105] Figure 4The circuit diagram of the bypass module provided according to the second embodiment of the present invention is shown. Compared with the first embodiment, the first transistor Q1 is connected between the input detection terminal VH and the power supply module 223, and the second transistor Q2 and the second sampling resistor Rs2 are connected in series between the input detection terminal VH and the ground terminal.

[0106] In this embodiment, when the first control signal Ctrl1 is valid, the second transistor Q2 is turned on, the rectifier bridge 110, the second transistor Q2 and the second sampling resistor Rs2 form a leakage detection loop, leakage detection is performed, and the bypass module 222 provides the bypass current sampling signal Vs to the input detection module 221. When the first control signal Ctrl1 is invalid, the second transistor Q2 is turned off, the leakage detection is exited, the bypass module 222 provides the first voltage signal Vn to the power supply module 223, and the rectifier bridge 110, the first transistor Q1 and the power supply module 223 form a power supply loop.

[0107] Figure 5 FIG. 2 shows a circuit diagram of a power supply module provided by an embodiment of the present invention. Figure 5 As shown, the power supply module 223 includes a second diode D1, a third transistor Q3, a fourth transistor Q4, a voltage regulator tube Z1, a first resistor R1 and a second resistor R2.

[0108] The anode of the second diode D1 is connected to the bypass module 222 for receiving the first voltage signal Vn, and the cathode is connected to the power supply terminal Vcc via the first resistor R1 and the voltage regulator Z1, and is connected to the power supply terminal Vcc via the third transistor Q3 and the second resistor R2; the control end of the third transistor Q3 is connected to the third node between the first resistor R1 and the voltage regulator Z1. The fourth transistor Q4 is connected between the third node and the ground terminal GND, and its control end is connected to the input detection module 221 for receiving the first control signal Ctrl1.

[0109] When the first control signal Ctrl1 is valid, leakage detection is performed, the fourth transistor Q4 is turned on, and the voltage of the third node is pulled down to a low level, so that the third transistor Q3 is turned off. Since the resistance of the first resistor R1 is large, the power supply current Icc is basically 0. When the first control signal Ctrl1 is invalid, the leakage detection is exited, the fourth transistor Q4 is turned off, the first resistor R1 and the voltage regulator Z1 are connected in series between the second diode D2 and the power supply terminal Vcc, the voltage regulator Z1 is broken down, and the voltage of the third node is pulled up to a high level, so that the third transistor Q3 is turned on. The threshold voltage Vz1 of the voltage regulator Z1 affects the power supply current Icc, and the threshold voltage of the third transistor Q3 is Vth, Icc=(Vz1-Vth) / R2. The second diode D2 is connected between the third transistor Q3 and the first transistor Q1 to prevent the backflow of the first capacitor C1. During leakage detection, the first capacitor C1 can maintain the power supply of the drive circuit 220.

[0110] Figure 7 FIG. 2 shows a circuit diagram of an input detection module provided by an embodiment of the present invention. Figure 7 As shown, the input detection module 221 includes a pulse generating unit 2211 and an input detection unit.

[0111] The pulse generating unit 2211 is used for generating a first control signal Ctrl1 according to the DC bus voltage Vbus and the first preset voltage Vr1.

[0112] In this embodiment, see Figure 8 , the pulse generating unit 2211 includes a third resistor R3, a fourth resistor R4, a first comparator C1, a timer, a logic OR gate, a first monostable pulse unit and a second monostable pulse unit. The third resistor R3 and the fourth resistor R4 are connected in series between the DC bus voltage Vbus and the ground terminal, and the first node between the third resistor R3 and the fourth resistor R4 outputs the first voltage Va. The first input terminal of the first comparator C1 is connected to the first node, the second input terminal receives the first preset voltage, and the output terminal outputs the first comparison signal Vc1; the input terminal of the first monostable pulse unit receives the first comparison signal Vc1, and the output terminal of the first monostable pulse unit outputs the second pulse signal, and the second pulse signal periodically resets the timer. The timer is used to generate a clock signal; the logic OR gate is respectively connected to the output terminal of the first monostable pulse and the timer, and generates a first logic signal according to the first comparison signal and the clock signal; the second monostable pulse unit generates a first control signal Ctrl1 according to the first logic signal.

[0113] See also Fig.11 The input end of the rectifier bridge 210 receives the AC input voltage Vac. When the first voltage Va representing the DC bus voltage Vbus exceeds the first preset voltage Vr1, the first comparator C1 outputs a high level, otherwise it outputs a low level. The first control signal Ctrl1 is a pulse signal with a certain pulse width.

[0114] See also Fig.12 , the input end of the rectifier bridge 210 receives the DC bus voltage Vdc, the first comparator C1 outputs a high level or a low level, and the timer cannot be reset periodically. The period of the clock signal output by the timer is greater than the period of the AC input voltage. When the first voltage Va representing the DC bus voltage Vbus exceeds the first preset voltage Vr1, the first comparator C1 outputs a high level, and the period of the first control signal Ctrl1 is determined by the period of the clock signal.

[0115] When the first control signal Ctrl1 output by the input detection unit is valid, the second control signal Ctrl2 is generated according to the DC bus voltage Vbus and the bypass current sampling signal Vs.

[0116] refer to Fig. 9 In this embodiment, the input detection unit includes a voltage detection unit 2212 , a current detection unit 2213 and a latch unit 2214 .

[0117] The voltage detection unit 2212 is used to generate a voltage detection signal according to the DC bus voltage Vbus and the first reference voltage Vref1; the current detection unit 2213 is used to generate a current detection signal according to the bypass current sampling signal Vs and the second reference voltage Vref2; the latch unit 2214 generates a second control signal Ctrl2 according to the first control signal, the voltage detection signal and the current detection signal.

[0118] In this embodiment, the voltage detection unit 2212 includes a third resistor R3, a fourth resistor R4, a subtractor, a sampling and holding unit, and a second comparator C2. The third resistor R3 and the fourth resistor R4 are connected in series between the DC bus voltage Vbus and the ground terminal, and the first node between the third resistor R3 and the fourth resistor R4 outputs the first voltage Va. The divided voltage Vsh of the DC bus voltage is sampled and held when the first control signal Ctrl1 triggers an edge, and the trigger edge is, for example, a rising edge; the subtractor is respectively connected to the second comparator C2 and the sampling and holding unit, receives the divided voltage Vsh of the DC bus voltage and the first voltage Va, and outputs the difference voltage Vx between the divided voltage Vsh of the DC bus voltage and the first voltage Va, Vx=Vsh-Va. The first input terminal of the second comparator C2 receives the difference voltage Vx, the second input terminal receives the first reference voltage Vref1, and the output terminal outputs the second comparison signal Vc2 as a voltage detection signal. When the difference voltage Vx is less than the first reference voltage Vref1 (ie, Vx<Vref1), the second comparison signal Vc2 is at a high level, otherwise, the second comparison signal Vc2 is at a low level.

[0119] The current detection unit 2213 includes a third comparator C3 and a third monostable pulse unit, wherein the first input terminal of the third comparator C3 receives the bypass current sampling signal Vs, the second input terminal receives the second reference voltage Vref2, the output terminal outputs the third comparison signal Vc3, and outputs the current detection signal Vd through the third monostable pulse unit, and the current detection signal Vd is a narrow pulse width square wave. If the DC bus voltage Vbus is high enough, the current detection unit 2213 can detect the bypass current sampling signal Vs. Specifically, when the bypass current sampling signal Vs is greater than the second reference voltage Vref2 (i.e., Vs>Vref2), the second comparison signal Vc3 output by the third comparator C3 is a high level, and a narrow pulse width square wave is output through the third monostable pulse.

[0120] The latch unit 2214 includes a logic AND gate, a judgment module and an RS trigger. The input end of the logic AND gate is connected to the voltage detection unit 2212 and the current detection unit 2213 respectively, and a second logic signal is generated according to the voltage detection signal and the current detection signal. The judgment module judges whether the second logic signal is at a high level for multiple times in a row according to the first control signal Ctrl1 to generate a detection signal; when the second logic signal is judged to be at a high level for multiple times in a row, the detection signal is at a high level, indicating that the input is normal; if the second logic signal is at a low level during multiple consecutive judgments, the detection signal is at a low level, indicating that the input is abnormal. The set end of the RS trigger is connected to the judgment unit, the reset end is grounded, and the output end outputs the second control signal Ctrl2.

[0121] See also Fig.13 , if the DC bus voltage is normal, when the first control signal Ctrl1 is valid, the divided voltage Vsh of the DC bus voltage is always less than or equal to Va, so the difference voltage Vx is at a low level, and the second comparison signal Vc2 output by the second comparator C2 is always at a high level. At the same time, the bypass current rises in a linear or parabolic curve, and when the bypass current sampling signal Vs reaches the second reference voltage Vref2, the current detection signal Vd is output. If the voltage detection signal Vc2 and the current detection signal Vd are both at a high level for multiple consecutive times, the second control signal Ctrl2 is locked at a high level.

[0122] See also Fig.14 If electric shock occurs, it is equivalent to inputting an impedance of more than 500Ω in series, causing the bypass current to lower the DC bus voltage Vbus. When the first control signal Ctrl1 is valid, the input divided voltage Vsh will be greater than the first voltage Va, the difference voltage Vx will be greater than the first reference voltage Vref1, and the second comparison signal Vc2 output by the second comparator C2 will be low, indicating that leakage exists.

[0123] See also Fig.15 If the DC bus voltage has poor contact, for example, when the input contact is poor or other abnormal conditions occur just after power-on, resulting in a very low DC bus voltage Vbus, when the first control signal Ctrl1 is valid, the input voltage is too low, and the bypass current sampling signal Vs cannot reach the second reference voltage Vref2, so the current detection signal Vd will not be output. The latch unit will clear the previous detection signal and restart until it is normal for several consecutive times and locks the second control signal Ctrl2.

[0124] Fig.10 Circuit diagram of an input detection unit according to a second embodiment of the present invention: Compared with the first embodiment, the voltage detection unit 2212 only includes a third resistor R3, a fourth resistor R4 and a second comparator C2.

[0125] The third resistor R3 and the fourth resistor R4 are connected in series between the DC bus voltage Vbus and the ground terminal, and a first node between the third resistor R3 and the fourth resistor R4 outputs the first voltage Va.

[0126] The second comparator C2 has a first input terminal receiving the first voltage Va, a second input terminal receiving the first reference voltage Vref1 , and an output terminal outputting a second comparison signal Vc2 as a voltage detection signal.

[0127] In this embodiment, when both the bypass current sampling signal Vs and the DC bus voltage Vbus meet the preset conditions, it is judged that the DC bus voltage is normal; when either the bypass current sampling signal Vs or the DC bus voltage Vbus does not meet the preset conditions, it is judged that the input is abnormal and there may be leakage. The preset condition is, for example, whether the bypass current sampling signal Vs and the DC bus voltage Vbus reach a threshold at the same time. Specifically, the bypass current sampling signal Vs at the third moment reaches the second threshold and the DC bus voltage Vbus at the third moment reaches the third threshold.

[0128] This embodiment is suitable for a driving circuit that uses a post-cut dimmer for dimming.

[0129] See also Fig.16 When the first control signal Ctrl1 is valid, the voltage detection signal Vc2 and the current detection signal Vd are simultaneously high level for multiple consecutive times, the second control signal Ctrl2 is locked to a high level, and it is determined that the DC bus voltage is normal.

[0130] See also Fig.17 When electric shock occurs, bypass current is generated, which will cause the DC bus voltage Vbus to drop. Therefore, when the current detection signal Vd is valid, the first voltage Va is less than the first reference voltage Vref1, and the second comparison signal Vc2 output by the second comparator C2 is at a low level, it can be determined that electric shock has occurred.

[0131] Fig.18 A circuit diagram of an LED driving device provided by another embodiment of the present invention is shown. Compared with the above embodiment, the power supply module 223 in this embodiment is not connected to the input detection module 221 and does not receive the first control signal Ctrl1.

[0132] Regardless of whether the first control signal Ctrl1 is valid, the power supply module 223 always obtains the first voltage signal Vn from the bypass module 222 and generates a power supply voltage Vcc and a power supply current Icc according to the first voltage signal Vn.

[0133] In this embodiment, see Fig.19 The power supply module 223 includes a second diode D1, a third transistor Q3, a voltage regulator tube Z1, a first resistor R1 and a second resistor R2.

[0134] Among them, the anode of the second diode D1 is connected to the bypass module 222 for receiving the first voltage signal Vn, and the cathode is connected to the power supply end Vcc via the first resistor R1 and the voltage regulator Z1, and is connected to the power supply end Vcc via the third transistor Q3 and the second resistor R2; the control end of the third transistor Q3 is connected to the third node between the first resistor R1 and the voltage regulator Z1.

[0135] The remaining aspects of this embodiment are the same as those of the above embodiment and will not be described in detail here.

[0136] Fig. 20 FIG. 1 is a flow chart showing the LED driving method provided by an embodiment of the present invention. Fig. 20 , the LED driving method includes the following steps.

[0137] In step S101 , a first control signal is generated according to a DC bus voltage obtained from an input detection terminal and a first preset voltage.

[0138] In step S102, a bypass current sampling signal is generated according to a first control signal and the DC bus voltage, and a first voltage signal is generated according to the DC bus voltage.

[0139] In step S103, a supply voltage is generated according to the first voltage signal.

[0140] In step S104, a second control signal representing a state of the DC bus voltage is generated according to the DC bus voltage and the bypass current sampling signal.

[0141] In step S105 , a driving signal is generated according to the second control signal.

[0142] In this embodiment, when the DC bus voltage Vbus is greater than the first preset voltage Vr1, the input detection module 121 generates a first control signal Ctrl1, which is a pulse signal. When the first control signal Ctrl1 is valid, the leakage detection state is entered, and the bypass module 122 generates a bypass current sampling signal Vs; the input detection module 121 obtains the bypass current sampling signal Vs from the bypass module 122, and generates a second control signal Ctrl2 representing the DC bus voltage state according to the bypass current sampling signal Vs and the DC bus voltage Vbus within the preset time when the first control signal remains valid, and the DC bus voltage state includes a normal state and an abnormal state, and the abnormal state includes a leakage state and a poor contact state; when the first control signal Ctrl1 is invalid, the leakage detection state is exited.

[0143] Specifically, in the leakage detection state, when the bypass current sampling signal Vs and the DC bus voltage Vbus both meet the preset conditions, the DC bus voltage state is judged to be normal; when any one of the bypass current sampling signal Vs and the DC bus voltage Vbus does not meet the preset conditions, the DC bus voltage state is judged to be abnormal, such as a leakage state or a poor contact state. The preset condition is, for example, that the amplitude change of the DC bus voltage Vbus at different moments is less than a threshold and the bypass current sampling signal Vs reaches a threshold. Specifically, the difference between the DC bus voltage at the first moment and the DC bus at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, and the first moment is different from the second moment. When the difference between the DC bus voltage Vbus1 at the first moment and the DC bus voltage Vbus2 at the second moment is less than the first threshold, and the bypass current sampling signal Vs at the second moment is greater than the second threshold, the DC bus voltage state is judged to be normal; when the difference between the DC bus voltage Vbus1 at the first moment and the DC bus voltage Vbus2 at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal Vs at the second moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal.

[0144] In a preferred embodiment, the preset condition is, for example, whether the bypass current sampling signal Vs and the DC bus voltage Vbus reach a threshold at the same time. Specifically, the bypass current sampling signal Vs at the third moment reaches the second threshold and the DC bus voltage Vbus at the third moment reaches the third threshold. When the DC bus voltage Vbus is greater than the third threshold and the bypass current sampling signal Vs at the current moment is greater than the second threshold, it is judged that the DC bus voltage state is normal; when the DC bus voltage Vbus is less than or equal to the third threshold, and / or the bypass current sampling signal Vs at the current moment is less than or equal to the second threshold, it is judged that the DC bus voltage state is abnormal.

[0145] When the second control signal Ctrl2 indicates that the DC bus voltage is normal, the driving module 130 is controlled to work normally; when the second control signal Ctrl2 indicates that the DC bus voltage is abnormal, the driving module 130 is controlled to be turned off and leakage detection is continued.

[0146] When the first control signal Ctrl1 is valid, the bypass module 222 outputs the bypass current sampling signal Vs to form a leakage detection loop with the input detection module 221 .

[0147] Regardless of whether the first control signal Ctrl1 is valid, the bypass module 222 outputs the first voltage signal Vn to form a power supply loop with the power supply module 223 .

[0148] In a preferred embodiment, the driving method further comprises generating a supply voltage according to the first control signal and the first voltage signal.

[0149] In this embodiment, the first voltage signal Vn supplies power to the power supply module 223. When the first control signal Ctrl1 is valid, the power supply module 223 does not generate the power supply voltage Vcc and the power supply current Icc; when the first control signal Ctrl1 is invalid, the power supply module 223 generates the power supply voltage Vcc and the power supply current Icc.

[0150] The LED driving method provided by the present invention does not need to add a pin specifically used for leakage detection, and uses the same pin to realize leakage detection and power supply for the driving circuit, thereby increasing the configurable pins of the chip.

[0151] Furthermore, the DC bus voltage is obtained by using the same pin, and a first control signal is generated according to the DC bus voltage and a preset voltage, and leakage detection is performed during the period when the first control signal is valid; the drive circuit is powered during the period when the first control signal is invalid.

[0152] Furthermore, the bypass module is reused to perform leakage detection and power the drive circuit. During leakage detection, the input detection module determines whether there is leakage based on the DC bus voltage and the bypass module; during non-leakage detection, the bypass module provides power supply current to the power supply module to form a power supply loop.

[0153] Furthermore, the power supply module obtains the first voltage signal via the input detection terminal VH and the bypass module, and generates a power supply voltage and a power supply current according to the first voltage signal, thereby reducing the number of pins of the driving circuit and lowering the cost.

[0154] The embodiments of the present invention are as described above, and these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can make good use of the present invention and the modified use based on the present invention. The scope of protection of the present invention shall be based on the scope defined by the claims of the present invention.

Claims

1. An LED driving circuit, characterized in that: include: An input detection module, connected to the input detection terminal, and generating a first control signal according to the DC bus voltage and a first preset voltage; A bypass module is connected between the input detection terminal and the ground terminal, the input terminal of the bypass module receives the first control signal, the bypass module generates a bypass current sampling signal and a first voltage signal according to the DC bus voltage, and when the first control signal is valid, the bypass module outputs the bypass current sampling signal to form a leakage detection loop with the input detection module; A power supply module, connected to the bypass module, and generating a power supply voltage according to the first voltage signal; The input detection module generates a second control signal representing a state of the DC bus voltage according to the DC bus voltage and the bypass current sampling signal; The driving module is connected to the input detection module, receives the second control signal, and is used to generate a driving signal according to the second control signal.

2. The LED driving circuit according to claim 1, characterized in that: The power supply module is also connected to the input detection module, and generates a power supply voltage according to the first control signal and the first voltage signal.

3. The LED driving circuit according to claim 1 or 2, characterized in that: The bypass module outputs a first voltage signal to form a power supply loop with the power supply module.

4. The LED driving circuit according to claim 1 or 2, characterized in that: When the first control signal is valid, when the bypass current sampling signal and the DC bus voltage both meet the preset conditions, it is judged that the DC bus voltage state is normal; when either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, it is judged that the DC bus voltage state is abnormal.

5. The LED driving circuit according to claim 1 or 2, characterized in that: When the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, it is judged that the DC bus voltage state is normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, it is judged that the DC bus voltage state is abnormal, and the first moment is different from the second moment.

6. The LED driving circuit according to claim 1 or 2, characterized in that: When the DC bus voltage is greater than the third threshold and the bypass current sampling signal at the current moment is greater than the second threshold, the DC bus voltage state is judged to be normal; when the DC bus voltage is less than or equal to the third threshold, and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal.

7. The LED driving circuit according to claim 1 or 2, characterized in that: When the DC bus voltage is greater than a first preset voltage, the input detection module generates a first control signal, and the first control signal is a pulse signal.

8. The LED driving circuit according to claim 7, characterized in that: When the first control signal is valid, the device enters into a leakage detection state; when the first control signal is invalid, the device exits from the leakage detection state.

9. The LED driving circuit according to claim 1 or 2, characterized in that: When the second control signal indicates that the DC bus voltage state is normal, the driving module is controlled to operate; when the second control signal indicates that the DC bus voltage state is abnormal, the driving module is controlled to shut down.

10. The LED driving circuit according to claim 9, characterized in that: The DC bus voltage state includes any one of a normal state, a leakage state and a poor contact state.

11. The LED driving circuit according to claim 1 or 2, characterized in that: The bypass module includes a clamping unit, a first transistor, a second transistor and a second sampling resistor, wherein the first transistor, the second transistor and the second sampling resistor are connected in series between the input detection terminal and the ground terminal; The control terminal of the first transistor is connected to the clamping unit; The control end of the second transistor is connected to the input detection module and is turned on and off according to the first control signal; A first node between the first transistor and the second transistor outputs a first voltage signal; A second node between the second transistor and the second sampling resistor outputs a bypass current sampling signal.

12. The LED driving circuit according to claim 1 or 2, characterized in that: The bypass module includes a clamping unit, a first transistor, a second transistor and a second sampling resistor. Wherein, the first transistor is connected between the input detection terminal and the power supply module; the second transistor and the second sampling resistor are connected in series between the input detection terminal and the ground terminal; The first end of the first transistor is connected to the input detection end, the second end outputs the first voltage signal, and the control end is connected to the clamping unit; The control end of the second transistor is connected to the input detection module and is turned on and off according to the first control signal; A second node between the second transistor and the second sampling resistor outputs a bypass current sampling signal.

13. The LED driving circuit according to claim 2, characterized in that: The power supply module includes a second diode, a third transistor, a fourth transistor, a voltage regulator tube, a first resistor and a second resistor; The anode of the second diode is connected to the first voltage signal, the cathode is connected to the power supply terminal via the first resistor and the voltage regulator, and is connected to the power supply terminal via the third transistor and the second resistor; the control terminal of the third transistor is connected to the third node between the first resistor and the voltage regulator; The fourth transistor is connected between the third node and the ground terminal, and a control terminal of the fourth transistor is connected to the input detection module for receiving the first control signal.

14. The LED driving circuit according to claim 1, characterized in that: The power supply module includes a second diode, a third transistor, a voltage regulator tube, a first resistor and a second resistor; Among them, the anode of the second diode is connected to the first voltage signal, the cathode is connected to the power supply end via the first resistor and the voltage regulator, and is connected to the power supply end via the third transistor and the second resistor; the control end of the third transistor is connected to the third node between the first resistor and the voltage regulator.

15. The LED driving circuit according to claim 1 or 2, characterized in that: The input detection module includes a pulse generating unit and an input detection unit. Wherein, the pulse generating unit is used to generate the first control signal according to the DC bus voltage and the first preset voltage; The input detection unit is used to generate the second control signal according to the DC bus voltage and the bypass current sampling signal within a preset time during which the first control signal remains valid.

16. The LED driving circuit according to claim 15, characterized in that: The input detection unit comprises: A voltage detection unit, generating a voltage detection signal according to the divided voltage of the DC bus voltage and a first reference voltage; A current detection unit, generating a current detection signal according to the bypass current sampling signal and the second reference voltage; The latch unit generates a second control signal according to the first control signal, a voltage detection signal and a current detection signal.

17. The LED driving circuit according to claim 15, characterized in that: The pulse generating unit includes a third resistor, a fourth resistor, a first comparator, a timer, a logic OR gate, a first monostable pulse unit and a second monostable pulse unit; The third resistor and the fourth resistor are connected in series between the DC bus voltage and the ground terminal, and a first node between the third resistor and the fourth resistor outputs a first voltage; The first comparator has a first input terminal connected to the first node, a second input terminal receiving a first preset voltage, and an output terminal outputting a first comparison signal; The input end of the first monostable pulse unit receives the first comparison signal, and the first monostable pulse unit generates a second pulse signal; The timer is used to generate a clock signal; The logic OR gate is respectively connected to the output end of the first monostable pulse unit and the timer, and generates a first logic signal according to the first comparison signal and the clock signal; The second monostable pulse unit generates a first control signal according to the first logic signal.

18. The LED driving circuit according to claim 16, characterized in that: The voltage detection unit includes a third resistor, a fourth resistor, a subtractor, a sampling and holding unit, and a second comparator. The third resistor and the fourth resistor are connected in series between the DC bus voltage and the ground terminal, and a first node between the third resistor and the fourth resistor outputs a first voltage; The sampling and holding unit samples and holds the divided voltage of the DC bus voltage when the first control signal triggers an edge; The subtractor is connected to the second comparator and the sampling and holding unit respectively, receives the divided voltage of the DC bus voltage and the first voltage, and outputs a difference voltage between the divided voltage of the DC bus voltage and the first voltage; The first input terminal of the second comparator receives the difference voltage, the second input terminal receives the first reference voltage, and the output terminal outputs a second comparison signal as a voltage detection signal.

19. The LED driving circuit according to claim 16, characterized in that: The voltage detection unit includes a third resistor, a fourth resistor and a second comparator. The third resistor and the fourth resistor are connected in series between the DC bus voltage and the ground terminal, and a first node between the third resistor and the fourth resistor outputs a divided voltage of the DC bus voltage; The first input terminal of the second comparator receives the divided voltage of the DC bus voltage, the second input terminal receives the first reference voltage, and the output terminal outputs a second comparison signal as a voltage detection signal.

20. The LED driving circuit according to claim 18 or 19, characterized in that: The current detection unit includes a third comparator and a third monostable pulse unit; Wherein, the first input terminal of the third comparator receives the bypass current sampling signal, the second input terminal receives the second reference voltage, and the output terminal outputs a third comparison signal; The third comparison signal outputs a current detection signal via a third monostable pulse unit.

21. The LED driving circuit according to claim 18 or 19, characterized in that: The latch unit includes a logic AND gate, a judgment module and an RS trigger; The input end of the logic AND gate is connected to the voltage detection unit and the current detection unit respectively, and generates a second logic signal according to the voltage detection signal and the current detection signal; The judging module judges whether the second logic signal is at a high level for multiple times continuously according to the first control signal to generate a detection signal; The set terminal of the RS flip-flop is connected to the judgment unit, the reset terminal is grounded, and the output terminal outputs the second control signal.

22. The LED driving circuit according to claim 21, characterized in that: When the judgment unit judges that the second logic signal is high level for multiple consecutive times, the output detection signal is high level, indicating that the input is normal; if the second logic signal is low level during multiple consecutive judgments, the output detection signal is low level, indicating that the input is abnormal.

23. An LED driving device, characterized in that: include: A rectifier bridge circuit, used for rectifying the AC input voltage to obtain a DC bus voltage; The LED driving circuit according to claim 1, connected to the rectifier bridge circuit; A power conversion circuit connected to the LED driving circuit; Wherein, the LED driving circuit controls the power conversion circuit to convert the DC bus voltage into a DC output signal.

24. The LED driving device according to claim 23, characterized in that: The power supply module is also connected to the input detection module, and generates a power supply voltage according to the first control signal and the first voltage signal.

25. The LED driving device according to claim 23 or 24, characterized in that: The bypass module outputs a first voltage signal to form a power supply loop with the power supply module.

26. The LED driving device according to claim 23 or 24, characterized in that: When the first control signal is valid, when the bypass current sampling signal and the DC bus voltage both meet the preset conditions, it is judged that the DC bus voltage state is normal; when either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, it is judged that the DC bus voltage state is abnormal.

27. The LED driving device according to claim 23 or 24, characterized in that: When the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, it is judged that the DC bus voltage state is normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, it is judged that the DC bus voltage state is abnormal, and the first moment is different from the second moment.

28. The LED driving device according to claim 23 or 24, characterized in that: When the DC bus voltage is greater than the third threshold and the bypass current sampling signal at the current moment is greater than the second threshold, the DC bus voltage state is judged to be normal; when the DC bus voltage is less than or equal to the third threshold, and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal.

29. The LED driving device according to claim 23 or 24, characterized in that: When the DC bus voltage is greater than a first preset voltage, the input detection module generates a first control signal, and the first control signal is a pulse signal.

30. The LED driving device according to claim 29, characterized in that: When the first control signal is valid, the device enters into a leakage detection state; when the first control signal is invalid, the device exits from the leakage detection state.

31. The LED driving device according to claim 23 or 24, characterized in that: When the second control signal indicates that the DC bus voltage state is normal, the driving module is controlled to operate; when the second control signal indicates that the DC bus voltage state is abnormal, the driving module is controlled to shut down.

32. The LED driving device according to claim 31, characterized in that: The DC bus voltage state includes any one of a normal state, a leakage state and a poor contact state.

33. A LED driving method, characterized in that: include: generating a first control signal according to a DC bus voltage obtained from an input detection terminal and a first preset voltage; generating a bypass current sampling signal according to the first control signal and the DC bus voltage and generating a first voltage signal according to the DC bus voltage, and entering a leakage detection state when the first control signal is valid; and exiting the leakage detection state when the first control signal is invalid; generating a supply voltage according to the first voltage signal; Generating a second control signal representing a state of the DC bus voltage according to the DC bus voltage and the bypass current sampling signal; A driving signal is generated according to the second control signal.

34. The driving method according to claim 33, characterized in that: Also includes: A supply voltage is generated according to the first control signal and the first voltage signal.

35. The driving method according to claim 33 or 34, characterized in that: When the first control signal is valid, when the bypass current sampling signal and the DC bus voltage both meet the preset conditions, it is judged that the DC bus voltage state is normal; when either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, it is judged that the DC bus voltage state is abnormal.

36. The driving method according to claim 33 or 34, characterized in that: When the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, it is judged that the DC bus voltage state is normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, it is judged that the DC bus voltage state is abnormal, and the first moment is different from the second moment.

37. The driving method according to claim 33 or 34, characterized in that: When the DC bus voltage is greater than the third threshold and the bypass current sampling signal at the current moment is greater than the second threshold, the DC bus voltage state is judged to be normal; when the DC bus voltage is less than or equal to the third threshold, and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage state is judged to be abnormal.

38. The driving method according to claim 33 or 34, characterized in that: When the DC bus voltage is greater than a first preset voltage, a first control signal is generated, and the first control signal is a pulse signal.

39. The driving method according to claim 33 or 34, characterized in that: When the second control signal indicates that the DC bus voltage state is normal, the driving module of the LED driving circuit is controlled to work; when the second control signal indicates that the DC bus voltage state is abnormal, the driving module is controlled to shut down.

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