Leakage protection circuit, drive circuit and leakage detection method

Abstract

A leakage current protection circuit, a driving circuit, and a leakage current detection method are disclosed. The leakage current protection circuit includes: an input detection module that generates a first control signal based on the DC bus voltage and a first preset voltage; a bypass module connected between the DC bus voltage and ground, the input of which receives the first control signal, and generates a bypass current sampling signal when the first control signal is valid; and the input detection module generating a second control signal characterizing the DC bus voltage state based on the DC bus voltage and the bypass current sampling signal. This embodiment of the invention determines whether the DC bus voltage input state is normal by simultaneously detecting whether the bypass current sampling signal and the DC bus voltage reach a threshold within a preset time.

Description

Technical Field

[0001] This article relates to the field of power electronics, specifically to leakage current protection circuits, drive circuits, and leakage current detection methods. Background Technology

[0002] LED lights are increasingly used in the lighting industry, such as in classrooms, shopping malls, and office buildings. These include fluorescent lights, which are connected to the mains power supply via a neutral wire and a live wire at each end. During installation, one end is usually installed first, followed by the other. If, while installing one end, the operator accidentally touches the electrode of the other end with their hand or other body part, a circuit is formed between the human body and the power grid, resulting in electric shock. This problem is currently solved by adding leakage current protection.

[0003] However, due to increasingly stringent energy-saving requirements, LED driver circuits for fluorescent lamps with leakage protection also need to be dimmed to adapt to different environments and requirements.

[0004] In the prior art, LED driver circuits with leakage protection and dimming functions will control the LED driver circuit to be in a closed state if they detect leakage at the input; and if they detect no electric shock at the input, the LED driver circuit will work normally and light up the LED.

[0005] One existing input detection method samples the AC input voltage at different times by detecting the pull-down current of the bus after the rectifier bridge circuit, and determines whether there is leakage by identifying changes in voltage amplitude or rate. If the LED driver circuit is connected to a trailing edge dimmer, input detection begins immediately upon power-on, detecting voltage changes. The first sampling time T1 and the second sampling time T2 may be at the critical point of the trailing edge voltage drop (see...). Figure 1a This can lead to misjudgment of excessively large changes in the input voltage amplitude or rate, resulting in the assumption of leakage and triggering false protection.

[0006] Another existing input detection method compares the detected DC bus voltage Vbus with a preset voltage Vr. When the DC bus voltage is greater than the preset voltage, a detection current Is is generated. The presence of leakage is then determined by comparing the detected current with the preset current Ir. If the LED driver circuit is connected to a leading edge dimmer, input detection begins immediately upon power-on. Because the leading edge turn-on voltage is very high (see...),... Figure 1b This can cause the detected current Is to be greater than the preset current Ir, leading to the mistaken conclusion that there is no leakage, which may result in an electric shock accident. Summary of the Invention

[0007] In view of the above, the purpose of this invention is to provide a leakage current protection circuit, a driving circuit, and a leakage current detection method, which can avoid the problem of electric shock caused by accidental contact with the human body during load installation under abnormal input conditions, thereby improving the safety during load disassembly and assembly.

[0008] According to a first aspect of the present invention, a leakage current protection circuit is provided, comprising: an input detection module connected between a DC bus voltage and ground, which generates a first control signal based on the DC bus voltage and a first preset voltage; a bypass module connected between the DC bus voltage and ground, wherein the input terminal of the bypass module receives the first control signal, and when the first control signal is valid, the bypass module generates a bypass current sampling signal; and the input detection module generates a second control signal characterizing the state of the DC bus voltage based on the DC bus voltage and the bypass current sampling signal.

[0009] Preferably, when the first control signal is valid, if both the bypass current sampling signal and the DC bus voltage meet the preset conditions, the DC bus voltage is determined to be in normal condition; if either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, the DC bus voltage is determined to be in abnormal condition.

[0010] Preferably, when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than a first threshold, and the bypass current sampling signal at the second moment is greater than a second threshold, the DC bus voltage is determined to be normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal, and the first moment and the second moment are different.

[0011] Preferably, when the DC bus voltage is greater than the third threshold and the bypass current sampling signal at the current moment is greater than the second threshold, the DC bus voltage is determined to be normal; when the DC bus voltage is less than or equal to the third threshold and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal.

[0012] Preferably, when the DC bus voltage is greater than the first preset voltage, the input detection module generates a first control signal, which is a pulse signal.

[0013] Preferably, when the first control signal is valid, the system enters the leakage current detection state; when the first control signal is invalid, the system exits the leakage current detection state.

[0014] Preferably, the control drive module operates when the second control signal indicates that the DC bus voltage is normal; and the control drive module shuts down when the second control signal indicates that the DC bus voltage is abnormal.

[0015] Preferably, the DC bus voltage status includes a normal status, a leakage status, and a poor contact status.

[0016] Preferably, the input detection module includes a pulse generation unit and an input detection unit, wherein the pulse generation unit is used to generate the first control signal based on the DC bus voltage and a first preset voltage; and the input detection unit is used to generate the second control signal based on the DC bus voltage and the bypass current sampling signal for a preset time during which the first control signal is maintained.

[0017] Preferably, the input detection unit includes: a voltage detection unit that generates a voltage detection signal based on the voltage division of the DC bus voltage and a first reference voltage; a current detection unit that generates a current detection signal based on the bypass current sampling signal and the second reference voltage; and a latching unit that generates a second control signal based on the first control signal, the voltage detection signal, and the current detection signal.

[0018] Preferably, the pulse generating unit includes a first resistor, a second resistor, a first comparator, a timer, a logic OR gate, a first monostable pulse unit, and a second monostable pulse unit: wherein the first resistor and the second resistor are connected in series between the DC bus voltage and ground, and a first node between the first resistor and the second resistor outputs a first voltage; the first input terminal of the first comparator is connected to the first node, the second input terminal receives a first preset voltage, and the output terminal outputs a first comparison signal; the input terminal of the first monostable pulse unit receives the first comparison signal, and the first monostable pulse unit generates a second pulse signal; the timer is used to generate a clock signal; the logic OR gate is connected to the output terminal of the first monostable pulse unit and the timer respectively, and generates a first logic signal according to the first comparison signal and the clock signal; the second monostable pulse unit generates a first control signal according to the first logic signal.

[0019] Preferably, the voltage detection unit includes a first resistor, a second resistor, a subtractor, a sample-and-hold unit, and a second comparator. The first and second resistors are connected in series between the DC bus voltage and ground, and a first voltage is output at a first node between the first and second resistors. The holding unit samples and holds the divided DC bus voltage at the trigger edge of the first control signal. The subtractor is connected to both the second comparator and the sample-and-hold unit, receiving the divided DC bus voltage and the first voltage, and outputting the voltage difference between the divided DC bus voltage and the first voltage. The first input of the second comparator receives the voltage difference, the second input receives a first reference voltage, and the output outputs a second comparison signal as a voltage detection signal.

[0020] Preferably, the voltage detection unit includes a first resistor, a second resistor, and a second comparator, wherein the first resistor and the second resistor are connected in series between the DC bus voltage and ground, and the first node between the first resistor and the second resistor outputs a voltage divider of the DC bus voltage; the first input terminal of the second comparator receives the voltage divider of the DC bus voltage, the second input terminal receives a first reference voltage, and the output terminal outputs a second comparison signal as a voltage detection signal.

[0021] Preferably, the current detection unit includes a third comparator and a third monostable pulse unit; wherein, the first input terminal of the third comparator receives the bypass current sampling signal, the second input terminal receives the second reference voltage, and the output terminal outputs the third comparison signal;

[0022] The third comparison signal is output as a current detection signal via the third monostable pulse unit.

[0023] Preferably, the latching unit includes an AND gate, a judgment unit, and an RS flip-flop; wherein, the input terminals of the AND gate are respectively connected to the voltage detection unit and the current detection unit, and a second logic signal is generated based on the voltage detection signal and the current detection signal; the judgment unit judges multiple times consecutively based on the first control signal whether the second logic signal is high level to generate a detection signal; the set terminal of the RS flip-flop is connected to the judgment unit, the reset terminal is grounded, and the output terminal outputs the second control signal.

[0024] Preferably, when the judgment unit judges the second logic signal to be high level multiple times in a row, the output detection signal is high level, indicating that the DC bus voltage state is normal; when the second logic signal is low level during multiple consecutive judgments, the output detection signal is low level, indicating that the DC bus voltage state is abnormal.

[0025] Preferably, the bypass module includes a reference generation unit, an operational amplifier, a first transistor, and a third resistor. The reference generation unit generates a reference signal according to the first control signal. The first transistor and the third resistor are connected in series between the DC bus voltage and ground. The second node between the first transistor and the third resistor outputs the bypass current sampling signal. The first terminal of the operational amplifier receives the reference signal, the second terminal is connected to the second node, and the output terminal is connected to the control terminal of the first transistor.

[0026] Preferably, the first output terminal and the second output terminal of the DC bus voltage are respectively the first output terminal and the second output terminal of the rectifier bridge.

[0027] Preferably, the input terminals of the rectifier bridge are connected to a first diode and a second diode, respectively, and the first diode and the second diode provide the DC bus voltage.

[0028] According to another aspect of the present invention, a drive circuit is provided, comprising: a leakage protection circuit as described above; and a drive module connected to the leakage protection circuit, which receives a second control signal. When the DC bus is in an abnormal state, the second control signal controls the drive module not to supply power to the load, and when the DC bus is in a normal state, the second control signal controls the drive module to supply power to the load.

[0029] According to a third aspect of the present invention, a leakage current detection method is provided, comprising: generating a first control signal based on a DC bus voltage and a first preset voltage; generating a bypass current sampling signal when the first control signal is valid; and generating a second control signal characterizing the state of the DC bus voltage based on the DC bus voltage and the bypass current sampling signal.

[0030] Preferably, when the first control signal is valid, if both the bypass current sampling signal and the DC bus voltage meet the preset conditions, the DC bus voltage is determined to be in normal condition; if either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, the DC bus voltage is determined to be in abnormal condition.

[0031] Preferably, when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than a first threshold, and the bypass current sampling signal at the second moment is greater than a second threshold, the DC bus voltage is determined to be normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal, and the first moment and the second moment are different.

[0032] Preferably, when the DC bus voltage is greater than the third threshold and the bypass current sampling signal at the current moment is greater than the second threshold, the DC bus voltage is determined to be normal; when the DC bus voltage is less than or equal to the third threshold and / or the bypass current sampling signal at the current moment is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal.

[0033] Preferably, a first control signal is generated when the DC bus voltage is greater than the first preset voltage, and the first control signal is a pulse signal.

[0034] Preferably, when the first control signal is valid, the system enters the leakage current detection state; when the first control signal is invalid, the system exits the leakage current detection state.

[0035] Preferably, the control drive module operates when the second control signal indicates that the DC bus voltage is normal; and the control drive module shuts down when the second control signal indicates that the DC bus voltage is abnormal.

[0036] Preferably, the DC bus voltage state includes any one of the following: normal state, leakage state, and poor contact state.

[0037] This invention determines whether the DC bus voltage input state is normal by detecting whether the bypass current sampling signal and the DC bus voltage reach a threshold within a preset time. This can avoid the problem of electric shock caused by accidental contact with the load during installation when the input is abnormal, thereby improving the safety of the load installation and removal process.

[0038] Furthermore, by sampling the bypass current, false judgments due to poor contact and low DC bus voltage can be avoided; at the same time, detecting the bypass current sampling signal and detecting the DC bus voltage can prevent the pre-cut dimmer from being accidentally turned on when there is an electric shock, and can also prevent the post-cut dimmer from being falsely protected during normal operation. Attached Figure Description

[0039] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings.

[0040] Figure 1a and Figure 1b Waveform diagrams of LED driving circuits in the prior art are shown respectively;

[0041] Figure 2 A schematic circuit diagram of a drive circuit for a leakage current protection circuit provided in the first embodiment of the present invention is shown.

[0042] Figure 3 A circuit diagram of the input detection module of the leakage current protection circuit provided in the first embodiment of the present invention is shown;

[0043] Figure 4 A circuit diagram of the pulse generation unit provided in the first embodiment of the present invention is shown;

[0044] Figure 5 A circuit diagram of the input detection unit provided in the first embodiment of the present invention is shown;

[0045] Figure 6 A circuit diagram of an input detection unit provided according to a second embodiment of the present invention;

[0046] Figure 7 A circuit diagram of the bypass module of the leakage current protection circuit provided in the first embodiment of the present invention is shown;

[0047] Figure 8 The following is a waveform diagram of the pulse generation unit provided in an embodiment of the present invention under AC input.

[0048] Figure 9 The following is a waveform diagram of the pulse generation unit provided in an embodiment of the present invention under DC input.

[0049] Figure 10 The waveform diagram of the bypass module provided in the embodiment of the present invention is shown;

[0050] Figure 11 The diagram shows the waveform of the input detection unit provided in the first embodiment of the present invention when the DC bus voltage is normal.

[0051] Figure 12 The diagram shows the waveform of the input detection unit provided in the first embodiment of the present invention when an electric shock occurs;

[0052] Figure 13 The diagram shows the waveform of the input detection unit provided in the second embodiment of the present invention when there is poor contact of the DC bus voltage.

[0053] Figure 14 The diagram shows the waveform of the input detection unit provided in the second embodiment of the present invention when the DC bus voltage is normal.

[0054] Figure 15 The diagram shows the waveform of the input detection unit provided in the second embodiment of the present invention when an electric shock occurs;

[0055] Figure 16 A schematic circuit diagram of a drive circuit for a leakage current protection circuit provided in the third embodiment of the present invention is shown.

[0056] Figure 17 A flowchart of the leakage current detection method provided in an embodiment of the present invention is shown. Detailed Implementation

[0057] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0058] Figure 2 A schematic circuit diagram of the drive circuit of the leakage current protection circuit applying the first embodiment of the present invention is shown; as follows: Figure 2 As shown, the driving circuit includes a rectifier bridge 110, a leakage protection circuit 120, and a driving module 130. This driving circuit supplies power to a load 140, which can be a capacitive load or a purely resistive load, such as an LED load.

[0059] The rectifier bridge 110 has its first input terminal connected to the live wire L of the AC power supply line via a fuse Rfu, and its second input terminal connected to the neutral wire N of the AC power supply line, used to rectify the AC input voltage Vin. The first output terminal of the rectifier bridge 110 is connected to its second output terminal via a leakage protection circuit 120 and a drive module 130. Specifically, the first terminal of the leakage protection circuit 120 is connected to the first output terminal of the rectifier bridge 110, its second terminal is connected to the second output terminal of the rectifier bridge 110, and its third terminal is connected to the drive module 130. The drive module 130 is connected between the first and second output terminals of the rectifier bridge 110 and is also connected to the leakage protection circuit 120. The load 140 is connected in parallel between the first and second output terminals of the drive module 130.

[0060] An electric shock to the human body is equivalent to connecting a resistor Rb in series with the live wire L or neutral wire N of an AC power supply line. Generally, the human body's resistance Rb is greater than 500 ohms.

[0061] In this embodiment, after the leakage protection circuit 120 starts working, it enters the leakage detection state and sends an invalid enable signal to the drive module 130. This invalid enable signal controls the drive module 130 to turn off and not supply power to the load 140. When the leakage protection circuit 120 determines that there is a leakage phenomenon, it repeats the leakage detection until it determines that there is no leakage phenomenon. When the leakage protection circuit 120 determines that there is no leakage phenomenon, it sends an valid enable signal to the drive module 130. At this time, the valid enable signal controls the drive module 130 to turn on to supply power to the load 140.

[0062] In this embodiment, the leakage protection circuit 120 includes an input detection module 121 and a bypass module 122. The input detection module 121 is used to generate a first control signal Ctrl1 representing the detection state based on the DC bus voltage Vbus and the first preset voltage Vr1 within a preset time during which the first control signal is maintained, and to enter the leakage detection state based on the first control signal Ctrl1.

[0063] In this embodiment, when the DC bus voltage Vbus is greater than the first preset voltage Vr1, the input detection module 121 generates a first control signal Ctrl1, which is a pulse signal. When the first control signal Ctrl1 is valid, the system enters the leakage current detection state, and the bypass module 122 generates a bypass current sampling signal Vs. The input detection module 121 obtains the bypass current sampling signal Vs from the bypass module 122, and generates a second control signal Ctrl2 representing the DC bus voltage state based on the bypass current sampling signal Vs and the DC bus voltage Vbus within a preset time during which the first control signal remains valid. The DC bus voltage state includes a normal state and an abnormal state, and the abnormal state includes a leakage current state and a poor contact state. When the first control signal Ctrl1 is invalid, the system exits the leakage current detection state.

[0064] Specifically, under leakage detection mode, when both the bypass current sampling signal Vs and the DC bus voltage Vbus meet preset conditions, the DC bus voltage is determined to be normal; when either the bypass current sampling signal Vs or the DC bus voltage Vbus fails to meet the preset conditions, the DC bus voltage is determined to be abnormal, such as experiencing leakage or poor contact. These preset conditions include, for example, the amplitude change of the DC bus voltage Vbus being less than a threshold and the bypass current sampling signal Vs reaching a threshold.

[0065] Specifically, the preset conditions are that the difference between the DC bus voltage Vbus1 at the first moment and the DC bus voltage Vbus2 at the second moment is less than a first threshold, and the bypass current sampling signal Vs2 at the second moment is greater than a second threshold, and the first moment and the second moment are different. When the difference between the DC bus voltage Vbus1 at the first moment and the DC bus voltage Vbus2 at the second moment is less than the first threshold, and the bypass current sampling signal Vs2 at the second moment is greater than the second threshold, the DC bus voltage state is determined to be normal; when the difference between the DC bus voltage Vbus1 at the first moment and the DC bus voltage Vbus2 at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal Vs2 at the second moment is less than or equal to the second threshold, the DC bus voltage state is determined to be abnormal, and the first moment and the second moment are different.

[0066] The bypass module 122 is connected between the DC bus voltage and ground. The input terminal of the bypass module receives the first control signal Ctrl1. When the first control signal Ctrl1 is valid, the bypass module 122 generates a bypass current sampling signal Vs.

[0067] In this embodiment, when the first control signal Ctrl1 is valid, the DC bus voltage detection state is entered. The bypass module generates a bypass current according to the first control signal Ctrl1. If the DC bus voltage Vbus is high enough, the pull-down current changes slowly in a linear or parabolic shape on the rising and falling edges.

[0068] The input detection module 121 also generates a second control signal Ctrl2 that characterizes the DC bus voltage state based on the DC bus voltage Vbus and the bypass current sampling signal Vs.

[0069] When the second control signal Ctrl2 indicates that the DC bus voltage is normal, the drive module 130 is controlled to work normally; when the second control signal Ctrl2 indicates that the DC bus voltage is abnormal, the drive module 130 is controlled to shut down and leakage detection continues.

[0070] The leakage protection circuit and drive circuit provided in this embodiment of the invention determine whether the DC bus voltage input state is normal by detecting whether the bypass current sampling signal and the DC bus voltage reach the threshold within a preset time. This can avoid the problem of electric shock caused by accidental contact with the human body during load installation under abnormal input conditions, thereby improving the safety during load disassembly and assembly.

[0071] Furthermore, by sampling the bypass current, false judgments due to poor contact and low DC bus voltage can be avoided; at the same time, detecting the bypass current sampling signal and detecting the DC bus voltage can prevent the pre-cut dimmer from being accidentally turned on when there is an electric shock, and can also prevent the post-cut dimmer from being falsely protected during normal operation.

[0072] See Figure 3 The input detection module 121 includes a pulse generation unit 1211 and an input detection unit.

[0073] The pulse generation unit 1211 is used to generate a first control signal Ctrl1 based on the DC bus voltage Vbus and the first preset voltage Vr1.

[0074] In this embodiment, see Figure 4The pulse generation unit 1211 includes a first resistor R1, a second resistor R2, a first comparator C1, a timer, a logic OR gate, a first monostable pulse unit, and a second monostable pulse unit. The first resistor R1 and the second resistor R2 are connected in series between the DC bus voltage Vbus and ground. A first voltage Va is output from a first node between the first resistor R1 and the second resistor R2. The first input terminal of the first comparator C1 is connected to the first node, the second input terminal receives a first preset voltage, and the output terminal outputs a first comparison signal Vc1. The input terminal of the first monostable pulse unit receives the first comparison signal Vc1, and the output terminal of the first monostable pulse unit outputs a second pulse signal, which periodically resets the timer. The timer is used to generate a clock signal. The logic OR gate is connected to the output terminal of the first monostable pulse unit and the timer, respectively, and generates a first logic signal based on the first comparison signal and the clock signal. The second monostable pulse unit generates a first control signal Ctrl1 based on the first logic signal.

[0075] See Figure 8 The input terminal of rectifier bridge 110 receives AC input voltage Vac. When the first voltage Va, which represents the DC bus voltage Vbus, exceeds the first preset voltage Vr1, the first comparator C1 outputs a high level; otherwise, it outputs a low level. The first control signal Ctrl1 is a pulse signal with a certain pulse width.

[0076] See Figure 9 The input of rectifier bridge 110 receives the DC bus voltage Vdc. The first comparator C1 outputs a high or low level, preventing the timer from periodically resetting. The period of the clock signal output by the timer is greater than the period of the AC input voltage. When the first voltage Va, which characterizes the DC bus voltage Vbus, exceeds the first preset voltage Vr1, the first comparator C1 outputs a high level, and the period of the first control signal Ctrl1 is determined by the period of the clock signal.

[0077] When the first control signal Ctrl1 output by the input detection unit is valid, the second control signal Ctrl2 is generated based on the DC bus voltage Vbus and the bypass current sampling signal Vs within a preset time during which the first control signal Ctrl1 is valid.

[0078] refer to Figure 5 In this embodiment, the input detection unit includes a voltage detection unit 1212, a current detection unit 1213, and a latching unit 1214.

[0079] The voltage detection unit 1212 is used to generate a voltage detection signal based on the DC bus voltage Vbus and the first reference voltage Vref1; the current detection unit 1213 is used to generate a current detection signal based on the bypass current sampling signal Vs and the second reference voltage Vref2; the latch unit 1214 generates a second control signal Ctrl2 based on the first control signal, the voltage detection signal and the current detection signal.

[0080] In this embodiment, the voltage detection unit 1212 includes a first resistor R1, a second resistor R2, a subtractor, a sample-and-hold unit, and a second comparator C2. The first resistor R1 and the second resistor R2 are connected in series between the DC bus voltage Vbus and ground. The first node between the first resistor R1 and the second resistor R2 outputs a first voltage Va. The sample-and-hold unit is used to sample and hold the divided voltage Vsh of the DC bus voltage at the trigger edge of the first control signal Ctrl1, such as a rising edge. The subtractor is connected to the second comparator C2 and the sample-and-hold unit, respectively, and receives the divided voltage Vsh of the DC bus voltage and the first voltage Va, and outputs the difference voltage Vx between the divided voltage Vsh of the DC bus voltage and the first voltage Va, where Vx = Vsh - Va. The first input terminal of the second comparator C2 receives the difference voltage Vx, the second input terminal receives the first reference voltage Vref1, and the output terminal outputs a second comparison signal Vc2 as a voltage detection signal. When the difference voltage Vx is less than the first reference voltage Vref1 (i.e., Vx < Vref1), the second comparison signal Vc2 is high; otherwise, the second comparison signal Vc2 is low.

[0081] The current detection unit 1213 includes a third comparator C3 and a third monostable pulse unit. The first input of the third comparator C3 receives a bypass current sampling signal Vs, the second input receives a second reference voltage Vref2, and the output outputs a third comparison signal Vc3. This third monostable pulse unit then outputs a current detection signal Vd, which is a narrow-pulse square wave. If the DC bus voltage Vbus is sufficiently high, the current detection unit 1213 can detect the bypass current sampling signal Vs. Specifically, when the bypass current sampling signal Vs is greater than the second reference voltage Vref2 (i.e., Vs > Vref2), the second comparison signal Vc3 output by the third comparator C3 is high, and a narrow-pulse square wave is output via the third monostable pulse unit.

[0082] The latch unit 1214 includes an AND gate, a judgment unit, and an RS flip-flop. The inputs of the AND gate are connected to the voltage detection unit 1212 and the current detection unit 1213, respectively, and generate a second logic signal based on the voltage and current detection signals. The judgment unit continuously checks whether the second logic signal is high based on the first control signal Ctrl1 to generate a detection signal; if the second logic signal is high for several consecutive checks, the detection signal is high, indicating normal input; if the second logic signal is low during several checks, the detection signal is low, indicating abnormal input. The set terminal of the RS flip-flop is connected to the judgment unit, the reset terminal is grounded, and the output terminal outputs the second control signal Ctrl2.

[0083] See Figure 11 If the DC bus voltage is normal, when the first control signal Ctrl1 is valid, the DC bus voltage division Vsh is always less than or equal to Va, so the difference voltage Vx is low, and the second comparison signal Vc2 output by the second comparator C2 is always high. Simultaneously, the bypass current rises with a linear or parabolic curve. When the bypass current sampling signal Vs reaches the second reference voltage Vref2, the current detection signal Vd is output. If the voltage detection signal Vc2 and the current detection signal Vd are both high multiple times consecutively, the second control signal Ctrl2 is locked to a high level.

[0084] See Figure 12 If an electric shock occurs, it is equivalent to an input impedance of more than 500Ω in series, which will cause the bypass current to pull down the DC bus voltage Vbus. When the first control signal Ctrl1 is valid, the input voltage divider Vsh will be greater than the first voltage Va, the difference voltage Vx will be greater than the first reference voltage Vref1, and the second comparison signal Vc2 output by the second comparator C2 will be low, which indicates that there is a leakage phenomenon.

[0085] See Figure 13 If the DC bus voltage contact is poor, for example, when the input contact is poor right after power-on, resulting in a very low DC bus voltage Vbus, when the first control signal Ctrl1 is valid, the bypass current sampling signal Vs cannot reach the second reference voltage Vref2 because the input voltage is too low. Therefore, the current detection signal Vd will not be output. Then the latch unit will clear the previous detection signal and start again until it is normal several times in a row, and then lock the second control signal Ctrl2.

[0086] See Figure 7The bypass module 122 includes a reference generation unit, an operational amplifier, a first transistor Q1, and a third resistor R3. The reference generation unit generates a reference signal based on a first control signal Ctrl1. The rising or falling edge of the reference signal exhibits a linear or parabolic shape. The first transistor Q1 and the third resistor R3 are connected in series between the DC bus voltage Vbus and ground. A second node between the first transistor Q1 and the third resistor R3 outputs a bypass current sampling signal Vs. The first terminal of the operational amplifier receives the reference signal, the second terminal is connected to the second node, and the output terminal is connected to the control terminal of the first transistor Q1. (See also...) Figure 10 When the first control signal Ctrl1 is valid, if the DC bus voltage Vbus is high enough, the bypass current sampling signal Vs changes in accordance with the reference signal, with its rising and falling edges changing slowly in a linear or parabolic manner. The maximum value of the bypass current is also determined by the reference signal.

[0087] Figure 6 A circuit diagram of an input detection unit provided according to a second embodiment of the present invention. Compared with the first embodiment, the voltage detection unit 1212 only includes a first resistor R1, a second resistor R2, and a second comparator C2.

[0088] The first resistor R1 and the second resistor R2 are connected in series between the DC bus voltage Vbus and ground. The first node between the first resistor R1 and the second resistor R2 outputs the first voltage Va.

[0089] The first input terminal of the second comparator C2 receives the first voltage Va, the second input terminal receives the first reference voltage Vref1, and the output terminal outputs the second comparison signal Vc2 as a voltage detection signal.

[0090] In this embodiment, if both the bypass current sampling signal Vs and the DC bus voltage Vbus meet a preset condition, the DC bus voltage is determined to be normal. If either the bypass current sampling signal Vs or the DC bus voltage Vbus fails to meet the preset condition, an input anomaly is determined, potentially indicating leakage. This preset condition, for example, is whether the bypass current sampling signal Vs and the DC bus voltage Vbus reach a threshold at the same time.

[0091] Specifically, the preset conditions are that the bypass current sampling signal Vs at the third time moment reaches the second threshold and the DC bus voltage Vbus at the third time moment reaches the third threshold. When the DC bus voltage Vbus is greater than the third threshold and the bypass current sampling signal Vs at the current time moment is greater than the second threshold, the DC bus voltage state is determined to be normal; when the DC bus voltage Vbus is less than or equal to the third threshold and / or the bypass current sampling signal Vs at the current time moment is less than or equal to the second threshold, the DC bus voltage state is determined to be abnormal.

[0092] This embodiment is applicable to drive circuits that use a post-cut dimmer for dimming.

[0093] See Figure 14 When the first control signal Ctrl1 is valid, the voltage detection signal Vc2 and the current detection signal Vd are simultaneously high for multiple consecutive times, locking the second control signal Ctrl2 to high level, and determining that the DC bus voltage is normal.

[0094] See Figure 15 When an electric shock occurs, a bypass current is generated, which causes the DC bus voltage Vbus to drop. Therefore, when the current detection signal Vd is valid, the first voltage Va is less than the first reference voltage Vref1, and the second comparison signal Vc2 output by the second comparator C2 is low. This indicates that an electric shock has occurred.

[0095] Figure 16 A circuit diagram of the drive circuit for a leakage current protection circuit applying the third embodiment of the present invention is shown. Figure 2 Compared to the driving circuit of the leakage protection circuit shown, the first terminal of the leakage protection circuit 120 is connected to the input terminal of the rectifier bridge 110 through the first diode D1 and the second diode D2.

[0096] Specifically, the first diode D1 is connected between the first input terminal of the rectifier bridge 110 and the first terminal of the leakage protection circuit 120; the second diode D2 is connected between the second input terminal of the rectifier bridge 110 and the first terminal of the leakage protection circuit 120.

[0097] The remaining parts of the driving circuit in the third embodiment are the same as those in the first embodiment, and will not be described again here.

[0098] Figure 17 A flowchart illustrating the leakage current detection method provided in an embodiment of the present invention is shown. See also... Figure 17 The leakage current detection method includes the following steps.

[0099] In step S101, a first control signal is generated based on the DC bus voltage and the first preset voltage.

[0100] In step S102, a bypass current sampling signal is generated when the first control signal is valid.

[0101] In step S103, a second control signal characterizing the DC bus voltage state is generated based on the DC bus voltage and the bypass current sampling signal.

[0102] In this embodiment, when the DC bus voltage Vbus is greater than the first preset voltage Vr1, the input detection module 121 generates a first control signal Ctrl1, which is a pulse signal. When the first control signal Ctrl1 is valid, the system enters the leakage current detection state, and the bypass module 122 generates a bypass current sampling signal Vs. The input detection module 121 obtains the bypass current sampling signal Vs from the bypass module 122, and generates a second control signal Ctrl2 representing the DC bus voltage state based on the bypass current sampling signal Vs and the DC bus voltage Vbus within a preset time during which the first control signal Ctrl1 remains valid. The DC bus voltage state includes a normal state and an abnormal state, and the abnormal state includes a leakage current state and a poor contact state. When the first control signal Ctrl1 is invalid, the system exits the leakage current detection state.

[0103] Specifically, under the DC bus voltage detection state, when both the bypass current sampling signal Vs and the DC bus voltage Vbus meet preset conditions, the DC bus voltage state is determined to be normal; when either the bypass current sampling signal Vs or the DC bus voltage Vbus does not meet the preset conditions, the DC bus voltage state is determined to be abnormal, such as a leakage current or poor contact. The preset conditions are, for example, the amplitude change of the DC bus voltage Vbus at different times being less than a threshold and the bypass current sampling signal Vs reaching a threshold. Specifically, if the difference between the DC bus voltage at the first time and the DC bus voltage at the second time is less than the first threshold, and the bypass current sampling signal at the second time is greater than the second threshold, the DC bus voltage state is determined to be normal, and the first time and the second time are different.

[0104] In a preferred embodiment, the preset condition is, for example, whether the bypass current sampling signal Vs and the DC bus voltage Vbus reach a threshold at the same time. Specifically, the bypass current sampling signal Vs at the third time reaches a second threshold and the DC bus voltage Vbus at the third time reaches a third threshold.

[0105] The leakage current detection method provided in this invention determines whether the DC bus voltage input state is normal by detecting whether the bypass current sampling signal and the DC bus voltage reach the threshold within a preset time. This can avoid the problem of electric shock caused by accidental contact with the human body during load installation under abnormal input conditions, thereby improving the safety during load installation and removal.

[0106] Furthermore, by sampling the bypass current, false judgments due to poor contact and low DC bus voltage can be avoided; at the same time, detecting the bypass current sampling signal and detecting the DC bus voltage can prevent the pre-cut dimmer from being accidentally turned on when there is an electric shock, and can also prevent the post-cut dimmer from being falsely protected during normal operation.

[0107] The embodiments of the present invention are as described above. These embodiments do not exhaustively describe all details, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to make good use of the present invention and modifications based on it. The scope of protection of the present invention should be determined by the scope defined in the claims of the present invention.

Claims

1. A leakage current protection circuit, characterized in that, include: An input detection module is connected between the DC bus voltage and ground, and generates a first control signal based on the DC bus voltage and a first preset voltage; A bypass module is connected between the DC bus voltage and ground. The input terminal of the bypass module receives the first control signal. When the first control signal is valid, the bypass module generates a bypass current sampling signal. The input detection module generates a second control signal characterizing the DC bus voltage state based on the DC bus voltage and the bypass current sampling signal. When the first control signal is valid, if both the bypass current sampling signal and the DC bus voltage meet preset conditions, the DC bus voltage is determined to be in a normal state; if either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, the DC bus voltage is determined to be in an abnormal state. The bypass current sampling signal and the DC bus voltage both meet the preset conditions as follows: the change in the amplitude of the DC bus voltage is less than the corresponding threshold and the bypass current sampling signal reaches the corresponding threshold, or whether the bypass current sampling signal and the DC bus voltage reach the corresponding threshold at the same time.

2. The leakage protection circuit according to claim 1, characterized in that, When the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, the DC bus voltage is determined to be normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal, and the first moment and the second moment are different.

3. The leakage protection circuit according to claim 1, characterized in that, When the DC bus voltage is greater than the third threshold and the current bypass current sampling signal is greater than the second threshold, the DC bus voltage is determined to be normal; when the DC bus voltage is less than or equal to the third threshold and / or the current bypass current sampling signal is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal.

4. The leakage protection circuit according to claim 1, characterized in that, When the DC bus voltage is greater than the first preset voltage, the input detection module generates a first control signal, which is a pulse signal.

5. The leakage protection circuit according to claim 4, characterized in that, When the first control signal is valid, the system enters the leakage current detection state; when the first control signal is invalid, the system exits the leakage current detection state.

6. The leakage protection circuit according to claim 1, characterized in that, When the second control signal indicates that the DC bus voltage is normal, the control drive module operates; when the second control signal indicates that the DC bus voltage is abnormal, the control drive module shuts down.

7. The leakage protection circuit according to claim 6, characterized in that, The DC bus voltage status includes any one of the following: normal status, leakage status, and poor contact status.

8. The leakage current protection circuit according to claim 1, characterized in that, The input detection module includes a pulse generation unit and an input detection unit. The pulse generating unit is used to generate the first control signal based on the DC bus voltage and the first preset voltage. The input detection unit is used to generate the second control signal based on the DC bus voltage and the bypass current sampling signal within a preset time during which the first control signal is maintained.

9. The leakage protection circuit according to claim 8, characterized in that, The input detection unit includes: The voltage detection unit generates a voltage detection signal based on the voltage division of the DC bus voltage and the first reference voltage; The current detection unit generates a current detection signal based on the bypass current sampling signal and the second reference voltage; The latching unit generates a second control signal based on the first control signal, the voltage detection signal, and the current detection signal.

10. The leakage current protection circuit according to claim 9, characterized in that, The pulse generation unit includes a first resistor, a second resistor, a first comparator, a timer, a logic OR gate, a first monostable pulse unit, and a second monostable pulse unit. The first resistor and the second resistor are connected in series between the DC bus voltage and ground, and the first node between the first resistor and the second resistor outputs the first voltage. The first input terminal of the first comparator is connected to the first node, the second input terminal receives the first preset voltage, and the output terminal outputs the first comparison signal. The first monostable pulse unit receives a first comparison signal at its input terminal and generates a second pulse signal. The timer is used to generate clock signals; The logic OR gate is connected to the output of the first monostable pulse unit and the timer respectively, and generates the first logic signal according to the first comparison signal and the clock signal; The second monostable pulse unit generates a first control signal based on the first logic signal.

11. The leakage current protection circuit according to claim 9, characterized in that, The voltage detection unit includes a first resistor, a second resistor, a subtractor, a sample-and-hold unit, and a second comparator. The first resistor and the second resistor are connected in series between the DC bus voltage and ground, and the first node between the first resistor and the second resistor outputs the first voltage. The sample-and-hold unit samples and holds the DC bus voltage at the trigger edge of the first control signal; The subtractor is connected to the second comparator and the sample-and-hold unit respectively, receives the divided voltage of the DC bus voltage and the first voltage, and outputs the voltage difference between the divided voltage of the DC bus voltage and the first voltage. The first input terminal of the second comparator receives the difference voltage, the second input terminal receives the first reference voltage, and the output terminal outputs a second comparison signal as a voltage detection signal.

12. The leakage protection circuit according to claim 9, characterized in that, The voltage detection unit includes a first resistor, a second resistor, and a second comparator. The first resistor and the second resistor are connected in series between the DC bus voltage and ground, and the first node between the first resistor and the second resistor outputs a voltage divider of the DC bus voltage. The first input terminal of the second comparator receives the voltage division of the DC bus voltage, the second input terminal receives the first reference voltage, and the output terminal outputs a second comparison signal as a voltage detection signal.

13. The leakage current protection circuit according to claim 11 or 12, characterized in that, The current detection unit includes a third comparator and a third monostable pulse unit; The third comparator receives the bypass current sampling signal at its first input terminal, receives the second reference voltage at its second input terminal, and outputs the third comparison signal at its output terminal. The third comparison signal is output as a current detection signal via the third monostable pulse unit.

14. The leakage current protection circuit according to claim 11 or 12, characterized in that, The latch unit includes a logic AND gate, a judgment unit, and an RS flip-flop; The input terminals of the AND gate are connected to the voltage detection unit and the current detection unit respectively, and a second logic signal is generated based on the voltage detection signal and the current detection signal. The judgment unit continuously judges whether the second logic signal is high level multiple times based on the first control signal to generate a detection signal; The set terminal of the RS flip-flop is connected to the judgment unit, the reset terminal is grounded, and the output terminal outputs the second control signal.

15. The leakage current protection circuit according to claim 14, characterized in that, When the judgment unit continuously judges the second logic signal to be high level multiple times, the output detection signal is high level, indicating that the DC bus voltage state is normal; when the second logic signal is low level during the continuous judgment process, the output detection signal is low level, indicating that the DC bus voltage state is abnormal.

16. The leakage current protection circuit according to claim 1, characterized in that, The bypass module includes a reference generator, an operational amplifier, a first transistor, and a third resistor. The reference generation unit generates a reference signal based on the first control signal; The first transistor and the third resistor are connected in series between the DC bus voltage and ground, and the second node between the first transistor and the third resistor outputs the bypass current sampling signal. The first terminal of the operational amplifier receives a reference signal, the second terminal is connected to the second node, and the output terminal is connected to the control terminal of the first transistor.

17. The leakage current protection circuit according to claim 1, characterized in that, The first and second output terminals of the DC bus voltage are respectively the first and second output terminals of the rectifier bridge.

18. The leakage current protection circuit according to claim 1, characterized in that, The input terminals of the rectifier bridge are connected to a first diode and a second diode, respectively, and the first diode and the second diode provide the DC bus voltage.

19. A driving circuit, characterized in that, include: The leakage protection circuit as described in any one of claims 1-18; The drive module is connected to the leakage protection circuit and receives a second control signal. When the DC bus voltage is abnormal, the second control signal controls the drive module not to supply power to the load. When the DC bus voltage is normal, the second control signal controls the drive module to supply power to the load.

20. A method for detecting leakage current, characterized in that, include: A first control signal is generated based on the DC bus voltage and the first preset voltage; A bypass current sampling signal is generated when the first control signal is valid; A second control signal characterizing the DC bus voltage state is generated based on the DC bus voltage and the bypass current sampling signal. When the first control signal is valid, if both the bypass current sampling signal and the DC bus voltage meet preset conditions, the DC bus voltage is determined to be in a normal state; if either the bypass current sampling signal or the DC bus voltage does not meet the preset conditions, the DC bus voltage is determined to be in an abnormal state. The bypass current sampling signal and the DC bus voltage both meet the preset conditions as follows: the change in the amplitude of the DC bus voltage is less than the corresponding threshold and the bypass current sampling signal reaches the corresponding threshold, or whether the bypass current sampling signal and the DC bus voltage reach the corresponding threshold at the same time.

21. The leakage current detection method according to claim 20, characterized in that, When the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is less than the first threshold, and the bypass current sampling signal at the second moment is greater than the second threshold, the DC bus voltage is determined to be normal; when the difference between the DC bus voltage at the first moment and the DC bus voltage at the second moment is greater than or equal to the first threshold, and / or the bypass current sampling signal at the second moment is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal, and the first moment and the second moment are different.

22. The leakage current detection method according to claim 20, characterized in that, When the DC bus voltage is greater than the third threshold and the current bypass current sampling signal is greater than the second threshold, the DC bus voltage is determined to be normal; when the DC bus voltage is less than or equal to the third threshold and / or the current bypass current sampling signal is less than or equal to the second threshold, the DC bus voltage is determined to be abnormal.

23. The leakage current detection method according to claim 20, characterized in that, When the DC bus voltage is greater than the first preset voltage, a first control signal is generated, and the first control signal is a pulse signal.

24. The leakage current detection method according to claim 23, characterized in that, When the first control signal is valid, the system enters the leakage current detection state; when the first control signal is invalid, the system exits the leakage current detection state.

25. The leakage current detection method according to claim 20, characterized in that, When the second control signal indicates that the DC bus voltage is normal, the control drive module operates; when the second control signal indicates that the DC bus voltage is abnormal, the control drive module shuts down.

26. The leakage current detection method according to claim 25, characterized in that, The DC bus voltage status includes any one of the following: normal status, leakage status, and poor contact status.

Images