Data read-write method, system, medium and device for flash memory

Abstract

The application discloses a data read-write method and system of a flash memory, a medium and an equipment. The method comprises the following steps: determining to write data into the flash memory, and acquiring a current writing area; detecting that the storage space of the current writing area does not meet the storage requirement of the data to be written, determining a target writing area according to the current writing area, and adjusting the state value of the current writing area from being used to being full; writing the data to be written into the target writing area; detecting that the area with the full state value needs to be erased, and erasing the data in the area with the full state value. The data read-write method can greatly reduce the erasing times of the flash memory, and prolong the service life of the flash memory.

Description

Technical Field

[0001] This invention relates to the field of memory technology, and in particular to a data read / write method, system, medium, and device for a Flash memory. Background Technology

[0002] Flash memory, introduced by Intel in 1988, is a new type of semiconductor memory characterized by non-volatile storage. It is often abbreviated as flash memory and boasts significant advantages such as high integration density, fast read speed, single power supply, and high reprogramming capabilities. As a non-volatile data storage device, flash memory is widely used in embedded systems. The on-chip flash memory of a microcontroller can be programmed in-system and can also store data generated during program execution.

[0003] Flash memory's storage cells are organized into a slice array. A slice is the smallest unit for erasing, and an erase operation sets all bits within a slice to "1". Each slice can contain multiple pages, and a page is the basic unit for read and write operations. Before performing a write operation (also called a programming operation) on a page, it's necessary to check if all bits within that page are "1". If all bits are "1", the write operation can proceed; otherwise, the entire slice must be erased first. Therefore, Flash memory requires multiple erase cycles during use. However, Flash memory has a limited lifespan, and the number of erase cycles is also limited. Most current Flash memory can withstand 100,000 erase cycles. Excessive erase / write cycles can damage the entire Flash memory, thus reducing its lifespan. Summary of the Invention

[0004] This invention aims to at least partially solve one of the technical problems in related technologies. Therefore, one objective of this invention is to provide a data read / write method for Flash memory to reduce the number of erase cycles and extend the lifespan of the Flash memory.

[0005] A second objective of this invention is to provide a computer-readable storage medium.

[0006] The third objective of this invention is to provide an electronic device.

[0007] The fourth objective of this invention is to provide a data read / write system for a Flash memory.

[0008] To achieve the above objectives, a first aspect of the present invention provides a data read / write method for a Flash memory, the Flash memory comprising multiple regions, the method comprising: determining to write data to the Flash memory and obtaining the current write region; detecting that the storage space of the current write region does not meet the storage requirements of the data to be written, determining a target write region based on the current write region, and adjusting the status value of the current write region from "in use" to "full"; writing the data to be written to the target write region; detecting that a region with a status value of "full" needs to be erased, and erasing the data in the region with a status value of "full".

[0009] According to an embodiment of the present invention, the data read / write method for the Flash memory further includes, before erasing data in a region where the status value is full: detecting that there is data to be moved to the target write region in a region where the status value is full, and moving the data to be moved to the target write region.

[0010] According to an embodiment of the present invention, the data read / write method for the Flash memory, wherein determining that data in a region with a status value of "full" needs to be erased includes: counting the number of regions with a status value of "full"; detecting that the number reaches a preset threshold, and determining that data in a region with a status value of "full" needs to be erased.

[0011] According to an embodiment of the present invention, the data read / write method of the Flash memory includes a plurality of regions including static regions and dynamic regions. The method further includes: detecting that the currently written region is a dynamic region and performing a step of detecting the storage space of the currently written region; detecting that the currently written region is a static region, erasing the data in the currently written region, and writing the data to be written to the currently written region after erasing.

[0012] According to an embodiment of the present invention, the data read / write method for the Flash memory further includes: determining to read data from the Flash memory and obtaining the current read segment; verifying the data in the current read segment; and storing the data in the current read segment into a buffer when the verification is successful.

[0013] According to an embodiment of the present invention, the data read / write method for the Flash memory, wherein verifying the data in the currently read segment includes: if the currently read segment is a static segment, verifying the checksum of the data in the currently read segment; if the currently read segment is a dynamic segment, verifying the ID length, read address, and checksum of the data in the currently read segment.

[0014] According to an embodiment of the present invention, the data read / write method for the Flash memory further includes: determining the system initialization of the Flash memory, obtaining the tag value and status value of each of the segments; determining and storing the current write address and the current read address based on the tag value and status value of each of the segments.

[0015] According to an embodiment of the present invention, the data read / write method for a Flash memory, wherein determining the current write address and the current read address based on the tag value and status value of each of the memory segments includes: determining that the Flash memory is being used for the first time based on the tag value, and obtaining the current write address as a preset write address and the current read address as a preset read address; determining that the Flash memory is not being used for the first time based on the tag value, and determining that the status of each of the memory segments is normal based on the status value, indexing the current write segment based on the status value, and determining the current write address and the current read address based on the current write segment; determining that the Flash memory is not being used for the first time based on the tag value, and determining that there is a memory segment with an abnormal status based on the status value, and obtaining the current write address as a preset write address and the current read address as a preset read address.

[0016] According to an embodiment of the present invention, the data read / write method for the Flash memory includes obtaining the current write segment by: obtaining the current write segment based on the current write address; and obtaining the current read segment by: obtaining the current read segment based on the current read address.

[0017] According to an embodiment of the present invention, the data read / write method for the Flash memory, after writing the data to be written to the target write area, further includes updating the current write address and the current read address.

[0018] To achieve the above objectives, a second embodiment of the present invention provides a computer-readable storage medium storing a computer program thereon, wherein when the computer program is executed by a processor, it implements the data read / write method of the Flash memory as described above.

[0019] To achieve the above objectives, a third embodiment of the present invention provides an electronic device, including a memory, a processor, and a computer program stored on the memory. When the computer program is executed by the processor, it implements the data read / write method of the Flash memory as described above.

[0020] To achieve the above objectives, a fourth embodiment of the present invention provides a data read / write system for a Flash memory, comprising: a Flash memory and the aforementioned electronic device.

[0021] The present invention discloses a method, system, medium, and device for reading and writing data to a Flash memory. This method involves determining that data needs to be written to the Flash memory, obtaining the current write area, detecting that the storage space of the current write area does not meet the storage requirements of the data to be written, determining a target write area based on the current write area, adjusting the status value of the current write area from "in use" to "full," writing the data to be written to the target write area, detecting that a full area needs to be erased, and erasing the data in the full area. This reduces the number of erase cycles required for the Flash memory and extends its lifespan.

[0022] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0023] Figure 1 This is a flowchart of a Flash memory data read / write method according to an embodiment of the present invention;

[0024] Figure 2 This is a flowchart illustrating an example of the present invention where the erase state value is a full area.

[0025] Figure 3 This is a flowchart illustrating an example of the present invention for determining whether a full area has been erased;

[0026] Figure 4 This is a flowchart illustrating how to determine the currently written segment, as an example of the present invention.

[0027] Figure 5 This is a flowchart illustrating the Flash memory data writing process according to an embodiment of the present invention;

[0028] Figure 6 This is a flowchart illustrating the Flash memory data reading process according to an embodiment of the present invention;

[0029] Figure 7 This is a flowchart illustrating the process of determining the first use of a Flash memory according to an embodiment of the present invention;

[0030] Figure 8 This is a flowchart of Flash initialization according to an embodiment of the present invention;

[0031] Figure 9 This is a structural block diagram of a Flash memory data read / write method system according to an embodiment of the present invention. Detailed Implementation

[0032] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0033] To better understand the above technical solutions, the following will provide a detailed explanation of the technical solutions in conjunction with the accompanying drawings and specific implementation methods.

[0034] In practical applications, when storing parameters (N bytes) in Flash memory, these N bytes are typically stored directly starting from the beginning address of the Flash memory. Each rewrite also directly modifies this portion of the data. However, this results in the same number of parameter refreshes as the Flash memory's erase lifespan. To improve the data refresh rate, this invention employs a cyclic writing method to reduce the number of erases.

[0035] To facilitate the detailed explanation below, we first define the data to be written for each frame, as shown in Table 1 below:

[0036] Table 1

[0037] DataID DataLen Data1 … DataN CheckSum EOP

[0038] Here, DataID is the data ID, used to distinguish different parameters; DataLen is the data length; DataN is the data; Checksum is the checksum; and EOP is the end-of-line character.

[0039] The data structure of each region in the Flash memory is shown in Table 2 below:

[0040] Table 2

[0041]

[0042] SectorLabel indicates whether the area is marked and is also used to distinguish whether it is the first time the Flash memory is accessed; SectorStatus indicates the current status of the area, which can include three states: full, in use, and empty; Data*Len is the data Data1-N mentioned above.

[0043] Figure 1 This is a flowchart of a Flash memory data read / write method according to an embodiment of the present invention.

[0044] like Figure 1 As shown, the Flash memory contains multiple regions, and the data read / write methods of the Flash memory include:

[0045] S101, determine to write data to Flash memory, obtain the current write area.

[0046] When writing data to Flash memory, since Flash memory contains multiple regions, each with a different state (full, in use, and empty), the currently accessed region may or may not meet the storage requirements of the data to be written. Therefore, after obtaining the currently accessed region, its storage space needs to be checked. If the currently accessed region is full, it does not meet the storage requirements of the data to be written, and thus, the data cannot be written. Similarly, if the currently accessed region is in use and there is insufficient remaining space to store the data to be written, it also does not meet the storage requirements of the data to be written, and thus, the data cannot be written.

[0047] Specifically, the data to be written can be divided into dynamic data and static data, which can be distinguished by data ID; correspondingly, multiple regions can also be divided into dynamic regions and static regions. Depending on the different types of data, the type of the current region to be written will also be different, and the methods for erasing and writing data to different types of regions will also be different.

[0048] As a possible implementation method, such as Figure 4 As shown, after obtaining the current write segment, it is necessary to determine the type of the data to be written, thereby determining the type of the current write segment and executing different commands accordingly. After starting the command, the type of the data to be written is determined based on the ID of the data to be written, i.e., whether the data is dynamic or static. If the data type determines that the current write segment is a dynamic segment, it is checked whether the storage space of the current write segment meets the storage requirements of the data to be written. If the data type determines that the current write segment is a static segment, the data in the current write segment is erased, and then the data to be written is written to the current write segment.

[0049] S102, it is detected that the storage space of the current write area does not meet the storage requirements of the data to be written. The target write area is determined according to the current write area, and the status value of the current write area is adjusted from "in use" to "full".

[0050] Specifically, the current write segment can be determined by the current write address. If the current write segment pointed to by the current write address has no space to write data, the current write address (CurWrAddress) can be pointed to the next segment (i.e., the target write segment), and the status value (SectorStatus) of the current write segment can be adjusted from "in use" to "full" (i.e., from "ACTIVE" to "FULLED"). The status value of the target write segment can also be adjusted to "in use," at which point CurWrAddress points to the target write segment. If the target write segment has space to write the data to be written, the data is written to the target write segment. If the space in the target write segment is insufficient to write the data to be written, the write address CurWrAddress is changed again to the next write segment, and the status value of the previous segment is marked as "full," until a write segment that meets the writing requirements is found. This write segment is then designated as the target write segment, and the data to be written is written to the target write segment. It should be noted that if the storage space of each segment is the same, the target write segment can be found only once.

[0051] S103, write the data to be written to the target area.

[0052] When writing data to the target write area, the number of areas with a "full" status may be relatively large. To meet subsequent data writing needs, the full areas need to be erased. Therefore, after writing the data to the target area, it is necessary to check whether the areas with a "full" status need to be erased. For example, if a Flash memory has 5 areas, when the number of areas with a "full" status reaches 3, the areas with a "full" status need to be erased. It should be noted that during data writing, the areas are written cyclically. For example, if the 5 areas are labeled as area 1, area 2, area 3, area 4, and area 5, when area 1 is full, area 2 is written; when area 2 is full, area 3 is written; and so on, until area 5 is full, then area 1 is written.

[0053] Specifically, such as Figure 3As shown, when determining whether to erase data in regions with a "full" status, the system first counts the number of regions with a "full" status and checks if this number has reached a preset threshold. If it has, erasing is required, and the copy flag (CopyFlag) is set to 1. If the threshold has not been reached, erasing is not necessary, and the copy flag (CopyFlag) can be set to 0. The preset threshold is less than the total number of regions. As data is written, the number of regions with a "full" status decreases. If these regions are not erased promptly, subsequent data writing may impact efficiency. Therefore, a preset threshold is set. When data writing is complete and the number of full regions reaches the threshold, data in the full regions is erased. This ensures timely erasure, improves subsequent data writing efficiency, and reduces the number of erasures required for each data write.

[0054] S104, a region with a status value of "full" needs to be erased, and the data in the region with a status value of "full" is erased.

[0055] When the number of full regions reaches a preset threshold, it is necessary to erase the regions marked as full. Before erasing the data in the regions marked as full, in order to avoid erasing some important data, it is also necessary to determine whether there is any data to be moved to the target write region in the data of the region to be erased. At the same time, the data of the region to be erased can also be copied to other storage.

[0056] Specifically, such as Figure 2 As shown, Figure 2 This is a flowchart illustrating an example of the present invention where the erase state value is a full area.

[0057] S1041, It was detected that there is data in the area with the status value of "full" that needs to be moved to the target area.

[0058] If data in a full area is detected that needs to be erased, it is then determined whether there is any data to be moved to the target write area in the full area. If there is no data to be moved to the target area, the data in the full area can be erased in step S1043. However, if data to be moved to the target area is detected, the full area cannot be erased simply, as this would result in data loss and corruption. In this case, the data to be moved to the target write area must be moved in step S1042.

[0059] S1042, move the data to be moved to the target write area.

[0060] After the data to be moved is moved to the target write area, the data in the area that is about to be erased is all useless data. This operation protects the useful data and also expands the storage space.

[0061] S1043, erase data in areas where the status value is full.

[0062] It should be noted that after erasing a region whose status value is full, the status value needs to be adjusted to empty to allow for subsequent data writing.

[0063] Figure 5 This is a flowchart of Flash memory data writing according to an embodiment of the present invention.

[0064] like Figure 5 As shown, when writing data to the current segment, the user first inputs the ID of the data to be written, the data length (Len), and the buffer (Buff). The type of the segment to be written is determined based on the ID attribute. If it is a static segment, the data in the segment pointed to by the current fixed address is erased, and the data is filled in (data format: data ID, data length (Len), data (Data), checksum (CheckSum), and end-of-line character (EOP)). If the data filling is successful, a "Success" message is returned; otherwise, a "Fail" message is returned.

[0065] If it's a dynamic segment, the system checks if the ID is valid. If the ID is valid, it obtains the current write address from CurWrAddress. Next, it checks if there's space to write to the current write segment pointed to by that address. If there's no space, the write address (CurWrAddress) is pointed to the next segment (the target write segment), and the current write segment's status value (SectorStatus) is changed from "In Use" to "Full" (from "Active" to "FULLED"). At this point, CurWrAddress points to the address corresponding to the target write segment. If there's space to write to the current write segment, the data format is filled (data ID, data length Len, data, checksum CheckSum, and end-of-parts marker EOP). Then, it checks if the write operation was successful. If successful, the current write address CurWrAddress is recorded and used as the next read and write address. If the write operation fails, the write address CurWrAddress is updated to point to the next write address, serving as the current write address for the next write operation, and a "Fail" error is returned.

[0066] When the write operation to the target area is successful, it is necessary to check whether there is data in the full area that needs to be moved to the target area. If so, the data must be moved before the area with a full status value can be erased. After moving the data to the target area, the write address and read address are updated, and the area's status value is adjusted to empty (EMPTY) after erasure. If there is no data to be moved, the area with a full status value is directly erased, and the area's status value is adjusted to empty (EMPTY) after erasure. Finally, a "Success" write operation is returned.

[0067] The data read / write method for Flash memory in this embodiment of the invention reduces the number of times Flash memory needs to be erased and extends its lifespan by writing data to Flash memory through cyclic writing of the memory area.

[0068] In one embodiment of the present invention, the data read / write method of the Flash memory further includes: confirming the reading of data in the Flash memory, obtaining the current read segment, verifying the data in the current read segment; and storing the data in the current read segment into a buffer when the verification is successful.

[0069] The process of obtaining the current read segment is derived from the current read address. Verifying the data in the current read segment may include: if the current read segment is a static segment, verifying the checksum of the data in the current read segment; if the current read segment is a dynamic segment, verifying the ID length, read address, and checksum of the data in the current read segment.

[0070] Specifically, when the current read segment is a static segment, the checksum (such as the checksum mentioned above) of the data in the current read segment is checked; when the current read segment is a dynamic segment, the ID length, read address, and checksum (such as the checksum mentioned above) of the data in the current read segment are checked. These checks can be performed sequentially, and the read process can be terminated if any check fails.

[0071] Figure 6 This is a flowchart illustrating the Flash memory data reading process according to an embodiment of the present invention.

[0072] Specifically, such as Figure 6As shown, the Start command is executed, inputting a data ID and a Buff, where Buff is the data buffer. The attributes of the data ID are determined. If the input data ID represents static data, it is retrieved from the current read segment pointed to by the fixed address, and then its validity is checked. The method for determining the validity of the current data is to validate the data in the current read segment, i.e., to check the checksum of the current read segment. If the validation passes, the data in the current read segment is stored in the buffer Buff, and a Successful read is returned; otherwise, a Failed read is returned.

[0073] If the input data ID represents dynamic data, first check if the data ID length is valid. If invalid, return "Fail". If the data ID length is valid, read the ID data offset address from the ID data and check if the read offset address is valid. If the read offset address is invalid, return "Fail". If the read offset address is valid, verify the checksum of the data in the current read segment (i.e., check if CheckSum is valid). If the checksum is invalid, return "Fail". If the verification passes, store the data read from the current segment into the buffer "Buff", and then return "Success".

[0074] The process of reading data from the current area is relatively simple because of the address index operation of the previous data writing. It only requires the use of a checksum to ensure that the data is correct, which greatly improves the data reading efficiency of Flash.

[0075] In one embodiment of the present invention, the data read / write method of the Flash memory further includes: determining the system initialization of the Flash memory, obtaining the tag value and status value of each area; determining the current write address and the current read address based on the tag value and status value of each area and storing them.

[0076] Specifically, such as Figure 7As shown, when the system containing the Flash memory is initialized, the tag values ​​and status values ​​of each area are obtained. Based on the tag values ​​and status values ​​of each area, the current write address and the current read address are determined. The tag values ​​include used and unused, and the status values ​​include full, in use, and empty. If the Flash memory is being used for the first time, the tags (i.e., tag values) of each area need to be initialized. If the Flash memory already has data stored, the current write area, the current write address CurWrAddress, and the latest ID data offset address (i.e., the current read address) need to be indexed and stored in SRAM (Static Random-Access Memory). The current read address is stored in IdOffsetAddr[].

[0077] If the Flash memory is used for the first time based on the flag value, then the current write address is the preset write address and the current read address is the preset read address. If the Flash memory is not used for the first time, then it is necessary to determine whether the status value is normal based on the status value. If the status value determines that the status of each area is normal, then the current write area is indexed according to the status value, and the current write address and current read address are determined according to the current write area. If the status value is abnormal, that is, there is an abnormal area, then the process returns to the step of setting the current write address to the preset write address and the current read address to the preset read address.

[0078] In one embodiment of the present invention, after writing the data to be written to the target write segment, the current write address can be updated so that the current write segment can be obtained during the next write operation.

[0079] Figure 8 This is a flowchart of Flash memory initialization according to an embodiment of the present invention.

[0080] Specifically, such as Figure 8 As shown, after the start command, the Flash operation clock is configured first, and then the SectorLabel value of the currently written segment is checked. The segment has two possible values: used and unused. If the currently written segment has a label, it means data is being written to that segment, i.e., the label value is used. If the currently written segment has no label, it means the currently written segment is unused. When the currently written segment has no label, the labels for each segment are initialized. If the initialization is successful, the status values ​​of each segment are initialized. If the initialization fails, an initialization failure (Fail) is returned. If the initialization of the status values ​​of each segment fails, an initialization failure (Fail) is also returned. If the initialization of the status values ​​of each segment is successful, the current write address (Sector0+4) and the ID data offset address are initialized (the offset address is set to 0, i.e., the current read address).

[0081] When the current write segment has a tag, it means that the current write segment has been used, that is, data has been stored. At this time, the status value (SectorStatus) is used when looking up each segment. If the status is abnormal, the status value of each segment is initialized, and then the same operation as initializing the status of segments without tags is performed, which will not be repeated here. If the status is normal, the current write address is indexed and stored in SRAM, and the offset address for storing the latest ID data (i.e., the current read address) is indexed and stored in SRAM. Finally, the initialization success is returned. Performing the above operations completes the Flash initialization before use to facilitate subsequent data write and read operations.

[0082] The data read / write method for Flash memory proposed in this invention compensates for the defect of having to erase the Flash memory every time data is written by using a cyclic writing method, thereby greatly reducing the number of times the Flash memory needs to be erased and improving the lifespan of the Flash memory.

[0083] Based on the above-described data read / write method for Flash memory, this invention proposes a computer-readable storage medium.

[0084] In an embodiment of the present invention, when the computer program is executed by the processor, the data read / write method of the Flash memory described in the above embodiment is implemented.

[0085] Based on the above-described Flash memory data reading method, this invention proposes an electronic device.

[0086] In this embodiment, the electronic device includes a memory, a processor, and a computer program stored in the memory. When the computer program is executed by the processor, it implements the data read / write method of the Flash memory as described in the above embodiment.

[0087] Based on the aforementioned electronic device, this invention also proposes a data read / write system for a Flash memory.

[0088] like Figure 9 As shown, the Flash memory data read / write system 100 includes an electronic device 10 and a Flash memory 20.

[0089] The data read / write system for the Flash memory, as well as the computer-readable storage medium and electronic device of the present invention, can reduce the number of erase cycles of the Flash memory and improve its service life by using the above-described data read / write method for the Flash memory.

[0090] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0091] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0092] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0093] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0094] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0095] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0096] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0097] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A data read / write method for a Flash memory, characterized by, The Flash memory comprises a plurality of slices, and the method comprises: determining to write data into the Flash memory, and obtaining a current writing slice; detecting that a storage space of the current writing slice does not meet a storage requirement of to-be-written data, determining a target writing slice according to the current writing slice, and adjusting a state value of the current writing slice from in use to full; wherein a current state of the slice comprises three states of full, in use and empty; writing the to-be-written data into the target writing slice; detecting that data in a slice with a state value of full needs to be erased, and erasing the data in the slice with the state value of full; the determination that the data in the slice with the state value of full needs to be erased comprises: counting a number of slices with the state value of full; detecting that the number reaches a preset threshold, and determining that the data in the slice with the state value of full needs to be erased.

2. The method of reading and writing data in a Flash memory according to claim 1, wherein, Before erasing the data in the slice with the state value of full, the method further comprises: detecting that there is to-be-carried data in the slice with the state value of full, which needs to be carried to the target writing slice, and carrying the to-be-carried data to the target writing slice.

3. The method of reading and writing data in a Flash memory as claimed in claim 1, wherein, The plurality of slices comprise static slices and dynamic slices, and the method further comprises: detecting that the current writing slice is a dynamic slice, and performing the step of detecting the storage space of the current writing slice; detecting that the current writing slice is a static slice, erasing the data in the current writing slice, and writing the to-be-written data into the current writing slice after erasing.

4. The method of reading and writing data in a Flash memory as claimed in claim 3, wherein, The method further comprises: determining to read data in the Flash memory, and obtaining a current reading slice; verifying the data in the current reading slice; detecting that the verification passes, and storing the data in the current reading slice into a buffer.

5. The method of reading and writing data in a Flash memory as claimed in claim 4, wherein, The verification of the data in the current reading slice comprises: detecting that the current reading slice is a static slice, and verifying a check code of the data in the current reading slice; detecting that the current reading slice is a dynamic slice, and verifying an ID length, a reading address of the current reading slice, and a check code of the data in the current reading slice.

6. The method for reading and writing data in a Flash memory as claimed in claim 4, wherein, The method further comprises: determining that a system in which the Flash memory is located is initialized, and obtaining a mark value and a state value of each slice; determining a current writing address and a current reading address according to the mark value and the state value of each slice, and storing the current writing address and the current reading address.

7. The method of reading and writing data in a Flash memory as claimed in claim 6, wherein, The determination of the current writing address and the current reading address according to the mark value and the state value of each slice comprises: determining that the Flash memory is used for the first time according to the mark value, obtaining that the current writing address is a preset writing address and the current reading address is a preset reading address; determining that the Flash memory is not used for the first time according to the mark value, and determining that states of each slice are normal according to the state value, indexing a current writing slice according to the state value, and determining the current writing address and the current reading address according to the current writing slice. According to the mark value, it is determined that the Flash memory is not used for the first time, and according to the state value, it is determined that there is a state abnormality in the slice area, so that the current write address is a preset write address and the current read address is a preset read address.

8. The data read-write method of the Flash memory according to claim 6, characterized in that, The current write slice area is obtained by: According to the current write address, the current write slice area is obtained. The current read slice area is obtained by: According to the current read address, the current read slice area is obtained.

9. The method of reading and writing data in a Flash memory as claimed in claim 6, wherein, After the to-be-written data is written into the target write slice area, the method further comprises: updating the current write address and the current read address.

10. A computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the data read-write method of the Flash memory according to any one of claims 1-9.

11. An electronic device comprising a memory, a processor, and a computer program stored on the memory, characterized in that, The computer program is executed by the processor to implement the data read-write method of the Flash memory according to any one of claims 1-9.

12. A data read / write system for a Flash memory, characterized by, comprises: a Flash memory and the electronic device according to claim 11.

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