Display panel and display device
By connecting only part of the pixel circuit to the test circuit in the display panel, the pixel charge amount is collected to detect the transparent conductor short circuit, which solves the problem that the transparent conductor short circuit cannot be detected in the prior art, and improves the yield of the display device.
Patent Information
- Application Number
- CN202210280898.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-21
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2042-03-21
AI Technical Summary
The prior art cannot detect the problem of short circuits between adjacent transparent conductors, resulting in a low yield of the display device.
A display panel is designed in which in at least two adjacent columns of first pixel circuits, only one column of pixel circuits is connected to the test circuit, and whether the transparent conductor is short-circuited by collecting the amount of pixel charge is detected.
It effectively solves the problem of short-circuit detection of transparent conductors, improves the yield of display devices, and ensures reliable detection between transparent conductors.
Smart Images

Figure CN114639328B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art
[0002] Hiding hardware structures such as photosensitive sensors or acoustic sensors under the screen of a display device has become a new technology for increasing the screen-to-body ratio of the display device.
[0003] In the related art, the display panel in the display device with hidden hardware structure generally includes: a substrate, and a pixel circuit and a light-emitting element located on the substrate. The substrate has a first display area for normal display and a second display area for setting the hardware structure, the pixel circuit is located in the first display area, and the light-emitting element is located in the first display area and the second display area. The pixel circuit is connected to the light-emitting element to drive the light-emitting element to emit light. Summary of the invention
[0004] The present application provides a display panel and a display device, which can solve the problem that the short circuit between adjacent transparent wires cannot be detected in the related art. The technical solution is as follows:
[0005] In one aspect, a display panel is provided, the display panel comprising:
[0006] A substrate having a first display area and a second display area, wherein the first display area at least partially surrounds the second display area;
[0007] A plurality of data lines, located in the first display area;
[0008] A plurality of transparent conductive lines, located in the first display area and the second display area;
[0009] and a plurality of first pixels arranged in an array, wherein the first pixels include a first pixel circuit located in the first display area and a first light-emitting element located in the second display area, the first pixel circuit is connected to the data line and is also connected to the first light-emitting element through the transparent wire, and is used to drive the first light-emitting element to emit light based on a signal provided by the data line;
[0010] Among them, the first pixel circuits located in the same column are connected to the same data line, and in at least two adjacent columns of first pixel circuits, one column of first pixel circuits is also connected to the test circuit through the data line, and the other column of first pixel circuits is not connected to the test circuit.
[0011] Optionally, among the plurality of transparent conductive wires, at least two transparent conductive wires are located in different layers, and at least two transparent conductive wires are located in the same layer;
[0012] The transparent conductive wire connected to the first pixel circuit in one column and the transparent conductive wire connected to the first pixel circuit in another column are located in the same layer.
[0013] Optionally, the plurality of first pixels include first pixels of at least two colors;
[0014] The first pixels including the one column of first pixel circuits have the same color as the first pixels including the other column of first pixel circuits.
[0015] Optionally, for a plurality of first pixels of the same color, among the first pixel circuits included in every two adjacent columns of first pixels, the first pixel circuits in one column are connected to the test circuit via data lines, and the first pixel circuits in the other column are not connected to the test circuit.
[0016] Optionally, for multiple first pixels of the same color, first pixel circuits in first pixels located in odd columns are connected to a test circuit via data lines, and first pixel circuits in first pixels located in even columns are not connected to the test circuit.
[0017] Optionally, the plurality of first pixels include: a plurality of green first pixels, a plurality of red first pixels and a plurality of blue first pixels;
[0018] The plurality of transparent conductive lines include: a plurality of first transparent conductive lines located in the same layer, a plurality of second transparent conductive lines located in the same layer, and a plurality of third transparent conductive lines located in the same layer, and the first transparent conductive lines, the second transparent conductive lines, and the third transparent conductive lines are located in different layers respectively;
[0019] In the green first pixel, the first pixel circuit is connected to the first light-emitting element through the first transparent wire;
[0020] In the red first pixel, the first pixel circuit is connected to the first light-emitting element through the second transparent wire;
[0021] In the blue first pixel, the first pixel circuit is connected to the first light-emitting element through the third transparent wire.
[0022] Optionally, the first pixel circuit in the green first pixel is closer to the second display area than the first pixel circuit in the red first pixel, and is closer to the second display area than the first pixel circuit in the blue first pixel.
[0023] Optionally, the multiple first pixels are arranged in sequence of a red first pixel, a green first pixel, a blue first pixel and a green first pixel.
[0024] Optionally, the substrate further has a non-display area, and the non-display area at least partially surrounds the first display area; and the display panel further includes:
[0025] A plurality of test probes are located in the non-display area, the column of first pixel circuits is connected to the test probes via data lines, and the test probes are used to be connected to test pins in the test circuit.
[0026] Optionally, the first light emitting element includes: an anode and a cathode;
[0027] Among them, the first pixel circuit is connected to the anode and is used to transmit a light-emitting drive signal to the anode, the cathode is connected to a common power supply terminal, and the first light-emitting element is used to emit light based on the light-emitting drive signal and the power supply signal provided by the common power supply terminal.
[0028] Optionally, the second display area is a light-transmitting display area.
[0029] Optionally, the display panel further includes:
[0030] A plurality of second pixels, wherein the second pixels include a second pixel circuit and a second light-emitting element located in the first display area, the second pixel circuit is respectively connected to the data line and the second light-emitting element, and is used to drive the second light-emitting element to emit light based on a data signal provided by the data line.
[0031] On the other hand, a display device is provided, the display device comprising: a photosensitive sensor, and a display panel as described in the above aspect;
[0032] Wherein, the photosensor is located in the second display area of the display panel.
[0033] In summary, the beneficial effects brought about by the technical solution provided by the embodiments of the present application may at least include:
[0034] A display panel and a display device are provided. The display panel includes a substrate having a first display area and a second display area and a plurality of first pixels, wherein the pixel circuit and the light-emitting element included in the first pixel are respectively located in the first display area and the second display area, and the pixel circuit and the light-emitting element are connected through a transparent wire. Among them, in at least two adjacent columns of first pixels, only the pixel circuit included in one column of first pixels is connected to a test circuit. In this way, the test circuit can reliably detect whether a short circuit occurs in the transparent wires connected to the pixel circuits in the two adjacent columns of first pixels by collecting the pixel charge at the node where the pixel circuit is connected to the light-emitting element, thereby solving the problem in the related art that a short circuit between two transparent wires cannot be detected. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0036] Figure 1 is a structural schematic diagram of a display panel provided in an embodiment of the present application;
[0037] Figure 2 is a partial structural schematic diagram of a display panel provided in an embodiment of the present application;
[0038] Figure 3 is a schematic diagram of the structure of another display panel provided in an embodiment of the present application;
[0039] Figure 4 is a structural schematic diagram of another display panel provided in an embodiment of the present application;
[0040] Figure 5 yes Figure 4 In the structure shown, the structural layout in the second display area;
[0041] Figure 6 is a film layer structure diagram of a transparent conductive wire provided in an embodiment of the present application;
[0042] Figure 7 It is a partial structural diagram of a display panel provided in an embodiment of the present application;
[0043] Figure 8 is a schematic structural diagram of a second pixel provided in an embodiment of the present application;
[0044] Fig. 9 is a circuit structure diagram of a first pixel provided in an embodiment of the present application;
[0045] Fig.10 is a circuit structure diagram of a first pixel at one stage provided by an embodiment of the present application;
[0046] Fig.11 is a circuit structure diagram of a first pixel provided by an embodiment of the present application at another stage;
[0047] Fig.12 is a circuit structure diagram including two first pixels provided in an embodiment of the present application;
[0048] Fig.13 It is a structural schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0049] In order to make the objectives, technical solutions and advantages of the present application more clear, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.
[0050] With the advancement of display technology and the increase in consumer demand for screen-to-body ratio, the development of display panels in display devices (such as mobile phones) towards true full screens is becoming more and more urgent. In order to achieve the design of a true full screen, a series of display panels with opaque conventional display areas and translucent display areas have emerged. In this type of display panel, some hardware structures can be set in the translucent display area, so that there is no need to dig holes in the screen of the display panel. For example, the hardware structure generally includes an acoustic sensor or a photosensitive sensor (such as a camera). Taking the hardware structure as a camera as an example, in this type of display panel, the camera can be considered to be hidden under the screen, and the translucent display area can also be called the under-screen camera (full display with camera, FDC) area. The following embodiments are all described by taking the transparent display area as the FDC area as an example.
[0051] Moreover, on the basis of this setting, in order to ensure that the light transmittance of the light-transmitting display area is good, the plurality of pixel circuits that drive the plurality of light-emitting elements in the light-transmitting display area to emit light are generally arranged in the conventional display area, and the plurality of pixel circuits are connected to the plurality of light-emitting elements in the light-transmitting display area through transparent wires. However, it is precisely because the light transmittance of the transparent wires is good that when two adjacent transparent wires are short-circuited, it cannot be detected by the current AOI photography method. Moreover, during the test phase, the display panel (cell) is generally tested for lighting a monochrome screen, which will also cause the short-circuit problem of the transparent wires connected to the pixel circuits in the pixels of the same color to be unable to be detected. This will eventually lead to a low yield of the display device.
[0052] An embodiment of the present application provides a display panel, in which a short circuit problem between two adjacent transparent conductive lines can be reliably detected, thereby ensuring a good yield of the display device.
[0053] Figure 1 is a schematic diagram of the structure of a display panel provided in an embodiment of the present application. Figure 1 As shown, the display panel includes:
[0054] The substrate 01 has a first display area A1 and a second display area A2, wherein the first display area A1 at least partially surrounds the second display area A2. For example, Figure 1 The second display area A2 is located in the middle of the top of the substrate 01 and is circular. The first display area A1 is rectangular. Moreover, each side of the rectangular first display area A1 surrounds the second display area A2, that is, the second display area A2 is surrounded by the first display area A1.
[0055] Of course, in some other embodiments, the second display area A2 may not be located at Figure 1 The substrate 01 is not shown in the top middle position, but is located at other positions. Figure 1 , the second display area A2 may be located at the upper left corner or the upper right corner of the substrate 01. This embodiment of the present application does not limit this.
[0056] Moreover, in the embodiment of the present application, the first display area A1 can be set as a non-light-transmitting display area, that is, a conventional display area, and the second display area A2 can be set as a light-transmitting display area. That is, the first display area A1 recorded in the embodiment of the present application is not light-transmitting, and the second display area A2 is light-transmitting. In this way, as recorded in the above embodiment, there is no need to dig a hole in the display panel, that is, the required hardware structure such as the camera can be directly set in the second display area A2, without affecting the normal display, It lays a solid foundation for the realization of a true full screen. On this basis, the second display area A2 recorded in the embodiment of the present application can be called an FDC area.
[0057] It should be noted that the area of the first display area A1 is generally much larger than the area of the second display area A2. Figure 1 The positional relationship is merely schematically illustrated and does not limit the area of each display area.
[0058] Continue to refer Figure 1 The display panel further includes: a plurality of data lines Data located in the first display area A1, a plurality of transparent wires L1 located in the first display area A1 and located in the second display area A2, and a plurality of first pixels 02 arranged in an array. The array arrangement may mean that the plurality of first pixels 02 are arranged in rows and columns, that is, the display panel includes a plurality of rows and columns of first pixels 02.
[0059] The first pixel 02 includes a first pixel circuit 021 located in the first display area A1 and a first light-emitting element 022 located in the second display area A2. The first pixel circuit 021 is connected to the data line Data and is also connected to the first light-emitting element 022 through a transparent wire L1, and is used to drive the first light-emitting element 022 to emit light based on a signal (which may be referred to as a data signal) provided by the data line Data. For example, the first pixel circuit 021 may transmit a driving current to the first light-emitting element 022 to drive the first light-emitting element 022 to emit light.
[0060] It should be noted that each first pixel 02 may include a first pixel circuit 021 and a first light-emitting element 022, or at least some of the first pixels 02 may include a first pixel circuit 021 and a first light-emitting element 022. The embodiment of the present application is described by taking the example that each first pixel 02 includes a first pixel circuit 021 and a first light-emitting element 022.
[0061] By arranging the first pixel circuit 021 included in the first pixel 02 to be located in the first display area A1 and arranging the first pixel circuit 021 to be connected to the first light emitting element 022 via the transparent wire L1, it is possible to ensure that the second display area A2 has a better light transmission effect, ie, a higher light transmittance.
[0062] Furthermore, in the embodiment of the present application, the first pixel circuits 021 in the same column can be connected to the same data line Data, and the first pixel circuits 021 in different columns can be connected to different data lines Data, that is, multiple columns of first pixel circuits 021 can be connected to multiple data lines Data in a one-to-one correspondence.
[0063] On this basis, reference Figure 2 , the display panel includes a plurality of columns of first pixel circuits 021, and among at least two adjacent columns of first pixel circuits 021, one column of first pixel circuits 021 is also connected to a test circuit (also referred to as a test device) through a data line Data, and the other column of first pixel circuits 021 is not connected to the test circuit. That is, among at least two adjacent columns of first pixel circuits 021 recorded in the embodiment of the present application, only one column of first pixel circuits 021 may be connected to the test circuit, so that the test circuit can reliably detect whether the transparent wire L1 connected to one column of first pixel circuits 021 is short-circuited with the transparent wire L1 connected to another column of first pixel circuits 021.
[0064] For example, the test circuit may be an array test (AT) circuit, and the AT circuit may be provided with a plurality of test pins (Pins), referred to as AT Pins. Figure 2 , the first pixel circuit 021 recorded in the embodiment of the present application may be connected to the AT Pin via the data line Data, and different first pixel circuits 021 may be connected to different AT Pins. Figure 2 A total of four columns of first pixel circuits 021 are shown. From left to right, in the adjacent first column of first pixel circuits 021 and the second column of first pixel circuits 021, only the data line Data connected to the second column of first pixel circuits 021 is connected to the AT Pin. Also, in the adjacent third column of first pixel circuits 021 and the fourth column of first pixel circuits 021, only the data line Data connected to the fourth column of first pixel circuits 021 is connected to the AT Pin. Correspondingly, for the adjacent second column of first pixel circuits 021 and the third column of first pixel circuits 021, it can be considered that only the data line Data connected to the second column of first pixel circuits 021 is also connected to the AT Pin.
[0065] Combination Figure 1 and Figure 2If the transparent wire L1 connected to one column of the first pixel circuit 021 is short-circuited with the transparent wire L1 connected to another column of the first pixel circuit 021, a connection node N0 between the first pixel circuit 021 and the first light-emitting element 022 in the first column and a connection node N0 between the first pixel circuit 021 and the first light-emitting element 022 in the other column will be short-circuited. Figure 2 The short circuit problem shown. Furthermore, the pixel charge at the connection node N0 will change. Based on this, the test circuit can collect the pixel charge at the connection node N0 through the connected data line Data, and detect whether the transparent wire L1 connected to the first pixel circuit 021 in one column and the transparent wire L1 connected to the first pixel circuit 021 in another column are short-circuited based on the pixel charge. Optionally, the first light-emitting element 022 may include an anode (Anode) and a cathode (Cathode), and the first pixel circuit 021 may be connected to the anode, and accordingly, the connection node N0 may refer to a pixel anode node.
[0066] In addition, if each of the first pixel circuits 021 in two adjacent columns is connected to the test circuit via the data line Data, when the transparent wire L1 connected to the first pixel circuits 021 in the two adjacent columns is short-circuited, the pixel charge at the connection node N0 between each of the first pixel circuits 021 and the first light-emitting element 022 will be fed back to the test circuit by the data line Data, that is, the test circuit will obtain the pixel charge at the connection node N0 between each of the first pixel circuits 021 and the first light-emitting element 022 in the two adjacent columns. In this way, the pixel charge at the short-circuited connection node N0 collected by the test circuit is not very different from the pixel charge at the normal connection node N0 that is not short-circuited, or even has no difference. Further, the short-circuit problem of the transparent wire L1 cannot be reliably detected.
[0067] Combined with Figure 2 For the embodiment of the present application, since only one of the two adjacent columns of first pixel circuits 021 is connected to the test circuit via the data line Data, when the transparent wire L1 connected to the two columns of first pixel circuits 021 is short-circuited, the pixel charge at the connection node N0 between the first pixel circuit 021 not connected to the test circuit and the first light-emitting element 022 will not be transmitted to the test circuit via the data line Data connected thereto, but will be fed back to the test circuit via the data line Data connected thereto through the first pixel circuit 021 connected thereto and short-circuited thereto. At this time, the pixel charge at the short-circuited connection node N0 detected by the test circuit will be significantly greater than the pixel charge at the normal connection node N0 that is not short-circuited, and thus the short-circuit problem between the transparent wires L1 can be reliably detected.
[0068] In summary, an embodiment of the present application provides a display panel, which includes a substrate having a first display area and a second display area and a plurality of first pixels, wherein the pixel circuit and the light-emitting element included in the first pixel are respectively located in the first display area and the second display area, and the pixel circuit and the light-emitting element are connected through a transparent wire. Among them, in at least two adjacent columns of first pixels, only one column of first pixels includes a pixel circuit connected to a test circuit. In this way, the test circuit can reliably detect whether a short circuit occurs in the transparent wire connected to the pixel circuit in the two adjacent columns of first pixels by collecting the pixel charge at the node where the pixel circuit is connected to the light-emitting element, thereby solving the problem in the related art that a short circuit between two transparent wires cannot be detected.
[0069] Furthermore, by setting at least two adjacent columns of first pixel circuits so that only one column of first pixel circuits is connected to the test circuit, the pixel charge amount at the connection node where a short circuit occurs and the pixel charge amount at the connection node where a short circuit occurs collected by the test circuit can be significantly different, thereby ensuring that the test circuit can reliably detect whether a short circuit occurs between two transparent wires.
[0070] Optionally, as described in the above embodiment, the second display area A2 may be a light-transmitting display area. On the basis of arranging the camera in the second display area A2, the second display area A2 may also be called a FDC area.
[0071] Optionally, in the embodiment of the present application, the material of the transparent wire L1 may include: indium tin oxide (ITO) material. Accordingly, the transparent wire L1 may also be referred to as an ITO wiring. The following embodiments are all described by taking the transparent wire L1 as an ITO wiring as an example. Of course, in some other embodiments, the material of the transparent wire L1 may also be other transparent materials, such as indium gallium zinc oxide (IGZO), which is not limited in the embodiment of the present application.
[0072] Optional, reference Figure 3 In another display panel shown, the substrate 01 described in the embodiment of the present application may further have a non-display area B1, and the non-display area B1 may at least partially surround the first display area A1.
[0073] For example, Figure 3 In the display panel shown, the non-display area B1 of the substrate 01 is located directly above the substrate 01 and adjacent to the first display area A1. That is, only one side of the first display area A1 is surrounded by the non-display area B1. Of course, in some other embodiments, the non-display area B1 may not be located Figure 1 The substrate 01 is not shown directly above, but is located at other locations. Figure 3The non-display area B1 may be located directly below the substrate 01 and adjacent to the first display area A1. This embodiment of the present application does not limit this.
[0074] On this basis, continue to refer to Figure 3 It can be seen that the display panel may also include: a plurality of test probes (Pad) located in the non-display area B1, a column of first pixel circuits 021 may be connected to the test probes Pad via data lines Data, and the test probes Pad are used to connect to the test pins AT Pin in the test circuit AT. That is, the data lines Data connected to the first pixel circuits 021 may be indirectly connected to the test circuit via the test probes Pad located on the display panel. Accordingly, the pixel charge may be fed back to the test circuit via the data lines Data via the test probes Pad.
[0075] Optionally, among the multiple transparent wires L1 described in the embodiment of the present application, at least two transparent wires L1 may be located in different layers, and at least two transparent wires L1 may be located in the same layer. That is, at least some of the transparent wires L1 are located in the same layer, and at least another part of the transparent wires L1 are located in different layers.
[0076] On this basis, the transparent wire L1 connected to one column of first pixel circuits 021 and the transparent wire L1 connected to another column of first pixel circuits 021 may be located in the same layer. That is, in the embodiment of the present application, the connected transparent wire L1 may be located in the same layer, and in two adjacent columns of first pixel circuits 021, only one column of first pixel circuits 021 is connected to the test probe Pad through the data line Data. Accordingly, the test circuit may detect whether a short circuit occurs between two adjacent transparent wires L1 located in the same layer. Since the probability of a short circuit occurring between two adjacent transparent wires L1 located in the same layer is relatively high, such a setting ensures the reliability of the detection.
[0077] For example, refer to Figure 4 Another display panel is shown, and Figure 4 On the basis of Figure 5It can be seen from the structural layout of the second display area A2 that the multiple transparent wires L1 recorded in the embodiment of the present application may include: multiple first transparent wires L1 located in the same layer (marked as ITO1 in the figure), multiple second transparent wires L1 located in the same layer (marked as ITO2 in the figure), and multiple third transparent wires L1 located in the same layer (marked as ITO3 in the figure), and the first transparent wires L1, the second transparent wires L1 and the third transparent wires L1 are located in different layers. That is, three types of transparent wires located in different layers can be included. On this basis, the transparent wire L1 connected to a column of first pixel circuits 021 and the transparent wire L1 connected to another column of first pixel circuits 021 can both be two first transparent wires L1 (i.e., ITO1) located in the same layer, and combined with the above embodiment, the two first transparent wires L1 located in the same layer are adjacent.
[0078] Optional, Figure 6 A film layer structure diagram including ITO1 wiring, ITO2 wiring and ITO3 wiring is shown. Figure 6 It can be seen that in the direction away from the substrate 01, the ITO3 wiring, the ITO2 wiring and the ITO1 wiring are stacked in sequence. Moreover, an insulating layer (not shown in the figure) is also included between each two adjacent layers of transparent wires to insulate the two adjacent layers of transparent wires to avoid signal crosstalk. In addition, Figure 6 The connection of the ITO1 trace to the anode Anode is also shown.
[0079] Among them, being located in the same layer may refer to: using the same film-forming process to form a film layer for forming a specific pattern, and then using the same mask to pattern the film layer through a single composition process to form a layer structure. Depending on the specific pattern, a single composition process may include multiple exposure, development or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. That is, multiple elements, components, structures and / or parts located in the "same layer" are composed of the same material and are formed by the same composition process. In this way, the manufacturing process and manufacturing cost can be saved, and the manufacturing efficiency can be accelerated. In the embodiment of the present application, the transparent wire located in the same layer refers to a transparent wire formed once in the same layer using the same material.
[0080] Optionally, in an embodiment of the present application, the plurality of first pixels 02 may include first pixels 02 of at least two colors. That is, the colors of the plurality of first pixels 02 included in the display panel may be multiple. On this basis, the color of the first pixel 02 including a column of first pixel circuits 021 may be the same as the color of the first pixel 02 including another column of first pixel circuits 021. That is, in an embodiment of the present application, it may be that of the two columns of first pixels 02 of the same color, only the first pixel circuit 021 included in one column of first pixels 02 is connected to the test probe Pad through the data line Data. Among them, for the first pixels 02 of the same color, the transparent wire L1 connected to the first pixel circuit 021 included in the two adjacent columns of first pixels 02 is usually located in the same layer. Furthermore, in combination with the above-mentioned embodiment, it can be known that in an embodiment of the present application, it may be that of the two columns of first pixel circuits 021 of the same color, adjacent, and the connected transparent wire L1 is located in the same layer, only one column of first pixel circuits 021 is connected to the test probe Pad through the data line Data.
[0081] For example, combined with Figure 4 and Figure 5 It can be seen that the multiple first pixels 02 described in the embodiment of the present application may include: multiple green (Green, G) first pixels 02, multiple red (Red, R) first pixels 02 and multiple blue (Blue, B) first pixels 02. That is, the display panel may include multiple first pixels 02 of three colors: red, R, green, G, and blue. Figure 5 The anode of the first light emitting element 022 is shown. Of course, in some other embodiments, a first pixel 02 of white (W) may also be included.
[0082] Among them, in the first pixel 02 of green G, the first pixel circuit 021 can be connected to the first light-emitting element 022 through the first transparent wire L1 (i.e., ITO1 wiring). In the first pixel 02 of red R, the first pixel circuit 021 can be connected to the first light-emitting element 022 through the second transparent wire L1 (i.e., ITO2 wiring). In the first pixel 02 of blue B, the first pixel circuit 021 can be connected to the first light-emitting element 022 through the third transparent wire L1 (i.e., ITO3 wiring). Of course, in some other embodiments, for the first pixel 021 of each color, a part of the first pixel 02 can be connected to the first light-emitting element 022 through the ITO1 wiring, and another part of the first pixel 02 can be connected to the first light-emitting element 022 through the ITO2 wiring and / or the ITO3 wiring. This embodiment of the present application is not limited to this.
[0083] It should be noted that, since the efficiency of the luminescent material of the first pixel 02 of green G is the highest compared to the luminescent material efficiency of the first pixels 02 of other colors (such as the first pixel 02 of red R and the first pixel 02 of blue B), the luminescent current that needs to be loaded to the first pixel 02 of green G at the same grayscale is generally the smallest (especially obvious at low grayscale). In addition, since the parasitic capacitance Cp1 at the pixel anode node N0 of each first pixel 02 is positively correlated with the length of the connected transparent wire L1, and the larger the parasitic capacitance Cp1, the longer the charging time required before the first pixel 02 is turned on, if the parasitic capacitance Cp1 at the pixel anode node N0 of the first pixel 02 of green G is large, the turning-on speed of the first pixel 02 of green G will be significantly lower than the turning-on speed of the first pixels 02 of other colors, which will eventually cause the color coordinates of the display screen in the second display area A2 (i.e., FDC) to be abnormal and the display effect to be poor.
[0084] Based on this, when wiring (here specifically referring to the ITO wiring), the first light-emitting element 022 in the first pixel 02 of green G is preferentially connected to the first pixel circuit 021 closest to the second display area A2, ensuring that the ITO wiring (i.e., the ITO1 wiring shown in the figure) connected to the first pixel circuit 021 in the first pixel 02 of green G is the shortest, so that the parasitic capacitance Cp1 at the pixel anode node N0 in the first pixel 02 of green G is small, avoiding color coordinate abnormality. That is, if Figure 4 As shown, in the embodiment of the present application, the first pixel circuit 021 in the first pixel 02 of green G is close to the second display area A2 relative to the first pixel circuit 021 in the first pixel 02 of red R, and is close to the second display area A2 relative to the first pixel circuit 021 in the first pixel 02 of blue B. At this time, there will be a situation in which the ITO1 wiring connected to each two adjacent first pixel circuits 021 in the first pixel 02 of green G is located on the same layer, and there is a risk of short circuit in the process. If the short circuit problem cannot be detected in a timely and reliable manner, the yield of the display device finally shipped will be poor. The embodiment of the present application uses a test circuit to collect the pixel charge amount for detection, which can detect the short circuit problem in a timely and reliable manner, ensuring that the factory yield of the display device is good.
[0085] Optional, reference Figure 4It can also be seen that, along the pixel row direction, the multiple first pixels 02 can be arranged in sequence in the manner of a red R first pixel 02, a green G first pixel 02, a blue B first pixel 02 and a green G first pixel 02. Of course, in some other embodiments, the multiple first pixels 02 of different colors can also be arranged in other ways, such as a red R first pixel 02, a green G first pixel 02 and a blue B first pixel 02. The embodiment of the present application does not limit the arrangement of the first pixels 02. It should be noted that, in combination with Figure 4 , here refers to: the first light emitting element 022 of the first pixel 02 (eg, Figure 5 The arrangement of the anode Anode in the second display area A2 is shown.
[0086] Optionally, for a plurality of first pixels 02 of the same color, among the first pixel circuits 021 included in each of two adjacent columns of first pixels 02, one column of the first pixel circuits 021 may be connected to the test circuit via the data line Data, and another column of the first pixel circuits 021 may not be connected to the test circuit. That is, in the embodiment of the present application, among any two adjacent columns of first pixels 02 of the same color, only one column of the first pixel circuits 02 included in the first pixels 02 is connected to the test circuit.
[0087] For example, Figure 3 and Figure 4 Take the structure shown as an example, Figure 7 A structural equivalent diagram of a display panel is shown. Figure 7 It can be seen that for a plurality of first pixels 02 of the same color, the first pixel circuits 021 in the first pixels 02 located in odd columns may be connected to the test circuit via the data line Data, and the first pixel circuits 021 in the first pixels 02 located in even columns may not be connected to the test circuit. Figure 7 Among the first pixels 02 of green G, from left to right, the first pixel 02 in the first column, the first pixel 02 in the third column, the first pixel 02 in the fifth column, and the first pixel 02 in the seventh column are respectively connected to the test probe Pad. The first pixels 02 of other colors are similar, and will not be described in detail here. Figure 7 The test probes Pad shown are arranged in sequence along the pixel row direction, and Figure 7 The test probe Pads at different positions are numbered from 1 to 10.
[0088] Of course, in some embodiments, the first pixel circuits 021 in the first pixels 02 located in even columns may be connected to the test circuit via the data lines Data, and the first pixel circuits 021 in the first pixels 02 located in odd columns may not be connected to the test circuit. This embodiment of the application is not limited to this.
[0089] Optional, continue to refer to Figure 4 It can be seen that the display panel described in the embodiment of the present application may further include: a plurality of second pixels 03. Figure 8 It can be seen that the second pixel 03 may include a second pixel circuit 031 and a second light-emitting element 032 located in the first display area A1, the second pixel circuit 031 is connected to the data line Data and the second light-emitting element 032, respectively, and can be used to drive the second light-emitting element 032 to emit light based on the data signal provided by the data line Data. And, Figure 4 As shown, like the first pixel 02 , the second pixel 03 may also include a green G second pixel 03 , a red R second pixel 03 and a blue B second pixel 03 , and the arrangement manner is the same as the first pixel 02 , which will not be repeated here.
[0090] It should be noted that each second pixel 03 may include a second pixel circuit 031 and a second light-emitting element 032, or at least some of the second pixels 03 may include a second pixel circuit 031 and a second light-emitting element 032. The embodiment of the present application is described by taking each second pixel 03 including a second pixel circuit 031 and a second light-emitting element 032 as an example.
[0091] Optional, combined Figure 4 , the second pixel 03 located in the same column as the first pixel 02 can be connected to the same data line Data. Moreover, the first pixel 02 and the second pixel 03 located in the same column can share the same data line Data. Also, multiple rows and columns of second pixels 03 can be included between each two adjacent columns of the first pixel circuit 021, that is, each column of the first pixel circuit 021 can be interspersed between multiple second pixels 03. The first pixel circuit 021 and the first light-emitting element 022 are arranged in sequence along the pixel row direction. It should be noted that, since the first pixel circuit 021 located in the first display area A1 is not connected to the light-emitting element located in the first display area A1, the first pixel circuit 021 can also be called a dummy pixel circuit.
[0092] Optional, Fig. 9 A circuit structure diagram of a first pixel is shown. Fig. 9 As shown, in the first pixel 02, the first pixel circuit 021 may include: seven transistors T1 to T7, and a capacitor C0.
[0093] One end of the capacitor C0 may be connected to the charging power supply terminal ELVDD, and the other end may be connected to the first node N1. The capacitor C0 may be used to store the potential at the first node N1 based on the power signal provided by the charging power supply terminal ELVDD.
[0094] The gate of the first transistor T1 can be connected to the first gate signal terminal Gate1, the first electrode of the first transistor T1 can be connected to the first node N1, and the second electrode of the first transistor T1 can be connected to the second node N2. When the potential of the first gate drive signal provided by the first gate signal terminal Gate1 is an effective potential, the first transistor T1 can be turned on. At this time, the first node N1 and the second node N2 are connected, and accordingly, the potential of the first node N1 and the potential of the second node N2 can affect each other. And, when the potential of the first gate drive signal is an invalid potential, the first transistor T1 can be turned off. That is, the first transistor T1 can be used to adjust the potential of the first node N1 and the second node N2 in response to the first gate drive signal. The first transistor T1 can also be called a compensation transistor.
[0095] The gate of the second transistor T2 can be connected to the first reset signal terminal Reset1, the first electrode of the second transistor T2 can be connected to the initial power supply terminal Vinit, and the second electrode of the second transistor T2 can be connected to the first node N1. When the potential of the first reset signal provided by the first reset signal terminal Reset1 is a valid potential, the second transistor T2 can be turned on, and the initial power supply terminal Vinit can transmit the initial power supply signal to the first node N1. And, when the potential of the first reset signal is an invalid potential, the second transistor T2 can be turned off. That is, the second transistor T2 can be used to control the initial power supply terminal Vinit to transmit the initial power supply signal to the first node N1 in response to the first reset signal to reset the first node N1. The second transistor T2 can also be called a reset transistor.
[0096] The gate of the seventh transistor T7 can be connected to the second reset signal terminal Reset2, the first electrode of the seventh transistor T7 can be connected to the initial power supply terminal Vinit, and the second electrode of the seventh transistor T7 can be connected to the anode of the first light-emitting element 022 (i.e., the pixel anode node N0). When the potential of the second reset signal provided by the second reset signal terminal Reset2 is a valid potential, the seventh transistor T7 can be turned on, and the initial power supply terminal Vinit can transmit the initial power supply signal to the pixel anode node N0. And, when the potential of the second reset signal is an invalid potential, the seventh transistor T7 can be turned off. That is, the seventh transistor T7 can be used to control the initial power supply terminal Vinit to transmit the initial power supply signal to the pixel anode node N0 in response to the second reset signal to reset the pixel anode node N0. The seventh transistor T7 can also be called a reset transistor.
[0097] The gate of the fourth transistor T4 can be connected to the second gate signal terminal Gate2, the first electrode of the fourth transistor T4 can be connected to the data line Data, and the second electrode of the fourth transistor T4 can be connected to the third node N3. When the potential of the second gate drive signal provided by the second gate signal terminal Gate2 is a valid potential, the fourth transistor T4 can be turned on. At this time, the data line Data and the third node N3 are connected, and accordingly, the data line Data can transmit a data signal to the third node N3, or the data line Data can collect the potential of the third node N3 and feed it back to the test circuit. And, when the potential of the second gate drive signal is an invalid potential, the fourth transistor T4 can be turned off. That is, the fourth transistor T4 can be used to control the on and off of the data line Data and the third node N3 in response to the second gate drive signal. The fourth transistor T4 can also be called a data write transistor.
[0098] The gate of the fifth transistor T5 can be connected to the first light-emitting control terminal EM1, the first electrode of the fifth transistor T5 can be connected to the charging power supply terminal ELVDD, and the second electrode of the fifth transistor T5 can be connected to the third node N3. When the potential of the first light-emitting control signal provided by the first light-emitting control terminal EM1 is an effective potential, the fifth transistor T5 can be turned on, and at this time, the charging power supply terminal ELVDD can transmit the charging power supply signal to the third node N3. And, when the potential of the first light-emitting control signal is an invalid potential, the fifth transistor T5 can be turned off. That is, the fifth transistor T5 can be used to control the charging power supply terminal ELVDD to transmit the charging power supply signal to the second node N2 in response to the first light-emitting control signal. The fifth transistor T5 can also be called a light-emitting control transistor.
[0099] The gate of the sixth transistor T6 can be connected to the second light emitting control terminal EM2, the first electrode of the sixth transistor T6 can be connected to the second node N2, and the second electrode of the sixth transistor T6 can be connected to the pixel anode node N0. When the potential of the second light emitting control signal provided by the second light emitting control terminal EM2 is an effective potential, the sixth transistor T6 can be turned on, and at this time, the second node N2 and the pixel anode node N0 can be connected. And, when the potential of the second light emitting control signal is an invalid potential, the sixth transistor T6 can be turned off. That is, the sixth transistor T6 can be used to control the connection and disconnection of the second node N2 and the pixel anode node N0 in response to the second light emitting control signal. The sixth transistor T6 can also be called a light emitting control transistor.
[0100] The gate of the third transistor T3 can be connected to the first node N1, the first electrode of the third transistor T3 can be connected to the third node N3, and the second electrode of the third transistor T3 can be connected to the second node N2. When the potential of the first node N1 is an effective potential, the third transistor T3 can be turned on. At this time, the third transistor T3 can transmit an alternative driving signal to the second node N2 based on the potential of the first node N1 and the potential of the third node N3. When the second node N2 is connected to the pixel anode node N0, the potential of the second node N2 (that is, the alternative driving signal) can be changed into a light-emitting driving signal through the sixth transistor T6 and transmitted to the pixel anode node N0. The cathode of the first light-emitting element 022 is connected to the common power supply terminal ELVSS, and the first light-emitting element 022 can emit light under the voltage difference between the light-emitting driving signal and the power supply signal provided by the common power supply terminal ELVSS. And, when the potential of the first node N1 is an invalid potential, the third transistor T3 can be turned off. That is, the third transistor T3 can be used to transmit the alternative driving signal for generating the light emitting driving signal to the second node N2 based on the potential of the first node N1 and the potential of the third node N3. The third transistor T3 can be called a driving transistor.
[0101] As can be seen from the above-mentioned embodiments, the first pixel circuit 021 can charge and raise the potential of the pixel anode node N0 from the potential of the initial power signal (generally -3 volts V) to a certain potential (the potential after charging and raising is different under different gray scales, generally 1V to 5V) through the third transistor T3, the fifth transistor T5 and the sixth transistor T6, so that the anode and the cathode have a certain potential difference, thereby driving the light-emitting material located between the anode and the cathode to emit light, that is, making the first light-emitting element 022 emit light. The first light-emitting element 022 targeted here is an organic light emitting diode (OLED).
[0102] Of course, in some other embodiments, the first pixel circuit 021 may be connected to the cathode of the first light emitting element 022, and the anode of the first light emitting element 022 may be connected to the common power supply terminal ELVDD. That is, the anode and cathode of the first light emitting element 022 may be replaced with each other. Fig. 9 Also shown is a parasitic capacitor Cp1 at the pixel anode node N0 and a parasitic capacitor Cp2 on the data line Data. The pixel charge amount collected by the above test circuit may refer to the charge amount stored in the parasitic capacitor Cp1.
[0103] Optionally, in the embodiment of the present application, the transistors used in the first pixel circuit 021 can all be thin film transistors or field effect transistors or other devices with the same characteristics. According to the role in the circuit, the transistors used in the embodiment of the present application are mainly switching transistors. Since the source and drain of the switching transistor used here are symmetrical, the source and drain are interchangeable. In the embodiment of the present application, the source is referred to as the first electrode and the drain is referred to as the second electrode, or the drain is referred to as the first electrode and the source is referred to as the second electrode. According to the form in the accompanying drawings, the middle end of the transistor is defined as the gate, the signal input end is the source, and the signal output end is the drain. In addition, the transistors used in the embodiment of the present application may include any one of a P-type transistor and an N-type transistor, such as Figure 3 As shown, the transistors shown are all P-type transistors. Among them, the P-type transistor is turned on when the gate is at a low level and is turned off when the gate is at a high level, and the N-type transistor is turned on when the gate is at a high level and is turned off when the gate is at a low level. That is, for the P-type transistor, the effective potential can be a low potential relative to the invalid potential; for the N-type transistor, the effective potential can be a high potential relative to the invalid potential. Moreover, the effective potential and the invalid potential only represent that the potential of the signal has two different state quantities, and do not mean that the effective potential and the invalid potential have specific values.
[0104] It should be noted that Fig. 9 The first pixel circuit 021 shown can be considered as a pixel circuit with a 7T1C structure (i.e., including 7 transistors and 1 capacitor). In some other embodiments, the first pixel circuit 021 can also be a pixel circuit with other structures (such as 6T1C), which is not limited in the embodiment of the present application.
[0105] exist Fig. 9 Based on the first pixel circuit 021 shown in FIG. 1 , the principle of collecting pixel charge by the test circuit is described as follows: wherein the collection process may include two stages. In stage t1, combined with Fig.10 , by setting the signals provided by each signal terminal, only the seventh transistor T7 is turned on, and the other transistors (i.e., the first transistor T1 to the sixth transistor T6) are turned off. Then, the initial power terminal Vinit transmits the initial power signal to the pixel anode node N0 through the seventh transistor T7, thereby resetting the pixel anode node N0. In stage t2, combined with Fig.11, the signals provided by each signal terminal can be set so that the third transistor T3, the fourth transistor T4 and the sixth transistor T6 are all turned on, and the remaining transistors (i.e., the first transistor T1, the second transistor T2, the fifth transistor T5 and the seventh transistor T7) are all turned off. Furthermore, the pixel charge at the pixel anode node N0 can be fed back to the data line Data through the turned-on third transistor T3, the fourth transistor T4 and the sixth transistor T6, and then fed back to the test circuit through the detection probe PAD connected to the data line Data, so that the test circuit can analyze and determine the abnormal potential by comparing the pixel charge collected from different pixel anode nodes N0, and detect whether the transparent wires L1 are short-circuited. Fig.10 and Fig.11 In the diagram, the “×” symbol is used to indicate that the transistor is off.
[0106] by Fig. 9 Taking the first pixel circuit 021 as an example, Fig.12 The circuit structure diagram of two adjacent green G first pixels 02 located in different columns is shown, and in the two adjacent green G first pixels 02, the transparent wires L1 connected to the first pixel circuit 021 are all ITO1 wirings located in the same layer. Fig.12 It can be seen that among the two adjacent green G first pixels 02, only the first pixel circuit 021 in one of the first pixels 02 is connected to the detection probe Pad through the data line Data. Fig.12 It can be seen that the pixel anode node N0 is short-circuited. Further, the pixel charge at the short-circuited position can be fed back to the test pin AT Pin of the test circuit via the data line Data, so that the test circuit can detect the short-circuit problem timely and reliably.
[0107] It should be noted that the circuit structure of the second pixel circuit 031 included in the second pixel 03 may be the same as the circuit structure of the first pixel circuit 021. Fig. 9 Alternatively, the circuit structure of the second pixel circuit 031 may be different from the circuit structure of the first pixel circuit 021. For example, the circuit structure of the first pixel circuit 021 is Fig. 9 The circuit structure of the second pixel circuit 031 is a 7T1C structure, and the circuit structure of the second pixel circuit 031 is a 6T1C structure. This embodiment of the application does not limit this.
[0108] In summary, an embodiment of the present application provides a display panel, which includes a substrate having a first display area and a second display area and a plurality of first pixels, wherein the pixel circuit and the light-emitting element included in the first pixel are respectively located in the first display area and the second display area, and the pixel circuit and the light-emitting element are connected through a transparent wire. Among them, in at least two adjacent columns of first pixels, only one column of first pixels includes a pixel circuit connected to a test circuit. In this way, the test circuit can reliably detect whether a short circuit occurs in the transparent wire connected to the pixel circuit in the two adjacent columns of first pixels by collecting the pixel charge at the node where the pixel circuit is connected to the light-emitting element, thereby solving the problem in the related art that a short circuit between two transparent wires cannot be detected.
[0109] Furthermore, by setting at least two adjacent columns of first pixel circuits so that only one column of first pixel circuits is connected to the test circuit, the pixel charge amount at the connection node where a short circuit occurs and the pixel charge amount at the connection node where a short circuit occurs collected by the test circuit can be significantly different, thereby ensuring that the test circuit can reliably detect whether a short circuit occurs between two transparent wires.
[0110] Fig.13 A schematic diagram of the structure of a display device provided in an embodiment of the present application. Fig.13 As shown, the display device includes: a photosensor S1, and a display panel 00 as shown in the above-mentioned figures.
[0111] Among them, combined Figure 1 The light sensor S1 may be located in the second display area A2 of the display panel 00. The light sensor S1 may be used to realize the shooting function. Fig.13 A first display area A1 and a non-display area B1 are also shown.
[0112] Optionally, the second display area A2 may be rectangular, and the area of the positive projection of the light sensor S1 on the substrate 01 may be smaller than or equal to the area of the inscribed circle of the second display area A2. That is, the size of the area where the light sensor S1 is located may be smaller than or equal to the size of the inscribed circle of the second display area A2. For example, referring to Fig.13 In the display device shown, the size of the area where the light sensor S1 is located is equal to the size of the inscribed circle Y0 of the second display area A2, that is, the shape of the area where the light sensor S1 is located can be circular, and accordingly, the area where the light sensor S1 is located can also be called a light-transmitting hole. Of course, in some embodiments, the second display area A2 can also be other shapes besides a rectangle, such as an ellipse or Figure 1 The circle shown.
[0113] It should be noted that the display device may also include: an acoustic sensor, which may also be located in the second display area A2, that is, the acoustic sensor is also hidden under the screen of the display panel 00, so as to reliably increase the screen-to-body ratio of the display device. Of course, in some embodiments, other hardware structures included in the display device in addition to the photosensitive sensor and the acoustic sensor may also be set in the second display area A2.
[0114] Optional, still reference Fig.13 It can be seen that the display device provided in the embodiment of the present application may also include: a driving circuit 10, combined with Figure 1 The driving circuit 10 can be connected to a plurality of data lines Data in the display panel 00 and is used to provide data signals for the plurality of data lines Data. The driving circuit 10 can also be called a source driver integrated circuit (Driver IC).
[0115] It should be noted that Fig.13 The position of the driving circuit 10 is only schematically shown, and the driving circuit 10 may also be located on the right side, left side or upper side of the display panel 00 .
[0116] Optionally, the display device described in the embodiments of the present application may be an OLED display device, an active-matrix organic light-emitting diode (AMOLED) display device, a mobile phone, a tablet computer, a flexible display device, a television set, a monitor, or any other product or component with a display function.
[0117] The terms used in the embodiments of this application are only used to explain the embodiments of this application, and are not intended to limit this application. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of this application should be the common meanings understood by people with general skills in the field to which this application belongs.
[0118] For example, the words "first", "second" or "third" and similar words used in the patent application specification and claims of this application do not indicate any order, quantity or importance, but are only used to distinguish different components.
[0119] Likewise, the words “a” or “an” and the like do not denote a limitation of quantity, but rather denote the presence of at least one.
[0120] Words such as “include” or “comprising” and the like mean that the elements or objects preceding “include” or “comprising” include the elements or objects listed after “include” or “comprising” and their equivalents, and do not exclude other elements or objects.
[0121] "Up", "down", "left" or "right" etc. are only used to indicate relative position relationship. When the absolute position of the described object changes, the relative position relationship may also change accordingly. "Connected" or "coupled" refers to electrical connection.
[0122] "And / or" indicates that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship.
[0123] Technicians in the relevant field can clearly understand that for the convenience and simplicity of description, the specific working processes of the gate drive circuit, shift register unit, various circuits and sub-circuits described above can refer to the corresponding processes in the method embodiment and will not be repeated here.
[0124] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.
Claims
1. A display panel, characterized in that: The display panel comprises: A substrate having a first display area and a second display area, wherein the first display area at least partially surrounds the second display area; A plurality of data lines, located in the first display area; A plurality of transparent conductive lines, located in the first display area and the second display area; and a plurality of first pixels arranged in an array, wherein the first pixels include a first pixel circuit located in the first display area and a first light-emitting element located in the second display area, the first pixel circuit is connected to the data line and is also connected to the first light-emitting element through the transparent wire, and is used to drive the first light-emitting element to emit light based on a signal provided by the data line; The first pixel circuits in the same column are connected to the same data line, and in at least two adjacent columns of first pixel circuits, one column of first pixel circuits is also connected to a test circuit via the data line, and the other column of first pixel circuits is not connected to the test circuit; Furthermore, the test circuit is used to collect pixel charges at a connection node through a connected data line, and to detect whether a short circuit occurs between transparent wires connected to at least two adjacent columns of first pixel circuits by comparing pixel charges collected from different connection nodes; wherein the pixel charge at the short-circuit position is greater than the pixel charge at the non-short-circuit position, and the connection node is a node where the first pixel circuit is connected to the first light-emitting element.
2. The display panel according to claim 1, characterized in that: Among the plurality of transparent conductive lines, at least two transparent conductive lines are located in different layers, and at least two transparent conductive lines are located in the same layer; The transparent conductive wire connected to the first pixel circuit in one column and the transparent conductive wire connected to the first pixel circuit in another column are located in the same layer.
3. The display panel according to claim 1, characterized in that: The plurality of first pixels include first pixels of at least two colors; The first pixels including the one column of first pixel circuits have the same color as the first pixels including the other column of first pixel circuits.
4. The display panel according to claim 3, characterized in that: For a plurality of first pixels of the same color, among the first pixel circuits included in every two adjacent columns of first pixels, one column of first pixel circuits is connected to a test circuit via a data line, and the other column of first pixel circuits is not connected to the test circuit.
5. The display panel according to claim 4, characterized in that: For a plurality of first pixels of the same color, first pixel circuits in first pixels located in odd columns are connected to a test circuit via data lines, and first pixel circuits in first pixels located in even columns are not connected to the test circuit.
6. The display panel according to any one of claims 3 to 5, characterized in that: The plurality of first pixels include: a plurality of green first pixels, a plurality of red first pixels and a plurality of blue first pixels; The plurality of transparent conductive lines include: a plurality of first transparent conductive lines located in the same layer, a plurality of second transparent conductive lines located in the same layer, and a plurality of third transparent conductive lines located in the same layer, and the first transparent conductive lines, the second transparent conductive lines, and the third transparent conductive lines are located in different layers respectively; In the green first pixel, the first pixel circuit is connected to the first light-emitting element through the first transparent wire; In the red first pixel, the first pixel circuit is connected to the first light-emitting element through the second transparent wire; In the blue first pixel, the first pixel circuit is connected to the first light-emitting element through the third transparent wire.
7. The display panel according to claim 6, characterized in that: The first pixel circuit in the green first pixel is closer to the second display area than the first pixel circuit in the red first pixel, and is closer to the second display area than the first pixel circuit in the blue first pixel.
8. The display panel according to claim 6, characterized in that: Along the pixel row direction, the plurality of first pixels are arranged in sequence as follows: a red first pixel, a green first pixel, a blue first pixel and a green first pixel.
9. The display panel according to any one of claims 1 to 5, characterized in that: The substrate further comprises a non-display area, wherein the non-display area at least partially surrounds the first display area; and the display panel further comprises: A plurality of test probes are located in the non-display area, the column of first pixel circuits is connected to the test probes via data lines, and the test probes are used to be connected to test pins in the test circuit.
10. The display panel according to any one of claims 1 to 5, characterized in that: The first light emitting element comprises: an anode and a cathode; Among them, the first pixel circuit is connected to the anode and is used to transmit a light-emitting drive signal to the anode, the cathode is connected to a common power supply terminal, and the first light-emitting element is used to emit light based on the light-emitting drive signal and the power supply signal provided by the common power supply terminal.
11. The display panel according to any one of claims 1 to 5, characterized in that: The second display area is a light-transmitting display area.
12. The display panel according to any one of claims 1 to 5, characterized in that: The display panel further includes: A plurality of second pixels, wherein the second pixels include a second pixel circuit and a second light-emitting element located in the first display area, the second pixel circuit is respectively connected to the data line and the second light-emitting element, and is used to drive the second light-emitting element to emit light based on a data signal provided by the data line.
13. A display device, characterized in that: The display device comprises: a photosensor, and a display panel according to any one of claims 1 to 12; Wherein, the photosensor is located in the second display area of the display panel.
Citation Information
Patent Citations
Detection method and detection device for short-circuited defect of data wires
CN105261317A
Display panel, pixel detection method and display device
CN113327529A