Test equipment and test methods

By adjusting the stress pads of the pad group and introducing auxiliary pad connections, simultaneous testing of multiple source measurement units was achieved, solving the problem of low testing efficiency in the existing technology and improving testing efficiency and accuracy.

CN114646781BActive Publication Date: 2026-04-03CHANGXIN MEMORY TECH INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-12-21
Publication Date
2026-04-03

AI Technical Summary

Technical Problem

Existing test equipment requires cutting and packaging when testing multiple structures simultaneously, which is costly and the data validity and technical confidentiality are not as good as WLR equipment. In addition, the source measurement unit cannot test multiple components under test at the same time, resulting in low testing efficiency.

Method used

By adjusting the stress pads of the pad groups, at least two sets of stress pads can be connected to the corresponding source measurement units simultaneously, and electrically connected to the auxiliary pads through metal leads, enabling simultaneous testing of multiple source measurement units and avoiding direct contact with the stress pads for adjustment.

Benefits of technology

It improves the testing efficiency of the testing equipment, reduces testing costs and space requirements, while ensuring the accuracy and flexibility of test results.

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Abstract

This invention provides a testing apparatus and method. The testing apparatus includes multiple sets of solder pads and multiple source measurement units. Each set of solder pads has a stress solder pad for connecting to a device under test (DUT). The source measurement units are used to send input signals to the DUT through the stress solder pads and measure the output signals of the DUT to obtain performance parameters of the DUT. At least two sets of solder pads can be simultaneously connected to their corresponding source measurement units. This invention improves testing efficiency.
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Description

Technical Field

[0001] This invention relates to the semiconductor field, and in particular to a testing machine and testing method. Background Technology

[0002] Before components are put into formal use, they typically need to be tested using test equipment to ensure that the performance parameters of the component under test meet preset requirements. Current test equipment usually includes wafer level reliability (WLR) test equipment and package level reliability (PLR) test equipment. WLR test equipment can only measure one set of stresses for one structure at a time, while PLR ​​test equipment can measure the stress of multiple structures simultaneously. However, before measurement, the component under test needs to be outsourced for cutting and packaging, making it less costly, less reliable in terms of data validity, and less confidentiality than WLR equipment. Summary of the Invention

[0003] This invention provides a testing machine and testing method that can improve testing efficiency.

[0004] To address the aforementioned problems, this invention provides a testing machine comprising: multiple sets of solder pads and multiple source measurement units. Each set of solder pads has a stress solder pad for connecting to a device under test (DUT). The source measurement units are used to send input signals to the DUT through the stress solder pad and measure the output signals of the DUT to obtain performance parameters of the DUT. At least two sets of solder pads can simultaneously connect to their corresponding source measurement units.

[0005] In addition, the stress pads of at least two of the said pad groups have different shapes.

[0006] Additionally, at least one set of the pad groups has stress pads electrically connected to an auxiliary pad located at another position via metal leads, so as to be connected to the corresponding source measurement unit via the auxiliary pads.

[0007] In addition, the number of pad groups connected to the auxiliary pads is less than the number of source measurement units.

[0008] In addition, the number of source measurement units is 4.

[0009] In addition, the multiple sets of pads include a first pad set and a second pad set. The stress pads of the first pad set and the stress pads of the second pad set can be connected to the corresponding source measurement unit simultaneously. The first pad set has a first ground pad, and the second pad set has a second ground pad. The first ground pad and the second ground pad are used to connect the device under test and ground it.

[0010] In addition, the multiple sets of pads also include a third set of pads. The test element connected to the stress pads of the third set of pads can be connected to the first ground pad. The stress pads of the third set of pads and the stress pads of the second set of pads can be connected to the corresponding source measurement unit at the same time.

[0011] In addition, each of the multiple pad groups has a corresponding grounding pad, and the grounding pads corresponding to different pad groups are different.

[0012] Additionally, the device under test includes transistors or memory arrays.

[0013] Accordingly, this invention also provides a testing method, comprising: providing the testing machine described above; connecting the component under test (SUT) to at least two sets of solder pads, wherein the stress pads of the at least two sets of solder pads can be simultaneously connected to corresponding source measurement units; sending input signals to the SUT through at least two of the source measurement units and measuring the output signals of the SUT to obtain the performance parameters of the SUT.

[0014] In addition, the performance parameters include failure time; at least two test components with different performance parameters are connected to the at least two sets of pads; before measuring the output signal of the test component, the method further includes: setting a maximum measurement time, the maximum measurement time being greater than or equal to the longest failure time of the test component.

[0015] In addition, the failure time includes the gate dielectric layer breakdown time.

[0016] In addition, the gate dielectric layers of the multiple devices under test have the same thickness but different areas.

[0017] In addition, the same input signal is sent to at least two of the source measurement units through the same power supply, and the same input signal is sent to at least two of the devices under test through at least two of the source measurement units.

[0018] In addition, the component under test is a model component. After measuring the performance parameters of the model component, the performance parameters of the functional component are obtained according to the area ratio of the functional component and the model component.

[0019] Compared with the prior art, the technical solution provided by the embodiments of the present invention has the following advantages:

[0020] In the above technical solution, by adjusting the stress pads of the pad group, the stress pads of at least two pad groups can be connected to the corresponding source measurement unit at the same time, thereby enabling multiple source measurement units to simultaneously test at least two components under test connected to the stress pads, which is beneficial to improving the testing efficiency of the test equipment.

[0021] In addition, the stress pad is connected to the auxiliary pad by metal leads. The source measurement unit can send a preset input signal to the stress pad through the auxiliary pad. Since the source measurement unit does not need to be in direct contact with the stress pad, the initial structure of the test equipment does not need to be changed, that is, there is no need to adjust the position and shape of the stress pad itself. At the same time, the position of the auxiliary pad is more flexible, which helps to ensure a stable connection with the source measurement unit. Attached Figure Description

[0022] One or more embodiments are illustrated by way of example with reference to the accompanying drawings, which are not to be limited in scale unless otherwise stated.

[0023] Figure 1 This is a schematic diagram of the structure of a testing machine.

[0024] Figure 2 This is a schematic diagram of the structure of a testing machine provided in an embodiment of the present invention;

[0025] Figure 3 A time-stress current diagram provided for an embodiment of the present invention. Detailed Implementation

[0026] Existing WLR test equipment is typically equipped with 4 sets of source measurement units (SMUs). Each set of source measurement units has 6 pins. In actual testing, the 24 pins of the 4 sets of source measurement units will simultaneously be inserted into the 24 pads in the test pattern testkey. Each pin pin corresponds to one pad, and different pin pins correspond to different pads.

[0027] In the default program, only one set of stresses from one structure can be measured in a single test. That is, only one set of source measurement units needs to be activated, and only the device under test (DUT) connected to the pin probe of the activated source measurement unit can be effectively tested. However, when multiple DUTs are connected to the pin probes of the activated source measurement unit at the same time, only one DUT can be effectively tested.

[0028] Specifically, refer to Figure 1The source measurement unit includes six pin probes (Pin1, Pin2, Pin3, Pin4, Pin5, Pin6), all of which are attached to corresponding solder pads. The solder pads include stress pads and ground pads B. The source measurement unit sends input signals to the connected device under test (DUT) through the stress pads and measures the output signals of the DUT to obtain the performance parameters of the DUT.

[0029] Generally, the stress pads include a first stress pad G1, a second stress pad G2, and a third stress pad G3. The grounding pad B is a common pad. The first test element A1 is connected in series between the first stress pad G1 and the grounding pad B. The second test element A2 is connected in series between the second stress pad G2 and the grounding pad B. The third test element A3 is connected in series between the third stress pad G3 and the grounding pad B.

[0030] Since the source measurement unit typically contains only one generator and one oscilloscope, it can only test the performance parameters of one device under test (DUT) at a time. Taking the first DUT A1 as a transistor, a performance test of its failure time is used as an example. During the test, the source measurement unit connects the ground pad B to the ground terminal GND via the second pin probe Pin2, and continuously sends the input signal generated by the generator—stress voltage Vgs—to the DUT via the first pin probe Pin1. While sending the input signal, the oscilloscope measures the output signal of the DUT, i.e., the stress current corresponding to the DUT, and then obtains the failure time of the first DUT A1 based on the output signal at different times.

[0031] During the testing of the first component under test A1, although the pin probes corresponding to the second stress pad G2 and the third stress pad G3 also performed the pin-piercing action, they were all in a suspended state. That is, there was no effective electrical connection between the pin probes and the pads, or in other words, the source measurement unit did not send input signals to the corresponding component under test through the second stress pad G2 and the third stress pad G3, i.e., no test was performed.

[0032] Meanwhile, because the third pin probe Pin3 and the fourth pin probe Pin4 are suspended, they occupy the space above the second stress pad G2 and the third stress pad G3. As a result, the other three idle source measurement units in the WLR test machine are also unable to effectively test the second test element A2 and the third test element A3 connected to the second stress pad G2 and the third stress pad G3. This results in the second test element A2 and the third test element A3 having to wait in line.

[0033] To address the aforementioned technical problems, embodiments of the present invention provide a testing machine and a testing method. By adjusting the stress pads of the pad group, the stress pads of at least two groups of pads can be simultaneously connected to the corresponding source measurement units, thereby enabling multiple source measurement units to simultaneously test at least two components under test connected to the stress pads, which is beneficial to improving the testing efficiency of the testing machine.

[0034] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the various embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been presented in the various embodiments of the present invention to enable the reader to better understand this application. However, the technical solutions claimed in this application can be implemented even without these technical details and various changes and modifications based on the following embodiments.

[0035] refer to Figure 2 The test equipment includes: multiple sets of pads and multiple source measurement units. Each pad set has a stress pad, which is used to connect the component under test. The source measurement unit is used to send input signals to the component under test through the stress pad and measure the output signals of the component under test to obtain the performance parameters of the component under test. At least two sets of pads can be connected to the corresponding source measurement units at the same time.

[0036] Here, the pad set refers to the stress pads and ground pads connected to the device under test (DUT). The source measurement unit corresponding to the stress pad refers to the source measurement unit that sends input signals to the DUT connected to it through the stress pad. The input signals include stress voltage and stress current, and the output signals include voltage and current values. It should be noted that the output signal of the DUT includes not only the output signal of the DUT itself, but also the output signals of other components that can be used to characterize the output signal of the DUT.

[0037] For example, when performing a failure time test, a resistor can be connected in series with the component under test. Since the stress voltage is provided by the source measurement unit, the source measurement unit can obtain the voltage across the component under test by measuring the voltage across the resistor, without having to directly measure the voltage across the component under test.

[0038] In this embodiment, at least one set of stress pads is electrically connected to an auxiliary pad located at another position via metal leads, thereby electrically connecting the auxiliary pad to the corresponding source measurement unit. That is, the source measurement unit can send an input signal to the device under test (DUT) by connecting to the auxiliary pad. Since the input signal is sent from one end of the auxiliary pad, and the stress pad only acts as a conductor, the input signal can be sent even if the space above the stress pad is occupied by other source measurement units. Furthermore, the auxiliary pad and stress pad are connected via metal leads, and the stress pad does not restrict the position, shape, or size of the auxiliary pad. The auxiliary pad itself has considerable flexibility, which is beneficial for expanding the applicability of the testing equipment.

[0039] Specifically, the testing equipment includes a first stress pad G1, a second stress pad G2, and a third stress pad G3. The second stress pad G2 is connected to the corresponding first auxiliary pad (not shown) via a metal lead, and the third stress pad G3 is connected to the corresponding second auxiliary pad (not shown) via a metal lead. The first test element A1 is connected to the first stress pad G1, the second test element A2 is connected to the second stress pad G2, and the third test element A3 is connected to the third stress pad G3.

[0040] When testing the first device under test (DUT) A1 using the first source measurement unit (SMU1), the pin probes of SMU1 are suspended above the second stress pad G2 and the third stress pad G3. The space above the second and third stress pads G2 and G3 is occupied, preventing the pin probes of the second source measurement unit (SMU2) from directly contacting the second stress pad G2 to send an input signal, and preventing the pin probes of the third source measurement unit (SMU3) from directly contacting the third stress pad G3 to send an input signal. After setting the auxiliary pads, the pin probes of the second source measurement unit (SMU2) can directly connect to the first auxiliary pad and send an input signal to the second DUT A2 through the first auxiliary pad; similarly, the pin probes of the third source measurement unit (SMU3) can directly connect to the second auxiliary pad and send an input signal to the third DUT A3 through the second auxiliary pad.

[0041] In this embodiment, the input signal receiving channels are increased by connecting other auxiliary pads, so that even when the space above the stress pad is occupied, the input signal can still be received through other channels and corresponding tests can be performed. In other embodiments, the shape of the second stress pad can be changed so that the first source measurement unit occupies only part of the space above the second stress pad, thereby allowing the pin probes of the second source measurement unit to directly contact the second stress pad through the remaining space.

[0042] When the solution is improved by adjusting the shape of the stress pad, since the shape of the first stress pad does not need to be changed, the shape of the first stress pad is different from the shape of the second stress pad. Similarly, the shape of the first stress pad is also different from the shape of the third stress pad. That is, the shapes of the stress pads in at least two groups of pads are different.

[0043] In this embodiment, the number of pad groups connected to the auxiliary pads is less than the number of source measurement units. Specifically, since the first stress pad G1 does not require a corresponding auxiliary pad, when the number of source measurement units is N, only N-1 stress pads need to be connected to the corresponding auxiliary pads to enable N source measurement units to work simultaneously. Reducing unnecessary auxiliary pads helps to reduce the size of the test pattern and the space it occupies, thereby reducing the testing difficulty and the requirement for test space.

[0044] In this embodiment, the number of source measurement units is 4; in other embodiments, the number of source measurement units can be adjusted according to the maximum available space of the test pattern. Specifically, the larger the maximum available space of the test pattern, the more stress pads in the test pattern can be connected to the source measurement units simultaneously, the more test devices can be tested simultaneously, and the more source measurement units are required.

[0045] In this embodiment, the multiple sets of pads include a first pad set and a second pad set. The first stress pad G1 of the first pad set and the second stress pad G2 of the second pad set can be connected to the corresponding source measurement unit at the same time. The first pad set has a first grounding pad B1 and the second pad set has a second grounding pad B2. The first grounding pad B1 and the second grounding pad B2 are used to connect the device under test and ground it.

[0046] The first grounding pad B1 and the second grounding pad B2 may both be provided with grounding voltage by the first source measurement unit SMU1, or the first source measurement unit SMU1 may provide the grounding voltage of the first grounding pad B1 and the second source measurement unit SMU2 may provide the grounding voltage of the second grounding pad B2.

[0047] When measuring the performance parameters of a component under test (DUT), grounding pads may experience defects such as breakdown. If a grounding pad is connected to two DUTs simultaneously and both DUTs are tested concurrently, a defect in the measurement of one DUT may affect the measurement of the other DUT, leading to measurement failure or incorrect results. Controlling multiple pad groups tested simultaneously to have their own corresponding and different grounding pads helps ensure the accuracy of test results, improves testing efficiency, and reduces testing costs.

[0048] The bonding pad assembly can be used for various types of tests, such as time-lapse breakdown testing and hot current-carrying effect testing. Time-lapse breakdown testing is also known as dielectric breakdown testing. Correspondingly, due to different test conditions, there are various possible factors that can lead to defects such as breakdown of the grounding bonding pad. For example, the source measurement unit can continuously increase the magnitude of the stress voltage to measure the insulation capability of the gate oxide. When the stress voltage is sufficiently high, it may cause simultaneous breakdown of both the dielectric material and the grounding bonding pad.

[0049] In the above discussion, it is assumed that defects in the grounding pad are repairable, or even only momentary and / or automatically repairable. Therefore, it is assumed that defects in the grounding pad will only affect the ongoing test. Specifically, assuming that the first device under test (DUT) and the second DUT are tested simultaneously and connected to the same grounding pad, if a problem occurs during the testing of the first DUT, resulting in a defect in the grounding pad, the defect will only affect the ongoing testing of the second DUT, and will not affect the subsequent testing of the third DUT connected to the same grounding pad.

[0050] In other words, when the defects in the grounding pads are repairable, subsequent measurements of the device under test (DUT) do not need to consider the defects caused by previous measurements. In this case, the multiple pad groups may also include a fourth pad group. The DUT connected to the stress pads of the fourth pad group can be connected to the first grounding pad B1, and the fourth stress pad of the fourth pad group and the second stress pad G2 of the second pad group can be simultaneously connected to the corresponding source measurement unit.

[0051] When the first stress pad G1 can no longer be used, at least two components under test can be measured simultaneously through the fourth stress pad and the second stress pad. Since the defects that appeared in the first grounding pad before have no effect on the subsequent measurements, the measurement results performed through the fourth stress pad and the first grounding pad B1 are accurate. Moreover, since the fourth pad group and the first pad group share the first grounding pad, the size of the test pattern is effectively reduced, which is beneficial to reducing the manufacturing cost of the test pattern and reducing the difficulty of testing.

[0052] Conversely, when the defect in the grounding pad is permanent, in order to avoid the defect affecting subsequent measurements, each pad group in most pad groups should have a corresponding grounding pad, and the grounding pads corresponding to different pad groups should be different.

[0053] In practical applications, the application scenarios of test graphs can be fixed. That is, a test graph is always used to measure one or more specific performance parameters, and then it can be customized according to the application scenarios of different test graphs.

[0054] In this embodiment, the device under test includes an external gate oxide structure (Peri.gate), a transistor, and a memory array. When measuring a transistor, the gate is typically connected to a stress pad, and the source, drain, and substrate are grounded. When measuring a memory array, the scan line WLA is typically connected to a stress pad, and the data line DLA is grounded.

[0055] In this embodiment, by adjusting the stress pads of the pad group, the stress pads of at least two pad groups can be connected to the corresponding source measurement units simultaneously, thereby enabling multiple source measurement units to simultaneously test at least two components under test connected to the stress pads, which helps to improve the testing efficiency of the testing machine.

[0056] Accordingly, embodiments of the present invention also provide a testing method, comprising: providing the above-mentioned testing machine; connecting the component under test to at least two sets of solder pads, wherein the stress pads of the at least two sets of solder pads can be simultaneously connected to corresponding source measurement units; sending input signals to the component under test through at least two source measurement units and measuring the output signals of the component under test to obtain the performance parameters of the component under test.

[0057] In this embodiment, the performance parameters include failure time. At least two components under test (DUTs) with different performance parameters are connected to at least two sets of pads. Before measuring the output signal of the DUT, the method further includes setting a maximum measurement time, which is greater than or equal to the longest failure time of the DUT. This saves measurement time, avoids meaningless measurements after obtaining the failure time of the DUT, and ensures that the failure times of all DUTs can be obtained.

[0058] In this embodiment, the failure time includes the gate dielectric layer breakdown time, and the gate dielectric layer of multiple devices under test has the same thickness but different areas; in other embodiments, the gate dielectric layer has the same thickness and area but different thicknesses, or the gate dielectric layer is the same, but the stress voltage applied to different devices under test is different.

[0059] Taking the device under test (DUT) containing a gate oxide structure as an example, we will perform a time-dependent dielectric breakdown (TDDB) test on the DUT.

[0060] In this embodiment, reference Figure 2 and Figure 3The same stress voltage Vgs is sent to three source measurement units (first source measurement unit SMU1, second source measurement unit SMU2, and third source measurement unit SMU3) through the same power supply, and the same stress voltage Vgs is sent to three test elements (first test element A1, second test element A2, and third test element A3) through the three source measurement units; wherein, the gate oxide area of ​​the third test element A3 is > the gate oxide area of ​​the second test element A2 is > the gate oxide area of ​​the first test element A1, and the thickness of the different test elements is the same.

[0061] When a constant stress voltage Vgs is continuously applied to the gate of the device under test (DUT), the DUT is in an accumulation state. At this time, the stress current of different DUTs can be measured to obtain the measurement results of the corresponding DUTs. After a period of time, the gate oxide will be broken down, and the stress current will change abruptly. The time from the application of stress voltage to the occurrence of breakdown is the failure time of the DUT.

[0062] In other application scenarios, the same input signal is sent to at least two source measurement units through the same power supply, and the same input signal is sent to at least two devices under test through at least two source measurement units.

[0063] In this embodiment, the device under test (DUT) is a model device. After measuring the performance parameters of the model device, the performance parameters of the functional device can be obtained based on the area ratio of the functional device and the model device. Taking the gate oxide area as an example, generally the gate oxide area of ​​the functional device is larger than that of the model device. The area ratio of the functional device to the model device is usually called the area acceleration factor.

[0064] In this embodiment, by adjusting the stress pads of the pad group, the stress pads of at least two groups of pads are simultaneously connected to the corresponding source measurement units, thereby enabling multiple source measurement units to simultaneously test at least two components under test connected to the stress pads, thus improving the testing efficiency of the test equipment.

[0065] Those skilled in the art will understand that the above embodiments are specific examples of implementing the present invention, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of the present invention. Any person skilled in the art can make their own modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A testing machine, characterized in that, include: The device comprises multiple sets of solder pads and multiple source measurement units. Each set of solder pads has a stress solder pad for connecting to the component under test (DUT). The source measurement unit is connected to the stress solder pad via pin probes, sends an input signal to the DUT, and measures the output signal of the DUT to obtain the performance parameters of the DUT. At least two sets of solder pads can be simultaneously connected to the corresponding source measurement unit. The multiple sets of solder pads include a first set of solder pads and a second set of solder pads. The stress pads of the first set of solder pads and the stress pads of the second set of solder pads can be connected to the corresponding source measurement unit simultaneously. The first set of solder pads has a first grounding pad and the second set of solder pads has a second grounding pad. The first grounding pad and the second grounding pad are used to connect the device under test and ground it. The multiple sets of pads also include a fourth set of pads. The test element connected to the stress pads of the fourth set of pads can be connected to the first grounding pad. The stress pads of the fourth set of pads and the stress pads of the second set of pads can be connected to the corresponding source measurement unit at the same time. At least two of the aforementioned pad groups have different shapes of stress pads.

2. The testing machine according to claim 1, characterized in that, At least one set of the said pad group has stress pads electrically connected to an auxiliary pad located at another position via metal leads, so as to be connected to the corresponding source measurement unit via the auxiliary pads.

3. The testing machine according to claim 2, characterized in that, The number of pad groups connected to the auxiliary pads is less than the number of source measurement units.

4. The testing machine according to claim 1 or 3, characterized in that, The number of source measurement units is 4.

5. The testing machine according to claim 1, characterized in that, The device under test includes transistors or memory arrays.

6. A testing method, characterized in that, include: Provide a testing machine as described in any one of claims 1 to 5; The device under test (DUT) is connected to at least two sets of solder pads, and the stress pads of the at least two sets of solder pads can be simultaneously connected to the pin probes of the corresponding source measurement units. Input signals are sent to the DUT through at least two of the source measurement units, and the output signals of the DUT are measured to obtain the performance parameters of the DUT. The performance parameters include failure time; Connect at least two devices under test with different performance parameters to at least two sets of pads; before measuring the output signal of the device under test, the method further includes: setting a maximum measurement time, wherein the maximum measurement time is greater than or equal to the longest failure time of the device under test.

7. The test method according to claim 6, characterized in that, The failure time includes the gate dielectric layer breakdown time.

8. The test method according to claim 6, characterized in that, The gate dielectric layers of the multiple devices under test have the same thickness but different areas.

9. The test method according to claim 6, characterized in that, The same input signal is sent to at least two of the source measurement units through the same power supply, and the same input signal is sent to at least two of the devices under test through at least two of the source measurement units.

10. The test method according to claim 6, characterized in that, The component under test is a model component. After measuring the performance parameters of the model component, the performance parameters of the functional component are obtained based on the area ratio of the functional component and the model component.

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