Method for recovering communication interface interruption and communication interface controller

Abstract

The present invention discloses a method for recovering a communication interface interruption and a communication interface controller. The communication interface includes a data line and a clock line. The method includes: detecting whether a signal on the data line or the clock line is interrupted; detecting whether an interruption time of the signal on the data line or the clock line is greater than a preset time; and determining whether to perform an error recovery action based on whether the interruption time is greater than the preset time, so that the data line and the clock line return to an initial state.

Description

Technical Field

[0001] The present invention relates to a method for recovering a communication interface interruption, and more particularly to recovering an integrated bus circuit (Inter-Integrated Circuit: I 2 C) interruption method. Background Art

[0002] In the integrated bus circuit (I 2 C) During the transmission process, when the serial data (SDA) signal and the serial clock (SCL) signal are interrupted due to external factors, an abnormal signal event (such as signal hang up) will occur, causing the system to stagnate.

[0003] In the existing mechanism, under normal circumstances, the software can be re-instructed to make I 2 C restart. However, under certain timing conditions, the bus may still be held and cannot be released, causing the system to stagnate and the I2C to be unable to be restarted by software commands. 2 CRestart. Summary of the invention

[0004] According to an embodiment of the present invention, a method for recovering an interruption of a communication interface between chips is disclosed. The communication interface includes a data line and a clock line. The method includes: detecting whether a signal on the data line or the clock line is interrupted; detecting whether an interruption time of the signal on the data line or the clock line is greater than a preset time; and determining whether to perform an error recovery action based on whether the interruption time is greater than the preset time, so that the data line and the clock line return to an initial state.

[0005] As described above, in the method, when the interruption time is greater than a preset time, an error recovery action is performed, including: determining that the data line or the clock line has entered an error state; forcibly releasing the data line and / or the clock line; clearing all error flags generated when entering the error state; returning the data line and the clock line to the initial state, so that the communication interface is ready to transmit the next signal.

[0006] In the above method, when it is detected that the signals on the data line and the clock line are not interrupted, it is determined whether the communication interface has completed the transmission of the signal.

[0007] In the method as described above, when it is determined that the communication interface has completed signal transmission, the signal transmission of the communication interface is stopped, and the data line and the clock line are released so that the data line and the clock line return to an initial state.

[0008] As described in the method above, when it is determined that the communication interface has not completed the signal transmission, the signal transmission of the communication interface is continued until the communication interface has completed the signal transmission, or it is detected that the signal on the data line or the clock line has been interrupted, or it is detected that the interruption time of the signal on the data line or the clock line is greater than the preset time.

[0009] In the method described above, the communication interface is an integrated bus circuit (Inter-Integrated Circuit: I 2 C). The data line is a serial data (SDA) line. The clock line is a serial clock (SCL) line.

[0010] According to the communication interface controller of the embodiment of the present invention, the communication interface controller is used to recover the interruption of a communication interface between chips. The communication interface includes a data line and a clock line. The communication interface controller includes a control unit and a timing unit. The control unit detects whether a signal on the data line or the clock line is interrupted. The timing unit detects whether an interruption time of a signal on the data line or the clock line is greater than a preset time. The control unit determines whether to perform an error recovery action based on whether the interruption time detected by the timing unit is greater than the preset time, so that the data line and the clock line return to an initial state.

[0011] As in the communication interface controller mentioned above, when the interruption time is greater than the preset time, the control unit performs an error recovery action, including: determining that the data line or the clock line has entered an error state; forcibly releasing the data line and / or the clock line; clearing all error flags generated when entering the error state; returning the data line and the clock line to the initial state, so that the communication interface is ready to transmit the next signal.

[0012] As in the above communication interface controller, when the control unit detects that the signals on the data line and the clock line are not interrupted, it determines whether the communication interface has completed the signal transmission.

[0013] As in the communication interface controller mentioned above, when the control unit determines that the communication interface has completed signal transmission, it stops signal transmission of the communication interface and releases the data line and the clock line, so that the data line and the clock line return to the initial state.

[0014] As the communication interface controller mentioned above, the communication interface controller is an integrated bus circuit (Inter-Integrated Circuit: I 2 C) controller. The communication interface is an integrated bus circuit. The data line is a serial data (SDA) line. The clock line is a serial clock (SCL) line.

[0015] The method for recovering communication interface interruption and the communication interface controller of the present invention are 2In the transmission mechanism of the I C interface, an error detection and recovery mechanism is established to enable the hardware to 2 During I / O data transmission, the system can continuously detect error status. When an error status is detected, all buses are forced to be automatically released and restored to the initial state, so that the system can continue to perform I / O. 2 C data transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The present invention is a flowchart of a method for recovering an interruption of a communication interface between chips according to an embodiment of the present invention.

[0017] Figure 2 Schematic diagram of a communication interface controller according to an embodiment of the present invention.

[0018] S100, S102, S104: Steps

[0019] S106, S108, S110: Steps

[0020] S112, S114, S116: Steps

[0021] S118, S120, S122: Steps

[0022] S124: Step 200: Communication Interface Controller

[0023] 202: Timing unit

[0024] 204: Control unit

[0025] 206: Serial data interface

[0026] 208:Serial clock interface

[0027] SDA: Serial Data Line

[0028] SCL: Serial clock line

[0029] 250: Communication interface controller

[0030] 252: Timing unit

[0031] 254: Control Unit

[0032] 256: Serial data interface

[0033] 258:Serial clock interface DETAILED DESCRIPTION

[0034] The present invention is described with reference to the accompanying drawings, wherein the same reference numerals throughout the drawings represent similar or identical devices. The above drawings are not depicted according to the actual scale, and they are only provided to illustrate the present invention. Some of the invention's configurations are described below as references for illustrated exemplary applications. This means that many specific details, relationships and methods are described to provide a complete understanding of this invention. In any case, those skilled in the art will recognize that this invention can still be implemented without one or more of the specific details or with other methods.

[0035] For other examples, well-known structures or operations are not listed in detail to avoid obscuring the invention. The present invention is not limited by the order of the acts or events described, such as some acts may occur in a different order or simultaneously with other acts or events. In addition, not all acts or events described need to be performed in the same method as the prior invention.

[0036] Figure 1 Flow chart of a method for recovering an interruption of a communication interface between chips according to an embodiment of the present invention. In some embodiments, the communication interface is an integrated bus circuit (Inter-Integrated Circuit: I 2 C) interface, a bus widely used for communication between chips. 2 The C interface includes a serial data (SDA) line and a serial clock (SCL) line. The serial data line is used to transmit communication data or addresses between chips, while the serial clock line is used to transmit clock signals. Figure 1 As shown, the recovery communication interface (eg, I 2 C) The method for recovering a communication interface interruption first starts to transmit data (step S100). In some embodiments, in step S100, the method for recovering a communication interface interruption of the present invention transmits a start signal from a master end (Master) to a slave end (Slave). For example, when the method for recovering a communication interface interruption of the present invention executes step S100, I 2 The start signal of the C interface can be, for example, the serial data (SDA) line changes from a high level to a low level, and the serial clock (SCL) remains at a high level. When the slave receives the start signal from the master, the slave knows that the master will start transmitting data.

[0037] Next, the recovery communication interface (eg, I 2 C) Interrupted method execution I 2C data transmission (step S102). In some embodiments, the method of the present invention can transmit data from the master end to the slave end at different transmission rates. For example, the master end can transmit data in standard mode (100 kbit / s), fast mode (400 kbit / s), fast mode (1 megabit / s), high speed mode (3.4 megabit / s), and ultra-fast mode (5 megabit / s). In contrast, the method of the present invention can correspondingly adjust the timing of the serial data and the serial clock to meet the requirements of different transmission rates.

[0038] The method for recovering the interruption of the communication interface of the present invention then detects whether the signal on the serial clock (SCL) line is interrupted in step S104. When it is detected that the signal on the serial clock (SCL) line is not interrupted, the method of the present invention directly continues to execute step S108. When it is detected that the signal on the serial clock (SCL) line is interrupted, the method of the present invention executes step S106. Next, in step S106, the method of the present invention detects whether an interruption time of the signal on the serial clock (SCL) line is greater than a preset time, and determines whether to enter step S112 or step S108 based on whether the interruption time of the signal on the serial clock (SCL) line is greater than the preset time. When the interruption time of the signal on the serial clock (SCL) line is not greater than the preset time in step S106, the method of the present invention executes step S108. When the interruption time of the signal on the serial clock (SCL) line is greater than the preset time in step S106, the method of the present invention executes an error recovery action of steps S112 to S118.

[0039] When the signal on the serial clock (SCL) line is not interrupted in step S104, or the interruption time of the signal on the serial clock (SCL) line is not greater than the predicted time in step S106, the method of the present invention executes step S108. In step S108, the method of the present invention then detects whether the signal on the serial data (SDA) line is interrupted. When it is detected in step S108 that the signal on the serial data (SDA) line is not interrupted, the method of the present invention directly continues to execute step S120. When it is detected in step S108 that the signal on the serial data (SDA) line is interrupted, the method of the present invention executes step S110. Next, in step S110, the method of the present invention detects whether the interruption time of the signal on the serial data (SDA) line is greater than the preset time, and determines whether to enter step S112 or step S120 according to whether the interruption time of the signal on the serial data (SDA) line is greater than the preset time.

[0040] When the interruption time of the signal on the serial data (SDA) line is not greater than the preset time in step S110, the method of the present invention executes step S120. When the interruption time of the signal on the serial data (SDA) line is greater than the preset time in step S110, the method of the present invention executes the error recovery action of steps S112 to S118. In some embodiments, the preset time in steps S106 and S110 may be 3 to 5 seconds, but the present invention is not limited thereto. In some embodiments, the method of the present invention may first execute step S108, and when step S108 is "yes", step S110 is executed. When step S110 is "no", the method of the present invention then executes step S104 and / or step S106. In other words, the order of step S104 and step S108 in the method of the present invention may be interchanged, so the order of step S106 and step S110 may also be adjusted accordingly.

[0041] When the interruption time of the signal on the serial clock (SCL) line in step S106 is greater than the preset time, or the interruption time of the signal on the serial data (SDA) line in step S110 is greater than the preset time, the method of the present invention will perform an error recovery action. In the error recovery action, the method of the present invention executes step S112 to enter an error state. In the error state, the method of the present invention will then execute step S114 to forcibly release the states of the serial data (SDA) line and the serial clock (SCL) line. For example, the method of the present invention will forcibly pull the voltages of the serial data (SDA) line and the serial clock (SCL) line back to a high level. Thereafter, the method of the present invention executes step S116 to clear the error flag generated in the error state.

[0042] In some embodiments, in I 2 C communication process, when the master (Master) or slave (Slave) I 2 When the C controller finds a communication anomaly, such as serial data or serial clock interruption, data transmission timeout, etc., the I 2 C controllers will generate corresponding error codes or status codes. In other words, users can observe the I 2 The error code or status code (for example, presented in the form of a flag) generated by the C controller can be used to know the current I 2 The method for recovering the interruption of the communication interface of the present invention clears all error flags in step S116, the purpose of which is to allow the I of the master end or the slave end to be restored. 2The C controller restores the state of the serial data (SDA) line and / or the serial clock (SCL) line to an initial state (e.g., a pull high state). After that, the method of the present invention can execute step S118 to return to the initial state, and after receiving another start signal, return to step S100 again to continue to perform another round of data transmission.

[0043] Back to Figure 1 When it is detected in step S108 that the signal on the serial data (SDA) line is not interrupted, or it is detected in step S110 that the interruption time of the signal on the serial data (SDA) line is not greater than the preset time, the method of the present invention executes step S120 to confirm that the data transmission is completed. In some embodiments, the method of the present invention confirms in step S120 whether there is an end signal in the transmission signal of the I2C interface. For example, the method of the present invention confirms in step S120 that the I2C interface is connected to the serial data line. 2 The serial data (SDA) signal in the C interface changes from a low level to a high level, and the serial clock (SCL) signal maintains a high level. When the end signal is confirmed in step S120, that is, the I 2 C has completed the data transmission, the method of the present invention proceeds to step S122. When it is confirmed in step S120 that there is no end signal, that is, it is confirmed that I 2 If the data transmission of I C is not completed, the method of the present invention returns to step S102 to continue I 2 C data transmission.

[0044] Next, the method of the present invention executes step S122, stopping I 2 C interface data transmission. Finally, the method of the present invention executes step S124 to release the state of the serial data (SDA) line and the serial clock (SCL) line. In some embodiments, the method of the present invention pulls the signal of the data (SDA) line and / or the serial clock (SCL) line to a high level, and after receiving another start signal, returns to step S100 again to continue to perform another round of data transmission.

[0045] In some embodiments, in the absence of external interference (i.e., no signal interruption is detected), the method of the present invention executes step S100, step S102, step S104, step S108, step S120, step S120, step S122, and step S124. In other words, if there is no external interference and the transmission is interrupted, the method of the present invention will not execute step S106, step S110, step S112, step S114, step S116, and step S118. In other words, in the case of normal transmission, the method of the present invention will not consume additional time.

[0046] In some embodiments, if an external force intervenes during the transmission process, such as the serial data (SDA) line or the serial clock (SCL) line being pulled out, the serial data (SDA) signal or the serial clock (SCL) signal will be pulled up, thereby causing the transmission to be interrupted and entering step S106 and step S110. When the interruption time in step S106 or step S110 is greater than the preset time, the method of the present invention will execute steps S112 to S118. In some embodiments, during the transmission process, when the serial data (SDA) line or the serial clock (SCL) line is pulled out and the action time consumed by reconnecting is greater than the preset time of step S106 or step S110, the method of the present invention will execute steps S112 to S118. Therefore, the additional time consumed by the method of the present invention will be greater than the preset time.

[0047] In some embodiments, during the transmission process, when the serial data (SDA) line or the serial clock (SCL) line is unplugged and the action time consumed by reconnecting is less than or equal to the preset time of step S106 or step S110, and the serial data (SDA) signal and the serial clock (SCL) signal can resume normal transmission, the method of the present invention will not execute steps S112 to S118. Therefore, the additional time consumed by the method of the present invention will be less than or equal to the preset time. In some embodiments, during the transmission process, when the serial data (SDA) line or the serial clock (SCL) line is unplugged and the action time consumed by reconnecting is less than or equal to the preset time of step S106 or step S110, but the time for the serial data (SDA) signal and the serial clock (SCL) signal to resume normal transmission is greater than the preset time, the method of the present invention must execute steps S112 to S118. Therefore, the additional time consumed by the method of the present invention will be equal to the preset time.

[0048] Figure 2 FIG. 2 is a schematic diagram of a communication interface controller 200 according to an embodiment of the present invention. Figure 2As shown, the communication interface controller 200 includes a timing unit 202, a control unit 204, a serial data interface 206, and a serial clock interface 208. In some embodiments, the communication interface controller 200 is disposed in a chip A. Similarly, another communication interface controller 250 also includes a timing unit 252, a control unit 254, a serial data interface 256, and a serial clock interface 258. In some embodiments, the communication interface controller 250 is disposed in a chip B. The serial data interface 206 of the communication interface controller 200 is electrically connected to the serial data interface 256 of the communication interface controller 250 through a serial data line SDA. The serial clock interface 208 of the communication interface controller 200 is electrically connected to the serial clock interface 258 of the communication interface controller 250 through a serial clock line SCL. Therefore, the communication interface controller 200 can be connected to the serial clock interface 258 of the communication interface controller 250 through I 2 The C interface communicates with the communication interface controller 250. In other words, chip A can communicate with chip B.

[0049] Since the operation of the communication interface controller 200 is the same as that of the communication interface controller 250, only the communication interface controller 200 is used as an example. The control unit 204 of the communication interface controller 200 detects whether the signal on the serial data line SDA or the serial clock line SCL is interrupted, that is, executes Figure 1 Then, when the control unit 204 detects that the signal on the serial data line SDA or the serial clock line SCL is interrupted, the timing unit 202 of the communication interface controller 200 detects whether the interruption time of the signal on the serial data line SDA or the serial clock line SCL is greater than a preset time, that is, executing step S106 or step S110.

[0050] Next, the control unit 204 determines whether to perform an error recovery action based on whether the interruption time detected by the timing unit 202 is greater than the preset time, so that the serial data line SDA or the serial clock line SCL returns to an initial state. In some embodiments, the control unit 204 performs an error recovery action including: determining that the serial data line SDA or the serial clock line SCL has entered an error state ( Figure 1 Step S112), forcibly releasing the serial data line SDA and / or the serial clock line SCL ( Figure 1 Step S114), clear all error flags generated when entering the error state ( Figure 1 Step S116), and returning the serial data line SDA or the serial clock line SCL to the initial state, so that the communication interface (eg, I 2 C interface) to prepare for the next signal transmission ( Figure 1 Step S118).

[0051] In some embodiments, when the control unit 204 detects that the signals of the serial data line SDA and / or the serial clock line SCL are not interrupted ( Figure 1 If both steps S104 and S108 are "No", the control unit 204 determines whether the communication interface has completed the signal transmission ( Figure 1 When the control unit 204 determines that the communication interface has completed the signal transmission ( Figure 1 If step S120 is "yes", the signal transmission of the communication interface is stopped ( Figure 1 Step S122), and release the serial data line SDA or the serial clock line SCL ( Figure 1 In step S124), the serial data line SDA or the serial clock line SCL returns to an initial state.

[0052] In some embodiments, when the timing unit 202 detects that the interruption time of the signals on the serial data line SDA and the serial clock line SCL is not greater than the preset time ( Figure 1 Step S106 and step S110 are "No"), the control unit 204 determines whether the communication interface has completed the signal transmission ( Figure 1 In some embodiments, when the timing unit 202 detects that the interruption time of the signal on the serial data line SDA or the serial clock line SCL is greater than the preset time ( Figure 1 If step S106 or step S110 is "yes", the control unit 204 performs an error recovery action ( Figure 1 Steps S112 to S118).

[0053] The method for recovering communication interface interruption and the communication interface controller of the present invention are 2 In the transmission mechanism of the C interface, an error detection and recovery mechanism is established so that the hardware (such as Figure 2 The communication interface controller 200, 250) is in I 2 During the data transmission process, the error state can be continuously detected. When it is judged as an error state, all buses (such as serial data lines or serial clock lines) are forced to be automatically released and restored to the initial state, so that the system (such as chips A and B) can continue to do I 2 C data transmission.

[0054] Although the embodiments of the present invention are described above, it should be understood that what is presented above is only an example, not a limitation. Many changes to the above exemplary embodiments can be implemented without violating the spirit and scope of the invention according to this embodiment. Therefore, the breadth and scope of the present invention should not be limited by the embodiments described above. More specifically, the scope of the present invention should be defined by the above claims and their equivalents.

[0055] Although the invention has been illustrated and described above with reference to one or more implementations, equivalent changes and modifications will occur to others familiar with the art based on the above specification and drawings. In addition, although a particular feature of an embodiment of the invention has been demonstrated with reference to one of the multiple implementations, the feature may be combined with one or more other features as may be desirable and useful for any known or particular application.

[0056] Unless otherwise defined, all terms (including technical or scientific terms) used herein are generally understood by those having ordinary skill in the art to which the above invention belongs. We should further understand that the above terms, as defined in commonly used dictionaries, should be interpreted as having the same meaning in the context of the relevant art. Unless otherwise explicitly defined herein, the above terms are not to be interpreted as having an idealized or overly formal meaning.

Claims

1. A method for recovering a communication interface interruption, characterized in that: The communication interface includes a data line and a clock line. The method includes: sequentially detecting whether signals on the data line and the clock line are interrupted; When any one of the signals on the data line and the clock line is detected to be interrupted, detecting whether an interruption time of any one of the signals on the data line and the clock line that is interrupted is greater than a preset time, wherein when any one of the signals on the data line and the clock line is detected to be interrupted, it represents that a communication abnormality occurs in the communication interface; When the interruption time is greater than the preset time, an error recovery action is performed to return the data line and the clock line to an initial state; The error recovery action includes: Determining that the data line or the clock line has entered an error state; After entering the error state, an error flag is generated; Forcibly releasing the data line and / or the clock line; clear the error flag; and Returning the data line and the clock line to the initial state so that the communication interface is ready to transmit the next signal, When the interruption time of any one of the signals on the data line and the clock line is greater than the preset time, it is determined that the data line or the clock line has entered the error state.

2. The method according to claim 1, characterized in that When it is detected that the signals on the data line and the clock line are not interrupted, it is determined whether the communication interface has completed the transmission of the signal.

3. The method according to claim 1, characterized in that When it is determined that the communication interface has completed signal transmission, the signal transmission of the communication interface is stopped, and the data line and the clock line are released, so that the data line and the clock line return to the initial state.

4. The method according to claim 1, characterized in that When it is determined that the communication interface has not completed the signal transmission, the signal transmission of the communication interface continues until the communication interface has completed the signal transmission, or it is detected that the signal on the data line or the clock line is interrupted, or it is detected that the interruption time of the signal on the data line or the clock line is greater than the preset time.

5. The method according to claim 1, characterized in that The communication interface is an integrated bus circuit I 2 C; the data line is a serial data SDA line; and the clock line is a serial clock SCL line.

6. A communication interface controller, characterized in that: Used to recover the interruption of a communication interface between chips, the communication interface includes a data line and a clock line; the communication interface controller includes: a control unit, sequentially detecting whether the signals on the data line and the clock line are interrupted; a timing unit, when it is detected that any one of the signals on the data line and the clock line is interrupted, detecting whether an interruption time of any one of the signals on the data line and the clock line that is interrupted is greater than a preset time, wherein when any one of the signals on the data line and the clock line is detected to be interrupted, it represents that a communication abnormality occurs in the communication interface; When the interruption time detected by the timing unit is greater than the preset time, the control unit performs an error recovery action so that the data line and the clock line return to an initial state; The error recovery action includes: Determining that the data line or the clock line has entered an error state; After entering the error state, an error flag is generated; Forcibly releasing the data line and / or the clock line; clear the error flag; and Returning the data line and the clock line to the initial state so that the communication interface is ready to transmit the next signal, When the interruption time of any one of the signals on the data line and the clock line is greater than the preset time, it is determined that the data line or the clock line has entered the error state.

7. The communication interface controller according to claim 6, characterized in that: When the control unit detects that the signals on the data line and the clock line are not interrupted, it determines whether the communication interface has completed the signal transmission.

8. The communication interface controller according to claim 7, characterized in that: When the control unit determines that the communication interface has completed signal transmission, the signal transmission of the communication interface is stopped, and the data line and the clock line are released, so that the data line and the clock line return to the initial state.

9. The communication interface controller according to claim 6, characterized in that: The communication interface controller is an integrated bus circuit I 2 C controller; the communication interface is an integrated bus circuit; the data line is a serial data SDA line; and the clock line is a serial clock SCL line.

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