Display device

Abstract

According to an embodiment, a display device includes: a first insulating layer disposed on an insulating substrate; a first lower electrode and a second lower electrode disposed on the first insulating layer; a second insulating layer disposed between the first lower electrode and the second lower electrode on the first insulating layer, having a first opening overlapping the first lower electrode and a second opening overlapping the second lower electrode; a partition disposed on the second insulating layer; a first organic layer including a light-emitting layer disposed in the first opening and covering the first lower electrode; and a first upper electrode covering the first organic layer. The partition has: a first layer in contact with the second insulating layer, formed of a metal material, having a first side surface facing the first opening, a second side surface facing the second opening, and a first upper surface; and a second layer in contact with the first upper surface, extending from the first side surface toward the first opening, and the first upper electrode is in contact with the first side surface.

Description

[0001] Cross - reference to related applications

[0002] This application is based on and claims the priority of Japanese Application No. 2020 - 209472 filed on December 17, 2020, the entire content of which is incorporated herein by reference. Technical field

[0003] Embodiments of the present invention relate to a display device. Background art

[0004] In recent years, a display device using an organic light - emitting diode (OLED) as a display element has been put into practical use. The display element has an organic layer between a pixel electrode and a common electrode. The organic layer includes functional layers such as a hole - transporting layer and an electron - transporting layer in addition to a light - emitting layer. Such an organic layer is formed, for example, by a vacuum evaporation method.

[0005] For example, in the case of mask evaporation, a fine mask having openings corresponding to each pixel is used. However, due to the processing accuracy of the fine mask, deformation of the opening shape, etc., there is a risk of a decrease in the formation accuracy of the thin film formed by evaporation. Therefore, it is desired to form an organic layer having a desired shape without using a fine mask. For example, if the end face of the organic layer is not formed at a desired position, there is a risk of deterioration in the performance of the display element. Summary of the invention

[0006] An object of the present invention is to provide a display device capable of suppressing deterioration in the performance of a display element.

[0007] A display device according to an embodiment includes:

[0008] an insulating substrate; a first insulating layer disposed on the insulating substrate; a first lower electrode and a second lower electrode disposed on the first insulating layer; a second insulating layer disposed between the first lower electrode and the second lower electrode on the first insulating layer, having a first opening overlapping the first lower electrode and a second opening overlapping the second lower electrode; a partition disposed on the second insulating layer; a first organic layer including a light - emitting layer disposed in the first opening and covering the first lower electrode; and a first upper electrode covering the first organic layer, the partition having: a first layer in contact with the second insulating layer, formed of a metal material, having a first side face facing the first opening, a second side face facing the second opening, and a first upper surface; and a second layer in contact with the first upper surface, extending from the first side face toward the first opening, and the first upper electrode being in contact with the first side face.

[0009] According to an embodiment, a display device capable of suppressing deterioration in the performance of a display element can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 FIG. is a diagram showing a configuration example of the display device DSP of the present embodiment.

[0011] Figure 2 It shows Figure 1 A plan view showing an example of the pixel PX shown.

[0012] Figure 3 It shows Figure 1 A plan view showing another example of the pixel PX shown.

[0013] Figure 4 FIG. is a cross-sectional view showing an example of the display element 20.

[0014] Figure 5 It is used to explain Figure 4 FIG. showing the formation process of the cross-sectional structure shown.

[0015] Figure 6A FIG. is an enlarged cross-sectional view showing an example of the partition wall 30.

[0016] Figure 6B FIG. is an enlarged cross-sectional view showing another example of the partition wall 30.

[0017] Figure 7 FIG. is a cross-sectional view showing another example of the display element 20.

[0018] Figure 8 FIG. is a cross-sectional view showing another example of the display element 20.

[0019] Figure 9 It is used to explain Figure 8 FIG. showing the formation process of the cross-sectional structure shown.

[0020] Figure 10 FIG. is a diagram showing an example of a method for depositing the organic layer OR.

[0021] Figure 11 FIG. is a diagram showing another example of a method for depositing the organic layer OR.

[0022] Figure 12 FIG. is a cross-sectional view showing another example of the display element 20. DETAILED DESCRIPTION OF THE INVENTION

[0023] Hereinafter, embodiments of the present invention will be described with reference to the accompanying Figure One drawings.

[0024] In addition, the disclosure is only an example, and appropriate modifications that can be easily conceived by those skilled in the art while maintaining the gist of the invention are of course included in the scope of the present invention. In addition, for the sake of clarity, the drawings sometimes schematically show the width, thickness, shape, etc. of each part compared with the actual manner, but this is only an example and does not limit the interpretation of the present invention. In addition, in this specification and each drawing, for components that perform the same or similar functions as the components described with respect to the already presented drawings, the same reference numerals are assigned, and repeated detailed descriptions are appropriately omitted.

[0025] In addition, in the drawings, as needed, the X-axis, Y-axis, and Z-axis orthogonal to each other are described for easy understanding. The direction along the X-axis is called the X-direction or the first direction, the direction along the Y-axis is called the Y-direction or the second direction, and the direction along the Z-axis is called the Z-direction or the third direction. The plane defined by the X-axis and the Y-axis is called the X-Y plane, and the plane defined by the X-axis and the Z-axis is called the X-Z plane. Looking at the X-Y plane is called a top view.

[0026] The display device DSP of this embodiment is an organic electroluminescent display device having an organic light-emitting diode (OLED) as a display element, and is mounted on a television, a personal computer, a mobile terminal, a mobile phone, etc. In addition, the display element described below can be used as a light-emitting element of a lighting device, and the display device DSP can be converted for use in other electronic devices such as lighting devices.

[0027] Figure 1 This is a diagram showing a configuration example of the display device DSP of this embodiment. The display device DSP has a display unit DA for displaying an image on an insulating base material 10. The base material 10 is an insulating substrate, which can be glass or a flexible resin film.

[0028] The display unit DA includes a plurality of pixels PX arranged in a matrix in the first direction X and the second direction Y. The pixel PX includes a plurality of sub-pixels SP1, SP2, and SP3. In one example, the pixel PX includes a red sub-pixel SP1, a green sub-pixel SP2, and a blue sub-pixel SP3. In addition, the pixel PX may also include four or more sub-pixels including sub-pixels of other colors such as white in addition to the above three-color sub-pixels.

[0029] A configuration example of one sub-pixel SP included in the pixel PX will be briefly described.

[0030] That is, the sub-pixel SP includes a pixel circuit 1 and a display element 20 driven and controlled by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements made of thin film transistors, for example.

[0031] Regarding the pixel switch 2, the gate electrode is connected to the scanning line GL, the source electrode is connected to the signal line SL, and the drain electrode is connected to one electrode of the capacitor 4 and the gate electrode of the driving transistor 3. Regarding the driving transistor 3, the source electrode is connected to the other electrode of the capacitor 4 and the power supply line PL, and the drain electrode is connected to the anode of the display element 20. The cathode of the display element 20 is connected to the power supply line FL. In addition, the configuration of the pixel circuit 1 is not limited to the illustrated example.

[0032] The display element 20 is an organic light-emitting diode (OLED) as a light-emitting element. For example, the sub-pixel SP1 includes a display element that emits light corresponding to the red wavelength, the sub-pixel SP2 includes a display element that emits light corresponding to the green wavelength, and the sub-pixel SP3 includes a display element that emits light corresponding to the blue wavelength. By the pixel PX including a plurality of sub-pixels SP1, SP2, and SP3 with different display colors, multi-color display can be achieved.

[0033] However, it may also be configured such that the display elements 20 of the sub-pixels SP1, SP2, and SP3 each emit light of the same color. Thereby, monochromatic display can be achieved.

[0034] In addition, when the display elements 20 of the sub-pixels SP1, SP2, and SP3 are each configured to emit white light, a color filter opposed to the display element 20 may also be arranged. For example, the sub-pixel SP1 includes a red color filter opposed to the display element 20, the sub-pixel SP2 includes a green color filter opposed to the display element 20, and the sub-pixel SP3 includes a blue color filter opposed to the display element 20. Thereby, multi-color display can be achieved.

[0035] Alternatively, when the display elements 20 of the sub-pixels SP1, SP2, and SP3 are each configured to emit ultraviolet light, multi-color display can be achieved by arranging a light conversion layer opposed to the display element 20.

[0036] The configuration of the display element 20 will be described later.

[0037] Figure 2 It represents Figure 1 A top view of an example of the pixel PX shown.

[0038] The sub-pixels SP1, SP2, and SP3 that constitute one pixel PX are each formed in a substantially rectangular shape extending in the second direction Y and arranged in the first direction X.

[0039] The insulating layer 12, which will be described in detail later, is formed in a lattice shape extending along the first direction X and the second direction Y respectively in a plan view, and surrounds each sub-pixel SP1, SP2, and SP3. The partition wall 30, which will be described in detail later, is formed in a lattice shape extending along the first direction X and the second direction Y respectively in a plan view, and is disposed on the insulating layer 12.

[0040] Figure 3 is a plan view showing another example of the pixel PX Figure 1 shown.

[0041] Figure 3 The example shown and Figure 2 The difference from the example shown is that the partition wall 30 is formed in a strip shape. The partition walls 30 extend in the second direction Y respectively and are arranged in the first direction X. The sub-pixels SP1, SP2, and SP3 are located between adjacent partition walls 30 respectively. That is, the sub-pixels and the partition walls are alternately arranged in the first direction X.

[0042] The insulating layer 12 is formed in a lattice shape in the same manner as Figure 2 the example shown, but may also be formed in a strip shape in the same manner as the partition wall 30.

[0043] In addition, Figure 2 and Figure 3 The outer shape of each sub-pixel shown corresponds to the outer shape of the lower electrode of the display element or the light-emitting region of the display element, but it is a simplified outer shape and does not necessarily reflect the actual shape.

[0044] Figure 4 is a cross-sectional view showing an example of the display element 20.

[0045] Figure 1 The pixel circuit 1 shown is disposed on the substrate 10 and is covered by the insulating layer 11. In Figure 4 only the driving transistor 3 included in the pixel circuit 1 is simply illustrated. The insulating layer (first insulating layer) 11 corresponds to the base layer of the display element 20 and is, for example, an organic insulating layer.

[0046] The insulating layer (second insulating layer) 12 is disposed on the insulating layer 11. The insulating layer 12 is, for example, an organic insulating layer. The insulating layer 12 is formed so as to divide the display element 20 or the sub-pixels, and is sometimes referred to as ribs, partition walls, etc.

[0047] The display element 20 includes a lower electrode E1, an organic layer OR, and an upper electrode E2. The lower electrode E1 is an electrode arranged for each sub-pixel or each display element, and is electrically connected to the driving transistor 3. Such a lower electrode E1 is sometimes referred to as a pixel electrode, an anode, etc. The upper electrode E2 is an electrode arranged for each sub-pixel or each display element, but is electrically connected to each other across a plurality of adjacent sub-pixels or a plurality of display elements. Such an upper electrode E2 is sometimes referred to as a common electrode, a counter electrode, a cathode, etc.

[0048] The lower electrode E1 is arranged on the insulating layer 11, and its peripheral portion is covered by the insulating layer 12. The lower electrode E1 is, for example, a transparent electrode formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In addition, the lower electrode E1 may also be a metal electrode formed of a metal material such as silver or aluminum. In addition, the lower electrode E1 may also be a laminate of a transparent electrode and a metal electrode. For example, the lower electrode E1 may be configured as a laminate formed by sequentially laminating a transparent electrode, a metal electrode, and a transparent electrode, or may be configured as a laminate of three or more layers.

[0049] The organic layer OR is arranged on the lower electrode E1. Such an organic layer OR includes a light-emitting layer EL. In Figure 4 the example shown, the organic layer OR further includes functional layers F1 and F2. The functional layer F1, the light-emitting layer EL, and the functional layer F2 are sequentially laminated from the lower electrode E1 side. The functional layers F1 and F2 are, for example, a hole injection layer, a hole transport layer, a hole blocking layer, an electron injection layer, an electron transport layer, an electron blocking layer, but may also be other functional layers. In addition, each of the illustrated functional layers F1 and F2 is not limited to a single layer, and may also be a laminate in which a plurality of functional layers are laminated. In addition, at least one of the functional layers F1 and F2 may be omitted.

[0050] The upper electrode E2 covers the organic layer OR. The upper electrode E2 is, for example, a transparent electrode formed of a transparent conductive material such as ITO or IZO. In addition, the upper electrode E2 may also be a semi-transmissive metal electrode formed of a metal material such as magnesium or silver. The upper electrode E2 is electrically connected to a power supply line arranged in the display unit DA or a power supply line arranged outside the display unit DA.

[0051] When the potential of the lower electrode E1 is relatively higher than the potential of the upper electrode E2, the lower electrode E1 corresponds to an anode, and the upper electrode E2 corresponds to a cathode. In addition, when the potential of the upper electrode E2 is relatively higher than the potential of the lower electrode E1, the upper electrode E2 corresponds to an anode, and the lower electrode E1 corresponds to a cathode.

[0052] As an example, when the lower electrode E1 is equivalent to the anode, the functional layer F1 between the light-emitting layer EL and the lower electrode E1 includes at least one of a hole injection layer and a hole transport layer, and the functional layer F2 between the light-emitting layer EL and the upper electrode E2 includes at least one of an electron transport layer and an electron injection layer.

[0053] Here, two display elements adjacent in the first direction X are considered. For convenience, the display element located at the center of the figure is labeled as display element 21, and the display element located on the left side of the figure is labeled as display element 22.

[0054] The display element 21 includes a lower electrode (first lower electrode) E11, an organic layer (first organic layer) OR1, and an upper electrode (first upper electrode) E21. The organic layer OR1 includes a functional layer F11, a light-emitting layer EL1, and a functional layer F21.

[0055] The display element 22 includes a lower electrode (second lower electrode) E12, an organic layer (second organic layer) OR2, and an upper electrode (second upper electrode) E22. The organic layer OR2 includes a functional layer F12, a light-emitting layer EL2, and a functional layer F22. The lower electrodes E11 and E12 are arranged at intervals in the first direction X.

[0056] The insulating layer 12 is disposed between the lower electrode E11 and the lower electrode E12. In addition, the insulating layer 12 has an opening OP1, an opening OP2, inclined surfaces S1 and S2, and an upper surface U1.

[0057] The opening OP1 is formed in a region overlapping with the lower electrode E11 and is a through hole that penetrates the insulating layer 12 to the lower electrode E11. The peripheral portion of the lower electrode E11 is covered by the insulating layer 12, and the central portion of the lower electrode E11 is exposed from the insulating layer 12 in the opening OP1.

[0058] The opening OP2 is formed in a region overlapping with the lower electrode E12 and is a through hole that penetrates the insulating layer 12 to the lower electrode E12. The peripheral portion of the lower electrode E12 is covered by the insulating layer 12, and the central portion of the lower electrode E12 is exposed from the insulating layer 12 in the opening OP2.

[0059] The upper surface U1, the inclined surfaces S1 and S2 correspond to the surface between the opening OP1 and the opening OP2 in the insulating layer 12. The inclined surface S1 faces the opening OP1. The inclined surface S2 faces the opening OP2. The upper surface U1 is located between the inclined surfaces S1 and S2. In addition, the upper surface U1, the inclined surfaces S1 and S2 are, for example, flat surfaces, but may also be curved surfaces.

[0060] The organic layer OR1 is disposed in the opening OP1 and covers the lower electrode E11. Figure 4In the example shown, the organic layer OR1 is disposed on the inclined surface S1 and also on a part of the upper surface U1. The upper electrode E21 is laminated on the organic layer OR1. A portion of the organic layer OR1 that is between the lower electrode E11 and the upper electrode E21 without passing through the insulating layer 12 can form a light-emitting region of the display element 21. The portions of the organic layer OR1 disposed on the inclined surface S1 and the upper surface U1 hardly emit light because they are between the insulating layer 12 and the upper electrode E21.

[0061] The organic layer OR2 is disposed in the opening OP2 and covers the lower electrode E12. In Figure 4 the example shown, the organic layer OR2 is disposed on the inclined surface S2 and also on a part of the upper surface U1. On the upper surface U1, the organic layer OR2 is separated from the organic layer OR1. The upper electrode E22 is laminated on the organic layer OR2. The upper electrode E22 is separated from the upper electrode E21. A portion of the organic layer OR2 that is between the lower electrode E12 and the upper electrode E22 without passing through the insulating layer 12 can form a light-emitting region of the display element 22. The portions of the organic layer OR2 disposed on the inclined surface S2 and the upper surface U1 hardly emit light because they are between the insulating layer 12 and the upper electrode E22.

[0062] The partition wall 30 is located between the display element 21 and the display element 22 and is disposed on the insulating layer 12. More specifically, the partition wall 30 has a first layer 31 and a second layer 32.

[0063] The first layer 31 is in contact with the upper surface U1 of the insulating layer 12 and is disposed between the organic layer OR1 and the organic layer OR2 and between the upper electrode E21 and the upper electrode E22. The first layer 31 is formed of a metal material. That is, the first layer 31 is a conductor. The first layer 31 has a first side surface S11 facing the opening OP1, a second side surface S12 facing the opening OP2, and a first upper surface U11 between the first side surface S11 and the second side surface S12. When viewed from above, such a first layer 31 is formed in Figure 2 a lattice shape as shown, or Figure 3 a strip shape as shown.

[0064] The second layer 32 is in contact with the first upper surface U11 and is separated from the insulating layer 12. The second layer 32 can be a conductor formed of a metal material or an insulator formed of an insulating material. The second layer 32 extends from the first side surface S11 toward the opening OP1 and further extends from the second side surface S12 toward the opening OP2. The second layer 32 has a side surface S21 facing the opening OP1, a side surface S22 facing the opening OP2, and a second upper surface U21 between the side surface S21 and the side surface S22. When viewed from above, such a second layer 32 overlaps with the first layer 31 and is formed in Figure 2in a lattice shape as shown, or Figure 3 in a strip shape as shown.

[0065] In the illustrated cross-section, the width of the second layer 32 is larger than the width of the first layer 31. The width of the first layer 31 corresponds to the maximum interval along the first direction X between the first side surface S11 and the second side surface S12. The width of the second layer 32 corresponds to the maximum interval along the first direction X between the side surface S21 and the side surface S22.

[0066] The upper electrode E21 is in contact with the first side surface S11 on the side close to the insulating layer 12 in the first layer 31. The upper electrode E21 exposes the first side surface S11 on the side close to the second layer 32.

[0067] The upper electrode E22 is in contact with the second side surface S12 on the side close to the insulating layer 12 in the first layer 31. The upper electrode E22 exposes the second side surface S12 on the side close to the second layer 32.

[0068] Thus, although the upper electrodes E21 and E22 are separated from each other along the first direction X, they are respectively electrically connected to the partition wall 30. In other words, the upper electrode E21 is electrically connected to the upper electrode E22 via the partition wall 30 (or the first layer 31).

[0069] The organic layer OR1 is separated from the first side surface S11. The upper electrode E21 is in contact with the upper surface U1 of the insulating layer 12 between the first side surface S11 and the organic layer OR1. In addition, the upper electrode E21 covers the peripheral portion of the organic layer OR1. That is, the end surfaces of the functional layer F11, the light-emitting layer EL1, and the functional layer F21 are respectively covered by the upper electrode E21.

[0070] The organic layer OR2 is separated from the second side surface S12. The upper electrode E22 is in contact with the upper surface U1 of the insulating layer 12 between the second side surface S12 and the organic layer OR2. In addition, the upper electrode E22 covers the peripheral portion of the organic layer OR2. That is, the end surfaces of the functional layer F12, the light-emitting layer EL2, and the functional layer F22 are respectively covered by the upper electrode E22.

[0071] Regarding the position of the partition wall 30 on the insulating layer 12, for example, the partition wall 30 is located approximately at the center of the upper surface U1. That is, the distance D1 between the first side surface S11 and the opening OP1 and the distance D2 between the second side surface S12 and the opening OP2 are substantially equal.

[0072] The organic layer (third organic layer) OR3 covers the second upper surface U21 of the second layer 32. In Figure 4 the illustrated example, the organic layer OR3 also covers the side surfaces S21 and S22. The organic layer OR3 is covered by the upper electrode (third upper electrode) E23.

[0073] The organic layer OR3 includes a functional layer F13, a light-emitting layer EL3, and a functional layer F23.

[0074] The functional layer F13 is formed of the same material as the functional layers F11 and F12. The functional layer F23 is formed of the same material as the functional layers F21 and F22. That is, the organic layer OR1, the organic layer OR2, and the organic layer OR3 each include at least one of the above hole injection layer, hole transport layer, hole blocking layer, electron injection layer, electron transport layer, and electron blocking layer.

[0075] The light-emitting layer EL3 is formed of the same material as the light-emitting layers EL1 and EL2. That is, the organic layer OR1, the organic layer OR2, and the organic layer OR3 include light-emitting layers of the same color. Alternatively, the organic layer OR1, the organic layer OR2, and the organic layer OR3 are common layers.

[0076] However, the first side surface S11 and the second side surface S12 of the first layer 31 are exposed from the organic layer OR3 and the upper electrode E23. That is, the organic layer OR3 is separated from both the organic layer OR1 and OR2. In addition, the upper electrode E23 is separated from both the upper electrodes E21 and E22.

[0077] The above-described partition walls 30 are respectively disposed between adjacent display elements 20 or on the upper surface U1 of the insulating layer 12. The upper electrode E2 of each display element 20 is in contact with the first side surface S11 or the second side surface S12 of the first layer 31 and is electrically connected to each other. Looking at each display element 20, the partition walls 30 are disposed on both sides of the opening OP, one end portion of the upper electrode E2 is in contact with the side surface of one first layer 31, and the other end portion of the upper electrode E2 is in contact with the side surface of the other first layer 31. Thus, the upper electrodes E2 of the plurality of display elements 20 disposed in the display portion DA are electrically connected to each other.

[0078] Figure 5 is for explaining Figure 4 the formation process of the cross-sectional structure shown.

[0079] For example, after forming the lower electrode E1, an organic insulating layer is formed, and the organic insulating layer is patterned to form the insulating layer 12. Then, a metal layer is formed, and then, for example, an insulating layer is formed, and these metal layers and insulating layers are patterned together. At this time, by setting conditions that promote etching of the metal layer more than etching of the insulating layer, the partition wall 30 having the Figure 4 shape shown is formed, including the first layer 31 and the second layer 32.

[0080] Thereafter, each layer constituting the organic layer OR is formed, for example, by a vacuum evaporation method. At this time, the emission angle of the vapor from the evaporation source is set to θ1. The emission angle θ1 is the angle with respect to the normal N of the substrate SUB, which is the evaporation target on which the partition wall 30 has been formed. The evaporation of the organic layer OR is performed while relatively linearly moving or rotationally moving the evaporation source with respect to the substrate SUB. Thereby, an organic layer OR with a uniform film thickness is formed on each sub-pixel.

[0081] Thereafter, the upper electrode E2 is formed, for example, by a sputtering method. At this time, the emission angle of the material from the target is set to θ2. The emission angle θ2 is the angle with respect to the normal N of the substrate SUB. The emission angle θ2 is larger than the emission angle θ1.

[0082] Here, the angle formed by the normal N of the substrate SUB and the virtual line L11 is set to Θ. The virtual line L11 is a line passing through the intersection of the second side surface S12 of the first layer 31 and the upper surface U1 of the insulating layer 12 and the lower end of the side surface S22 of the second layer 32. The emission angle θ1 is smaller than the angle Θ, and the emission angle θ2 is larger than the angle Θ (θ1 < Θ < θ2).

[0083] Therefore, the organic layer OR is formed on the upper surface U1 and the inclined surface S2 separated from the first layer 31. In addition, the organic layer OR is also formed on the second upper surface U21 and the side surface S22 of the second layer 32.

[0084] The upper electrode E2 is formed on the inclined surface S2, the upper surface U1 between the inclined surface S2 and the first layer 31, and the second side surface S12 of the first layer 31, respectively. In addition, the upper electrode E2 is also formed on the second upper surface U21 and the side surface S22 of the second layer 32.

[0085] Figure 6A It is an enlarged cross-sectional view showing an example of the partition wall 30.

[0086] The width W1 of the first layer 31 along the first direction X increases as it goes upward along the third direction Z. That is, the first layer 31 has an inverted conical cross-sectional shape. The thickness T1 of the first layer 31 along the third direction Z is more than twice the thickness of the organic layer OR. In addition, the thickness T1 is smaller than the width W1 (T1 < W1). For example, the thickness of the organic layer OR is on the order of several hundred nm. The thickness T1 is 500 nm or more and several μm or less. In addition, the width W1 is about ten-odd μm.

[0087] In the first layer 31, the first side surface S11 and the second side surface S12 are inclined surfaces. The angles θA formed by the first side surface S11 and the upper surface U1 and the angles θA formed by the second side surface S12 and the upper surface U1 are both acute angles.

[0088] In the second layer 32, the larger the protruding width W11 extending from the first side surface S11 and the protruding width W12 extending from the second side surface S12, the more the evaporation onto the inclined surfaces S1 and S2 of the organic layer OR is suppressed. However, if the widths W11 and W12 are too large, the evaporation of the upper electrode E2 is also restricted, and there is a risk of hindering the contact between the upper electrode E2 and the first layer 31. Therefore, the width W2 of the second layer 32 along the first direction X is preferably equal to or less than the width W3 of the bottom surface B1 of the insulating layer 12 along the first direction X.

[0089] Figure 6B It is an enlarged cross-sectional view showing another example of the partition wall 30.

[0090] Figure 6B The example shown and Figure 6A Compared with the example shown, the cross-sectional shape of the first layer 31 is different. The width W1 of the first layer 31 along the first direction X decreases as it goes upward along the third direction Z. That is, the first layer 31 has a positive conical cross-sectional shape.

[0091] In the first layer 31, the first side surface S11 and the second side surface S12 are inclined surfaces. The angle θB formed by the first side surface S11 and the upper surface U1 and the angle θB formed by the second side surface S12 and the upper surface U1 are both obtuse angles.

[0092] As described above, the partition wall 30 is disposed between adjacent display elements 20, and the organic layer OR formed without passing through a fine mask is divided by the partition wall 30. Therefore, a display element 20 having an organic layer OR with a desired shape can be provided. Thus, compared with the case of applying a fine mask, the manufacturing cost can be reduced, and processes such as alignment of the fine mask are not required, and an organic layer OR with a desired shape can be easily formed. In addition, in the display element 20, a light-emitting region can be formed in a specified region, and in addition, undesired light emission in the region overlapping with the insulating layer 12 can be suppressed.

[0093] In addition, the upper electrode E2 is also divided by the partition wall 30 in the same manner as the organic layer OR, but each upper electrode E2 is in contact with and electrically connected to the first layer 31 which is a conductor in the partition wall 30. The first layer 31 is electrically connected to a power supply line at a specified potential inside or outside the display portion DA. Therefore, a specified potential is supplied to the upper electrode E2 of each display element 20 via the partition wall 30. That is, a potential drop in a part of the upper electrode E2 can be suppressed.

[0094] In addition, in adjacent display elements 20, undesired current leakage (crosstalk) caused by the connection of the organic layers OR is suppressed. Thus, in the display element 20, desired display performance can be achieved.

[0095] Figure 7This is a cross-sectional view showing another example of the display element 20.

[0096] Figure 7 The example shown is different from Figure 4 the example shown in that the peripheral portion of the organic layer OR is covered with the insulating film 13. For example, regarding the organic layer OR1, the peripheral portion on the left side of the figure and the peripheral portion on the right side of the figure are respectively covered with the insulating film 13. Figure 7 The organic layer OR1 shown has the functional layer F11, the light-emitting layer EL1, and the functional layer F21, but the peripheral portions of these respective layers are covered with the insulating film 13. The insulating film 13 is in contact with the upper surface U1 of the insulating layer 12 and the first layer 31 of the partition wall 30.

[0097] When such an insulating film 13 is formed on the peripheral portion of the organic layer OR, it is also formed in the same manner above the partition wall 30. Above the second layer 32, the insulating film 13 covers the organic layer OR3 and is covered by the upper electrode E23.

[0098] The upper electrode E21 is in contact with the uppermost layer in the organic layer OR1 (the functional layer F21 in Figure 7 ) and the insulating film 13, but is not in contact with the functional layer F11 and the light-emitting layer EL1. Therefore, it is possible to suppress undesirable current leakage at the peripheral portion of the organic layer OR (for example, the bad situation where current flows between the lower electrode E11 and the upper electrode E21 through the functional layer F11 without passing through the light-emitting layer EL1), and it is possible to suppress the deterioration of the performance of the display element 20.

[0099] Figure 8 This is a cross-sectional view showing another example of the display element 20.

[0100] Figure 8 The example shown is different from Figure 4 the example shown in that the shape of the partition wall 30 is different. In particular, the second layer 32 is formed asymmetrically on the side facing the opening OP1 and the side facing the opening OP2. In the second layer 32, the width extending from the second side surface S12 toward the opening OP2 is smaller than the width extending from the first side surface S11 toward the opening OP1. In Figure 8 the example shown, in the second layer 32, the width extending from the second side surface S12 is substantially zero.

[0101] The organic layer OR1 is separated from the first side surface S11. The upper electrode E21 is in contact with the first side surface S11 of the first layer 31, and is also in contact with the insulating layer 12 between the first side surface S11 and the organic layer OR1.

[0102] The organic layer OR2 is separated from the second side surface S12. The upper electrode E22 is separated from the second side surface S12 of the first layer 31. The upper electrode E22 is in contact with the insulating layer 12 between the second side surface S12 and the organic layer OR2, but the insulating layer 12 is exposed in the region close to the first layer 31.

[0103] Regarding the position of the partition wall 30 on the insulating layer 12, for example, the partition wall 30 is located on the upper surface U1 on the side close to the display element 22. That is, the distance D1 between the first side surface S11 and the opening OP1 is larger than the distance D2 between the second side surface S12 and the opening OP2.

[0104] The organic layer OR3 covers the second upper surface U21 of the second layer 32. In Figure 8 the example shown, the organic layer OR3 also covers the side surface S21, but the side surface S22 is exposed. The organic layer OR3 is covered by the upper electrode E23. The organic layer OR3 includes a functional layer F13, a light-emitting layer EL3, and a functional layer F23.

[0105] The upper electrode E23 exposes the side surface S22, but may also cover the side surface S22.

[0106] The first side surface S11 and the second side surface S12 of the first layer 31 are exposed from the organic layer OR3 and the upper electrode E23. That is, the organic layer OR3 is separated from both the organic layers OR1 and OR2. In addition, the upper electrode E23 is separated from both the upper electrodes E21 and E22.

[0107] The above-mentioned partition walls 30 are respectively arranged between adjacent display elements 20, or on the upper surface U1 of the insulating layer 12. In the first layer 31 constituting the partition wall 30, one side surface is in contact with the upper electrode E2 of the opposed display element 20, and the other side surface is separated from the upper electrode E2 of the opposed display element 20. If looking at each display element 20, the partition walls 30 are arranged on both sides sandwiching the opening OP, one end of the upper electrode E2 is in contact with the side surface of one first layer 31, and the other end of the upper electrode E2 is separated from the other first layer 31. Thus, the upper electrodes E2 of the plurality of display elements 20 arranged in the display section DA are electrically connected to each other.

[0108] In Figure 8 the example shown, the display element 20 having an organic layer OR with a desired shape is provided without using a fine mask, so the same effect as the above example can be obtained.

[0109] Figure 9 is a diagram for explaining Figure 8 the forming process of the cross-sectional structure shown.

[0110] For example, each layer constituting the organic layer OR is formed by a vacuum evaporation method. However, here, an inclined evaporation method in which evaporation is performed from a direction inclined with respect to the normal line of the substrate SUB is applied. At this time, the vapor from the evaporation source VS is emitted at a radiation angle α with respect to the center line O. The angle formed by the center line O and the surface of the substrate SUB (here, the upper surface U1 of the insulating layer 12) is set as β.

[0111] Here, let the angle formed by the virtual line L12 and the surface of the substrate SUB be Θ. The virtual line L12 is a line passing through the intersection of the second side surface S12 of the first layer 31 and the upper surface U1 of the insulating layer 12 and the lower end of the side surface S21 of the second layer 32. The angle (β - α) is larger than the angle Θ ((β - α) > Θ).

[0112] Therefore, the organic layer OR is formed on the upper surface U1 and the inclined surface S1 separated from the first layer 31. In addition, the organic layer OR is also formed on the second upper surface U21 and the side surface S21 of the second layer 32. On the other hand, according to such an inclined evaporation method, the organic layer OR is hardly formed on the inclined surface S2 of the insulating layer 12 and the side surface S22 of the second layer 32.

[0113] Figure 10 It is a diagram for explaining an example of the evaporation method of the organic layer OR.

[0114] Here, it is assumed that the light-emitting region EA of the sub-pixel SP is formed in a rectangular shape having a short side extending in the first direction X and a long side extending in the second direction Y. The angle β formed by the center line O of the evaporation source VS and the diagonal line DL of the light-emitting region EA is set to satisfy the reference Figure 9 and the described condition ((β - α) > Θ).

[0115] Figure 10 The evaporation method shown is suitable for the case where the partition walls 30 are formed in a lattice shape extending along the first direction X and the second direction Y respectively as shown in Figure 2 shown.

[0116] Figure 11 It is a diagram for explaining another example of the evaporation method of the organic layer OR.

[0117] Here, it is assumed that the light-emitting region EA of the sub-pixel SP is formed in a rectangular shape having a short side extending in the first direction X and a long side extending in the second direction Y. The angle β formed by the center line O of the evaporation source VS and the virtual line LX parallel to the first direction X is set to satisfy the reference Figure 9 and the described condition ((β - α) > Θ).

[0118] Figure 11 The evaporation method shown is suitable for the case where... as shown in Figure 3The case where the partition walls 30 are formed in strip shapes extending along the second direction Y, respectively, as shown.

[0119] Figure 10 And Figure 11 The vapor deposition of the organic layer OR shown is a vapor deposition performed while relatively linearly moving the vapor deposition source VS with respect to the substrate SUB. The direction of the linear movement can also be any direction within the X - Y plane. Thereby, an organic layer OR with a uniform film thickness is formed in each sub - pixel SP.

[0120] Figure 12 It is a cross - sectional view showing another example of the display element 20.

[0121] Figure 12 The example shown and Figure 8 The difference from the example shown is that the peripheral portion of the organic layer OR is covered with the insulating film 13. For example, regarding the organic layer OR1, the left - hand peripheral portion and the right - hand peripheral portion of the figure are respectively covered with the insulating film 13. Figure 12 The organic layer OR1 shown has a functional layer F11, a light - emitting layer EL1, and a functional layer F21, but the peripheral portions of these respective layers are covered with the insulating film 13.

[0122] In the case where such an insulating film 13 is formed on the peripheral portion of the organic layer OR, it is also formed on the partition walls 30 in the same manner. Above the second layer 32, the insulating film 13 covers the organic layer OR3 and is covered by the upper electrode E23.

[0123] The upper electrode E21 is in contact with the uppermost layer in the organic layer OR1 (the functional layer F21 in Figure 12 ) and the insulating film 13, but is not in contact with the functional layer F11 and the light - emitting layer EL1. Therefore, it is possible to suppress an undesired current leakage at the peripheral portion of the organic layer OR (for example, a bad situation where current flows between the lower electrode E11 and the upper electrode E21 through the functional layer F11 without passing through the light - emitting layer EL1), and it is possible to suppress the deterioration of the performance of the display element 20.

[0124] According to the above - described present embodiment, it is possible to provide a display device that can suppress the deterioration of the performance of the display element.

[0125] All display devices that can be appropriately designed and modified by those skilled in the art based on the display device described as an embodiment of the present invention and that include the gist of the present invention fall within the scope of the present invention.

[0126] Within the scope of the idea of the present invention, if various modifications can be conceived by those skilled in the art, these modifications should also be understood to fall within the scope of the present invention. For example, for those skilled in the art, the ways after appropriately adding, deleting, or changing the design of the components in the above-mentioned embodiments, or the ways after adding, omitting, or changing the conditions of the processes, as long as they possess the gist of the present invention, they are included within the scope of the present invention.

[0127] In addition, regarding other effects brought about by the ways described in the above-mentioned embodiments, the content clarified according to the description of this specification, or the content that can be appropriately conceived by those skilled in the art, is of course considered to be brought about by the present invention.

Claims

1. A display device, comprising: An insulating substrate; A first insulating layer disposed on the insulating substrate; A first lower electrode and a second lower electrode disposed on the first insulating layer; A second insulating layer disposed between the first lower electrode and the second lower electrode on the first insulating layer, having a first opening overlapping with the first lower electrode and a second opening overlapping with the second lower electrode; A partition disposed on the second insulating layer; A first organic layer including a light-emitting layer, disposed in the first opening and covering the first lower electrode; A first upper electrode covering the first organic layer; A second organic layer including a light-emitting layer, disposed in the second opening and covering the second lower electrode; And A second upper electrode covering the second organic layer, The partition has: A first layer in contact with the second insulating layer, formed of a metal material, having a first side facing the first opening, a second side facing the second opening, and a first upper surface; And A second layer in contact with the first upper surface, extending from the first side toward the first opening, The first upper electrode is in contact with the first side, In the second layer, the width extending from the second side toward the second opening is smaller than the width extending from the first side toward the first opening, The second upper electrode is separated from the second side and exposes the second insulating layer, The second layer is formed asymmetrically with respect to the first layer, and the second layer is configured not to exceed the periphery of the second insulating layer when viewed from above, The first layer is configured to be lattice-shaped when viewed from above, cut off the first upper electrode and the second upper electrode, and be electrically connected to a power supply line at a specified potential to supply the specified potential to the first upper electrode.

2. The display device according to claim 1, Wherein, The first organic layer is separated from the first side, The first upper electrode is in contact with the second insulating layer between the first side and the first organic layer.

3. The display device according to claim 1, Wherein, The second organic layer is separated from the second side, The second upper electrode is in contact with the second insulating layer between the second side and the second organic layer.

4. The display device according to claim 3, Wherein, The distance between the first side and the first opening is larger than the distance between the second side and the second opening.

5. The display device according to claim 1, Wherein, The thickness of the first layer is smaller than the width of the first layer.

6. The display device according to claim 1, Wherein, The display device further includes an insulating film that covers the peripheral portion of the first organic layer.

7. The display device according to claim 1, Wherein, The first organic layer and the second organic layer include light-emitting layers of the same color.

8. The display device according to claim 1, Wherein, The first organic layer and the second organic layer each further include at least one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.

9. The display device according to claim 1, wherein, the second layer has a second upper surface, the display device further comprises: a third organic layer covering the second upper surface; and a third upper electrode covering the third organic layer, the third organic layer is separated from the first organic layer and the second organic layer, the third upper electrode is separated from the first upper electrode and the second upper electrode.

10. The display device according to claim 9, wherein, the first organic layer, the second organic layer, and the third organic layer include light-emitting layers of the same color.

11. The display device according to claim 10, wherein, each of the first organic layer, the second organic layer, and the third organic layer further includes at least one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.

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