Measurement of transceiver performance parameters in radar systems

Abstract

This application discloses measurement of transceiver performance parameters in a radar system. In the described example of a radar system on a chip (SOC) (102), the radar system on a chip (SOC) (102) is configured to monitor performance parameters of one or more receive channels (202) and / or one or more transmit channels (204), the radar SOC (102) can include a loopback path coupling at least one transmit channel (204) to at least one receive channel (202) to provide a test signal from the at least one transmit channel (204) to the at least one receive channel (202) when the radar SOC (102) is operating in a test mode. In some embodiments, the loopback path includes a combiner (318) coupled to each of the one or more transmit channels (204), a splitter (320) coupled to each of the one or more receive channels (202), and a single wire coupling an output of the combiner (318) to an input of the splitter (320).

Description

[0001] This application is a divisional application of Chinese patent application 201680046131.0 (PCT / US2016 / 054921), entitled "Measurement of transceiver performance parameters in radar systems," filed on September 30, 2016, and entered the national phase on February 6, 2018. Technical Field

[0002] This application generally relates to radar systems, and more specifically to the measurement of transceiver performance parameters in radar systems. Background Technology

[0003] A new class of safety systems known as Advanced Driver Assistance Systems (ADAS) has been introduced into automobiles to reduce human error. These systems are enabled by intelligent sensors, primarily based on millimeter-wave automotive radar. Improvements in microcontroller and sensor technologies have enabled the proliferation of these assistance systems, providing functionalities such as rearview cameras, electronic stability control, and vision-based pedestrian detection systems. Enhanced embedded radar-based solutions enable complementary safety features for ADAS designers.

[0004] In automotive radar systems, radar sensors are used to detect obstacles around the vehicle and the speed of detected objects relative to the vehicle. The processing unit within the radar system can determine appropriate actions based on the signals generated by the radar sensors, such as avoiding a collision or minimizing collateral damage. Current automotive radar systems are capable of detecting objects and obstacles around the vehicle, the position of any detected object or obstacle relative to the vehicle, and the speed of any detected object or obstacle relative to the vehicle. For example, via the processing unit, the radar system can warn the driver of potential hazards, prevent a collision by controlling the vehicle in a dangerous situation, take over partial control of the vehicle, or assist the driver in parking the vehicle.

[0005] Automotive radar systems are required to comply with the functional safety specifications of International Standard 26262, entitled "Road Vehicles - Functional Safety." ISO 26262 defines functional safety as the absence of an unreasonable risk arising from the malfunction of an electrical / electronic system. The functional safety of automotive radar is to prevent injury to the human body due to malfunction of components within the radar. For automotive radar, it should be known that the radar functions properly within a tolerance time interval of approximately 100 milliseconds (ms). Therefore, during vehicle operation, the presence or location of any fault or obstruction in any part of the radar that would cause a decrease in the signal-to-noise ratio (SNR) should be detected, and an appropriate response should be executed within approximately 100 milliseconds. Summary of the Invention

[0006] In an example of the described method and apparatus for measuring transceiver performance parameters in a radar system, a radar system-on-a-chip (SOC) configured to monitor one or more performance parameters includes one or more receive channels, one or more transmit channels, a transmit generation circuitry coupled to one or more transmit channels, and a loopback path coupling one or more transmit channels to one or more receive channels. The transmit generation circuitry is operable to generate a continuous wave signal when the radar SOC is operating in test mode. The loopback path includes a combiner coupled to one or more transmit channels, a splitter coupled to one or more channels, and a single wire coupling the output of the combiner to the input of the splitter. The loopback path is operable to provide a test signal from at least one transmit channel receiving a continuous wave signal to at least one receive channel when the radar SOC is operating in test mode.

[0007] On one hand, a radar system-on-a-chip (SOC) configured to monitor one or more performance parameters includes one or more receive channels, one or more transmit channels, and a transmit generation circuitry coupled to one or more transmit channels, the transmit generation circuitry being operable to generate a continuous wave signal when the radar SOC is operating in test mode.

[0008] On one hand, a radar system-on-a-chip configured to monitor one or more performance parameters includes a receive channel, a transmit channel, a transmit generation circuitry coupled to the transmit channel, and a loopback path coupling the transmit channel to the receive channel. The transmit generation circuitry is operable to generate a continuous wave signal when the radar SOC is operating in test mode. The loopback path includes a first combiner, a second combiner, a frequency shifter, a third combiner, a splitter, and a single wire. The first combiner is coupled to the output of a programmable shifter included in each transmit channel. The second combiner is coupled to the output of a power amplifier chain in each transmit channel. The frequency shifter is coupled to the output of the second combiner. The third combiner is coupled to the outputs of the first combiner and the frequency shifter. The splitter is coupled to the input of each receive channel. The single wire couples the output of the third combiner to the input of the splitter. The loopback path is operable to provide a test signal from at least one transmit channel receiving a continuous wave signal to the receive channel when the radar SOC is operating in test mode. Attached Figure Description

[0009] Figure 1 This is a block diagram of an example frequency modulated continuous wave (FMCW) radar system configured to perform performance monitoring during radar system operation.

[0010] Figure 2This is a block diagram of an example radar system-on-a-chip (SOC).

[0011] Figure 3 , Figure 4 and Figure 5 yes Figure 2 A simplified block diagram of an example embodiment of a radar SOC, wherein the radar SOC is configured to measure performance parameters of the receive channel and / or transmit channel.

[0012] Figure 6 , Figure 7 , Figure 8 , Figure 9 and Figure 10 This is a flowchart of the method. Detailed Implementation

[0013] Specific embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. For consistency, similar elements in the various figures are indicated by similar reference numerals.

[0014] Several embodiments of this disclosure provide methods for monitoring the performance of a radar transceiver integrated circuit within a radar SOC when used, for example, in a radar system-on-a-chip (SOC) in an operating vehicle. More specifically, in various embodiments, the performance of the receive and / or transmit channels of the radar SOC can be measured based on test signals captured on the SOC. For example, the test signals are used to detect gain and phase response mismatches between multiple receive channels and / or multiple transmit channels, noise and spurious tone levels in the receive and / or transmit channels, and / or nonlinearity of the receive channels. In various embodiments, instead of wires coupling each transmit / receive channel pair for transmitting test signals from the transmit channels to the receive channels, one or more transmit channels of the SOC are coupled to a combiner, and the output of the combiner is routed via a single wire to a splitter, which is coupled to one or more receive channels.

[0015] Figure 1 This is a block diagram of an example frequency-modulated continuous wave (FMCW) radar system 100 configured to perform performance monitoring during radar system 100 operation. The example FMCW radar system 100 includes a radar system-on-a-chip (SOC) 102, a processing unit 104, and a network interface 106. Reference Figure 2-5 The architecture of various embodiments of the radar SOC 102 is described.

[0016] The radar SOC 102 is coupled to the processing unit 104 via a high-speed serial interface. (See reference...) Figure 2To explain in more detail, the radar SOC 102 includes the function of generating multiple digital intermediate frequency (IF) signals (alternately referred to as dechirped signals, beat signals, or raw radar signals), which are provided to the processing unit 104 via a high-speed serial interface. Further, as referenced... Figure 3 , Figure 4 and Figure 5 In more detail, various embodiments of the radar SOC 102 are configured to generate test data for the receive and / or transmit channels of the SOC 102, and to provide the test data to the processing unit 104 for monitoring the performance parameters of the receive and / or transmit channels.

[0017] Processing unit 104 includes functions for performing radar signal processing, i.e., processing received radar signals to determine, for example, the distance, velocity, and angle of any detected object. Processing unit 104 may also include functions for performing post-processing on information about the detected object (e.g., tracking the object, determining the rate and direction of movement, etc.). Furthermore, processing unit 104 includes functions for performing performance monitoring based on test data provided by radar SOC 102 and for performing mitigation based on conditions detected by performance monitoring. The test data and options used for performance monitoring are described in more detail herein.

[0018] Processing unit 104 may include any suitable processor or combination of processors required depending on the throughput of the radar data processing application. For example, processing unit 104 may include a digital signal processor (DSP), a microcontroller (MCU), a system-on-a-chip (SoC) or a field-programmable gate array (FPGA) that combines a DSP and an MCU to process both.

[0019] Processing unit 104 provides control information to one or more electronic control units (ECUs) in the vehicle as needed via network interface 106. An electronic control unit (ECU) is a general term for any embedded system in a vehicle that controls one or more electrical systems or subsystems within the vehicle. Example types of ECUs include engine / electronic control modules (ECMs), powertrain control modules (PCMs), transmission / transmission control modules (TCMs), brake control modules (BCMs or EBCMs), central control modules (CCMs), central timing / timing modules (CTMs), general electronic modules (GEMs), body control modules (BCMs), and suspension control modules (SCMs).

[0020] Network interface 106 can implement any suitable protocol, such as Controller Area Network (CAN) protocol, FlexRay protocol, or Ethernet protocol.

[0021] Figure 2This is a block diagram of an example radar SOC 102. The radar SOC 102 may include multiple transmit channels 204 for transmitting FMCW signals and multiple receive channels 202 for receiving reflected transmitted signals. Furthermore, the number of receive channels may be greater than the number of transmit channels. For example, an embodiment of the radar SOC 102 may have two transmit channels and four receive channels.

[0022] The transmitting channel includes a suitable transmitter and antenna. The receiving channel includes a suitable receiver and antenna. Further, each of the receiving channels 202 is identical and includes a low-noise amplifier (LNA) 206, 208 for amplifying the received signal; a mixer 210, 212 for mixing the signal generated by the transmitting generation circuitry system with the received signal to generate an IF signal; a baseband bandpass filter 214, 216 for filtering the IF signal; a variable gain amplifier (VGA) 215, 217 for amplifying the filtered IF signal; and an analog-to-digital converter (ADC) 218, 220 for converting the analog IF signal to a digital IF signal. The mixer acts as a down-converter to generate an output signal whose frequency is equal to the difference between the frequencies of the inputs received from the low-noise amplifier and the transmitting generation circuitry system, both of which are radio frequency (RF) signals. The bandpass filter, VGA, and ADC of the receiving channel can be collectively referred to as a baseband chain or baseband filter chain. Further, the bandpass filter and VGA can be collectively referred to as an IF amplifier (IFA).

[0023] Receive channel 202 is coupled to digital front-end (DFE) component 222 to provide the digital IF signal to DFE 222. DFE 222 includes the function of performing decimation filtering on the digital IF signal to reduce the data transmission rate. DFE 222 may also perform other operations on the digital IF signal, such as DC offset cancellation and digital compensation for non-ideals in the receive channel (e.g., inter-RX gain imbalance and inter-RX phase imbalance). When the radar SOC 102 is in normal mode, DFE 222 is coupled to high-speed serial interface (I / F) 224 to transmit the decimated digital IF signal to processing unit 106. In some embodiments, when the radar SOC 102 is in test mode, DFE is also coupled to control module 228 to transmit digital test signals to control module 228.

[0024] The Serial Peripheral Interface (SPI) 226 provides an interface for communicating with the processing unit 106. For example, the processing unit 106 can use SPI 226 to send control information to the control module 228, such as chirp timing and frequency, output power level, trigger monitoring functions, etc. For example, the radar SOC 102 can use SPI 226 to send test data to the processing unit 106.

[0025] Control module 228 includes functions for controlling the operation of radar SOC 102 in normal and test modes. For example, control module 228 may include a buffer for storing output samples of DFE 222, an FFT (Fast Fourier Transform) engine for calculating spectral information of the buffer contents, and an MCU that executes firmware to control the operation of radar SOC 102 in normal and test modes. (Reference) Figure 6-10 The method describes the function of control module 228 in more detail.

[0026] The programmable timing engine 232 includes functions for receiving chirp parameter values ​​of the chirp sequence in a radar frame from the control module 228, and for generating chirp control signals for transmitting and receiving chirps in the control frame based on the parameter values. For example, the chirp parameters are defined by the radar system architecture and may include transmitter enable parameters indicating which transmitters should be enabled, a chirp frequency start value, a chirp frequency slope, a chirp duration, indicators of when the transmit channel should transmit, and indicators of when the DFE output digital data should be collected for further radar processing. One or more of these parameters may be programmable.

[0027] The radio frequency synthesizer (SYNTH) 230 includes the function of generating an FMCW signal for transmission based on a chirp control signal from the timing engine 232. In some embodiments, the SYNTH 230 includes a phase-locked loop (PLL) with a voltage-controlled oscillator (VCO).

[0028] Clock multiplier 240 increases the frequency of the transmit signal (LO signal) to the LO frequency of mixers 206 and 208. PLL (phase-locked loop) 234 is cleared to increase the signal frequency of an external low-frequency reference clock (not shown) to the frequency of SYNTH 230 and to filter out reference clock phase noise from the clock signal.

[0029] Clock multiplier 240, synthesizer 230, timing generator 232, and clear PLL 234 are examples of a transmit generation circuit system. The transmit generation circuit system generates a radio frequency (RF) signal, which is input to the transmit channel and, via the clock multiplier, to a mixer in the receive channel. The output of the transmit generation circuit system may be referred to as an LO (Local Oscillator) signal or an FMCW signal.

[0030] Figure 3 , Figure 4 and Figure 5 yes Figure 2A simplified block diagram of an example embodiment of a radar SOC 102 is shown, wherein the radar SOC 102 is configured to measure performance parameters of a receiver and / or transmitter. For simplicity, the described embodiments all have four receive channels and two transmit channels. In some embodiments, the number of receive channels and / or transmit channels may differ. In these methods, when the radar SOC operates in test mode, the transmit generation circuitry is configured to generate a continuous wave signal with zero slope, i.e., an LO signal of a continuous RF wave with a constant frequency. When the radar SOC operates in normal mode, the output of the transmit generation circuitry is an RF signal whose frequency changes over time; for example, in response to chirp control parameters, the frequency of the RF signal changes from 77 GHz to 81 GHz in a time interval of 0 to 100 μs, resulting in a reflected signal as a delayed version of the transmitted signal, and the mixer output in each receive channel is an IF signal proportional to the round-trip delay.

[0031] Figure 3 , Figure 4 and Figure 5 Each block diagram in the diagram includes at least one combiner. Typically, a combiner can be hardware circuitry that adds input signals to form an output signal. If the combiner receives a single input signal, that signal is output by the combiner. In some embodiments, the combiner may apply programmable gain or attenuation to each input signal before adding the signal. In some embodiments, the combiner may be symmetrical, such that the gain, attenuation, and / or delay of each input signal to the combiner output are substantially similar.

[0032] Now for reference Figure 3 The example FMCW radar SOC 102 described is configured to provide an internal loopback of the signal generated in transmit channel 204 to each of receive channels 202 when SOC 102 is operating in test mode. (See reference...) Figure 6 The method is explained in more detail here; this configuration is used to determine the gain and phase mismatch between receive channels at different RF and IF frequencies. (See reference...) Figure 7 The method is explained in more detail; this configuration is used to determine the noise figure of the receive channel 202. Furthermore, as referenced... Figure 10 The method is explained in more detail; this configuration is used to determine the nonlinear metric in the receive channel 202.

[0033] Both transmit channels include a signal power amplifier chain of pre-power amplifiers (PPA) 302 and 312 coupled to SYNTH 230 to receive FMCW signals, programmable shifters 304 and 314 coupled to PPA 302 and 312 to receive amplified signals, and power amplifiers (PA) 306 and 316 coupled to shifters 304 and 314 to receive shifted signals. In some embodiments, shifters 304 and 314 can be programmed for both frequency shifting and phase shifting. Therefore, the output signals of shifters 304 and 314 can have a frequency equal to the input frequency plus a programmable offset frequency and a phase equal to the input phase plus a programmable offset phase. Combiner 318 is coupled to the outputs of shifters 304 and 314 to receive and combine the shifted signals. Combiner 318 is also coupled to splitter 320 to provide the combined signals to the splitter.

[0034] Splitter 320 is coupled to each of the receiving channels 202. Splitter 320 splits the combined signal from combiner 318 to provide signals of equal power and phase to each of the receiving channels 202. Splitter 320 may be symmetrical, such that the gain, attenuation, and / or delay of the signals from the splitter input to each of the LNAs in the receiving channels 202 are fairly similar.

[0035] Each receive channel 202 includes radio frequency (RF) power detectors 307, 309, 311, and 313 coupled between a splitter 320 and a low-noise amplifier (LNA). Power detectors 307, 309, 311, and 313 measure the power of the combined signal from a combiner 308. This power measurement may also be referred to as a Received Signal Strength Indication (RSSI). Power detectors 307, 309, 311, and 313 are coupled to a control module 228 to provide the power measurement to the control module 228. In some embodiments, each of the power detectors 307, 309, 311, and 313 may include a power detection sensor and an analog-to-digital converter to convert the power measurement from the sensor into a digital power measurement. As explained in more detail herein, when the radar SOC is operating in test mode, the outputs (power measurements) of the power detectors 307, 309, 311, and 313 are accessible to the control module 228.

[0036] Now for reference Figure 4 The example FMCW radar SOC described is configured to provide an internal loopback of the signal generated in transmit channel 204 to each of receive channels 202 when SOC 102 is operating in test mode. See reference... Figure 8 The method is explained in more detail; this configuration is used to determine the power and phase mismatch between transmission channels 204.

[0037] In this example, combiner 402 is coupled to each of the power amplifier chains in transmit channel 204 to receive signals from the power amplifier chains and combine the two signals to generate a single signal. Combiner 402 can be symmetrical, such that the gain and / or delay of the signal from each transmit channel to the combiner output are fairly similar.

[0038] Combiner 402 is also coupled to frequency shifter 404 to provide the combined signal to frequency shifter 404. For example, frequency shifter 404 may be an on-off keyed (OOK) modulator or a binary phase shift keying (BPSK) modulator. An example of an OOK modulator is a circuit that achieves a frequency shift Fshift in the input signal by alternately outputting the duration of 0.5 / F shift of the input signal and the duration of zero 0.5 / F shift. An example of a BPSK modulator is a circuit that achieves a frequency shift Fshift in the input signal by alternately outputting the duration of 0.5 / F shift of the input signal with one polarity and the duration of 0.5 / F shift of the input signal with the opposite polarity. Frequency shifter 404 is coupled to splitter 320 to provide the frequency-shifted combined signal to splitter 320.

[0039] Each transmit channel 204 includes radio frequency (RF) power detectors 407, 417 coupled to the outputs of PAs 306, 316. Each power detector 407, 417 measures the power of the signal output from the corresponding PA 306, 316. The power detectors 407, 417 are coupled to a control module 228 to provide the power measurement to the control module 228. In some embodiments, each of the power detectors 407, 417 may include a power detection sensor and an analog-to-digital converter to convert the power measurement from the sensor into a digital power measurement. As explained in more detail herein, the outputs (power measurements) of the power detectors 407, 417 are accessible to the control module 228 when the radar SOC is operating in test mode.

[0040] Now for reference Figure 5 The example FMCW radar SOC described is Figure 3 Examples and Figure 4 The examples are combined, and thus, any of the methods described herein can be performed when the SOC 102 is operating in test mode. A loopback (LB) combiner 502 is added. The LB combiner 502 is coupled between the frequency shifter 404 and the splitter 240 to receive the combined signal from the power amplifier chain of the transmit channel 204. The LB combiner 502 is also coupled between the combiner 318 and the splitter 240 to receive the signal output from the combiner 318.

[0041] Figure 6-10This is a flowchart of methods for determining various performance parameters of the radar SOC 102 when it is operating in test mode and properly configured. These methods can be executed under the control of the control module 228. Therefore, the control module 228 can configure (one or more) loopback paths and other components as needed to perform the desired measurements. Furthermore, in these methods, the test results, i.e., the performance parameter values, determined by the control module 228, are reported to the safety processor.

[0042] Typically, a security processor receives performance parameter values ​​and performs one or more actions based on those values. For example, a security processor may compare a parameter value to a predetermined threshold and notify the affected entity if the threshold is crossed. In another example, one or more parameter values ​​may cause modifications to data received from radar regarding the presence, position, and velocity of a detected object. In the following method description, for simplicity, the security processor is assumed to be processing unit 104.

[0043] Figure 6 This is a flowchart illustrating a method for determining the gain and phase mismatch between the receive channels 202 of a radar SOC 102. (The last sentence appears to be incomplete and possibly refers to a different method.) Figure 3 Example embodiments and Figure 5 The method is performed in the example embodiments described below. The method can be performed with any combination of radio frequency (RF) and intermediate frequency (IF). For example, for a 77-81 GHz radar, the RF can be 77, 79, or 81 GHz, while a typical IF for performance monitoring can be 15, 10, 5, 2, 1, 0.5, or 0.1 MHz. In the following description, RF = 80 GHz and IF = 1 MHz are used as examples.

[0044] like Figure 6 As shown, a loopback path from one of the transmit channels 204 to the receive channel 202 is enabled by control module 228. Figure 3 In example SOC 102, the loopback path includes the PPA and shifter of the selected transmit channel, combiner 318, and splitter 320. Figure 5 In example SOC 102, the loopback path also includes LB combiner 502. Furthermore, another loopback path via PA, combiner 402, and frequency shifter 404 is not enabled.

[0045] The control module 228 further causes the generation of a continuous wave (CW) test signal (e.g., 80 GHz + 1 MHz) from the selected transmit channel through the loopback path. The CW test signal can be generated by setting the frequency of the local oscillator (LO) signal from the SYNTH 230 to 80 GHz and programming the shifters in the power amplifier chain to add a 1 MHz frequency to the LO signal.

[0046] The test signal is distributed through splitter 320 to each of the receiving channels 202, and control module 228 collects 604 digital test data signals from each of the receiving channels. In some embodiments, control module 228 collects signals from the output of the ADC in each receiving channel 202. In other embodiments, control module 228 collects signals from the output of DFE 222. Data collection from the receiving channels 202 is performed simultaneously and synchronously; that is, data collection from all four receiving channels 202 is initiated at the same time.

[0047] Control module 228 performs a Fast Fourier Transform (FFT) on the test data signal and determines the amplitude Ai and phase θi (i = 1...4) of the test data signal received simultaneously and synchronously in each of the four receiving channels 202. The amplitude Ai and phase θi of the test signal received in the receiving channel can be determined as follows. Assume, for ease of explanation, Ns samples of ADC data are collected at a sampling rate Fs (e.g., Ns = 1024 and Fs = 10.24 MHz), and an Ns-point FFT is performed to produce what is called FFTOut[0, 1, 2, ... N]. S The Ns FFT output is complex sampled. The period for collecting the DFE output can be programmed to be Ns / Fs, and the chirp duration can be equal to or slightly greater than Ns / Fs. The FFT output sampling exponent indx corresponding to the test data signal at frequency IF is given by IF / Fs*Ns. The value of FFTOut[indx] is a complex number, represented by X+jY. The amplitude of this number is given by A=sqrt(X2+Y2) / Ns, and the phase is given by θ=arctan(Y / X). The control module 228 also receives 608 power data Pi from each of the power detectors 307, 309, 311, 313 corresponding to the receiving channel 202.

[0048] Control module 228 then calculates the following performance parameters: gain of each receive channel, gain mismatch between receive channels, and phase mismatch between receive channels. These parameter values ​​are reported to security processor 104. The gain of receive channel i can be calculated as follows:

[0049] Gain i =20logA i -Ρ i .

[0050] If the loopback path is designed symmetrically to span the receive channel, the gain can be calculated without using power data, i.e.,

[0051] Gain i =20logA i .

[0052] For simplicity and ease of interpretation, some additional constant terms are not shown on the right-hand side of the gain calculation equation above. These constant terms are common knowledge and known to radio designers. For example, there may be more additional constant terms to match the units of P and A. For example, the value of A indicates the signal level at the ADC in the receive channel (“how many LSBs”), while the value of P indicates the power value detected at the input of the LNA in the receive channel (“dBmilliWatt” or “dBWatt”). To match the units of A and P, terms such as The constants are added to the above equations to achieve this purpose, where ADCFullScale is the ADC full-scale voltage (e.g., 1 volt), NumBits is the number of bits in each ADC output word, and Resistance can be, for example, a typical 50-ohm resistor. Other similar design constants may exist to standardize against other standard concepts known to radio designers.

[0053] The gain mismatch between the two receiving channels i and j can be calculated as follows:

[0054] GainMismatch i,j =Gain i -Gain j .

[0055] The phase mismatch between the two receiving channels i and j can be calculated as follows:

[0056] PhaseMismatch i,j =θ i -θ j .

[0057] The method described above is used to identify gain, gain mismatch, and phase mismatch at various RF and IF frequencies. For example, the method is used to calculate these parameters for each of RF = 77 GHz, 79 GHz, and 81 GHz, with all IFs set to, for example, 1 MHz. This helps determine whether the gain and phase are well matched between multiple receive channels within the desired RF range. In another example, the method is used to calculate these parameters for each of IF = 1 MHz, 5 MHz, and 10 MHz, with all RFs set to, for example, 79 GHz. This helps determine whether the gain and phase are well matched between multiple receive channels within the desired IF range.

[0058] Figure 7 This is a flowchart of a method for determining the noise figure in the receive channel 202 of a radar SOC 102. This method can be used... Figure 3 Example embodiments and Figure 5 This is executed in the example embodiment. Initially, as referenced... Figure 6 The method described above determines the gain of each of the 700 receive channels. The control module 228 then disables the loopback path of 702 from the selected transmit channel, so that no signal from the transmit channel can reach the receive channel, thereby ensuring that only noise signals reach the receive channel.

[0059] The control module 228 then collects 704 digital noise data from each of the receiving channels for a few microseconds and calculates 706 the noise power of each receiving channel based on the corresponding noise data. In some embodiments, the control module 228 collects the noise data signal from the output of the ADC in each receiving channel 202. In other embodiments, the control module 228 collects the noise data signal from the output of the DFE 222.

[0060] The noise power of receiver channel i can be calculated by performing an FFT on the corresponding noise data and summing the squared magnitudes of the FFT outputs. For example, the noise power of receiver channel i can be calculated as follows. Assume, for ease of explanation, Ns samples of ADC data are collected at a sampling rate Fs (e.g., Ns = 1024 and Fs = 10.24 MHz), and an Ns-point FFT is performed to produce what is called FFTOut[0, 1, 2, ... N]. S The FFT output is complex sampled by Ns FFT, with an index ranging from indxMin to indxMax, corresponding to the IF bandwidth of interest used for radar signal processing, given by indexMin = 0 and indexMax = IFBandwidth / Fs*Ns. The value of FFTOut[indxMin to indxMax] is a complex number, denoted by X[indx] + jY[indx], where indx = indxMin to indxMax is correlated. The noise power can be calculated as:

[0061]

[0062] Typical values ​​for IFBandwidth are 5MHz or 10MHz, and depend on precise radar frequency planning, maximum target range for scanning, FMCW frequency slope, etc. A value for Fs higher than IFBandwidth should be chosen.

[0063] The control module 228 then calculates the noise power spectral density (PSD) of the noise power for each receiving channel 708. The noise PSD of receiving channel i can be calculated as follows:

[0064] NoisePSD i =10*log10(NoisePower) i / IFBandwidth)

[0065] Where IFBandwidth is the bandwidth of the intermediate frequency (IF). Finally, the control module 228 calculates the noise figure (NF) of each receive channel 710 based on the corresponding noise PSD, and reports the noise figure 712 to the security processor. The noise figure NF of receive channel i. i It can be calculated as:

[0066] NF i =NoisePSD i -Gain i .

[0067] In test mode, such as in Figure 6 , Figure 7 and Figure 9 The shifters 304 and 314 used in the method provide a frequency shift IF to the LO signal to generate a test signal as an input to the receiving channel with a frequency offset from the LO RF frequency. Without this frequency shift, the frequency of the test signal would be the same as the LO frequency at the mixer in the receiving channel, resulting in a test signal at the IFA input that is essentially close to 0Hz. Typical IFA circuits and ADCs used in radar SOCs have poor performance (i.e., high noise) near 0Hz, but much better performance (i.e., lower noise) at higher frequencies (e.g., a few MHz). In typical IFA and ADC circuits, the noise near 0Hz in the IFA and ADC (which may be referred to as flicker noise) has negligible effects at higher frequencies.

[0068] Furthermore, radar IFA circuits typically include a high-pass filter (HPF) and a low-pass filter or effective band-pass filter. The HPF in the IFA attenuates very low IF frequencies, such as 0Hz, and frequencies below 500kHz. Therefore, if the test signal has such a low frequency, the ADC input and output will contain a test signal with very low amplitude and a very high amount of noise at similar / close frequencies, corrupting the test signal. The low amplitude of the test signal at the ADC output and the high noise power near the IF frequency of the test signal can cause the aforementioned performance parameters to be measured impractically and with low accuracy. Using shifters 304 and 314 to shift the frequency of the LO signal ensures that the test signal passing through the IFA has an IF frequency significantly higher than 0Hz. Therefore, the ADC input and output will contain a test signal with a significant amplitude and relatively low noise power at similar / close frequencies.

[0069] exist Figure 10 In this method, shifters 304 and 314 can also generate a multiple tone test signal consisting of multiple tones with different non-zero IF frequencies.

[0070] Figure 8This is a flowchart illustrating a method for determining the power and phase mismatch between the transmission channels 204 of radar SOC 102. (The last sentence appears to be incomplete and possibly refers to a different method.) Figure 4 Example embodiments and Figure 5 The method is performed in the example embodiments described below. The method can be performed at any suitable radio frequency. For example, for a 77-81 GHz radar, the radio frequency (RF) can be 77, 79, or 81 GHz. In the description below, RF = 80 GHz is used as an example.

[0071] like Figure 8 As shown, control module 228 enables a loopback path 800 from one of the transmit channels 204 to the receive channel 202. Figure 4 In example SOC 102, the loopback path includes the PPA of the selected transmit channel, shifters and PAs (i.e., the power amplifier chain), combiner 402, frequency shifter 404, and splitter 320. Figure 5 In example SOC 102, the loopback path also includes an LB combiner 502. Furthermore, the loopback path via combiner 318 is not enabled. In both embodiments, another transmission channel is not enabled.

[0072] Control module 228 further causes 802 to generate a continuous wave (CW) test signal (e.g., 80 GHz) from the selected transmit channel through the loopback path. The CW test signal can be generated by setting the frequency of the local oscillator (LO) signal from SYNTH 230 to 80 GHz and programming a shifter in the power amplifier chain of the selected transmit channel to add a 0 MHz frequency to the LO signal. Control module 228 also configures 803 frequency shifter 404 to shift the test signal to an intermediate frequency (IF), for example, 1 MHz.

[0073] The frequency shift test signal is transmitted to the receiving channel 202 via splitter 320, and control module 228 collects 804 digital test data signals from one receiving channel. Any of the receiving channels can be selected for data collection. In some embodiments, control module 228 collects the test signal from the output of the ADC in the receiving channel. In other embodiments, control module 228 collects the test signal from the output of DFE 222. Data collection and frequency shifter 404 are performed simultaneously and synchronously; that is, data collection is initiated while frequency shifter 404 induces a desired frequency shift in the test signal, lasting for several microseconds.

[0074] The control module 228 performs a Fast Fourier Transform (FFT) on the test data signal and determines the amplitude A of the test data signal received by 806. i and phase θ i (i = 1...2). The determination of amplitude and phase was described above. In this process, Ai and θ i This is the amplitude and phase response of the combination of the transmit channel i at a given RF frequency and the selected receive channel. The control module 228 also receives 808 power data P from the power detector in the transmit channel. i Then repeat the 809 data collection process, 800-808 for another transmission channel.

[0075] The control module 228 then calculates the following performance parameters: power mismatch between transmission channels and phase mismatch between transmission channels. It reports these parameter values ​​and the power of each transmission channel to the security processor 104. The phase mismatch between two transmission channels i and j can be calculated as follows:

[0076] PhaseMismatch i,j =θ i -θ j .

[0077] The power mismatch between the two transmission channels i and j can be calculated as follows:

[0078] PowerMismatch i,j =P i -P j .

[0079] Alternatively, the power mismatch between the two transmission channels i and j can be calculated as follows:

[0080] PowerMismatch i,j =A i -A j

[0081] If the path including the combiner and the path to the selected receive channel input cross the transmit channel match, then the measured ADC output amplitude only represents the transmitter power mismatch at the various PA outputs. This equation eliminates any errors in power measurements from the power detector circuitry, unlike other power mismatch equations.

[0082] exist Figure 8 In the method, the frequency shifter 404 used in test mode serves a similar purpose to the shifters 304 and 314 described above. Therefore, without the frequency shifter 404 performing the frequency shift, the test signal at the input of the receiving channel would be close to 0Hz, which would be corrupted by flicker noise in the IFA and ADC. Furthermore, the test signal would be attenuated by the HPF of the IFA of the receiving channel, and the amplitudes corresponding to the ADC input and output of the test signal would be low. The low amplitude of the test signal at the ADC output and the high noise power near the IF frequency of the test signal can make measurements of the transmit channel gain and phase mismatch impractical and inaccurate.

[0083] Furthermore, the frequency shifter 404 after the PA in the transmit channel is used for additional purposes. This is for measuring the transmit channel gain and phase mismatch. Figure 8 The method enables the PA in the transmit channel, which causes the external transmission of the LO signal. The externally transmitted LO signal is reflected by objects around the radar (such as the chassis of the radar system or the vehicle on which the radar system is mounted). It is also electromagnetically coupled from the transmit channel antenna to the receive channel antenna. The entire signal received in the receive channel due to all reflections and coupling can be referred to as the external signal. The frequency of the external signal is the same as the RF frequency of the LO signal. Without frequency shifting performed by frequency shifter 404, the test signal received at the LNA in the receive channel also has the same frequency as the LO signal.

[0084] If the external signal and the test signal have the same frequency, they cannot be distinguished when processing the ADC output. Consequently, measurements of transmit channel gain and phase mismatch from the test signal will be corrupted by the external signal, resulting in erroneous measurements. By applying a frequency shift to the PA output signal before the test signal is passed to the LNA receive channel, frequency shifter 404 ensures that the frequencies of the external signal and the test signal at the LNA input are different at the ADC output. By performing an FFT or equivalent digital signal processing, given the frequency difference between the two signals at the ADC output, the above method accurately estimates the transmit channel gain and phase mismatch from the test signal without the estimation being corrupted by the external signal. The external signal will correspond to the 0Hz signal at the FFT input, and therefore to the FFT exponent 0, while the test signal will correspond to the frequency IF and FFT exponent as explained above.

[0085] Figure 9 This is a flowchart illustrating a method for determining the radar system noise figure for each combination of the transmit and receive channels of radar SOC 102. (The last sentence appears to be incomplete and possibly refers to a separate process.) Figure 3 Example embodiments and Figure 5 The method is performed in an example embodiment. In this method, instead of using a loopback path to measure the parameter, a test signal is transmitted by a transmit channel, and a receive channel 202 receives the test signal, such as a reflection from a nearby static object (e.g., the chassis of a vehicle with a radar system mounted, or the chassis of the radar system). The radar system noise figure is the average noise power that disrupts the received reflected signal. The noise sources are both the receive channel and the transmit channel used when measuring the radar system noise figure. Transmit channel noise disrupts the input signal primarily through electromagnetic coupling from the transmit antenna to the receive antenna and through strong reflections from nearby static objects, when the receive channel noise is directly added to the input signal reflected by the desired object.

[0086] Initially, as referenced Figure 6The method described above determines the gain of each of the 900 receive channels. Control module 228 then disables 902 the loopback path from the selected transmit channel, ensuring that no signal from the transmit channel can reach the receive channel via that path. Furthermore, another transmit channel is disabled. Control module 228 further causes 903 the generation of a continuous wave (CW) test signal (e.g., RF = 80 GHz) transmitted by the selected transmit channel. The CW test signal can be generated by setting the frequency of the local oscillator (LO) signal from SYNTH 230 to 80 GHz and programming the shifter in the power amplifier chain of the selected transmit channel to add a 0 MHz frequency to the LO signal.

[0087] Receiver channel 202 receives test signals reflected from nearby static objects. Control module 228 collects digital noise data from each of the receive channels for a few microseconds (904) and calculates the noise power of each receive channel based on the corresponding noise data (906). In some embodiments, control module 228 collects noise data signals from the output of the ADC in each receive channel 202. In other embodiments, control module 228 collects noise data signals from the output of DFE 222. The noise power of receive channel i described above is calculated.

[0088] The control module 228 then calculates the noise power spectral density (PSD) of each receiving channel 908. The calculated noise power includes the noise introduced by the selected transmitting and receiving channels. The noise PSD of receiving channel i can be calculated as follows:

[0089] NoisePSD i =10*log10(NoisePower) i / IFBandwidth)

[0090] Where IFBandwidth is the bandwidth of the intermediate frequency (IF). Control module 228 then calculates the radar system noise figure (RSNF) for each receiving channel based on the corresponding noise PSD. The radar system noise figure RSNFi for receiving channel i can be calculated as follows:

[0091] RSNF i =NoisePSD i -Gain i .

[0092] Then, the radar system noise figure calculations 902-910 are repeated for the other transmit channel. Finally, the control module 228 reports the radar system noise figure calculated in 912 for each receive / transmit channel pair to the security processor.

[0093] In the method described above, the RF frequency used during ADC sampling is essentially constant, unlike the ramp-up seen in normal FMCW radar operation. Consequently, the received signals corresponding to reflections from objects at various distances all have essentially the same frequency, the same as the "RF" mentioned above. During normal operation in a typical FMCW radar, the frequency ramp of the transmitted signal is non-zero, and the frequency of the received signal corresponding to reflections from surrounding objects at various distances is equal to the RF plus a frequency proportional to the object distance. The power measured in the FFT of the ADC output includes the power of the reflected signal in addition to the radar system noise, making it difficult to distinguish between the radar system noise and the power of the reflected signal. In the method described above, using a constant RF with zero ramp causes reflections from objects at various distances to occur at the same RF frequency. Furthermore, the corresponding signal is highly attenuated by a high-pass filter in the receiving channel, and the measured power of the ADC output closely matches the power of the radar system noise.

[0094] Figure 10 This is a flowchart illustrating a method for determining the nonlinearity of the receive channel in radar SOC 102. (The flowchart is available for...) Figure 3 Example embodiments and Figure 5 The method is performed in the example embodiments described below. The method can be performed at any suitable RF and IF1 and IF2 frequencies. For example, for a 77-81 GHz radar, the RF can be 77, 79, or 81 GHz, and the IF1 and IF2 frequencies can be IF1 = 2 MHz and IF2 = 2.5 MHz. In the description of the method, RF = 80 GHz, IF1 = 2 MHz, and IF2 = 2.5 MHz are used for illustrative purposes. In some embodiments, the IF1 and IF2 frequency values ​​are selected such that m*IF1 + n*IF2, where m is one or more of + / -1, + / -2, + / -3..., and n is one or more of + / -1, + / -2, + / -3..., and m and n are not integer multiples of IF1 or IF2.

[0095] An ideal receiving channel generates a signal at the ADC output that is simply a scaled version of the received signal. Therefore, if the LNA input signal is x, the ADC output signal is k*x, where the frequency is shifted down from RF to IF. This ideal receiving channel can be called a linear receiving channel. A non-ideal (i.e., nonlinear) receiving channel generates k*x + k2*x at the ADC output. 2 +k3x 3 +.... The effect of this nonlinearity in the FMCW radar system is that, instead of detecting the actual object reflection corresponding to the k*x term, the FMCW radar signal processor is fooled into incorrectly detecting the missing object as present in the k2*x term. 2and k3*x 3 At a distance of [distance]. Furthermore, in the presence of multiple reflections, the linear receiving channel generates k*x1+k*x2 at the ADC output. However, the nonlinear receiving channel generates additional terms, such as causing the FMCW radar signal processor to erroneously detect missing objects as existing at the corresponding distance k [distance]. 31 *x1 3 *x2 2 This method determines a nonlinearity metric, which the security processor can compare to a threshold to detect corruption / faults in the receive channel.

[0096] The presented method handles the computation of a nonlinearity metric for a single receive channel. This method can be repeated to compute the nonlinearity metrics for other receive channels. Alternatively, in some embodiments, the nonlinearity metrics for all receive channels are computed based on a single transmission of the dual-tone test signal; that is, dual-tone test data signals are collected from each of the receive channels, and the nonlinearity metric is computed for each receive channel.

[0097] like Figure 10 As shown, control module 228 initially configures a test path (loopback path) 1000 from transmit channel 204 to receive channel 202. Figure 3 In example SOC 102, the loopback path of the transmit channel includes the transmit channel PPA and shifter, combiner 318, and splitter 320. Figure 5 In example SOC 102, the loopback path also includes an LB combiner 502. Furthermore, control module 228 causes a shifter frequency shift of IF1 for one transmit channel and a shifter frequency shift of IF2 for the other transmit channel.

[0098] Control module 228 also causes the generation of an 80 GHz dual-tone continuous wave (CW) test signal via an enabled test path from the transmit channel to the receive channel 202. The dual-tone CW test signal can be generated by setting the frequency of the local oscillator (LO) signal from SYNTH 230 to 80 GHz. A shifter programmed to frequency shift IF1 will propagate a signal of 80 GHz + IF1, and a shifter programmed to frequency shift IF2 will propagate a signal of 80 GHz + IF2, thereby providing a dual-tone test signal at the LNA input of the selected receive channel.

[0099] Control module 228 then collects digital two-tone test data signals from one of the receiving channels. In some embodiments, control module 228 collects the test signal from the output of the ADC in the receiving channel. In other embodiments, control module 228 collects the test signal from the output of DFE 222.

[0100] The control module 228 then calculates the nonlinearity metric of the 1006 receiving channel based on the received two-tone test data signal. To calculate the nonlinearity metric, the control module performs an FFT on the test data signal and calculates the amplitudes M1, M2, Mmn of the two tones in the FFT output at the following frequencies: IF1, IF2, m*IF1+n*IF2, where m is one or more of + / -1, + / -2, + / -3... and n is one or more of + / -1, + / -2, + / -3... This FFT can be performed as follows. Assume, for ease of explanation, Ns samples of ADC data are collected at a sampling rate Fs (e.g., Ns = 1024 and Fs = 10.24 MHz), and an Ns-point FFT is performed to produce what is called FFTOut[0, 1, 2, ... N]. S The FFT output is sampled Ns times by Ns FFTs. The FFT output sampling exponents {indx1, indx2, indxmn} corresponding to frequencies {IF1, IF2, m*IF1+n*IF2} are given by {IF1 / Fs*Ns, IF2 / Fs*Ns, (m*IF1+n*IF2) / Fs*Ns}. The value of FFTOut[indxi] is a complex number, denoted by (X+jY). The magnitude M of this number is given by M=sqrt(X 2 +Y 2 The expression ) / Ns is given. Therefore, the values ​​of M1, M2, and Mmn corresponding to the respective exponents indx1, indx2, and indxmn can be found.

[0101] M1 and M2 correspond to two tones x1 and x2 provided to the receiving channel at frequencies RF+IF1 and RF+IF2, respectively, and Mmn corresponds to the intermodulation product k generated by the nonlinear receiving channel. mn *x1 m *x2 n Furthermore, the values ​​of M1 and M2 are significant. Moreover, in an ideal receiver, because an ideal receiving channel does not induce intermodulation products, the value of Mmn is close to 0. However, in a nonlinear receiving channel, the value of Mmn may not be 0 and may be several orders of magnitude lower than M1 and M2. A lower value of Mmn indicates better performance of the receiving channel.

[0102] Given M1, M2, and Mmn, control module 228 calculates M1_dB = 20*log10(M1), M2_dB = 20*log10(M2), and Mmn_dB = 20*log10(Mmn) to convert these values ​​to decibels. Using the resulting converted values, control module 228 calculates the values ​​of nonlinear metrics (NM) and reports these metrics to the safety processor. Examples of two nonlinear metrics that can be calculated are as follows:

[0103] NMI=M1_dB+0.5*M2_dB-0.5*M12_dB

[0104] NM2 = M1_dB + M2_dB - M11_dB.

[0105] Other nonlinear metrics can be similarly calculated as a weighted sum of M1_dB, M2_dB, and Mmn_dB, or a product of M1, M2, and Mmn. If the value of Mmn is significantly lower than the values ​​of M1 and M2, a low value of NMi indicates that the intermodulation products in the receiving channel are high, because the value of NMi is high.

[0106] Generating two tones x1 and x2 from two different transmit channels allows the intermodulation product produced by the receive channel (which operates on the combined signal k1*x1+k2*x2) to be separated from any additional tones caused by nonlinearities in the individual transmit channels (each of which operates on only one of the two signals x1 and x2). Additional tones caused by nonlinearities in the individual transmit channels result in tones such as x1... 2 ,xl 3 ,xl 4 The method includes additional terms such as ... and correspondingly targets x2 in the signal input to the receiving channel. It avoids disrupting the intermodulation products Amn of interest to these terms by ensuring that the frequency of the intermodulation product Amn is inconsistent with the frequency of these terms.

[0107] To simplify the explanation, Figure 10 The method assumes two transmit channels and a two-tone test signal. This method can be extended to use more than two transmit channels, each programmed to generate a different frequency shift, i.e., IF1, IF2, IF3, ... . The FFT exponents corresponding to the intermodulation products of the multi-tone signal are observed to calculate the nonlinearity measure. The values ​​chosen for IF1, IF2, IF3, ... to mitigate the nonlinearity in the transmit channels should be such that the multiples of IF1, IF2, IF3, ... are not necessarily at the frequency of the intermodulation products; this will be m*IF1 + n*IF2 + p*IF3, where m, n, and p are integers 0, + / -1, + / -2, ...

[0108] exist Figure 10In another embodiment of the method, the outputs of shifters 304 and 314 are configured to reach the corresponding LNA of the receiving channel via different paths. For example, the output of shifter 304 may be configured to reach the LNA of the receiving channel via combiner 318 and LB combiner 502 (where PA 306 is disabled), and the output of shifter 314 may be configured to be transmitted via PA 316 and the corresponding antenna. The latter signal reaches the LNA of the receiving channel via reflection from an external object (e.g., a vehicle or radar chassis) and / or electromagnetic coupling from the transmitting antenna to the receiving antenna. Furthermore, the IF frequency of shifter 314 is programmed to correspond to a frequency offset similar to strong reflections and / or electromagnetic coupling from the vicinity of an external object observed during normal FMCW radar operation, such as 10 kHz, and the IF frequency of shifter 304 is programmed to correspond to objects with moderate reflection intensity and at moderate distances, such as a few MHz.

[0109] In this embodiment, the tone transmitted via the external antenna path has a significantly higher amplitude than that achievable via the intra-chip loopback path, and better simulates the signal strength during actual radar operation. Furthermore, with only one of the multiple PAs enabled, the intensity of any unwanted intermodulation products generated by the transmitting circuitry and the loopback path is reduced, thereby improving the detection and estimation of intermodulation products generated by the receiving channel.

[0110] exist Figure 10 In another embodiment of the method, the outputs of shifters 304 and 314 can be configured to be transmitted via corresponding PAs and antennas. The transmitted signal reaches the LNA in the receiving channel via reflection from an external object (e.g., a vehicle or radar chassis) and / or electromagnetic coupling from the transmitting antenna to the receiving antenna. Further, the IF frequency of shifter 314 is programmed to correspond to a frequency offset similar to strong reflections and / or electromagnetic coupling near an external object observed during normal FMCW radar operation, for example, 10 kHz, and the IF frequency of shifter 304 is programmed to correspond to an object with moderate reflection intensity and at a moderate distance, for example, a few MHz. Moreover, the output power of PA 306 is kept high such that the amplitude of the reflected signal received by the LNA is similar to the amplitude of strong reflections and / or electromagnetic coupling near an external object observed during normal FMCW radar operation, and the output power of PA 316 is kept high such that the amplitude of the reflected signal reaching the LNA is similar to the amplitude of an object with moderate reflection intensity and at a moderate distance.

[0111] Although this disclosure has been described with respect to a limited number of embodiments, other embodiments may be devised within the scope of this disclosure.

[0112] For example, several embodiments have been described herein in which signal processing to determine parameter values ​​is performed in a control module on the radar SOC. In some embodiments, some or all of the signal processing is performed outside the SOC, for example by a processing unit or by an external MCU.

[0113] In another example, several embodiments have been described herein in which the security processor is external to the radar SOC. In some embodiments, the security processor is part of the radar SOC, such as a control processor on the SOC or a separate processor.

[0114] In another example, several embodiments have been described herein, in which the LO signal output by SYNTH is provided to a PPA in the transmit channel and a mixer in the receive channel. Some embodiments use an LO distribution network. Typically, an LO distribution network is a tree of cells that transmits the LO signal to the mixer in the receive channel and the shifter in the transmit channel. For example, a cell can be a wire or an amplifier, such as a PPA, a frequency multiplier, or a frequency divider.

[0115] In another example, a clock multiplier is used. In some embodiments, a multiplier is not needed because SYNTH operates at the LO frequency instead of a lower frequency.

[0116] In another example, several embodiments have been described herein, in which the transmit signal generation circuitry is assumed to include an RF synthesizer. In some embodiments, the circuitry includes an open-loop oscillator (RF oscillator) plus a digital-to-analog converter (DAC) or other suitable transmit signal generation circuitry.

[0117] In another example, several method embodiments have been described herein, in which the noise power spectral density (PSD) is calculated. In some embodiments, an alternative to the equations mentioned above used to calculate the noise PSD is employed. The noise PSD in any frequency band can be calculated using the FFT output corresponding to the frequency band and the difference between the upper and lower bound frequencies of that band as the “IFBandwidth” in the equations mentioned above. This is useful when the noise PSD is expected to differ across different frequency bands.

[0118] In another example, several method embodiments have been described herein, wherein the noise figure NF of the received channel i is... i The gain of the receive channel is calculated. In some embodiments, the noise figure is determined without considering the gain in the receive channel, i.e.,

[0119] NF i =NoisePSD i .

[0120] In another example, several method embodiments have been described herein, wherein the radar system noise figure RSNF of the received channel i is... i The gain of the receiving channel is calculated. In some embodiments, the radar system noise figure is determined without considering the gain in the receiving channel, i.e.,

[0121] RSNF i =NoisePSD i .

[0122] In another example, several embodiments of the example FMCW radar SOC have been described herein. Some embodiments are used for other types of radar, such as constant frequency, stepped frequency, and triangular frequency radar.

[0123] In another example, the radar SOC periodically and automatically operates in test mode to monitor one or more performance parameters. In some of those embodiments, the radar SOC may operate in normal mode for fixed time periods to transmit and receive chirped frames. During the time periods between frames, the radar SOC automatically operates in test mode to monitor one or more performance parameters. For example, operation in normal mode may occur for 100 microseconds, and operation in test mode may occur for 80 microseconds, repeating every 500 microseconds. In another example, the durations may be 5 milliseconds, 3 milliseconds, and 40 milliseconds, respectively.

[0124] In another example, an embodiment assuming more than one transmit channel has been described herein. Some embodiments have a single transmit channel or use only one transmit channel. In such embodiments, a combiner may or may not be present. If the combiner is coupled to a single transmit channel, the output signal of the combiner is the input signal of the combiner. In such embodiments, one or more performance parameters, such as receive channel gain, receive channel phase, inter-receive channel gain and phase mismatch, receive channel noise figure, and radar system noise figure, can be calculated.

[0125] In another example, an embodiment assuming more than one receive channel has been described herein. Some embodiments have a single receive channel or use only one receive channel. In such embodiments, a splitter may or may not be present. If a splitter is present, the splitter output is coupled to only a single receive channel. In such embodiments, one or more performance parameters, such as transmit channel gain, transmit channel phase, transmit channel gain and phase mismatch, receive channel noise figure, and radar system noise figure, can be calculated.

[0126] In another example, several embodiments have been described herein, wherein all receive channels are coupled to a splitter and all transmit channels are coupled to at least one combiner. In some embodiments, a subset of receive channels are coupled to a splitter and / or a subset of transmit channels are coupled to at least one combiner. In such embodiments, the methods described may be performed to determine one or more performance parameters.

[0127] While method steps may be presented and described in the order shown herein, they may be performed simultaneously, in combination, and / or in a different order than those shown in the drawings and / or described herein. Therefore, embodiments are not limited to the specific order of the steps shown in the drawings and / or described herein.

[0128] Without departing from the functions described, components in a radar system may be referred to by different names and / or may be combined in ways not shown herein. The term “coupled” and its derivatives are intended to indicate indirect, direct, optical, and / or radio connections. For example, if a first device is coupled to a second device, the connection may be a direct electrical connection, an indirect electrical connection via other devices and connectors, an optical electrical connection, and / or a radio connection.

[0129] Modifications are possible in the described embodiments, and other embodiments are possible within the scope of the claims.

Claims

1. A transceiver comprising: a synthesizer comprising an output; a plurality of transmit paths, wherein each of the plurality of transmit paths comprises: a first amplifier comprising an output and an input coupled to the output of the synthesizer; a second amplifier comprising an input coupled to the output of the first amplifier and an output configured to be coupled to a transmit antenna; a plurality of receive paths, wherein each of the plurality of receive paths comprises a third amplifier comprising an input configured to be coupled to a receive antenna; a first combiner comprising an output and a set of inputs, wherein each input of the set of inputs is coupled to the input of the second amplifier of a respective transmit path of the plurality of transmit paths; a second combiner comprising an output and a set of inputs, wherein each input of the set of inputs is coupled to the second amplifier of a respective transmit path of the plurality of transmit paths; a third combiner comprising an output, a first input coupled to the output of the first combiner, and a second input coupled to the output of the second combiner; and a splitter comprising an input coupled to the output of the third combiner and a set of outputs, wherein each output of the set of outputs is coupled to the input of the third amplifier of a respective receive path of the plurality of receive paths.

2. The transceiver of claim 1, wherein each of the plurality of receive paths further comprises: a mixer comprising an output, a first input coupled to the output of the third amplifier of the respective receive path, and a second input coupled to the output of the synthesizer; a fourth amplifier comprising an output and an input coupled to the output of the mixer of the respective receive path; and an analog-to-digital converter comprising an input coupled to the output of the fourth amplifier of the respective receive path.

3. The transceiver of claim 1, wherein each of the plurality of receive paths further comprises a power detector comprising an input coupled to the input of the third amplifier of the respective receive path.

4. The transceiver of claim 1, wherein each of the plurality of transmit paths further comprises a power detector comprising an input coupled to the second amplifier of the respective transmit path.

5. The transceiver of claim 1, wherein each of the plurality of transmit paths further comprises a shifter coupled between the first amplifier and the second amplifier of the respective transmit path, such that the shifter comprises an output coupled to a respective input of the set of inputs of the first combiner.

6. The transceiver of claim 5, wherein the shifter is operable to perform at least one of a phase shift or a frequency shift of an output signal produced by the first amplifier of the respective transmit path. ​ 7. The transceiver of claim 1, further comprising a frequency shifter coupled between the second combiner and the third combiner.

8. The transceiver of claim 7, wherein the frequency shifter comprises at least one of a on-off keying modulator or a binary phase shift keying modulator.

9. The transceiver of claim 1, wherein the transceiver is operable to calculate at least one of a gain mismatch between the plurality of receive channels or a phase mismatch between the plurality of receive channels utilizing the splitter and utilizing at least one of the first combiner, the second combiner, or the third combiner.

10. The transceiver of claim 1, wherein the transceiver is operable to determine a noise figure of each channel of the plurality of receive channels.

11. A transceiver comprising: a synthesizer comprising an output; a plurality of transmit channels, wherein each of the plurality of transmit channels comprises: a power pre-amplifier comprising an output and an input coupled to the output of the synthesizer; and a power amplifier comprising an input coupled to the output of the power pre-amplifier and an output configured to be coupled to a transmit antenna; a plurality of receive channels, wherein each of the plurality of receive channels comprises: a first amplifier comprising an output and an input configured to be coupled to a receive antenna; and a mixer comprising a first input coupled to the output of the first amplifier, a second input coupled to the output of the synthesizer, and an output; and a loopback path comprising: a combiner comprising a set of inputs and an output, wherein each input of the set of inputs is coupled to a respective transmit channel of the plurality of transmit channels; and a splitter comprising an input coupled to the output of the combiner and a set of outputs, wherein each output of the set of outputs is coupled to the input of a respective first amplifier of a respective receive channel of the plurality of receive channels.

12. The transceiver of claim 11, wherein each of the plurality of receive channels further comprises: a second amplifier comprising an output and an input coupled to the output of the mixer of the respective receive channel; and an analog-to-digital converter comprising an input coupled to the output of the second amplifier of the respective receive channel.

13. The transceiver of claim 11, wherein each of the plurality of receive channels further comprises a power detector comprising an input coupled to the input of the first amplifier of the respective receive channel.

14. The transceiver of claim 11, wherein each of the plurality of transmit channels further comprises a shifter coupled between the power pre-amplifier and the power amplifier of the respective transmit channel.

15. The transceiver of claim 14, wherein the shifter is operable to perform at least one of a phase shift or a frequency shift of an output signal generated by the power pre-amplifier of the respective transmit channel. ​ 16. The transceiver of claim 11, wherein the set of inputs of the combiner are coupled to the outputs of the power amplifiers of the plurality of transmit paths.

17. The transceiver of claim 11, further comprising a frequency shifter coupled between the combiner and the splitter.

18. The transceiver of claim 11, wherein: the synthesizer is operable to provide a first test signal to a first transmit path of the plurality of transmit paths; the first transmit path is operable to provide a second test signal to a first input of the set of inputs of the combiner in response to the first test signal; and the splitter is operable to provide a third test signal to each of the plurality of receive paths in response to the second test signal.

19. The transceiver of claim 11, wherein the transceiver is operable to utilize the loopback path to calculate at least one of a gain mismatch between the plurality of receive paths or a phase mismatch between the plurality of receive paths.

20. The transceiver of claim 11, wherein the transceiver is operable to determine a noise figure of each of the plurality of receive paths. ​

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