High voltage semiconductor device

By introducing a doped region into the high-voltage trap surrounding the high-voltage semiconductor device, the problem of the high-voltage semiconductor device affecting adjacent devices at higher operating voltages is solved, achieving greater lateral breakdown voltage and isolation effect.

CN114678423BActive Publication Date: 2026-07-10NUVOTON

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NUVOTON
Filing Date
2021-05-24
Publication Date
2026-07-10

AI Technical Summary

Technical Problem

Existing high-voltage semiconductor devices are prone to affecting neighboring devices at higher operating voltages, requiring a higher breakdown voltage to avoid this problem.

Method used

Doped regions are introduced into the high-voltage trap surrounding the high-voltage semiconductor device. The lateral breakdown voltage is increased by adjusting the depth and concentration of the doped regions. A ring-shaped layout of the doped regions is used to isolate adjacent devices.

Benefits of technology

It effectively improves the lateral breakdown voltage of high-voltage semiconductor devices, prevents the impact on adjacent devices under higher operating voltages, and enhances the isolation performance of the device.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN114678423B_ABST
    Figure CN114678423B_ABST
Patent Text Reader

Abstract

A high voltage semiconductor device includes a substrate, a first high voltage well, a second high voltage well, a third high voltage well, a drain region, a source region, a gate structure, and a doped region. The substrate has a first conductivity type. The first high voltage well is disposed above the substrate and has a second conductivity type opposite the first conductivity type. The second high voltage well is disposed adjacent to and in contact with the first high voltage well and has the first conductivity type. The third high voltage well is disposed adjacent to and in contact with the first high voltage well and has the second conductivity type. The drain region is disposed within the first high voltage well. The gate structure is disposed between the source region and the drain region. The doped region is disposed within the third high voltage well and has the second conductivity type.
Need to check novelty before this filing date? Find Prior Art