Substrate impedance test method, device, system, computer device and storage medium

Abstract

The application relates to a substrate impedance test method, device, system, computer equipment and storage medium. The method comprises the following steps: sending a first test signal to a substrate to be tested, receiving a first impedance value between each test terminal, and determining that there is a line abnormality on the substrate to be tested when the first impedance value is less than a first threshold value; when the first impedance value is less than the first threshold value, a negative voltage test signal is sent to a target terminal pair, the target terminal pair is two test terminals corresponding to the first impedance value with an index value less than the first threshold value, a specific line abnormality condition at the target terminal pair is determined according to a second impedance value returned by the target terminal pair, a test result of the substrate to be tested is determined, whether there is a line abnormality between each test terminal is determined through a first round of test, and whether the specific line abnormality is a short-circuit abnormality is determined through a second round of test when it is determined that there is a line abnormality, so that whether there is a short-circuit abnormality on the substrate to be tested is accurately determined.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a substrate impedance test method, device, system, computer equipment and storage medium. BACKGROUND

[0002] With the development of display panel technology, more and more manufacturers produce display panels. In order to improve market competitiveness, the stability of display panels is required to be higher and higher. Therefore, impedance test needs to be performed on display substrates before they are shipped. Display substrates with impedance test results not meeting preset results are returned to the factory for repair to avoid display substrates with short circuit risks being shipped to the market.

[0003] However, the existing impedance test method is based on a multimeter to test the electrical properties of the display substrate. When the impedance value obtained by the test is less than the preset value, it is determined that there is a short circuit phenomenon on the display substrate. However, in the implementation process, the inventors found that when there is a leakage in the wiring of the display substrate, the impedance value measured by the multimeter will also be less than the preset value. Therefore, the test result obtained by the existing impedance test method cannot accurately determine whether the display substrate has a short circuit phenomenon, i.e., the accuracy of the test result is low. SUMMARY

[0004] Therefore, it is necessary to provide a substrate impedance test method, device, computer equipment and storage medium capable of accurately detecting whether a display substrate has a short circuit.

[0005] A substrate impedance test method, the method comprising:

[0006] sending a first test signal to a substrate to be tested, wherein the first test signal is used to test the impedance value between each test terminal in the substrate to be tested;

[0007] receiving a first impedance value between each test terminal;

[0008] when the first impedance value is less than a first threshold value, sending a negative voltage test signal to a target terminal pair, wherein the target terminal pair is two test terminals corresponding to the first impedance value less than the first threshold value;

[0009] receiving a second impedance value corresponding to the target terminal pair, and determining a test result of the substrate to be tested according to the second impedance value.

[0010] Optionally, the negative voltage test signal includes a negative voltage signal and a second test signal, and when the first impedance value is less than the first threshold value, the negative voltage test signal is sent to the target terminal pair, comprising:

[0011] When the first impedance value is less than the first threshold, the negative voltage signal is sent to the target terminal pair, wherein the negative voltage signal is used to turn off the target transistor, and the target transistor is a thin film transistor between the two corresponding test terminals of the target terminal pair;

[0012] When the target transistor is in the off state, the second test signal is sent to the target terminal pair.

[0013] Optionally, determining the test result of the substrate under test based on the second impedance value includes:

[0014] When the second impedance value is greater than or equal to the second threshold, it is determined that there is a leakage current abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0015] Optionally, determining the test result of the substrate under test based on the second impedance value includes:

[0016] When the second impedance value is less than the second threshold, it is determined that there is a short circuit abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0017] Optionally, after receiving the first impedance value between each of the test terminals, the method further includes:

[0018] When the first impedance value is greater than or equal to the first threshold, it is determined that the connection between the two test terminals corresponding to the first impedance value is normal.

[0019] Optionally, each of the test terminals is used to indicate a transmission port for a transmitted signal.

[0020] A substrate impedance testing apparatus, the substrate impedance testing apparatus comprising:

[0021] A first transmitting module is configured to transmit a first test signal to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test;

[0022] The first receiving module is used to receive the first impedance value between each of the test terminals;

[0023] The second transmitting module is used to transmit a negative voltage test signal to a target terminal pair when the first impedance value is less than the first threshold, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold.

[0024] The second receiving module is used to receive the corresponding second impedance value of the target terminal pair and determine the test result of the substrate under test based on the second impedance value.

[0025] A substrate impedance testing system includes a display substrate in contact with the aforementioned substrate impedance testing device.

[0026] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, performs the following steps:

[0027] A first test signal is sent to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test;

[0028] Receive the first impedance value between each of the test terminals;

[0029] When the first impedance value is less than the first threshold, a negative voltage test signal is sent to the target terminal pair, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold;

[0030] The test results of the substrate under test are determined based on the second impedance value of the target terminal pair.

[0031] A computer-readable storage medium having a computer program stored thereon, characterized in that the computer program, when executed by a processor, performs the following steps:

[0032] A first test signal is sent to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test;

[0033] Receive the first impedance value between each of the test terminals;

[0034] When the first impedance value is less than the first threshold, a negative voltage test signal is sent to the target terminal pair, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold;

[0035] The test results of the substrate under test are determined based on the second impedance value of the target terminal pair.

[0036] One of the above technical solutions has the following advantages and beneficial effects:

[0037] By sending a first test signal to the substrate under test, the impedance values ​​between each test terminal on the substrate under test are detected. The first impedance value between each test terminal is received. If the first impedance value is less than a first threshold, it indicates that there is a circuit abnormality on the substrate under test. However, at this time, it is impossible to accurately determine the specific situation of the circuit abnormality. Therefore, when the first impedance value is less than the first threshold, a negative voltage test signal is sent to the target terminal pair. The target terminal pair refers to the two test terminals corresponding to the first impedance value that is less than the first threshold. The negative voltage test signal is used to detect the abnormality at the target terminal pair. Based on the second impedance value returned by the target terminal pair, the specific circuit abnormality at the target terminal pair is determined, thereby determining the test result of the substrate under test. The first round of testing determines whether there is a circuit abnormality between each test terminal. If a circuit abnormality is determined to exist, the second round of testing determines whether the specific circuit abnormality is a short circuit abnormality, thereby achieving accurate judgment of whether there is a short circuit abnormality on the substrate under test. Attached Figure Description

[0038] Figure 1 This diagram illustrates the application environment of the substrate impedance testing method in this embodiment.

[0039] Figure 2 This is a schematic flowchart of the substrate impedance testing method in the embodiments of this application.

[0040] Figure 3 This is a partial structural diagram of the substrate under test containing test terminals in an embodiment of this application.

[0041] Figure 4 This is a schematic diagram of the test results of the substrate impedance test method in the embodiments of this application.

[0042] Figure 5 This is a structural block diagram of the substrate impedance testing device in the embodiments of this application.

[0043] Figure 6 This is a structural block diagram of the negative pressure module in an embodiment of this application.

[0044] Figure 7 This is a diagram showing the internal structure of a computer device in an embodiment of this application. Detailed Implementation

[0045] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0046] The substrate impedance testing method provided in this application can be applied to, for example... Figure 1The substrate impedance testing system shown includes a display substrate 120, a substrate impedance testing device 110, and a substrate impedance testing device 130. The substrate impedance testing device 110 is equipped with probes and connects to the display substrate 120 via these probes. The substrate impedance testing device 110 can establish a communication connection with the substrate impedance testing device 130 via wired or wireless means. The substrate impedance testing device 110 sends test data and results to the substrate impedance testing device 130 for storage and display. Testers can also remotely control the substrate impedance testing device 110 via the substrate impedance testing device 130 to perform impedance tests according to operating instructions.

[0047] The display substrate 120 is a substrate component constituting a display. The display is used to form a display device, which may be, but is not limited to, various personal computers, laptops, smartphones, tablets, and portable wearable devices. The display substrate 120 includes a substrate, a polarization layer, a common electrode layer, a light-shielding layer, and an antenna array layer. The antenna array layer includes multiple thin-film transistors, diodes, interconnecting traces, and transmission ports for transmitting signals. The transmitted signals specifically include RGB (Red / Green / Blue) signals, azimuth signals, common ground signals, operating voltage signals, gate signals, etc., wherein the azimuth signals specifically include horizontal signals and vertical signals.

[0048] In one embodiment, such as Figure 2 As shown, a substrate impedance testing method is provided, which is applied to... Figure 1 The following steps are described using the substrate impedance testing device 110 as an example:

[0049] Step S210: Send the first test signal to the substrate under test.

[0050] The first test signal is used to test the impedance value between each test terminal in the substrate under test.

[0051] Specifically, the first test signal can be sent by the tester operating the substrate impedance testing device, or the tester can remotely control the substrate impedance testing device 130 to send the first test signal. The substrate to be tested refers to the display substrate 120 waiting to be impedance tested. The display substrate 120 includes multiple test terminals. The test terminals can be the connection endpoints of any component on the test substrate or the transmission ports for transmitting signals. In this embodiment, the transmission port for transmitting signals is selected as the test terminal, for example... Figure 3VDD, Vref, etc., are used in the substrate impedance testing device 110. Each pair of probes on the substrate impedance testing device 110 is connected to two different test terminals on the substrate under test to form a connection loop. When the probes on the substrate impedance testing device 110 are connected to the test terminals on the substrate under test, the substrate impedance testing device 110 sends a first test signal to the test terminals connected to the probes to test the impedance value between the two test terminals connected to the probes. The principle of testing impedance based on the first test signal is based on Ohm's law.

[0052] Step S220: Receive the first impedance value between each of the test terminals.

[0053] Specifically, the substrate impedance testing device 110 forms a connection loop by contacting the test terminals with the probe pair. After the first test signal passes through the components between the two test terminals contacted by the probe pair, a detection signal is returned to the substrate impedance testing device 110. The detection signal is used to indicate the current flow between the two test terminals contacted by the probe pair. The substrate impedance testing device 110 can determine the first impedance value between the two test terminals through the detection signal.

[0054] Step S230: When the first impedance value is less than the first threshold, a negative voltage test signal is sent to the target terminal pair.

[0055] The target terminal pair refers to the two test terminals corresponding to any one of the first impedance values ​​that is less than the first threshold.

[0056] Specifically, the first threshold is the short-circuit detection impedance value, which can be set according to the selection of components in the application circuit or the different application scenarios. For example, the first threshold can be set to 0.1MΩ or 1MΩ. When the first impedance value is less than the first threshold, based on Ohm's law, it is known that if the impedance is found to be too small during impedance testing, it is likely caused by a short circuit or leakage in the line. Therefore, the specific situation of the line abnormality cannot be accurately determined based on the first impedance value. Then, a negative voltage test signal is sent to the target terminal pair again for secondary impedance detection. The negative voltage test signal is used to test the impedance between the target terminal pairs under negative voltage conditions to detect abnormalities at the target terminal pairs.

[0057] Step S240: Receive the corresponding second impedance value of the target terminal pair, and determine the test result of the substrate under test based on the second impedance value.

[0058] Specifically, the second impedance value is the impedance value measured by the target terminal under negative voltage. Based on the second impedance value, the abnormality at the target terminal can be accurately determined as either a short circuit or a leakage current, thereby determining the test result of the substrate under test. The first round of testing determines whether there is a circuit abnormality between the various test terminals. If a circuit abnormality is determined, the second round of testing determines whether the specific circuit abnormality is a short circuit. This achieves accurate judgment of whether there is a short circuit on the substrate under test, avoiding the phenomenon of misjudging whether there is a short circuit on the display substrate 120 based solely on the first impedance value, and improving the accuracy of the test results of the display substrate 120.

[0059] In one embodiment, the negative pressure test signal includes a negative pressure signal and a second test signal. Sending the negative pressure test signal to the target terminal pair when the first impedance value is less than the first threshold includes: sending the negative pressure signal to the target terminal pair when the first impedance value is less than the first threshold; and sending the second test signal to the target terminal pair when the target transistor is in a turned-off state.

[0060] The negative voltage signal is used to turn off the target transistor, which is a thin-film transistor between the two corresponding test terminals of the target terminal pair.

[0061] Specifically, the negative voltage signal is related to the film layer structure of the display substrate 120. Different types of display substrates 120 correspond to different negative voltage signals. The negative voltage signal is customized according to the actual application scenario. For example, the negative voltage signal can be a voltage signal of -1.5V, -3V, -6V or -8V. First, the thin film transistor between the target terminal pair is turned off by the negative voltage signal, that is, the target transistor between the target terminal pair is in the off state. After the target transistor is turned off, the second test signal is sent. The second test signal is the same as the first test signal. Both are test signals for testing impedance. That is, the impedance test is performed on the target terminal pair again when the target transistor is turned off. When the target transistor is in the off state, the line where the target terminal pair is located is equivalent to interruption. The impedance test is performed again on the open circuit, thereby accurately determining the specific abnormal condition of the line where the target terminal pair is located.

[0062] In one embodiment, determining the test result of the substrate under test based on the second impedance value includes: when the second impedance value is greater than or equal to a second threshold, determining that there is a leakage current abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0063] Specifically, the second threshold can be equal to or different from the first threshold. The value can be set according to the selection of components in the application circuit or the different application scenarios. For example, the second threshold can be set to 0.1MΩ or 1MΩ. In this embodiment, the second threshold is limited to being equal to the first threshold, both being 0.1MΩ. If the first impedance value measured by the first test signal at the same test terminal pair is less than 0.1MΩ, while the second impedance value measured by the negative voltage test signal is greater than or equal to 0.1MΩ, it indicates that compared to the first impedance test, the impedance value measured at the same test terminal under negative voltage conditions has increased. That is, the corresponding second impedance value of the target terminal pair is greater than the first impedance value. The increased impedance value when the target transistor is turned off confirms that the circuit abnormality between the target terminal pairs is a leakage abnormality, not an impedance reduction caused by a short circuit.

[0064] In one embodiment, determining the test result of the substrate under test based on the second impedance value includes: when the second impedance value is less than a second threshold, determining that there is a short circuit anomaly between the target terminal and the corresponding two test terminals in the substrate under test.

[0065] Specifically, referring to the previous embodiment, if the first impedance value measured by the first test signal at the target test terminal pair is less than 0.1MΩ, and the second impedance value measured by the negative voltage test signal is also less than 0.1MΩ, it indicates that the second impedance value measured at the same test terminal under negative voltage conditions is consistent with the conclusion of the first impedance value. If the impedance value measured under the condition of turning off the target transistor is still less than 0.1MΩ, it can be determined that the line abnormality between the target terminal pairs is a short circuit abnormality.

[0066] In one embodiment, after receiving the first impedance value between each of the test terminals, the method further includes: when the first impedance value is greater than or equal to the first threshold, determining that the connection between the two test terminals corresponding to the first impedance value is normal.

[0067] Specifically, if the first impedance value measured after the first test signal is greater than or equal to the first threshold, it indicates that the measured first impedance value meets the impedance requirements of the normal state. Therefore, it is determined that the continuous state between the two test terminals corresponding to the first impedance value is normal.

[0068] After determining the impedance values ​​between each test terminal, the test result of the substrate under test is determined based on the impedance values ​​between each test terminal. Specifically, if the first impedance value between any two test terminals on the substrate under test is greater than the first threshold, the test result of the substrate under test is determined to be qualified. If there is a first impedance value less than the first threshold and the second impedance value measured based on the first impedance value is also less than the second threshold, the test result of the substrate under test is determined to be a short circuit abnormality. If there is a first impedance value less than the first threshold and the second impedance value measured based on the first impedance value is greater than or equal to the second threshold, the test result of the substrate under test is determined to be a leakage abnormality.

[0069] In one embodiment, each of the test terminals is used to indicate a transmission port for a transmitted signal.

[0070] Specifically, such as Figure 3 As shown, VSS, Vref, VDD, Vdata, and Vscan each correspond to a test terminal. For example, a first test signal is sent to the two test terminals that are in contact with the probe pair to test the impedance between the two test terminals. If the first impedance value between test terminal VDD and test terminal Vref is less than 0.1MΩ, a negative voltage signal of -1.5V is sent to test terminal VDD and test terminal Vref. That is, the negative voltage signal of -1.5V is used to turn off thin-film transistors T2 and T3. After both thin-film transistors T2 and T3 are in the off state, a second test signal is sent. If the measured second impedance value is still less than 0.1MΩ, it is determined that there is a short circuit abnormality between test terminal VDD and test terminal Vref.

[0071] like Figure 4 As shown, testing and verification revealed that for different types of display substrates 120 without short-circuit abnormalities, the measured second impedance values ​​under different negative voltage signals were all greater than the second threshold. Specifically, for the P1.2 transparent MLED substrate 1, the first impedance measured between test terminals VDD and Vref under no negative voltage signal was 397Ω, while the second impedance measured under a -1.5V negative voltage signal was 220KΩ, which is greater than 0.1MΩ. Under a -3V negative voltage signal, the second impedance was 2.3MΩ, which is also greater than 0.1MΩ. The test results for the remaining three substrates were analyzed similarly and will not be repeated here.

[0072] It should be understood that, although Figure 2 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 2At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0073] In one embodiment, such as Figure 5 As shown, a substrate impedance testing device 110 includes:

[0074] The first transmitting module 310 is used to transmit a first test signal to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test;

[0075] The first receiving module 320 is used to receive the first impedance value between each of the test terminals;

[0076] The second transmitting module 330 is used to transmit a negative voltage test signal to a target terminal pair when the first impedance value is less than the first threshold, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold.

[0077] The second receiving module 340 is used to receive the corresponding second impedance value of the target terminal pair and determine the test result of the substrate under test based on the second impedance value.

[0078] In one embodiment, the negative pressure test signal includes a negative pressure signal and a second test signal, and the second transmitting module 330 includes:

[0079] The negative voltage module 331 is used to send the negative voltage signal to the target terminal pair when the first impedance value is less than the first threshold, wherein the negative voltage signal is used to turn off the target transistor, and the target transistor is a thin film transistor between the two corresponding test terminals of the target terminal pair;

[0080] The signal transmitting module sends the second test signal to the target terminal pair when the target transistor is in the off state.

[0081] In one embodiment, the second receiving module 340 is further configured to:

[0082] When the second impedance value is greater than or equal to the second threshold, it is determined that there is a leakage current abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0083] In one embodiment, the second receiving module 340 is further configured to:

[0084] When the second impedance value is less than the second threshold, it is determined that there is a short circuit abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0085] In one embodiment, the first receiving module 320 is further configured to:

[0086] When the first impedance value is greater than or equal to the first threshold, it is determined that the connection between the two test terminals corresponding to the first impedance value is normal.

[0087] The substrate impedance testing device 110 includes an electrically connected test fixture and a negative voltage module 331. The test fixture includes the aforementioned first transmitting module 310, first receiving module 320, second receiving module 340, and signal transmitting module. The structural block diagram of the negative voltage module is shown below. Figure 6 As shown, the negative voltage module 331 includes three ports: an input port, an output port, and a ground port. The input port of the negative voltage module 331 is electrically connected to the working voltage port of the test fixture, the output port of the negative voltage module 331 is electrically connected to the gate signal port of the test fixture, and the output port of the negative voltage module 331 is electrically connected to the common ground port of the test fixture.

[0088] Specific limitations regarding the substrate impedance testing apparatus 110 can be found in the limitations of the substrate impedance testing method described above, and will not be repeated here. Each module in the aforementioned substrate impedance testing apparatus 110 can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device in hardware form, or stored in the memory of a computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0089] In one embodiment, a computer device is provided, which may be a substrate impedance testing device 130, and its internal structure diagram may be as shown below. Figure 7As shown, the computer device includes a processor, memory, network interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The network interface is used to communicate with external terminals via a network connection. When the computer program is executed by the processor, it implements a substrate impedance testing method. The display screen can be a liquid crystal display (LCD) or an e-ink display. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad mounted on the computer device casing, or an external keyboard, touchpad, or mouse.

[0090] Those skilled in the art will understand that Figure 7 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0091] In one embodiment, a computer device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0092] A first test signal is sent to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test;

[0093] Receive the first impedance value between each of the test terminals;

[0094] When the first impedance value is less than the first threshold, a negative voltage test signal is sent to the target terminal pair, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold;

[0095] The test results of the substrate under test are determined based on the second impedance value of the target terminal pair.

[0096] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0097] When the first impedance value is less than the first threshold, the negative voltage signal is sent to the target terminal pair, wherein the negative voltage signal is used to turn off the target transistor, and the target transistor is a thin film transistor between the two corresponding test terminals of the target terminal pair;

[0098] When the target transistor is in the off state, the second test signal is sent to the target terminal pair.

[0099] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0100] When the second impedance value is greater than or equal to the second threshold, it is determined that there is a leakage current abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0101] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0102] When the second impedance value is less than the second threshold, it is determined that there is a short circuit abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0103] In one embodiment, the processor, when executing a computer program, also performs the following steps:

[0104] When the first impedance value is greater than or equal to the first threshold, it is determined that the connection between the two test terminals corresponding to the first impedance value is normal.

[0105] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0106] A first test signal is sent to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test;

[0107] Receive the first impedance value between each of the test terminals;

[0108] When the first impedance value is less than the first threshold, a negative voltage test signal is sent to the target terminal pair, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold;

[0109] The test results of the substrate under test are determined based on the second impedance value of the target terminal pair.

[0110] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0111] When the first impedance value is less than the first threshold, the negative voltage signal is sent to the target terminal pair, wherein the negative voltage signal is used to turn off the target transistor, and the target transistor is a thin film transistor between the two corresponding test terminals of the target terminal pair;

[0112] When the target transistor is in the off state, the second test signal is sent to the target terminal pair.

[0113] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0114] When the second impedance value is greater than or equal to the second threshold, it is determined that there is a leakage current abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0115] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0116] When the second impedance value is less than the second threshold, it is determined that there is a short circuit abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

[0117] In one embodiment, when the computer program is executed by a processor, it also performs the following steps:

[0118] When the first impedance value is greater than or equal to the first threshold, it is determined that the connection between the two test terminals corresponding to the first impedance value is normal.

[0119] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0120] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0121] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for testing the impedance of a substrate, characterized in that, Includes the following steps: A first test signal is sent to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test; Receive the first impedance value between each of the test terminals; When the first impedance value is less than the first threshold, a negative voltage test signal is sent to the target terminal pair, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold; Receive the corresponding second impedance value of the target terminal pair, and determine the test result of the substrate under test based on the second impedance value; The negative pressure test signal includes a negative pressure signal and a second test signal. The step of sending the negative pressure test signal to the target terminal pair when the first impedance value is less than a first threshold includes: When the first impedance value is less than the first threshold, the negative voltage signal is sent to the target terminal pair, wherein the negative voltage signal is used to turn off the target transistor, and the target transistor is a thin film transistor between the two corresponding test terminals of the target terminal pair; When the target transistor is in the off state, the second test signal is sent to the target terminal pair.

2. The substrate impedance testing method according to claim 1, characterized in that, The step of determining the test result of the substrate under test based on the second impedance value includes: When the second impedance value is greater than or equal to the second threshold, it is determined that there is a leakage current abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

3. The substrate impedance testing method according to claim 1, characterized in that, The step of determining the test result of the substrate under test based on the second impedance value includes: When the second impedance value is less than the second threshold, it is determined that there is a short circuit abnormality between the target terminal and the corresponding two test terminals in the substrate under test.

4. The substrate impedance testing method according to claim 1, characterized in that, After receiving the first impedance value between each of the test terminals, the method further includes: When the first impedance value is greater than or equal to the first threshold, it is determined that the connection between the two test terminals corresponding to the first impedance value is normal.

5. The substrate impedance testing method according to claim 1, characterized in that, Each of the test terminals is used to indicate a transmission port for a transmitted signal.

6. A substrate impedance testing device, characterized in that, The substrate impedance testing device includes: A first transmitting module is configured to transmit a first test signal to the substrate under test, wherein the first test signal is used to test the impedance value between each test terminal in the substrate under test; The first receiving module is used to receive the first impedance value between each of the test terminals; The second transmitting module is used to transmit a negative voltage test signal to a target terminal pair when the first impedance value is less than the first threshold, wherein the target terminal pair is the two test terminals corresponding to the first impedance value whose value is less than the first threshold. The second receiving module is used to receive the corresponding second impedance value of the target terminal pair and determine the test result of the substrate under test based on the second impedance value. The negative pressure test signal includes a negative pressure signal and a second test signal, and the second transmitting module includes: A negative voltage module is used to send a negative voltage signal to the target terminal pair when the first impedance value is less than a first threshold value, wherein the negative voltage signal is used to turn off the target transistor, and the target transistor is a thin film transistor between the two corresponding test terminals of the target terminal pair; The signal transmitting module sends the second test signal to the target terminal pair when the target transistor is in the off state.

7. A substrate impedance testing system, characterized in that, It includes a display substrate with contact connection and the substrate impedance testing device as described in claim 6.

8. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 5.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 5.

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