A data processing method and apparatus for a system on chip
By receiving task grouping information in the system-on-chip and temporarily storing its output data in on-chip storage resources, the problem of coprocessor data read/write overhead affecting computing power is solved, achieving more efficient computing performance.
Patent Information
- Application Number
- CN202011631083.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-12-30
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2040-12-30
AI Technical Summary
Traditional general-purpose processors struggle to meet the high computational demands of intelligent applications such as deep learning, and the data read/write overhead of coprocessors impacts system computing power and efficiency.
By receiving task and related task grouping information on the on-chip system, tasks are sent to the designated cluster, and the task output data is temporarily stored in on-chip storage resources, reducing data read and write overhead.
It improves the processing efficiency and computing power of the on-chip system, reduces data read and write overhead, and enhances computing performance.
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Figure CN114691313B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of chips, and in particular to a data processing method and apparatus for a system-on-a-chip. Background Technology
[0002] With the development of deep learning and big data, especially in intelligent applications such as deep learning, a significant characteristic is the large volume of input data, placing high demands on the platform's computing power. Traditional general-purpose processors (such as CPUs) struggle to meet these computational needs. To satisfy the intelligent processing requirements of complex scenarios in fields such as computer vision, speech, natural language processing, and data mining, heterogeneous computing systems are typically employed, combining general-purpose processors with other dedicated processors (coprocessors) to enhance computing power. However, for heterogeneous systems, the data read / write overhead of coprocessors significantly impacts the system's computing power and efficiency. Therefore, reducing data read / write overhead remains a crucial issue. Summary of the Invention
[0003] Therefore, it is necessary to provide a data processing method and apparatus for a system-on-a-chip to address the aforementioned technical problems.
[0004] According to one aspect of this disclosure, a data processing method for a system-on-a-chip is provided, characterized in that the method includes:
[0005] Receive task and related task grouping information;
[0006] Tasks from relevant task groups are distributed to a specified cluster in the computing device; wherein, the relevant task groups are determined based on the relevant task group information;
[0007] The specified cluster is used to execute the tasks in the relevant task group, and the output data of at least one task in the relevant task group is temporarily stored in the on-chip storage resources of the computing device.
[0008] According to another aspect of this disclosure, a data processing apparatus is provided, characterized in that the apparatus comprises:
[0009] The task scheduling module is used to receive task and related task group information, and to distribute tasks in the related task groups to a specified cluster of the computing device; wherein, the related task groups are determined according to the related task group information;
[0010] A computing device includes at least one cluster for executing tasks in a related task group using the designated cluster, and temporarily storing the output data of at least one task in the related task group in the on-chip storage resources of the computing device.
[0011] According to another aspect of this disclosure, a system-on-a-chip is provided, characterized in that the system-on-a-chip includes the data processing apparatus described in this disclosure.
[0012] According to another aspect of this disclosure, a board is provided, characterized in that the board includes the system-on-a-chip described in this disclosure.
[0013] The data processing method and apparatus disclosed herein can improve the processing efficiency and computing power of on-chip systems. Attached Figure Description
[0014] Figure 1 This is a schematic diagram of the board structure according to one embodiment;
[0015] Figure 2 This is a structural diagram of a combined processing device in a chip according to an embodiment;
[0016] Figure 3 This is a schematic diagram of the internal structure of a single-core computing device according to one embodiment;
[0017] Figure 4 This is a schematic diagram of the internal structure of a multi-core computing device according to one embodiment;
[0018] Figure 5 This is a schematic diagram of the software architecture of a system-on-a-chip according to an embodiment;
[0019] Figure 6 This is a flowchart of a data processing method for a system-on-chip according to one embodiment;
[0020] Figure 7 This is a flowchart illustrating the method for implementing step S603 in one embodiment;
[0021] Figure 8 This is a flowchart illustrating the method for implementing step S603 in another embodiment. Detailed Implementation
[0022] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0023] It should be understood that the terms "first," "second," "third," and "fourth," etc., in the claims, specification, and drawings of this disclosure are used to distinguish different objects, rather than to describe a specific order. The terms "comprising" and "including" as used in the specification and claims of this disclosure indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof.
[0024] It should also be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this disclosure. As used in this disclosure and claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this disclosure and claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations.
[0025] As used in this specification and claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if [described condition or event] is detected" may be interpreted, depending on the context, as "once determined," "in response to determination," "once [described condition or event] is detected," or "in response to detection of [described condition or event]."
[0026] Figure 1 A schematic diagram of the structure of a board 10 according to an embodiment of this disclosure is shown. Figure 1 As shown, board 10 includes chip 101, which is a system-on-chip (SoC) integrating one or more combined processing units. These combined processing units are artificial intelligence computing units used to support various deep learning and machine learning algorithms, meeting the intelligent processing needs of complex scenarios in fields such as computer vision, speech, natural language processing, and data mining. In particular, deep learning technology is widely used in cloud intelligence. A significant characteristic of cloud intelligence applications is the large volume of input data, placing high demands on the platform's storage and computing capabilities. Board 10 in this embodiment is suitable for cloud intelligence applications, possessing massive off-chip storage, on-chip storage, and powerful computing capabilities.
[0027] Chip 101 is connected to external device 103 via external interface device 102. External device 103 may be, for example, a server, computer, camera, monitor, mouse, keyboard, network card, or Wi-Fi interface. Data to be processed can be transmitted from external device 103 to chip 101 via external interface device 102. The calculation results from chip 101 can be transmitted back to external device 103 via external interface device 102. Depending on the application scenario, external interface device 102 may have different interface forms, such as a PCIe interface.
[0028] The board 10 also includes a storage device 104 for storing data, which includes one or more memory cells 105. The storage device 104 is connected to and transmits data with the controller 106 and the chip 101 via a bus. The controller 106 in the board 10 is configured to regulate the state of the chip 101. Therefore, in one application scenario, the controller 106 may include a microcontroller (MCU).
[0029] Figure 2 This is a structural diagram illustrating the combined processing device in chip 101 of this embodiment. (As shown...) Figure 2 As shown, the combined processing device 20 includes a computing device 201, an interface device 202, a processing device 203, and a storage device 204.
[0030] The computing device 201 is configured to perform user-specified operations. It is mainly implemented as a single-core intelligent processor or a multi-core intelligent processor to perform deep learning or machine learning calculations. It can interact with the processing device 203 through the interface device 202 to jointly complete the user-specified operations.
[0031] Interface device 202 is used to transmit data and control commands between computing device 201 and processing device 203. For example, computing device 201 can obtain input data from processing device 203 via interface device 202 and write it to on-chip storage device of computing device 201. Further, computing device 201 can obtain control commands from processing device 203 via interface device 202 and write them to on-chip control cache of computing device 201. Alternatively or optionally, interface device 202 can also read data from storage device of computing device 201 and transmit it to processing device 203.
[0032] The processing device 203, as a general-purpose processing device, performs basic controls including but not limited to data transfer and starting / stopping the computing device 201. Depending on the implementation, the processing device 203 may be one or more types of processors, such as a central processing unit (CPU), a graphics processing unit (GPU), or other general-purpose and / or special-purpose processors. These processors include, but are not limited to, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., and their number can be determined according to actual needs. As mentioned above, the computing device 201 of this disclosure can be considered as having a single-core structure or a homogeneous multi-core structure. However, when the computing device 201 and the processing device 203 are considered together, they are considered to form a heterogeneous multi-core structure.
[0033] Storage device 204 is used to store data to be processed. It may be DRAM or DDR memory, typically 16G or larger in size, and is used to store data of computing device 201 and / or processing device 203.
[0034] Figure 3 The diagram shows the internal structure of the computing device 201 as a single-core processor. The single-core computing device 301 is used to process input data such as computer vision, speech, natural language processing, and data mining. The single-core computing device 301 includes three main modules: a control module 31, a processing module 32, and a storage module 33.
[0035] The control module 31 coordinates and controls the operation of the computation module 32 and the storage module 33 to complete the deep learning task. It includes an instruction fetch unit (IFU) 311 and an instruction decode unit (IDU) 312. The instruction fetch unit 311 fetches instructions from the processing device 203, and the instruction decode unit 312 decodes the fetched instructions and sends the decoding result as control information to the computation module 32 and the storage module 33.
[0036] The computation module 32 includes a vector operation unit 321 and a matrix operation unit 322. The vector operation unit 321 is used to perform vector operations and can support complex operations such as vector multiplication, addition, and nonlinear transformations; the matrix operation unit 322 is responsible for the core computations of deep learning algorithms, namely matrix multiplication and convolution.
[0037] Storage module 33 is used to store or move relevant data, including neuron RAM (NRAM) 331, weight RAM (WRAM) 332, and direct memory access (DMA) module 333. NRAM 331 is used to store input neurons, output neurons, and intermediate results after computation; WRAM 332 is used to store the convolution kernels of the deep learning network, i.e., the weights; DMA 333 is connected to DRAM 204 through bus 34 and is responsible for data transfer between single-core computing device 301 and DRAM 204.
[0038] Figure 4 A schematic diagram of the internal structure of the computing device 201 as a multi-core is shown. The multi-core computing device 41 adopts a hierarchical structure design. As a system-on-a-chip, the multi-core computing device 41 includes at least one cluster, and each cluster includes multiple processor cores. In other words, the multi-core computing device 41 is constructed in a hierarchical structure of system-on-a-chip, cluster, and processor core.
[0039] From the perspective of system-on-a-chip hierarchy, such as Figure 4 As shown, the multi-core computing device 41 includes an external storage controller 401, a peripheral communication module 402, an on-chip interconnect module 403, a synchronization module 404, and multiple clusters 405.
[0040] There can be multiple external storage controllers 401; two are shown as an example in the figure. These controllers are used to access external storage devices, such as those issued by the processor core, in response to access requests from the processor core. Figure 2The DRAM 204 in the chip allows data to be read from or written to external devices. The peripheral communication module 402 receives control signals from the processing device 203 via the interface device 202, initiating the computing device 201 to execute tasks. The on-chip interconnect module 403 connects the external storage controller 401, the peripheral communication module 402, and multiple clusters 405 to transmit data and control signals between modules. The synchronization module 404 is a global barrier controller (GBC) used to coordinate the working progress of each cluster and ensure information synchronization. The multiple clusters 405 are the computing cores of the multi-core computing device 41. Four are shown exemplary in the figure; however, with hardware development, the multi-core computing device 41 of this disclosure can also include 8, 16, 64, or even more clusters 405. The clusters 405 are used to efficiently execute deep learning algorithms.
[0041] From the perspective of cluster hierarchy, such as Figure 4 As shown, each cluster 405 includes multiple processor cores (IPU cores) 406 and one memory core (MEM core) 407.
[0042] Four processor cores 406 are shown in the figure as an example, but this disclosure does not limit the number of processor cores 406. Its internal architecture is as follows: Figure 5 As shown. Each processor core 406 is similar to Figure 3 The single-core computing device 301 also includes three main modules: a control module 51, an arithmetic module 52, and a storage module 53. The functions and structures of the control module 51, arithmetic module 52, and storage module 53 are largely the same as those of the control module 31, arithmetic module 32, and storage module 33, and will not be described again. It should be noted that the storage module 53 includes an input / output direct memory access (IODMA) module 533 and a move direct memory access (MVDMA) module 534. The IODMA 533 controls the memory access of NRAM 531 / WRAM 532 and DRAM 204 via the broadcast bus 409; the MVDMA 534 controls the memory access of NRAM 531 / WRAM 532 and SRAM 408.
[0043] Back Figure 4The storage core 407 is primarily used for storage and communication, namely storing shared data or intermediate results among processor cores 406, and performing communication between cluster 405 and DRAM 204, communication between clusters 405, and communication between processor cores 406. In other embodiments, the storage core 407 has scalar operation capabilities and is used to perform scalar operations.
[0044] The storage core 407 includes an SRAM 408, a broadcast bus 409, a cluster direct memory access (CDMA) module 410, and a global direct memory access (GDMA) module 411. The SRAM 408 acts as a high-performance data relay station. Data multiplexed between different processor cores 406 within the same cluster 405 does not need to be obtained from the DRAM 204 by each processor core 406. Instead, it is relayed between processor cores 406 via the SRAM 408. The storage core 407 only needs to quickly distribute the multiplexed data from the SRAM 408 to multiple processor cores 406 to improve inter-core communication efficiency and greatly reduce on-chip and off-chip input / output access.
[0045] Broadcast bus 409, CDMA 410, and GDMA 411 are used to perform communication between processor cores 406, communication between clusters 405, and data transfer between cluster 405 and DRAM 204, respectively. These will be explained separately below.
[0046] The broadcast bus 409 is used to complete high-speed communication between the processor cores 406 within the cluster 405. In this embodiment, the broadcast bus 409 supports inter-core communication methods including unicast, multicast, and broadcast. Unicast refers to point-to-point (e.g., data transmission from one processor core to another) data transmission. Multicast is a communication method that transmits a piece of data from SRAM 408 to several specific processor cores 406. Broadcast is a communication method that transmits a piece of data from SRAM 408 to all processor cores 406, and is a special case of multicast.
[0047] CDMA 410 is used to control SRAM 408 access between different clusters 405 within the same computing device 201.
[0048] GDMA 411 works in conjunction with external memory controller 401 to control memory access from SRAM 408 to DRAM 204 in cluster 405, or to read data from DRAM 204 into SRAM 408. As previously described, communication between DRAM 204 and NRAM 431 or WRAM 432 can be achieved through two channels. The first channel is a direct connection between DRAM 204 and NRAM 431 or WRAM 432 via IODAM 433; the second channel involves first transmitting data between DRAM 204 and SRAM 408 via GDMA 411, and then transmitting data between SRAM 408 and NRAM 431 or WRAM 432 via MVDMA 534. Although the second channel appears to require more components and has a longer data flow, in some embodiments, the bandwidth of the second channel is significantly greater than that of the first channel. Therefore, communication between DRAM 204 and NRAM 431 or WRAM 432 may be more efficient via the second channel. The embodiments of this disclosure can select the data transmission channel according to their own hardware conditions.
[0049] In other embodiments, the functions of GDMA 411 and IODMA 533 can be integrated into the same component. For ease of description, this disclosure treats GDMA 411 and IODMA 533 as different components. For those skilled in the art, any component that implements functions and achieves technical effects similar to this disclosure falls within the scope of protection of this disclosure. Furthermore, the functions of GDMA 411, IODMA 533, CDMA 410, and MVDMA 534 can also be implemented by the same component.
[0050] Figure 5 A schematic diagram of the software architecture 50 of chip 101 in this embodiment of the present disclosure is shown. The software architecture 50 includes, from top to bottom, an artificial intelligence and machine learning application layer 501, a machine learning framework layer 502, a machine learning programming library layer 503, a machine learning runtime library and system toolkit layer 504, and a driver layer 505.
[0051] The artificial intelligence and machine learning application layer 501 is used to realize various artificial intelligence and machine learning, especially deep learning, specific applications such as face recognition, autonomous driving, speech recognition, natural language processing, and robot image, speech and text processing.
[0052] The machine learning framework layer 502 refers to a tool that helps developers understand and design machine learning models. It allows for development with minimal code, facilitating the creation of powerful artificial intelligence software without requiring in-depth knowledge of complex algorithms. Common frameworks include TensorFlow, Caffe, MXNet, and PyTorch. The machine learning framework layer 502 can process the entire computational graph of the neural network. The computational graph can include multiple operators or kernel functions, such as convolution, pooling, and ReLU functions, with each operator connected according to certain rules to form the computational graph of the entire neural network.
[0053] The machine learning programming library layer 503 includes basic operators required for machine learning application development. The machine learning framework layer 502 can conveniently call these operators to implement deep neural network models and other machine learning algorithms.
[0054] The machine learning runtime library and system toolkit layer 504 includes a runtime library that provides a set of high-level programming interfaces for system-on-chip (SoC) hardware, enabling interaction and resource scheduling between SoC hardware components. The system tools include various tools for SoC software development, such as compilers that compile assembly language and output executable binaries that can run on the SoC; debuggers for debugging software code on the SoC hardware; performance optimization tools for optimizing hardware performance; and automated hardware diagnostic tools for power consumption testing, PCIe link status diagnostics, hardware stress testing, and multi-card interconnect status testing.
[0055] The driver layer 505 contains information about the hardware devices of the system-on-a-chip, enabling the software to communicate with the corresponding hardware devices.
[0056] Figure 6 A flowchart of a data processing method for a system-on-a-chip according to an embodiment of the present disclosure is shown. This embodiment is also referred to... Figure 2-5 Please provide an explanation. For example... Figure 6 As shown, the on-chip system data processing method provided in this embodiment may include the following steps:
[0057] Step S601: Receive task and related task grouping information;
[0058] In embodiments of this disclosure, see Figure 4The task scheduling module 412 of chip 101 receives task and related task grouping information. The related tasks of chip 101 can be the computation of operators or kernel functions of a neural network, where the operators of the neural network can also be represented in the form of kernel functions. Since the computational workload of the tasks executed by the on-chip system is very large, and related tasks are interconnected (for example, the input of the current task requires the output of the previous task), data read / write operations between related tasks may incur significant overhead. In embodiments of this disclosure, related tasks can be bound into related task groups to reduce the data read / write overhead between related tasks. Here, related tasks can refer to tasks with data dependencies.
[0059] In the embodiments of this disclosure, the upper-layer software of chip 101, such as the machine learning framework layer 502, the machine learning runtime library, and the system toolkit layer 504 (such as a compiler in the system tools), can determine the dependencies of tasks to determine whether to bind related tasks into a group. This dependency indicates that there is a data dependency between related tasks. When the aforementioned task is a neural network, this dependency can be determined based on the computation graph structure of the neural network. The connection relationships between various tasks in the computation graph of the neural network can represent the dependencies between related tasks.
[0060] When the upper-layer software determines that there is a dependency between tasks, it can mark the related tasks as a related task group and send the related task group information to the task scheduling module 412 of chip 101. When the upper-layer software determines that there is no dependency between tasks, it can mark the task as a single task without binding it to other tasks as a related task group.
[0061] For example, related task grouping may include a start marker task, related tasks (tasks with data dependencies, and related tasks include at least two tasks), and an end marker task, wherein the start marker task and the end marker task are used to indicate the start and end of the related tasks. Accordingly, related task grouping information may include information such as the start information of related tasks, related task information (such as the identifier of related tasks, the scale of related tasks, etc.), and the end information of related tasks.
[0062] For example, the relevant task grouping information can take many forms. For instance, the relevant task grouping information can be bound to the tasks within the relevant task group. Alternatively, the relevant task grouping information and the relevant task group can be sent separately to the multi-core computing device 41.
[0063] For example, the software driver layer 505 can bind related task grouping information to related task groups. For example, the software can bind the start information of a related task to the first task in the related task group, marking the first task of the related task as the start binding task, which is also the start marking task; the software can mark the intermediate tasks in the related tasks as binding tasks; the software can bind the end information to the last task in the related tasks, marking the last task of the related tasks as the end binding task, which is also the end marking task.
[0064] For example, the software can bind start information to the first task in a related task group, i.e., the start marker task, and bind end information to the last task in the related task group, i.e., the end marker task. The execution of the related tasks in this task group occurs between the start marker task and the end marker task. The execution of the start marker task and the end marker task does not require data read / write operations.
[0065] Step S602: Distribute tasks from relevant task groups to the cluster specified in the computing device; wherein, the relevant task groups are determined based on the relevant task group information;
[0066] In embodiments of this disclosure, the task scheduling module 412 can distribute at least one task in a related task group to a designated cluster based on related task grouping information, so that at least one task in the related task group can be processed by the same cluster. The designated cluster can be determined based on the size of the tasks in the related task group.
[0067] As an optional embodiment, see [link to relevant documentation]. Figure 4 The task scheduling module 412 issues relevant tasks to the multi-core computing device 41 and locks at least one cluster 405 in the multi-core computing device 41 according to the start information in the relevant task group information, and designates the locked at least one cluster as the designated cluster. After the at least one cluster 405 is locked, it can only be used to process tasks in the bound relevant task group. In this way, the processing result of the previous task in the relevant task group can reside in cluster 405 for use by the current task, thereby improving processing efficiency.
[0068] For example, after receiving a task from the upper-layer software, the task scheduling module 412 can store the bound related task groups in the same task queue within the task scheduling module 412. This task queue is an internally maintained queue by the task scheduling module 412 for task scheduling. When issuing the related tasks to the multi-core computing device 41, the task scheduling module 412 can send the tasks within the same task queue to the locked cluster 405, thus ensuring that the locked cluster 405 is only used to process tasks within the bound related task groups.
[0069] This embodiment does not limit the number of locked clusters 405. The locked clusters 405 can be a single cluster or multiple clusters 405. Each cluster can include multiple processor cores (IPU cores) or a single processor core. Optionally, this embodiment can determine the number of clusters to be locked based on the size of the tasks in the relevant task group. For example, when the task size requires execution by a single cluster, a single cluster can be locked. When the task size requires execution by two clusters, two clusters can be locked. Furthermore, the tasks stored in the same task queue of the task scheduling module 412 can be tasks with the same task size, that is, the number of clusters required for task execution in the relevant task group is the same, thereby reducing data transmission overhead between clusters.
[0070] Step S603: Execute the tasks in the relevant task group using the specified cluster, and temporarily store the output data of at least one task in the relevant task group in the on-chip storage resources of the computing device.
[0071] In embodiments of this disclosure, see Figure 4 The multi-core computing device 41 uses the locked cluster 405 to execute tasks in the relevant task group, and no longer executes other tasks.
[0072] In an optional embodiment, the task scheduling module can assign tasks in the relevant task group to the locked cluster 405 for execution. Data that needs to be reused in the relevant tasks, such as the execution results (output data) of related tasks with data dependencies, can reside in the on-chip storage resources inside the cluster, such as SRAM 408. This allows the current task to directly obtain the execution result of its previous associated task from SRAM 408 without having to read data from storage resources outside the cluster, such as cache or DRAM. This reduces the read and write overhead between related tasks in the same task group and improves processing efficiency.
[0073] In traditional technologies, after the previous associated task is completed, its execution result is typically written back to DRAM, an external storage resource of the cluster. However, frequent data access between the cluster's on-chip SRAM408 and the external DRAM significantly reduces the computational efficiency of the on-chip system and impacts its performance. In this embodiment, by locking at least one cluster within the computing device and temporarily storing data (such as input data or execution results) during the execution of related tasks in the on-chip storage resources within that cluster, frequent data read / write operations are avoided, reducing data read / write overhead and computational latency.
[0074] This embodiment does not limit the type of on-chip storage resources within the cluster. For example, it can be SRAM, WRAM (Weight RAM), or NRAM (Neural RAM). This document only uses SRAM as an example to illustrate the implementation of this disclosure.
[0075] In this embodiment, since on-chip storage resources are very limited, they may sometimes be insufficient to meet the data storage space required by related tasks. Therefore, in order to keep the data of the aforementioned related tasks residing in on-chip storage resources during execution, in this embodiment, the upper-layer software can also segment the tasks. That is, the upper-layer software can not only bind interrelated tasks, but also further decompose excessively large tasks into smaller tasks, so that the cluster of computing devices can execute the task.
[0076] Optionally, the method may further include:
[0077] Release the lock on the cluster based on the end information in the task grouping information.
[0078] In embodiments of this disclosure, the multi-core computing device 41 can unlock the locked cluster 405 based on the end information in the received task grouping information. See also Figure 4 After receiving the end information in the task grouping information, the locked cluster 405 will release the occupied computing resources and restore the normal data processing flow of the cluster 405 when it completes the above-mentioned end marker task. For example, it can access data with external storage resources.
[0079] It should be clear that each cluster includes at least one processor core. When each cluster contains only one processor core, the above method can schedule tasks at the processor core granularity. For example, the task scheduler can lock onto a single processor core of the computing device and send at least one task from the relevant task group to the same processor core of the computing device, while temporarily storing the data that needs to be reused in the relevant task group (such as the output data of at least one task) in the on-chip storage resources of the processor core, such as WRAM or NRAM.
[0080] Figure 7 A flowchart illustrating a method for implementing step S603 according to an embodiment of this disclosure is shown. In one embodiment of this disclosure, related task grouping information can be bound to various related tasks. The task scheduling module 412 can send the related tasks bound to the related task grouping information to at least one cluster of the multi-core computing device 41, and the cluster can execute the received related tasks. At this time, the related task group only includes the related tasks and also carries related task grouping information. For example, the first task in the related tasks is a start marking task, i.e., a start binding task. The last task in the related tasks is an end marking task, i.e., an end binding task. Figure 7 As shown, step S603 may include:
[0081] Step S6031: Receive the start binding task, lock the cluster of the relevant task group to be executed, and read and write data according to the data read and write tags to execute the start binding task.
[0082] In embodiments of this disclosure, see Figure 4 The multi-core computing device 41 receives a "Start Binding Task" message from the task scheduling module 412 and locks a cluster 405 for executing the related task group. The "Start Binding Task" represents the first related task in the bound related task group. After the multi-core computing device 41 locks the cluster 405 for executing the related task group, the cluster 405 can only be used to execute tasks in the related task group and cannot be used to execute other tasks.
[0083] For example, see Figure 4After receiving the task to begin binding, cluster 405 reads data read / write tags from the parameter table. These tags may include content read tags and content write tags. In this embodiment, each task in the related task group can be assigned a corresponding data read / write tag. During task execution, the computing device can obtain the input data required for the task based on the content read tag and write the output data of the task to a designated storage resource based on the content write tag. The parameter table can be stored in external storage resources such as DRAM or cache. Cluster 405 can obtain the data read / write tags from the parameter table from these storage resources and perform corresponding data read / write operations based on these tags.
[0084] The content read tag indicates whether input data is read from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. According to the on-chip system data processing method of this embodiment, the data held in the SRAM 408 of the multi-core computing device 41 is the resident data of the previous task in the bound related task group stored in the SRAM 408.
[0085] The content write tag indicates whether to write the output data back to the external storage resources (e.g., DRAM) of the multi-core computing device 41, and whether to keep the output data in the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. Illustratively, the content write tag can be defined according to the following table:
[0086]
[0087] For example, cluster 405 can read and write data through the Application Binary interface (ABI) according to the read tags and write tags read from the parameter table. For instance, the output of the previous task in a related task group can be used as the input of the current task. In this case, the write tag of the previous task can be 00 or 01, and the read tag of the current task reads input data from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41.
[0088] After the previous task is completed, cluster 405 writes a tag based on the content of the previous task and writes the output data of the previous task into on-chip storage resources (e.g., SRAM). When executing the current task, cluster 405 reads the tag based on the content of the current task and reads the output data of the previous task from the on-chip storage resources (e.g., SRAM), without needing to read data from DRAM.
[0089] In the embodiments of this disclosure, the start binding task is the first task in the relevant task group. The content read tag corresponding to the start binding task can be reading data from the external storage resources of the computing device, and the content write tag of the start binding task can be storing the output data of the start binding task in the on-chip storage resources of the computing device. Therefore, during the execution of the start binding task, the computing device can read the input data of the start binding task from the external storage resources of the computing device according to the data read / write tag, and temporarily store the output data of the start binding task in the on-chip storage resources of the computing device.
[0090] Step S6032: Receive the binding task, and read and write data according to the data read and write tag specifications to execute the binding task;
[0091] In embodiments of this disclosure, see Figure 4 After sending the start binding task, the task scheduling module 412 continues to send binding tasks. The binding task is an intermediate task within the related task group being bound.
[0092] See Figure 4 After receiving a binding task, cluster 405 reads the content read tag and content write tag from the parameter table and begins executing the task. Referring to the above description, each binding task may correspond to a data read / write tag. The content read tag and content write tag can define whether input data is read from the on-chip storage resources of the computing device, and whether output data is written back to the external storage resources of the computing device. At least one intermediate task in this related task group may be an associated task that needs to be executed on the cluster. The content read tag of this binding task may be reading input data from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. The content write tag of this binding task may be writing output data back to the on-chip storage resources (e.g., SRAM 408). Cluster 405 reads and writes data through the application binary interface according to the content read tag and content write tag of the binding task.
[0093] For example, there can be multiple binding tasks. By repeatedly executing step S6032 above, all binding tasks can be completed. For example, the related task group can also only include a start binding task and an end binding task. In this case, since there are no binding tasks, step S6032 above may not be executed.
[0094] Step S6033: Receive the end binding task, read and write data according to the data read and write tags, execute the end binding task, and then release the locked cluster.
[0095] In embodiments of this disclosure, see Figure 4After cluster 405 completes the binding task, it receives a termination binding task from task scheduling module 412. The termination binding task represents the last task in the relevant task group of the binding. Upon receiving the termination binding task, cluster 405 reads and writes data through the application binary interface according to the read tags and write tags from the parameter table. Referring to the above description, the read tags and write tags can define whether input data is read from the on-chip storage resources of the computing device, and whether output data is written back to the external storage resources of the computing device. The read tag for the termination binding task can be reading input data from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. The write tag for the termination binding task can be writing output data back to external storage resources (e.g., DRAM).
[0096] After the binding task is completed, the locked cluster 405 is released, meaning that cluster 405 can still be used to perform other tasks and resume normal data processing flow. For example, data can be accessed in storage resources (such as DRAM) outside the cluster.
[0097] Figure 8 A flowchart illustrating a method for implementing step S603 according to another embodiment of the present disclosure is shown. This embodiment is related to... Figure 7 The difference in the illustrated embodiments is that, in one embodiment of this disclosure, the related task grouping may include related tasks, a start marker task for marking the start of the related task, and an end marker task for marking the end of the related task. The start marker task and the end marker task may not involve any data reading or writing. Figure 8 As shown, step S603 may include:
[0098] Step S7031: Receive and execute the start marking task, and lock the clusters that will execute the relevant task groups.
[0099] In embodiments of this disclosure, see Figure 4 The multi-core computing device 41 receives a start marker task sent by the task scheduling module 412 and locks the cluster 405 for executing the relevant task group. The start marker task is used to identify the start of the bound relevant task group. Wherein, the multi-core computing device 41 locks the cluster 405 for executing the relevant task group, and the cluster 405 can only be used to execute tasks in the relevant task group, and cannot be used to execute other tasks.
[0100] Step S7032: Receive the relevant task, read and write data according to the data read and write tag, and execute the relevant task.
[0101] In embodiments of this disclosure, see Figure 4The data read / write tags for the relevant tasks can include content write tags and content read tags. The content read tag for the first task of the relevant tasks can indicate that data is read from the external storage resources (e.g., DRAM) of the locked cluster, and the content write tag for the first task of the relevant tasks can indicate that output data resides in the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. The content read tag for the last task of the relevant tasks can indicate that input data is read from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41, and the content write tag for the last task of the relevant tasks can indicate that output data is written back to the external storage resources (e.g., DRAM) of the multi-core computing device 41. The content read tag for intermediate tasks between the first and last tasks in the relevant tasks can be that input data is read from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41, and the content write tag for intermediate tasks can be that output data resides in the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41.
[0102] The locked cluster can obtain the data involved in the execution of each related task based on the data read and write tags of the above-mentioned related tasks, and then execute each of the above-mentioned related tasks respectively.
[0103] Step S7033: Receive and execute the end marker task to release the locked cluster.
[0104] In embodiments of this disclosure, see Figure 4 After the bound cluster 405 completes the bound related tasks, it receives an end marker task sent by the task scheduling module 412. The start marker task is used to identify the beginning of the bound related task group. After the cluster 405 completes the end marker task, it releases the locked cluster 405, meaning that the cluster 405 can still be used to execute other tasks and resume normal data processing flow, such as accessing data in external storage resources (e.g., DRAM).
[0105] Reference Figure 2 and Figure 4 This describes a data processing apparatus for executing a data processing method of the system-on-a-chip according to an embodiment of the present disclosure, such as... Figure 2 and Figure 4 As shown, the data processing device can be implemented using chip 101, and the device may include:
[0106] Task scheduling module 412 is used to receive task and related task group information, and to send the tasks in the related task group to the cluster specified in the computing device, wherein the related task group is determined according to the task group information;
[0107] The computing device 41 includes at least one cluster for executing tasks in the related task group using the designated cluster, and temporarily storing the output data of at least one task in the related task group in the on-chip storage resources of the computing device.
[0108] Optionally, the computing device 41 is configured to lock at least one cluster in the computing device based on start information in the task grouping information, and designate the locked at least one cluster as the designated cluster. The computing device is further configured to unlock the cluster based on end information in the task grouping.
[0109] In embodiments of this disclosure, see Figure 4 The task scheduling module 412 of chip 101 receives task and related task grouping information. The related tasks of chip 101 can be the computation of operators or kernel functions of a neural network, where the operators of the neural network can also be represented in the form of kernel functions. Since the computational workload of the tasks executed by the on-chip system is very large, and related tasks are interconnected (for example, the input of the current task requires the output of the previous task), data read / write operations between related tasks may incur significant overhead. In embodiments of this disclosure, related tasks can be bound into related task groups to reduce the data read / write overhead between related tasks. Here, related tasks can refer to tasks with data dependencies.
[0110] In the embodiments of this disclosure, the upper-layer software of chip 101, such as the machine learning framework layer 502, the machine learning runtime library, and the system toolkit layer 504 (such as a compiler in the system tools), can determine the dependencies of tasks to determine whether to bind related tasks into a group. This dependency indicates that there is a data dependency between related tasks. When the aforementioned task is a neural network, this dependency can be determined based on the computation graph structure of the neural network. The connection relationships between various tasks in the computation graph of the neural network can represent the dependencies between related tasks.
[0111] When the upper-layer software determines that there is a dependency between tasks, it can mark the related tasks as a related task group and send the related task group information to the task scheduling module 412 of chip 101. When the upper-layer software determines that there is no dependency between tasks, it can mark the task as a single task without binding it to other tasks as a related task group.
[0112] For example, related task grouping may include a start marker task, related tasks (tasks with data dependencies, and related tasks include at least two tasks), and an end marker task, wherein the start marker task and the end marker task are used to identify the start and end of the bound tasks. Accordingly, related task grouping information may include information such as the start information of related tasks, related task information (such as the identifier of related tasks, the size of related tasks, etc.), and the end information of related tasks.
[0113] For example, the relevant task grouping information can take various forms. For instance, the relevant task grouping information can be bound to a task within a relevant task group. Alternatively, the relevant task grouping information and the relevant task group can be sent separately to the multi-core computing device 41.
[0114] For example, the software driver layer 505 can bind related task grouping information to related task groups. For example, the software can bind the start information of a related task to the first task in the related task group, marking the first task of the related task as the start binding task, which is also the start marking task; the software can mark the intermediate tasks in the related tasks as binding tasks; the software can bind the end information to the last task in the related tasks, marking the last task of the related tasks as the end binding task, which is also the end marking task.
[0115] For example, the software can bind start information to the first task in a related task group, i.e., the start marker task, and bind end information to the last task in the related task group, i.e., the end marker task. The execution of the related tasks in this task group occurs between the start marker task and the end marker task. The execution of the start marker task and the end marker task does not require data read / write operations.
[0116] In embodiments of this disclosure, see Figure 4 The task scheduling module 412 can issue relevant tasks to the multi-core computing device 41 and lock at least one cluster 405 in the multi-core computing device 41 according to the start information in the relevant task group information. After the at least one cluster 405 is locked, it can only be used to process tasks in the bound relevant task group. In this way, the processing result of the previous task in the relevant task group can reside in the cluster 405 for use by the current task, thereby improving processing efficiency.
[0117] For example, after receiving a task from the upper-layer software, the task scheduling module 412 can store the bound related task groups in the same task queue within the task scheduling module 412. This task queue is an internally maintained queue by the task scheduling module 412 for task scheduling. When issuing the related tasks to the multi-core computing device 41, the task scheduling module 412 can send the tasks within the same task queue to the locked cluster 405, thus ensuring that the locked cluster 405 is only used to process tasks within the bound related task groups.
[0118] This embodiment does not limit the number of locked clusters 405. The locked clusters 405 can be a single cluster or multiple clusters 405. Each cluster can include multiple processor cores (IPU cores) or a single processor core. Optionally, this embodiment can determine the number of clusters to be locked based on the size of the tasks in the relevant task group. For example, when the task size requires execution by a single cluster, a single cluster can be locked. When the task size requires execution by two clusters, two clusters can be locked. Furthermore, the tasks stored in the same task queue of the task scheduling module 412 can be tasks with the same task size, that is, the number of clusters required for task execution in the relevant task group is the same, thereby reducing data transmission overhead between clusters.
[0119] In embodiments of this disclosure, see Figure 4 The multi-core computing device 41 uses the locked cluster 405 to execute tasks in the relevant task group, and no longer executes other tasks.
[0120] In an optional embodiment, tasks in the related task group can be assigned to the locked cluster 405 for execution. The execution results of the related tasks can reside in the on-chip storage resources within the cluster, such as SRAM 408. This allows the current task to directly obtain the execution result of its previous associated task from SRAM 408 without having to read data from storage resources outside the cluster, such as cache or DRAM. This reduces the read / write overhead between related tasks in the same task group and improves processing efficiency.
[0121] In traditional technologies, after the previous associated task is completed, its execution result is typically written back to DRAM, an external storage resource of the cluster. However, frequent data access between the cluster's on-chip SRAM408 and the external DRAM significantly reduces the computational efficiency of the on-chip system and impacts its performance. In this embodiment, by locking at least one cluster within the computing device and temporarily storing data (such as input data or execution results) during the execution of related tasks in the on-chip storage resources within that cluster, frequent data read / write operations are avoided, reducing data read / write overhead and computational latency.
[0122] This embodiment does not limit the type of on-chip storage resources within the cluster. For example, it can be SRAM, WRAM (Weight RAM), or NRAM (Neural RAM). This document only uses SRAM as an example to illustrate the implementation of this disclosure.
[0123] In this embodiment, since on-chip storage resources are very limited, they may sometimes be insufficient to meet the data storage space required by related tasks. Therefore, in order to keep the data of the aforementioned related tasks residing in on-chip storage resources during execution, in this embodiment, the upper-layer software can also segment the tasks. That is, the upper-layer software can not only bind interrelated tasks, but also further decompose excessively large tasks into smaller tasks, so that the cluster of computing devices can execute the task.
[0124] In embodiments of this disclosure, the multi-core computing device 41 can unlock the locked cluster 405 based on the end information in the received task grouping information. See also Figure 4 After receiving the end information in the task grouping information, the locked cluster 405 will release the occupied computing resources and restore the normal data processing flow of the cluster 405 when it completes the above-mentioned end marker task. For example, it can access data with external storage resources.
[0125] Reference Figure 4 A computing device used to describe a data processing apparatus according to an embodiment of the present disclosure, such as... Figure 4As shown, this can be implemented using a multi-core computing device 41 with chip 101. In one embodiment of this disclosure, related task grouping information can be bound to various related tasks. The task scheduling module 412 can send the related tasks bound to the related task grouping information to at least one cluster of the multi-core computing device 41, and the cluster can execute the received related tasks. At this time, the related task group only includes the related tasks and also carries related task grouping information. For example, the first task in the related tasks is a start marking task, i.e., a start binding task. The last task in the related tasks is an end marking task, i.e., an end binding task.
[0126] In this embodiment, as Figure 4 As shown, the multi-core computing device 41 is used to receive the start binding task, lock the cluster 405 that executes the relevant task group, and read and write data according to the data read and write tags to execute the start binding task.
[0127] In this embodiment, see Figure 4 The multi-core computing device 41 receives a "Start Binding Task" message from the task scheduling module 412 and locks a cluster 405 for executing the related task group. The "Start Binding Task" represents the first related task in the bound related task group. After the multi-core computing device 41 locks the cluster 405 for executing the related task group, the cluster 405 can only be used to execute tasks in the related task group and cannot be used to execute other tasks.
[0128] For example, see Figure 4 After receiving the task to begin binding, cluster 405 reads data read / write tags from the parameter table. These tags may include content read tags and content write tags. In this embodiment, each task in the related task group can be assigned a corresponding data read / write tag. During task execution, the computing device can obtain the input data required for the task based on the content read tag and write the output data of the task to a designated storage resource based on the content write tag. The parameter table can be stored in external storage resources such as DRAM or cache. Cluster 405 can obtain the data read / write tags from the parameter table from these storage resources and perform corresponding data read / write operations based on these tags.
[0129] The content read tag indicates whether input data is read from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. According to the on-chip system data processing method of this embodiment, the data held in the SRAM 408 of the multi-core computing device 41 is the resident data of the previous task in the bound related task group stored in the SRAM 408.
[0130] The content write tag indicates whether to write the output data back to the external storage resources (e.g., DRAM) of the multi-core computing device 41, and whether to keep the output data in the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. Illustratively, the content write tag can be defined according to the following table:
[0131]
[0132] For example, cluster 405 can read and write data through the Application Binary interface (ABI) according to the read tags and write tags read from the parameter table. For instance, the output of the previous task in a related task group can be used as the input of the current task. In this case, the write tag of the previous task can be 00 or 01, and the read tag of the current task reads input data from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41.
[0133] After the previous task is completed, cluster 405 writes the output data of the previous task to on-chip storage resources (e.g., SRAM) based on the content of the previous task's write tag. When executing the current task, cluster 405 reads the output data of the previous task from the on-chip storage resources (e.g., SRAM) based on the content of the current task's read tag, without needing to read data from DRAM. In embodiments of this disclosure, the start binding task is the first task in the related task group. The content read tag corresponding to the start binding task can be reading data from the external storage resources of the computing device, and the content write tag of the start binding task can be storing the output data of the start binding task in the on-chip storage resources of the computing device. Therefore, during the execution of the start binding task, the computing device can read the input data of the start binding task from the external storage resources of the computing device based on the data read / write tag, and temporarily store the output data of the start binding task in the on-chip storage resources of the computing device.
[0134] In this embodiment, the multi-core computing device 41 is also used to receive the binding task, and read and write data according to the data read and write tag, and execute the binding task;
[0135] In embodiments of this disclosure, see Figure 4 After sending the start binding task, the task scheduling module 412 continues to send binding tasks. The binding task is an intermediate task within the related task group being bound.
[0136] See Figure 4After receiving a binding task, the cluster 405 of the multi-core computing device 41 reads the content read tag and content write tag from the parameter table and begins executing the task. Referring to the above description, each binding task may correspond to a data read / write tag. The content read tag and content write tag can define whether input data is read from the on-chip storage resources of the computing device, and whether output data is written back to the external storage resources of the computing device. At least one intermediate task in this related task group may be an associated task that needs to be executed on the cluster. The content read tag of this binding task may be reading input data from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. The content write tag of this binding task may be writing output data back to the on-chip storage resources (e.g., SRAM 408). The cluster 405 reads and writes data through the application binary interface according to the content read tag and content write tag of the binding task.
[0137] For example, there can be multiple binding tasks. By repeatedly executing step S6032 above, all binding tasks can be completed. For example, the related task group can also only include a start binding task and an end binding task. In this case, since there are no binding tasks, step S6032 above may not be executed.
[0138] In this embodiment, the multi-core computing device 41 is also used to receive the end-binding task, read and write data according to the data read and write tags, execute the end-binding task, and then release the locked cluster.
[0139] In embodiments of this disclosure, see Figure 4 After cluster 405 completes the binding task, it receives a termination binding task from task scheduling module 412. The termination binding task represents the last task in the relevant task group of the binding. Upon receiving the termination binding task, cluster 405 reads and writes data through the application binary interface according to the read tags and write tags from the parameter table. Referring to the above description, the read tags and write tags can define whether input data is read from the on-chip storage resources of the computing device, and whether output data is written back to the external storage resources of the computing device. The read tag for the termination binding task can be reading input data from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. The write tag for the termination binding task can be writing output data back to external storage resources (e.g., DRAM).
[0140] After the binding task is completed, the multi-core computing device 41 releases the locked cluster 405, meaning that the cluster 405 can still be used to perform other tasks and resume normal data processing flow, such as accessing data in storage resources (e.g., DRAM) outside the cluster.
[0141] Reference Figure 4 A computing device used to describe another embodiment of the system-on-a-chip data processing apparatus of the present disclosure, such as... Figure 4 As shown, it can be implemented using a multi-core computing device 41. The difference between this embodiment and the above embodiments is that, in one embodiment of this disclosure, the related task group may include related tasks, a start marker task for marking the start of the related task, and an end marker task for marking the end of the related task. The start marker task and the end marker task may not involve any data reading or writing.
[0142] In this embodiment, the multi-core computing device 41 is used to receive and execute the start marking task and lock the cluster that executes the relevant task group.
[0143] In embodiments of this disclosure, see Figure 4 The multi-core computing device 41 receives a start marker task sent by the task scheduling module 412 and locks the cluster 405 for executing the relevant task group. The start marker task is used to identify the start of the bound relevant task group. Wherein, the multi-core computing device 41 locks the cluster 405 for executing the relevant task group, and the cluster 405 can only be used to execute tasks in the relevant task group, and cannot be used to execute other tasks.
[0144] In this embodiment, the multi-core computing device 41 is also used to receive related tasks, read and write data according to the data read and write tags, and execute the related tasks.
[0145] In embodiments of this disclosure, see Figure 4The data read / write tags for the relevant tasks can include content write tags and content read tags. The content read tag for the first task of the relevant tasks can indicate that data is read from the external storage resources (e.g., DRAM) of the locked cluster, and the content write tag for the first task of the relevant tasks can indicate that output data resides in the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41. The content read tag for the last task of the relevant tasks can indicate that input data is read from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41, and the content write tag for the last task of the relevant tasks can indicate that output data is written back to the external storage resources (e.g., DRAM) of the multi-core computing device 41. The content read tag for intermediate tasks between the first and last tasks in the relevant tasks can be that input data is read from the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41, and the content write tag for intermediate tasks can be that output data resides in the on-chip storage resources (e.g., SRAM 408) of the multi-core computing device 41.
[0146] The locked cluster can obtain the data involved in the execution of each related task based on the data read and write tags of the above-mentioned related tasks, and then execute each of the above-mentioned related tasks respectively.
[0147] In this embodiment, the multi-core computing device 41 is also used to receive and execute the end-marking task to release the locked cluster.
[0148] In embodiments of this disclosure, see Figure 4 After the bound cluster 405 completes the bound related tasks, it receives an end marker task sent by the task scheduling module 412. The start marker task is used to identify the beginning of the bound related task group. After the cluster 405 completes the end marker task, it releases the locked cluster 405, meaning that the cluster 405 can still be used to execute other tasks and resume normal data processing flow, such as accessing data in external storage resources (e.g., DRAM).
[0149] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this disclosure is not limited to the described order of actions, because according to this disclosure, some steps can be performed in other orders or simultaneously. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily essential to this disclosure.
[0150] It should be further explained that, although Figure 6-8The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 6-8 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.
[0151] It should be understood that the above-described device embodiments are merely illustrative, and the device disclosed herein can be implemented in other ways. For example, the division of units / modules described in the above embodiments is only a logical functional division, and other division methods may be used in actual implementation. For example, multiple units, modules, or components may be combined, integrated into another system, or some features may be ignored or not executed.
[0152] Furthermore, unless otherwise specified, the functional units / modules in the various embodiments of this disclosure can be integrated into one unit / module, or each unit / module can exist physically separately, or two or more units / modules can be integrated together. The integrated units / modules described above can be implemented in hardware or as software program modules.
[0153] If the integrated unit / module is implemented in hardware, the hardware can be digital circuits, analog circuits, etc. The physical implementation of the hardware structure includes, but is not limited to, transistors, memristors, etc. Unless otherwise specified, the artificial intelligence processor can be any suitable hardware processor, such as a CPU, GPU, FPGA, DSP, and ASIC, etc. Unless otherwise specified, the storage unit can be any suitable magnetic or magneto-optical storage medium, such as resistive random access memory (RRAM), dynamic random access memory (DRAM), static random access memory (SRAM), enhanced dynamic random access memory (EDRAM), high-bandwidth memory (HBM), hybrid memory cube (HMC), etc.
[0154] If the integrated unit / module is implemented as a software program module and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this disclosure. The aforementioned memory includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.
[0155] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.
[0156] The foregoing can be better understood in accordance with the following terms:
[0157] Clause A1, A data processing method for a system-on-a-chip, characterized in that the method includes:
[0158] Receive task and related task grouping information;
[0159] Tasks from relevant task groups are distributed to a specified cluster in the computing device; wherein, the relevant task groups are determined based on the relevant task group information;
[0160] The specified cluster is used to execute the tasks in the relevant task group, and the output data of at least one task in the relevant task group is temporarily stored in the on-chip storage resources of the computing device.
[0161] Clause A2. The method according to Clause A1, characterized in that the relevant task grouping information includes start information, and the method includes:
[0162] Based on the start information in the task grouping information, at least one cluster in the computing device is locked as the designated cluster.
[0163] Clause A3. The method according to Clause A1, characterized in that the task grouping information includes end information; the method further includes:
[0164] Release the lock on the specified cluster based on the end information in the task grouping information.
[0165] Clause A 4. The method according to any one of Clauses A 1-3, characterized in that the related task group includes a start binding task, a binding task, and an end binding task; the step of using the designated cluster to execute the tasks in the related task group further includes:
[0166] The system receives the start binding task, locks the cluster for executing the relevant task group, reads and writes data according to the data read / write tags, and executes the start binding task; wherein, the start binding task includes the start information in the task group information;
[0167] Receive the binding task, read and write data according to the data read and write tags, and execute the binding task;
[0168] Receive the end binding task, and read and write data according to the data read and write tags, and execute the end binding task.
[0169] Clause A 5. The method according to Clause A 4, wherein the data read / write tag includes a content write tag, the content write tag indicating whether to write the output data back to the external storage resources of the computing device and whether to keep the output data in the on-chip storage resources of the computing device;
[0170] The process of reading and writing data according to data read / write tags and executing the start binding task includes:
[0171] The label is written according to the content, and the output data of the task to be bound is stored in the on-chip storage resources of the computing device.
[0172] Clause A6. The method according to Clause A5, wherein the data read / write tag includes a content read tag, the content read tag indicating whether input data is read from on-chip storage resources of the computing device;
[0173] The step of reading and writing data according to data read / write tags and executing the binding task includes:
[0174] The tag is read according to the content, and input data is read from the on-chip storage resources of the computing device;
[0175] The content is written into a tag, and the output data of the bound task resides in the on-chip storage resources of the computing device.
[0176] Clause A7. The method described in Clause A6, characterized in that, the step of reading and writing data according to the data read / write tag and performing the termination binding task includes:
[0177] Write the label according to the content, and write the output data of the completed binding task back to the external storage resources of the computing device.
[0178] Clause A8. The method according to any one of Clauses A1-3, characterized in that, the step of using the designated cluster to execute the tasks in the relevant task group further includes:
[0179] Receive and execute the start marker task, and lock the cluster for executing the relevant task group;
[0180] Receive relevant tasks, read and write data according to the data read and write tags, execute the relevant tasks, and store the output data of the other tasks except the last one in the on-chip storage resources of the computing device.
[0181] Receive and execute the end marker task to release the locked cluster.
[0182] Clause A 9. A data processing apparatus, characterized in that the apparatus comprises:
[0183] The task scheduling module is used to receive task and related task group information, and to distribute tasks in the related task groups to a specified cluster of the computing device; wherein, the related task groups are determined according to the related task group information;
[0184] A computing device includes at least one cluster for executing tasks in a related task group using the designated cluster, and temporarily storing the output data of at least one task in the related task group in the on-chip storage resources of the computing device.
[0185] Clause A 10. The apparatus according to Clause A 9, wherein the task grouping information includes start information and end information;
[0186] The computing device is used to lock at least one cluster in the computing device as the designated cluster based on the start information in the task grouping information.
[0187] Clause A 11. The apparatus according to Clause A 9, characterized in that,
[0188] The computing device is also used to unlock the cluster based on the end information in the task grouping information.
[0189] Clause A 12. The apparatus according to any one of Clauses A 9-11, characterized in that the associated task group includes a start binding task, a binding task, and an end binding task; the computing device is configured to execute tasks in the associated task group using the designated cluster, specifically:
[0190] This is used to receive the start binding task, lock the cluster for executing the relevant task group, and read and write data according to the data read and write tags, and execute the start binding task; wherein, the start binding task includes the start information in the task group information;
[0191] Used to receive binding tasks, read and write data according to the data read and write tags, and execute the binding tasks;
[0192] Used to receive the end binding task, and to read and write data according to the data read and write tags, and to execute the end binding task.
[0193] Clause A 13. The apparatus according to Clause A 12, wherein the data read / write tag includes a content write tag, the content write tag indicating whether to write the output data back to the external storage resources of the computing device and whether to keep the output data in the on-chip storage resources of the computing device;
[0194] The computing device is specifically used to write tags according to the content and store the output data of the task to be bound in the on-chip storage resources of the computing device.
[0195] Clause A 14. The apparatus according to Clause A 13, wherein the data read / write tag includes a content read tag, the content read tag indicating whether input data is read from on-chip storage resources of the computing device;
[0196] The computing device is specifically used for:
[0197] The tag is read according to the content, and input data is read from the on-chip storage resources of the computing device;
[0198] The content is written into a tag, and the output data of the bound task resides in the on-chip storage resources of the computing device.
[0199] Clause A 15. The method according to Clause A 14, characterized in that the computing device is specifically used for:
[0200] Write the label according to the content, and write the output data of the completed binding task back to the external storage resources of the computing device.
[0201] Clause A 16. The apparatus according to any one of Clauses A 9-11, characterized in that the computing apparatus is configured to execute tasks in the relevant task group using the designated cluster, specifically:
[0202] Used to receive and execute start marker tasks, and lock the cluster for executing related task groups;
[0203] Used to receive relevant tasks, read and write data according to the data read and write tags, execute the relevant tasks, and store the output data of the other tasks except the last one in the on-chip storage resources of the computing device.
[0204] This cluster is used to receive and execute end-mark tasks and release locks.
[0205] Clause A 17. A system-on-a-chip, characterized in that the system-on-a-chip includes the data processing apparatus described in any one of Clauses A 9-16.
[0206] Clause A 18. A board, characterized in that the board comprises the system-on-a-chip described in Clause A 17.
[0207] The embodiments of this disclosure have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this disclosure. The descriptions of the embodiments above are only for the purpose of helping to understand the methods and core ideas of this disclosure. Furthermore, any changes or modifications made by those skilled in the art based on the ideas of this disclosure, and on the specific implementation methods and application scope of this disclosure, are all within the scope of protection of this disclosure. Therefore, the content of this specification should not be construed as a limitation of this disclosure.
Claims
1. A data processing method for a system-on-a-chip, characterized in that, The method includes: Receive task and related task grouping information; Tasks from relevant task groups are distributed to a specified cluster in the computing device; wherein, the relevant task groups are determined based on relevant task group information, and the relevant task groups include at least one task with a dependency relationship; the specified cluster is determined based on the size of the tasks in the relevant task groups; The specified cluster is used to execute the tasks in the relevant task group, and the output data of at least one task in the relevant task group is temporarily stored in the on-chip storage resources inside the specified cluster. The step of using the specified cluster to execute the tasks in the relevant task group further includes: Receive and execute the start marker task, and lock the cluster for executing the relevant task group; Receive relevant tasks, read and write data according to the data read and write tags, execute the relevant tasks, and store the output data of the other tasks except the last one in the on-chip storage resources of the computing device. Receive and execute the end marker task to release the locked cluster.
2. The method according to claim 1, characterized in that, The relevant task grouping information includes start information, and the method includes: Based on the start information in the task grouping information, at least one cluster in the computing device is locked as the designated cluster.
3. The method according to claim 1, characterized in that, The task grouping information includes end information; the method further includes: Release the lock on the specified cluster based on the end information in the task grouping information.
4. The method according to any one of claims 1-3, characterized in that, The relevant task group includes a start binding task, a binding task, and an end binding task; the step of using the specified cluster to execute the tasks in the relevant task group further includes: The system receives the start binding task, locks the cluster for executing the relevant task group, reads and writes data according to the data read / write tags, and executes the start binding task; wherein, the start binding task includes the start information in the task group information; Receive the binding task, and read and write data according to the data read and write tags to execute the binding task. The data read and write tags are used to indicate reading and writing data. Receive the end binding task, and read and write data according to the data read and write tags, and execute the end binding task.
5. The method according to claim 4, characterized in that, The data read / write tag includes a content write tag, which indicates whether to write the output data back to the external storage resources of the computing device and whether to keep the output data in the on-chip storage resources of the computing device. The process of reading and writing data according to data read / write tags and executing the start binding task includes: The label is written according to the content, and the output data of the task to be bound is stored in the on-chip storage resources of the computing device.
6. The method according to claim 5, characterized in that, The data read / write tag includes a content read tag, which indicates whether input data is read from the on-chip storage resources of the computing device; The step of reading and writing data according to data read / write tags and executing the binding task includes: The tag is read according to the content, and input data is read from the on-chip storage resources of the computing device; The content is written into a tag, and the output data of the bound task resides in the on-chip storage resources of the computing device.
7. The method according to claim 6, characterized in that, The step of reading and writing data according to the data read / write tag specifications and executing the end-binding task includes: Write the label according to the content, and write the output data of the completed binding task back to the external storage resources of the computing device.
8. A data processing apparatus, characterized in that, The device includes: A task scheduling module is used to receive task and related task group information, and to distribute tasks in the related task groups to a designated cluster of the computing device; wherein, the related task groups are determined according to the related task group information; the related task groups include at least one task with a dependency relationship; the designated cluster is determined according to the size of the tasks in the related task groups; A computing device includes at least one cluster, configured to execute tasks in a related task group using the designated cluster, and temporarily store the output data of at least one task in the related task group in on-chip storage resources within the designated cluster; the related task group includes a start binding task, a binding task, and an end binding task; the computing device is configured to execute tasks in the related task group using the designated cluster, specifically: receiving a start binding task, locking the cluster for executing the related task group, and reading and writing data according to the specifications of data read / write tags, and executing the start binding task; wherein the start binding task includes start information in the task group information; receiving a binding task, and reading and writing data according to the specifications of data read / write tags, and executing the binding task; receiving an end binding task, and reading and writing data according to the specifications of data read / write tags, and executing the end binding task.
9. The apparatus according to claim 8, characterized in that, The task grouping information includes start information and end information; The computing device is used to lock at least one cluster in the computing device as the designated cluster based on the start information in the task grouping information.
10. The apparatus according to claim 8, characterized in that, The computing device is also used to unlock the cluster based on the end information in the task grouping information.
11. The apparatus according to any one of claims 8-10, characterized in that, The data read / write tag includes a content write tag, which indicates whether to write the output data back to the external storage resources of the computing device and whether to keep the output data in the on-chip storage resources of the computing device. The computing device is specifically used to write tags according to the content and store the output data of the task to be bound in the on-chip storage resources of the computing device.
12. The apparatus according to claim 11, characterized in that, The data read / write tag includes a content read tag, which indicates whether input data is read from the on-chip storage resources of the computing device; The computing device is specifically used for: The tag is read according to the content, and input data is read from the on-chip storage resources of the computing device; The content is written into a tag, and the output data of the bound task resides in the on-chip storage resources of the computing device.
13. The apparatus according to claim 12, characterized in that, The computing device is specifically used for: Write the label according to the content, and write the output data of the completed binding task back to the external storage resources of the computing device.
14. The apparatus according to any one of claims 8-10, characterized in that, The computing device is used to execute tasks in the relevant task group using the specified cluster, specifically: Used to receive and execute start marker tasks, and lock the cluster for executing related task groups; Used to receive relevant tasks, read and write data according to the data read and write tags, execute the relevant tasks, and store the output data of the other tasks except the last one in the on-chip storage resources of the computing device. This cluster is used to receive and execute end-mark tasks and release locks.
15. A system-on-a-chip, characterized in that, The system-on-a-chip includes the data processing apparatus according to any one of claims 8-14.
16. A circuit board, characterized in that, The board includes the system-on-a-chip as described in claim 15.
Citation Information
Patent Citations
Asymmetric multi-core system and realization method thereof
CN102662740A
Distributed lock realization method and device
CN107181789A
A task scheduling selection method for multi-core processors based on shared resource sensitivity
CN109144720A
Implementation method and device for cluster in GPGPU, terminal and medium
CN111913816A