Method for improving wafer contact hole line width uniformity
By establishing the correlation between O2 flow and the signal strength of the etching gas and using the APC system to adjust the clean gas flow, the problem of large fluctuations in line width between wafers is solved, and the uniformity of contact hole etching line width and controllability of mass production control are achieved.
Patent Information
- Application Number
- CN202210154839.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-02-21
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2042-02-21
AI Technical Summary
In the prior art, there are differences in the etching gas residues after cleaning the cavity between the inter-chip cleaning conditions, resulting in large fluctuations in line widths between wafers and wafers, which is not conducive to mass production control.
By establishing the correlation between the cleaning condition O2 flow between contact hole etching sheets and the etching gas signal strength after wafer etching is completed, the APC system is used to capture the etching gas signal strength completed by each wafer etching, and the cavity is cleaned using different flow rates O2 to ensure that the remaining amount of etching gas is within the threshold range.
The uniformity of the etching line width of the contact hole between wafers and wafers is improved, the problem of large fluctuations in the line width in the prior art is effectively overcome, and the controllability of mass production control is improved.
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Figure CN114695079B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of semiconductor technology, and in particular to a method for improving the uniformity of line width of contact holes between wafers. Background Art
[0002] Contact hole etching serves as a bridge between connecting devices and the back-end copper wire interconnection, and the requirements for line width are becoming increasingly stringent. If the contact hole etching line width is too large, it is easy to cause a short circuit between the tungsten wire and the gate sidewall. A small line width will lead to incomplete etching of some contact holes, affecting tungsten filling and contact hole disconnection. Contact hole etching usually uses fluorine-containing gas as the main etching gas. The fluorine residue after the etching of the front wafer is completed will etch the anti-reflective coating (Barc / Darc) on the top of the contact hole of the back wafer, expand the contact hole opening, and affect the final line width, such as Figure 1 shown.
[0003] The existing cleaning conditions between wafers (fixed O2 flow rate) result in differences in the residual etching gas after cleaning the chamber, resulting in large fluctuations in line width between wafers, which is not conducive to mass production control. Summary of the invention
[0004] In view of the shortcomings of the prior art described above, an object of the present invention is to provide a method for improving the uniformity of the line width of contact holes between wafers, so as to solve the problem in the prior art that there are differences in the residual etching gas after the cleaning chamber is cleaned under the existing inter-wafer cleaning conditions, resulting in large fluctuations in the line width between wafers, which is not conducive to mass production control.
[0005] To achieve the above objectives and other related objectives, the present invention provides a method for improving the uniformity of contact hole line width between wafers, comprising:
[0006] Step 1, providing a plurality of substrates, each of which is provided with an anti-reflective coating and a photoresist layer from bottom to top, and photolithographically opening the photoresist layer so that the anti-reflective coating is exposed;
[0007] Step 2: placing one of the plurality of substrates in an etching chamber in an etcher, introducing etching gas into the etching chamber, and etching an exposed portion of one of the substrates using the etching gas;
[0008] Step 3, continuously acquiring the remaining amount of the etching gas in the etching chamber to obtain the remaining amount data;
[0009] Step 4: providing a threshold range of the residual amount of the etching gas, introducing a cleaning gas into the etching chamber, and adjusting the flow rate of the cleaning gas according to the residual amount data, so that the residual amount of the etching gas in the etching chamber after the introduction of the cleaning gas is within the threshold range;
[0010] Step 5: Repeat steps 3 to 4 until the entire substrate is etched.
[0011] Preferably, the anti-reflective coating in step 1 is a bottom anti-reflective coating.
[0012] Preferably, the etching gas in step 2 is a fluorine-containing gas.
[0013] Preferably, the etching gas in step 2 is F2.
[0014] Preferably, the etching gas in step 2 is HF.
[0015] Preferably, the method for acquiring the etching gas concentration in step three includes: using a spectral signal detector to collect the signal intensity of the etching gas in the etching chamber.
[0016] Preferably, the cleaning gas in step 4 is O2.
[0017] Preferably, the introduction of the cleaning gas in step 4 is controlled by an APC system.
[0018] As described above, the method for improving the uniformity of the line width of contact holes between wafers of the present invention has the following beneficial effects:
[0019] The present invention establishes a correlation between the O2 flow rate of the contact hole etching inter-wafer cleaning condition and the etching gas signal strength after the wafer etching is completed, uses the APC system to capture the etching gas signal strength after each wafer etching is completed, and uses different O2 flow rates to perform cavity cleaning, thereby improving the uniformity of the contact hole etching line width between wafers and wafers. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 A schematic diagram showing the influence of etching of the anti-reflective coating on the line width of the contact hole in the prior art;
[0021] Figure 2 Shown is a schematic diagram of the method flow of the present invention;
[0022] Figure 3 It is a schematic diagram showing the relationship between the fluorine element signal intensity and the inter-sheet cleaning time of the present invention;
[0023] Figure 4 It shows a schematic diagram of the inter-wafer cleaning O2 flow rate and the fluorine element signal intensity after the wafer operation is completed according to the present invention;
[0024] Figure 5 It is a schematic diagram comparing the critical dimensions of multiple contact holes before and after improvement according to the present invention. DETAILED DESCRIPTION
[0025] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.
[0026] See also Figure 2 The present invention provides a method for improving the uniformity of contact hole line width between wafers, comprising:
[0027] Step 1, providing a plurality of substrates 10, each substrate 10 is formed with an anti-reflection coating 11 and a photoresist layer from bottom to top, and the photoresist layer is opened by photolithography to expose the anti-reflection coating 11, and the exposed portion is used to define the position of the groove to be etched, and the anti-reflection coating 11 (Anti-Reflection Coating, ARC) is a material spin-coated on the interface between the photoresist and the Si substrate 10 to absorb the lithography reflected light, and the anti-reflection coating 11 mainly includes: a bottom anti-reflection coating, a top anti-reflection coating, a developable bottom anti-reflection coating, a spin-coated Si-containing anti-reflection coating, a carbon coating, etc.;
[0028] In a possible implementation, the anti-reflection coating 11 in step 1 is a bottom anti-reflection coating or a developable bottom anti-reflection coating. The bottom anti-reflection coating (Bottom Anti-Reflection Coating, BARC) is a coating located between the Si substrate 10 and the photoresist, and its main components are a cross-linkable resin, a thermal acid generator, a surfactant, and a solvent. There are two main types of developable bottom anti-reflection coatings (Developable Bottom Anti-Reflection Coating, DBARC): one is an anti-reflection coating that can be directly dissolved in a developer (Wet-Developable BARC). Since the coating material is an isotropic process in the developer, the side formed after the dissolution of this DBARC is not vertical; the other is a photosensitive anti-reflection coating (Photosensitive DBARC).
[0029] Step 2: one of the multiple substrates 10 is placed in an etching chamber in an etcher, and an etching gas is introduced into the etching chamber, and the exposed portion of one substrate 10 is etched by the etching gas to form a groove on the substrate 10. However, after etching one substrate 10, a cleaning gas needs to be introduced into the etching chamber to remove the residual etching gas. Due to the different residual amounts of the etching gas, after etching different substrates 10 in the same batch, the fluorine residue after etching the front substrate 10 will etch the anti-reflective coating (Barc / Darc) on the top of the contact hole of the rear wafer, thereby expanding the contact hole opening, and the line width difference is relatively large.
[0030] In a possible implementation manner, the etching gas in step 2 is a fluorine-containing gas, which is used to etch the substrate 10 to form a contact hole on the substrate 10 .
[0031] In a possible implementation manner, the etching gas in step 2 is F2, which is used to etch the substrate 10 to form a contact hole on the substrate 10.
[0032] In a possible implementation manner, the etching gas and HF in step 2 are used to etch the substrate 10 to form a contact hole on the substrate 10 .
[0033] Step 3: After etching a substrate 10 in a batch, there is still some etching gas left in the etching chamber. It is necessary to continuously obtain the remaining amount of the etching gas in the etching chamber to obtain the remaining amount data;
[0034] In one possible implementation, see Figure 3 The method for obtaining the etching gas concentration in step three includes: using a spectral signal detector to collect the signal strength of the etching gas in the etching chamber, establishing a correlation between the cleaning gas flow rate of the contact hole etching inter-wafer cleaning conditions and the residual etching gas signal strength after the wafer etching is completed, and obtaining Figure 3 As shown in the correlation diagram, the inter-slice cleaning time affects the signal intensity of the fluorine element.
[0035] Step 4: Provide a threshold range of the remaining amount of etching gas, introduce clean gas into the etching chamber, and adjust the flow rate of the clean gas according to the remaining amount data. When the introduction time of the inter-wafer clean gas (such as oxygen) remains unchanged, the relationship between the flow rate of the inter-wafer clean gas and the F signal intensity in the etching chamber after the wafer is introduced with the clean gas is as follows: Figure 4 As shown, after a cleaning gas with an adjustable flow rate is introduced into the etching chamber, the remaining amount of the etching gas in the etching chamber after the cleaning gas is introduced is within a threshold range;
[0036] In a possible implementation manner, the cleaning gas in step 4 is O2, which is used to clean the residual etching gas in the etching chamber.
[0037] In a possible implementation, the introduction of the cleaning gas in step 4 is controlled by an APC (advanced control) system, which can adjust the flow rate of the sheet-to-sheet cleaning gas, thereby controlling the residual etching gas residue within the same range.
[0038] Specifically, the O2 flow rate in the cleaning condition between the contact hole etching wafers is correlated with the F signal strength after the wafer etching is completed. The APC system is used to capture the F signal strength after each wafer etching is completed and use different O2 flow rates to clean the chamber, so that the remaining amount of etching gas in the etching chamber of each wafer is within the threshold range.
[0039] Step 5, repeating steps 3 to 4 until the entire substrate 10 is etched. Since the remaining amount of etching gas in the etching chamber for each wafer is within the threshold range, the critical dimension (cd) of the line width when etching each wafer is within a smaller range, thereby improving the uniformity of the contact hole etching line width between wafers.
[0040] In one possible implementation, see Figure 5 Among multiple wafers in the same batch, the critical dimension deviation of the wafer line width improved by the method of the present invention is small.
[0041] It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner. Therefore, the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.
[0042] In summary, the present invention establishes the correlation between the O2 flow rate of the contact hole etching inter-wafer cleaning condition and the etching gas signal strength after the wafer etching is completed, and uses the APC system to capture the etching gas signal strength after each wafer etching is completed, and uses different flow rates of O2 to perform cavity cleaning, thereby improving the uniformity of the contact hole etching line width between wafers and wafers. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.
[0043] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.
Claims
1. A method for improving the uniformity of wafer contact hole line width, characterized in that: At least: Step 1, providing a plurality of substrates, each of which is formed with an anti-reflective coating and a photoresist layer stacked from bottom to top, and photolithographically opening the photoresist layer to expose the anti-reflective coating; Step 2: placing one of the plurality of substrates in an etching chamber in an etcher, introducing etching gas into the etching chamber, and etching the exposed portion of the substrate using the etching gas to form a contact hole on one of the substrates; Step 3, continuously acquiring the remaining amount of the etching gas in the etching chamber to obtain the remaining amount data; Step 4: providing a threshold range of the remaining amount of the etching gas, introducing a cleaning gas into the etching chamber, and adjusting the flow rate of the cleaning gas according to the residual amount data of the etching gas, so that the remaining amount of the etching gas after the introduction of the cleaning gas is within the threshold range; Step 5: Repeat steps 2 to 4 until the entire substrate is etched.
2. The method for improving the line width uniformity of contact holes between wafers according to claim 1, characterized in that: The anti-reflection coating in step 1 is a bottom anti-reflection coating.
3. The method for improving the line width uniformity of contact holes between wafers according to claim 1, characterized in that: The etching gas in step 2 is a fluorine-containing gas.
4. The method for improving the line width uniformity of contact holes between wafers according to claim 3, characterized in that: The etching gas in step 2 is F2.
5. The method for improving the line width uniformity of contact holes between wafers according to claim 3, characterized in that: The etching gas in step 2 is HF.
6. The method for improving the line width uniformity of contact holes between wafers according to claim 1, characterized in that: In step three, the remaining amount of the etching gas is obtained by obtaining the signal intensity of the etching gas in the etching chamber using a spectrum signal detector.
7. The method for improving the line width uniformity of contact holes between wafers according to claim 1, characterized in that: The cleaning gas in step 4 is O2.
8. The method for improving the line width uniformity of contact holes between wafers according to claim 1, characterized in that: The introduction of the cleaning gas in step 4 is controlled by the APC system.
9. The method for improving the line width uniformity of contact holes between wafers according to claim 1, characterized in that: The substrate in step one is a silicon substrate.
Citation Information
Patent Citations
Electrolytic etching method and device therefor
JP1996296099A
Method for forming a contact hole of semiconductor device
KR1019980077232A