Method for forming grid line electrode of photovoltaic device and photovoltaic device

Abstract

The present application provides a method for forming a grid electrode of a photovoltaic device and a photovoltaic device, and relates to the field of solar cells. A method for forming a grid electrode of a photovoltaic device, comprising: providing a semiconductor substrate including a first surface and a second surface arranged opposite to each other; forming a first patterned mask layer on the first surface; using light-induced electroplating, so that a light source illuminates the second surface, so that the first surface contacts the electroplating solution, so as to form a first grid electrode on the first surface; forming a second patterned mask layer on the second surface; using electroplating or light-induced combined electroplating to form a second grid electrode on the second surface. The present invention can improve the utilization rate of the light source by the cell, avoid the use of the copper seed layer process step, reduce sputtering damage and copper removal damage, help to improve the pull-off force and electroplating uniformity of the grid electrode, and can achieve electroplating of extremely fine metal grid electrodes, thereby improving the short-circuit current of the battery and improving the photoelectric conversion efficiency of the battery.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a method for forming a grid line electrode of a photovoltaic device and a photovoltaic device. Background Art

[0002] Solar cells are mainly based on semiconductor materials, and are electrically conductive devices formed by adding electrodes. In recent years, with the development of the solar cell industry, improving the conversion efficiency of solar cells and reducing costs have become the goals pursued by photovoltaic companies. The electrode technology of solar cells is the key. The electrode structure of existing solar cells is mainly prepared by screen printing technology. For example, the preparation of positive electrode grid lines by screen printing is to print the silver-containing conductive paste on the silicon wafer grid through the mesh of the screen, and then form a good grid line electrode through high-temperature rapid sintering and other processes. However, with the intensification of market competition, the disadvantages of the screen printing method, such as low aspect ratio of the electrode grid lines, high cost, and large contact resistance, have gradually emerged. Therefore, how to use simple processes to produce low-cost and high-performance electrode structures is one of the focuses of solar cell research.

[0003] Chemical plating technology, electroplating technology, and light-induced electroplating technology can all be used as technologies for preparing solar cell electrodes. Among them, chemical plating is to reduce metal ions in the plating solution to metals with the help of a suitable reducing agent without an external current, and deposit them on the surface of the solar cell. Electroplating is to deposit metal cations in the plating solution onto the cathode conductive solid surface under the condition of an external power supply; while the anode metal electrode is dissolved into metal cations and dissolved into the plating solution to maintain the balance of metal cations. Light-induced electroplating is due to the photovoltaic effect of solar cells. When light is irradiated on the surface of the solar cell, photogenerated carriers are generated in the PN junction. Under the action of the built-in electric field, the photogenerated carriers are separated into electrons and holes. Holes move to the p-type doped layer, and electrons move to the n-type doped layer, and finally reach the upper and lower surfaces of the solar panel. Electrons reach the surface of the n-type doped layer to participate in the reduction reaction, and the metal ions in the solution are consumed, and the generated metal is deposited on the solid surface.

[0004] However, the existing chemical plating process, electroplating process or light-induced electroplating process still have certain shortcomings to a greater or lesser extent. For example, although the current chemical plating process has simple equipment and does not require power supply for operation, the deposition rate cannot be accurately controlled; after the substrate surface is completely covered with metal deposition, the deposition rate is greatly reduced, and the coating thickness cannot be controlled, and it has not been widely used in the industry. Although the current electroplating process can control the metal cation deposition rate by regulating the current density, and control the metal layer thickness by controlling the total charge, electroplating area and electroplating time; but the electroplating process requires an external power supply, and the surface of the to-be-plated piece needs to have good conductivity, which requires a copper seed layer to be pre-plated on the to-be-plated surface to meet the conductivity. The conventional method is to use magnetron sputtering to pre-plate this copper seed layer, which adds more equipment investment, and when pre-plating the copper seed layer (metal copper, about 5nm to 500nm), it is easy to cause sputtering damage to the battery. Electroplating metal electrodes in a way that requires an external power supply requires setting electrode clamps, which can easily cause hidden cracks in the battery cell, and after electroplating, the clamp area is covered with copper, resulting in a reduction in the effective working area of ​​the battery, which affects the battery performance. In addition, conventional electroplating also requires a process for removing the copper seed layer. When removing the copper seed layer, the acid used will damage the transparent conductive film while corroding the copper seed layer. With the application of electroplating technology on solar cells (such as HJT cells), the desired opening of the grid line can be less than 20 microns, which has created great challenges to the introduction method of the external current and the uniformity of the introduced current density. Conventional electroplating methods have been difficult to meet the requirements of large-area, uniform, and rapid electroplating of the fine grid lines. Summary of the invention

[0005] In view of the above-mentioned problems, the present application aims to solve at least one of the technical problems in the related art to a certain extent. To this end, the present application provides a method for forming a grid line electrode of a photovoltaic device and a photovoltaic device, which can be prepared by light-induced electroplating or a combination of light-induced and electroplating. No copper seed layer is required on both sides of the battery, and no electroplating pinch point is introduced. The electroplating of extremely fine grid lines (less than 20 microns) can be achieved, the production cost is low, and the relevant performance of the photovoltaic device can be improved, which can overcome the shortcomings of the prior art.

[0006] To achieve the above purpose, the technical solution adopted in this application is:

[0007] According to one aspect of the present application, the present application provides a method for forming a grid line electrode of a photovoltaic device, the method comprising:

[0008] Providing a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface arranged opposite to each other, the first surface being an n-type doping surface of the battery, and the second surface being a p-type doping surface of the battery;

[0009] Forming a first mask layer only on the first surface; performing patterning on the first mask layer to form a first patterned mask layer;

[0010] Using light-induced electroplating, a light source is used to illuminate the second surface, so that the first surface is in contact with the electroplating solution, so as to form a first grid line electrode on the first surface, and the light generated by the light source does not pass through the electroplating solution (this step is to form the first grid line electrode by a light-induced process);

[0011] forming a second patterned mask layer on the second surface;

[0012] When the first patterned mask layer is an opaque material, applying a power source to the first gate line electrode, and using an electroplating process to form a second gate line electrode on the second surface; removing the first patterned mask layer and the second patterned mask layer; or,

[0013] Before forming a second patterned mask layer on the second surface, removing the first patterned mask layer, forming a second gate line electrode on the second surface by electroplating combined with a light-induced process; removing the second patterned mask layer;

[0014] When the first patterned mask layer is a transparent material, an external power source is applied to the first gate line electrode, and a second gate line electrode is formed on the second surface by electroplating or electroplating combined with a light-induced process; and the first patterned mask layer and the second patterned mask layer are removed.

[0015] In the method for forming a gate electrode provided in the present application, the subsequent preparation method may be different depending on the material type of the first patterned mask layer. For example, when the first patterned mask layer is a transparent material, after forming the second patterned mask layer, the second gate electrode may be formed by electroplating or electroplating combined with a light-induced process.

[0016] When the first patterned mask layer is an opaque material, after the second patterned mask layer is formed, the second gate line electrode can be directly formed by an electroplating process, or, after removing the opaque first patterned mask layer, a second patterned mask layer is formed, and then the second gate line electrode is formed by electroplating or electroplating combined with a light-induced process.

[0017] The present application also provides a method for forming a grid electrode of a photovoltaic device, the method comprising: providing a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface arranged opposite to each other, the first surface being an n-type doping layer of a battery, and the second surface being a p-type doping layer;

[0018] A first mask layer is fabricated on the first surface; a second mask layer is fabricated on the second surface, wherein the second mask layer is a transparent mask structure; and only the first mask layer is patterned to form the first patterned mask layer;

[0019] Using light-induced electroplating, a light source is used to illuminate the second surface, so that the first surface is in contact with an electroplating solution, so as to form a first grid line electrode on the first surface, and the light generated by the light source does not pass through the electroplating solution;

[0020] Performing patterning on the second mask layer on the second surface to form the second patterned mask layer;

[0021] When the first patterned mask layer is an opaque material, a power source is applied to the first gate line electrode, and a second gate line electrode is formed on the second surface by using an electroplating process; or

[0022] Before patterning the second mask layer on the second surface to form the second patterned mask layer, removing the first patterned mask layer, forming a second gate line electrode on the second surface by electroplating combined with a light-induced process; removing the second patterned mask layer;

[0023] When the first patterned mask layer is a transparent material, an external power source is applied to the first gate line electrode, and a second gate line electrode is formed on the second surface by electroplating or electroplating combined with a light-induced process; and the first patterned mask layer and the second patterned mask layer are removed.

[0024] In a possible implementation, before the electroplating process step, a water film is formed on the non-electroplating surface.

[0025] In a possible implementation, the first patterned mask layer includes an anti-plating material, and the anti-plating material is deposited by using a photosensitive material, and a patterned opening is formed after exposure and development processing;

[0026] And / or, the second patterned mask layer includes an anti-electroplating material, and the anti-electroplating material is deposited by using a photosensitive material, and a patterned opening is formed after exposure and development processing.

[0027] In a possible implementation, the process conditions of the light-induced electroplating include: a light intensity of 1000-500001ux, and a temperature of the electroplating solution of 20-50°C.

[0028] In a possible implementation, the electroplating process conditions include: a current of 0.001 to 20 A, and a temperature of the electroplating solution of 20 to 50° C.

[0029] In a possible implementation, the width of the first gate line electrode is 2 to 35 μm;

[0030] And / or, the width of the second gate line electrode is 2-35 μm.

[0031] In a possible implementation manner, the semiconductor substrate further includes:

[0032] a first intrinsic amorphous silicon layer formed on the first surface;

[0033] an n-type doped layer formed on the first intrinsic amorphous silicon layer;

[0034] a first transparent conductive layer formed on the n-type doped layer;

[0035] The first patterned mask layer is formed on the first transparent conductive layer;

[0036] a second intrinsic amorphous silicon layer formed on the second surface;

[0037] a p-type doped layer formed on the second intrinsic amorphous silicon layer;

[0038] a second transparent conductive layer formed on the p-type doped layer;

[0039] The second patterned mask layer is formed on the second transparent conductive layer;

[0040] Wherein, the semiconductor substrate is a P-type silicon wafer or an N-type silicon wafer.

[0041] It should be noted that the above numerical ranges all include endpoint values.

[0042] According to another aspect of the present application, the present application provides a method for forming a photovoltaic device, wherein the method for forming a first gate electrode and a second gate electrode in the photovoltaic device is formed by the method as described above, and further, the method for forming the photovoltaic device also includes: providing a semiconductor substrate, wherein the semiconductor substrate includes a first surface and a second surface arranged opposite to each other; the first surface is an n-type doping layer of the battery, and the second surface is a p-type doping layer;

[0043] forming a second intrinsic amorphous silicon layer on the second surface;

[0044] forming a first intrinsic amorphous silicon layer on the first surface;

[0045] forming an n-type doped layer on the first intrinsic amorphous silicon layer;

[0046] forming a p-type doped layer on the second intrinsic amorphous silicon layer;

[0047] forming a second transparent conductive layer on the p-type doped layer;

[0048] forming a first transparent conductive layer on the n-type doped layer;

[0049] According to the method for forming a gate line electrode of a photovoltaic device as described above, a first gate line electrode and a second gate line electrode are formed on the first transparent conductive layer and the second transparent conductive layer, respectively.

[0050] According to another aspect of the present application, the present application provides a photovoltaic device, wherein the photovoltaic device is manufactured using the method for forming a photovoltaic device as described above.

[0051] Compared with the prior art, the technical solution provided by this application can achieve the following beneficial effects:

[0052] When the present invention performs light-induced electroplating, a light source is used to illuminate the second surface, while the first surface is in contact with the electroplating solution, that is, the surface to be plated is separated from the light injection surface, and the light-receiving surface is protected by a water film so that it is completely out of contact with the electroplating solution. In the entire electroplating process, the light-receiving surface does not change at all, and the absorption of the irradiated light is stable throughout the entire process; the non-uniformity of the photogenerated current density caused by the non-uniformity of the mask layer is avoided, and the electroplating uniformity of the entire electroplating surface is improved; in addition, this step does not require an external power supply, avoids the use of electroplating clamps and copper seed layers in traditional electroplating, and does not need to add a copper removal process after the electroplating is completed. When electroplating is performed on the second surface, a copper seed layer is not required, and electroplating clamps are not introduced. The electroplating of extremely fine grid lines (less than 20 microns) can be achieved, and the electroplating speed and grid line uniformity are improved. The production cost is low, and the relevant performance of photovoltaic devices can be improved, which can overcome the shortcomings of the prior art.

[0053] The method for forming a gate line electrode of a photovoltaic device provided in the present application also includes forming a first patterned mask layer on the first surface of the semiconductor substrate, and forming a first gate line electrode on the first surface using a light-induced electroplating technique, which can make full use of the light source and directly illuminate the second surface without passing through the plating solution, thereby improving the efficiency of the light-induced electroplating.

[0054] In addition, the method may also include forming a first mask layer on the first surface of the semiconductor substrate and forming a transparent second mask layer on the second surface of the semiconductor substrate. This process can simplify the mask layer preparation process and reduce costs. The second mask layer is formed on the second surface of the semiconductor substrate to protect the battery cell during the electroplating process.

[0055] Compared with the existing screen-printed silver grid electrode production process, the width of the grid electrode is 40-50 microns and cannot be further reduced. In some preferred embodiments of the present invention, the width of the grid electrode can be controlled to be 2-35 microns, thereby reducing the shielding of the electrode grid to the incident light and improving the short-circuit current density J of the battery. SC .

[0056] The grid line electrode electroplated by the method of the present invention is dense and uniform, and its conductivity is significantly better than that of the low-temperature silver grid line (conductivity 4-6μΩ·cm) printed by screen printing, which can reduce the internal resistance of the battery and improve the filling factor FF of the battery. In addition, the method of the present invention can use relatively cheap metal materials, which can reduce the production cost and have a low production cost.

[0057] The method for forming a photovoltaic device and the photovoltaic device of the present application, including the aforementioned method for forming a gate line electrode of a photovoltaic device, have at least all the characteristics and advantages of the aforementioned method for forming a gate line electrode of a photovoltaic device, which will not be repeated here.

[0058] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0060] FIG. 1( a ) and FIG. 1( b ) are schematic flow diagrams of a method for forming a grid line electrode of a photovoltaic device provided in an exemplary embodiment of the present application;

[0061] Figure 2 A schematic diagram of a part of the process of a method for forming a grid line electrode of a photovoltaic device provided in an exemplary embodiment of the present application;

[0062] Figure 3 A schematic diagram of light-induced electroplating in a method for forming a grid electrode of a photovoltaic device provided in an exemplary embodiment of the present application;

[0063] Figure 4 A schematic diagram of another part of a process of a method for forming a grid line electrode of a photovoltaic device provided in an exemplary embodiment of the present application;

[0064] Figure 5A schematic diagram of the structure of a photovoltaic device provided for an exemplary embodiment of the present application;

[0065] Figure 6 A schematic structural diagram of another photovoltaic device provided for an exemplary embodiment of the present application.

[0066] Reference numerals:

[0067] 1- semiconductor substrate;

[0068] 10- first surface;

[0069] 20- second surface;

[0070] 101 - first intrinsic amorphous silicon layer; 102 - n-type doped layer; 103 - first transparent conductive layer; 104 - first patterned mask layer; 105 - first gate line electrode;

[0071] 201 - a second intrinsic amorphous silicon layer; 202 - a p-type doped layer; 203 - a second transparent conductive layer; 204 - a second patterned mask layer; 205 - a second gate line electrode. DETAILED DESCRIPTION

[0072] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0073] It should be understood that the term "and / or" used in this article is merely a description of the association relationship between associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0074] The endpoints and any values ​​of the ranges disclosed in this article are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range or the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges.

[0075] It should be understood that the directional words such as "on" and "below" described in the embodiments of the present application are described at the angles shown in the accompanying drawings and should not be understood as limiting the embodiments of the present application. In addition, it should be understood that when it is mentioned that an element is connected to another element "on" or "below", it can not only be directly connected to another element "on" or "below", but also be indirectly connected to another element "on" or "below" through an intermediate element. The singular forms of "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0076] Those skilled in the art understand that, as mentioned in the background art, chemical plating technology, electroplating technology, and light-induced electroplating technology can all be used as technologies for preparing solar cell electrodes; however, each process technology in the related art still has certain defects and needs to be further improved. For example, in the related art, the main problem of using light-induced electroplating process to prepare solar cell electrodes is that the light-receiving surface and the electroplating surface are on the same surface, and the incident light needs to penetrate the electroplating solution and the mask material covering the surface to be plated before it can be absorbed by the battery, thereby generating photogenerated carriers to provide the electrons required for electroplating on the surface to be plated. This will lead to a decrease in the utilization rate of the battery for light source illumination. In addition, conventional mask materials are mostly opaque materials, and it is difficult for external light to penetrate this material, and this type of design has major defects. In addition, the uniformity of the incident light reaching the surface of the battery will be affected by the uniformity of the mask thickness, thereby affecting the uniformity of the photogenerated carriers and the uniformity of electroplating, which will be a huge challenge to the discreteness of large-scale production products and product yield control.

[0077] In view of this, in order to overcome the imperfections of the prior art, the technical solution of the embodiments of the present invention provides a method for forming a grid electrode of a photovoltaic device, a method for forming a photovoltaic device, and a photovoltaic device formed according to the method. The present invention combines the characteristics of double-sided power generation of double-sided photovoltaic cells themselves, comprehensively utilizes the characteristics of light-induced electroplating and electroplating, and proposes a double-sided electroplating process method suitable for application on double-sided photovoltaic cells, in order to improve the utilization rate of light sources, reduce production costs, improve the quality of electroplating, and thereby improve the photoelectric conversion efficiency of the battery.

[0078] Please refer to Figure 1(a), Figure 1(b), and Figure 2-Figure 6 As shown, an embodiment of the present invention provides a method for forming a grid line electrode of a photovoltaic device, the method comprising:

[0079] A semiconductor substrate 1 is provided. The semiconductor substrate 1 comprises a first surface 10 and a second surface 20 which are arranged opposite to each other. The first surface 10 is an n-type doping layer of a battery, and the second surface 20 is a p-type doping layer.

[0080] The first patterned mask layer 104 is formed only on the first surface 10 ; specifically, the first mask layer is manufactured only on the first surface 10 , and the first mask layer is patterned to form the first patterned mask layer 104 .

[0081] By using light-induced electroplating, the light source illuminates the second surface 20 and the first surface 10 contacts the electroplating solution to form the first gate line electrode 105 on the first surface 10 . The light generated by the light source does not pass through the electroplating solution.

[0082] Since the first patterned mask layer 104 is formed only on the first surface 10, in the photoinduced electroplating process, the light generated by the light source does not pass through the plating solution and can directly illuminate the second surface 20, thereby improving the light utilization rate of the battery and greatly increasing the rate of photoinduced electroplating.

[0083] A second patterned mask layer 204 is formed on the second surface 20 .

[0084] Depending on the material type of the first patterned mask layer 104, the subsequent preparation method may be different. In some cases, when the first patterned mask layer 104 is an opaque material, a power source is applied to the first gate electrode, and a second gate electrode is formed on the second surface 20 by an electroplating process; the first patterned mask layer 104 and the second patterned mask layer 204 are removed; or,

[0085] Before forming the second patterned mask layer 204 on the second surface 20 , the first patterned mask layer 104 is removed, and a second gate line electrode is formed on the second surface 20 by electroplating or electroplating combined with a light-induced process; and the second patterned mask layer 204 is removed.

[0086] In other cases, when the first patterned mask layer 104 is a transparent material, an external power source is applied to the first gate line electrode, and a second gate line electrode is formed on the second surface 20 by electroplating or electroplating combined with a light-induced process; the first patterned mask layer 104 and the second patterned mask layer 204 are removed.

[0087] The method provided by the embodiment of the present invention can improve the utilization rate of the light source by the battery cell, avoid the use of the copper seed layer process step, reduce sputtering damage and copper removal damage, help to improve the pull-off force and electroplating uniformity of the gate electrode, and can achieve electroplating of extremely fine metal gate electrodes, thereby improving the short-circuit current of the battery and improving the photoelectric conversion efficiency of the battery.

[0088] Furthermore, before the electroplating process step, a water film is formed on the non-electroplating surface. Specifically, before the electroplating process step, a water layer protective film is further formed on the non-electroplating surface by the water film mechanism, and then the non-electroplating surface is protected during the electroplating and light-induced processes, so that it is completely free from contact with the electroplating solution, and during the entire electroplating process, the light-receiving surface does not change at all, and the absorption of the irradiated light is stable throughout the entire process.

[0089] In the embodiment of the present application, the equipment for forming photovoltaic devices includes a water film mechanism and a feeding mechanism. Before the cell enters the electroplating tank, a uniform water layer protective film is formed on the non-plated surface by the water film mechanism, which can dilute the concentration of the electroplating solution near the upper surface of the cell and protect the cell. The main component of the water film is pure water (> 0.1MΩ), which effectively reduces the damage to the non-plated surface and improves the yield rate as shown in the following table. When the water film mechanism is set, a feeding mechanism is also set. Its main function is to balance the change in the concentration of the tank solution caused by the water film mechanism. If the feeding mechanism is not set, it will affect the concentration of the electroplating solution near the cell, affect the process, and cause the electroplating quality to decline.

[0090] Corrosion resistance time (min) Yield rate (%) Conventional electroplating 0.2 45 Water film plating 5 98

[0091] It can be understood that in the embodiments of the present application, the photovoltaic device may be a crystalline silicon solar cell, and the semiconductor substrate may be a silicon substrate material based on silicon material.

[0092] The method for forming a grid electrode of a photovoltaic device provided in the embodiment of the present application is suitable for application in the field of solar cells, and can be applied to the preparation of various bifacial cells, such as heterojunction cells (such as HJT cells), bifacial PERC cells, HBC cells, etc. The method of the present invention is described in detail below mainly by taking HJT cells as an example. However, it can be understood by those skilled in the art that the method of the present invention is not limited to application in HJT cells, but is suitable for application in various bifacial cells.

[0093] The semiconductor substrate 1 may be a silicon substrate, such as a polycrystalline silicon substrate, a single crystal silicon substrate or a quasi-single crystal silicon substrate, etc. The embodiment of the present invention does not limit the specific type of the semiconductor substrate. And the semiconductor substrate may be P-type doped or N-type doped, that is, the semiconductor substrate may be a P-type semiconductor substrate or an N-type semiconductor substrate. The photovoltaic device of the embodiment of the present invention may be a P-type bifacial solar cell, or an N-type bifacial solar cell.

[0094] The semiconductor substrate 1 is a solar cell substrate that can be used for light-induced electroplating and electroplating, and is a solar cell substrate with a PN junction; that is, the semiconductor substrate 1 is a solar cell substrate obtained after pre-treatment. For example, the semiconductor substrate includes an N-type or P-type doped silicon substrate, an intrinsic amorphous silicon layer, a phosphorus-doped N-type silicon layer, a boron-doped P-type silicon layer and a transparent conductive oxide layer (TCO). The semiconductor substrate can also be called a blue film or a cell.

[0095] The semiconductor substrate 1 comprises a first surface 10 and a second surface 20 which are arranged opposite to each other, wherein the first surface 10 is an n-type doping layer of the battery, and the second surface 20 is a p-type doping layer of the battery. When the semiconductor substrate 1 is n-type crystalline silicon or p-type crystalline silicon, in the process step of forming the gate line, the n-type doped silicon is contacted with the plating solution to implement the light-induced process.

[0096] In the embodiment of the present application, the method for forming the gate electrode of the photovoltaic device provided includes forming a first patterned mask layer 104 on the first surface 10 of the semiconductor substrate 1, and then performing the first electroplating, that is, forming the first gate electrode 105 on the first surface 10 by using the light-induced electroplating technology; forming a second patterned mask layer 204 on the second surface 20 of the semiconductor substrate 1, performing the second electroplating, that is, forming the second gate electrode 205 on the second surface 20 by using the electroplating technology, and then removing the first patterned mask layer 104 and the second patterned mask layer 204. It is particularly prominent that the present invention uses a light source to directly irradiate the second surface protected by the water film during the light-induced electroplating, so that the first surface is in contact with the electroplating solution, that is, the surface to be plated is separated from the light injection surface, and the light-receiving surface and the electroplating surface (surface to be plated) are not on the same side.

[0097] Specifically, when light-induced electroplating is performed, the surface to be plated is the N-type surface of the cell. Compared with conventional light-induced electroplating, the present invention uses the second surface, i.e., the P-type surface, to inject light when performing light-induced electroplating. The electrons generated inside the battery flow to the surface of the n-type doped layer, and the holes flow to the surface of the p-type doped layer, ensuring that the deposition of metal on the N-type surface of the cell and the metal ion balance in the electroplating solution are balanced. At this time, the P-type surface is irradiated by the light source, the N-type surface is in contact with the electroplating solution, and the P-type surface of the cell has a transparent conductive oxide material, covered with a water film, and does not contact the electroplating solution. Further, when the present invention performs the second electroplating, an external power supply is applied to the gate line electrode that has been electroplated on the N-type surface to avoid problems such as current feeding pinch points during traditional electroplating. After the PN junction is turned on, a current is generated from P to N, and the current is evenly dispersed along the electrode that has been electroplated on the first surface, and there is no need to prepare a copper seed layer to meet the conductivity requirements. This is more convenient to operate, can reduce the process steps of making electrodes on the electroplated parts, and helps to improve the electroplating speed and gate line uniformity of the surface to be plated.

[0098] Therefore, the method provided in the embodiment of the present invention belongs to a selective electroplating technology, which utilizes a graphic technology to electroplate metal (such as nickel, cobalt, copper, silver, tin, etc.) on the area requiring electroplating, and performs an anti-electroplating material barrier treatment on the non-electroplating area.

[0099] Based on the above, it can be known that the method of forming the gate line electrode in the embodiment of the present invention separates the surface to be plated, such as the n-type doped layer, from the light injection surface, so as to avoid the shielding of the incident light by the anti-plating material and the plating solution on the surface to be plated, thereby improving the utilization rate of the light source, and also avoiding the unevenness of the photogenerated current density caused by the unevenness of the mask layer, thereby improving the quality of electroplating, and there is no need to prepare a copper seed layer on both sides of the battery, thereby reducing the magnetron sputtering preparation of the copper seed layer and the copper removal process, saving a lot of equipment costs, reducing the resulting sputtering damage and the influence of acid etching in the copper removal process, and the electrode pull-off force is better than that of traditional electroplating; in addition, during the electroplating process, there is no need to add additional current feed electrode clamping points, thereby increasing the light receiving area of ​​the battery, which is beneficial to the improvement of battery performance; water film protection can be performed on the non-to-be-plated surface to prevent the plating solution from damaging the structure of the surface to be plated. Compared with the existing screen-printed silver grid electrode production process, the width of the grid electrode is 40-50 microns and cannot be further reduced. In some preferred embodiments of the present invention, the width of the grid electrode can be controlled to be 2-35 microns, thereby reducing the shielding of the electrode grid to the incident light and improving the short-circuit current density J of the battery. SC This is because, after a large number of experimental studies, it is shown that if the width of the gate electrode exceeds 35 microns, it will block the incident light and affect the conversion efficiency. If the width of the gate electrode is too small, such as less than 2 microns, it will increase the difficulty of the gate manufacturing process and have a certain impact on the electrical performance and stability of the battery.

[0100] Furthermore, the grid electrode plated by the method of the present invention is dense and uniform, and its conductivity is significantly better than that of the low-temperature silver grid line (conductivity 4-6μΩ·cm) printed by screen printing, which can reduce the internal resistance of the battery and improve the fill factor FF (Fill Factor) of the battery. In addition, the method of the present invention can use relatively cheap metal materials, which can reduce the production cost and have a low production cost.

[0101] In some embodiments, forming a first patterned mask layer 104 on the first surface 10 includes:

[0102] A first mask layer is fabricated on the first surface 10, and the first mask layer is patterned to form a first patterned mask layer 104. Furthermore, in the subsequent step of forming a second patterned mask layer 204 on the second surface 20, a second mask layer is fabricated on the second surface 20, and the second mask layer is patterned to form a second patterned mask layer 204.

[0103] In other embodiments, a first mask layer 104 is formed on the first surface 10, and a transparent second mask layer is formed on the second surface; only the first mask layer is patterned to form a first patterned mask layer 104. This process can simplify the mask layer preparation process and reduce the cost, and the transparent second mask layer formed on the second surface of the semiconductor substrate plays a protective role on the battery cell during the electroplating process.

[0104] Furthermore, in the subsequent step of forming the second patterned mask layer 204 on the second surface 20 , it is only necessary to perform patterning on the second mask layer to form the second patterned mask layer 204 .

[0105] In the above two specific implementations, the first one is to make a first mask layer only on the first surface and perform a patterning process on the first mask layer before performing the light-induced electroplating; the second one is to make a first mask layer on the first surface and a transparent second mask layer on the second surface before performing the light-induced electroplating, and only perform a patterning process on the first mask layer. In this way, when the first method is adopted, it helps to improve the utilization rate of the light source and is easier to operate the light-induced electroplating. When the second method is adopted, masks are formed on the N-type surface and the P-type surface respectively at one time, which helps to reduce costs and simplify the process, and a transparent second mask layer is formed on the second surface of the semiconductor substrate, which protects the battery cell during the electroplating process, but it needs to increase the light source intensity when performing the light-induced electroplating.

[0106] In some embodiments, the first patterned mask layer 104 includes an anti-plating material, which is deposited using a photosensitive material and forms a patterned opening after being processed by exposure and development processes.

[0107] In some embodiments, the second patterned mask layer 204 is a transparent structure, which includes an anti-plating material. The anti-plating material (photosensitive material) is deposited using a photosensitive material and is subjected to exposure and development processes to form a patterned opening.

[0108] It should be understood that the first patterned mask layer may be an anti-plating material having a patterned opening, and the second patterned mask layer may also be an anti-plating material having a patterned opening.

[0109] In the embodiment of the present invention, the implementation method of the photosensitive material includes but is not limited to spraying, spin coating, silk screen printing and physical or chemical vapor deposition, etc. The patterned opening is related to the wavelength of the laser source, the optical power, the photosensitive material, the exposure time and other processing parameters.

[0110] It should be pointed out that the embodiments of the present invention do not limit the specific operation methods for forming the first patterned mask layer and the second patterned mask layer, and conventional production methods in the art can be used. Exemplarily, in some embodiments, taking the production of the first patterned mask layer as an example, it may include: applying a photoresist film, drying / curing the photoresist film, exposing and curing the photoresist film, developing the pattern, washing and drying. Among them, the photoresist film can be applied with photosensitive ink / photoresist, and the coating method can be ultrasonic spraying, compressed air spraying, roller coating, screen printing, etc. The raw material for pattern development can include a potassium carbonate aqueous solution with a mass concentration of 0.7% to 1.5%, a temperature of 28 to 32°C, and a pressure of about 30psi. The washing can be carried out with tap water, the washing temperature can be room temperature, and the pressure can be about 25psi. The drying temperature can be 25 to 85°C.

[0111] Alternatively, in some embodiments, taking the preparation of the first patterned mask layer as an example, it may include: using a photosensitive dry film to obtain a pressed film, exposing and curing the photoresist film, developing the pattern, washing and drying. Among them, the raw material for pattern development may include a potassium carbonate aqueous solution with a mass concentration of 0.7% to 1.5%, a temperature of 28 to 32° C., and a pressure of about 30 psi. Washing may be performed with tap water, the washing temperature may be room temperature, and the pressure may be about 25 psi. The drying temperature may be 25 to 85° C.

[0112] In addition, the method of forming the first mask and the second mask can also be simply changed, as shown in FIG. 1( b ), specifically as follows:

[0113] A semiconductor substrate 1 is provided, wherein the semiconductor substrate 1 comprises a first surface 10 and a second surface 20 arranged opposite to each other, wherein the first surface 10 is an n-type doping layer of a battery, and the second surface 20 is a p-type doping layer;

[0114] A first mask layer is formed on the first surface 10; a second mask layer is formed on the second surface 20, wherein the second mask layer is a transparent mask structure; and only the first mask layer is patterned to form a first patterned mask layer 104;

[0115] Using light-induced electroplating, the light source illuminates the second surface 20, and the first surface 10 contacts the electroplating solution, so as to form the first gate electrode 105 on the first surface 10, and the light generated by the light source does not pass through the electroplating solution;

[0116] Performing patterning on the second mask layer on the second surface 20 to form a second patterned mask layer 204;

[0117] Then, a second gate line electrode 205 is formed on the second surface, which may be the same as the process steps of the above specific embodiment.

[0118] like Figure 2 or Figure 3 As shown, in some embodiments, the process conditions of the light-induced electroplating include: the light intensity is 100-100000 lux, and the temperature of the electroplating solution is 20-50° C. Further, the light intensity can be 1000-30000 lux, and the temperature of the electroplating solution is 25-45° C. Further, the light intensity can be 1000-10000 lux, and the temperature of the electroplating solution is 28-38° C.

[0119] The principle of light-induced electroplating is: due to the photovoltaic effect of solar cells, when light is irradiated on the surface of solar cells, photogenerated carriers are generated in the cells, and the photogenerated carriers are separated into electrons and holes under the action of the built-in electric field. Under the action of the built-in electric field, the holes move to the second surface, that is, the p-type doped silicon layer, and the electrons move to the first surface, that is, the n-type doped silicon layer, and finally reach the upper and lower surfaces of the solar cell. The electrons undergo a reduction reaction at the interface between the n-type doped silicon surface and the solution, and the metal ions in the solution are consumed, and the generated metal is deposited on the solid surface.

[0120] In actual operation, the cell, i.e., the semiconductor substrate, can be transferred through a roller for illumination, and the illuminated surface is connected to the plating solution through the electrode wire to form a closed loop. The plating solution temperature of the light-induced plating can be room temperature (RT), and the illumination intensity can be in the range of 1000 to 50000 lux.

[0121] In some embodiments, the electroplating process conditions include: the current is 0.001-20A, and the temperature of the electroplating solution is 20-50° C. Further, the current can be 0.001-15A, and the temperature of the electroplating solution can be 25-40° C. Further, the current can be 0.01-10A, and the temperature of the electroplating solution can be 28-38° C.

[0122] According to the embodiment of the present application, light-induced electroplating is performed for the first time, and electroplating is performed for the second time. When performing the second electroplating, the cell, i.e., the semiconductor substrate cell, can be transferred through a roller, and the non-electroplating surface is in contact with the positive electrode (anode) of the power supply through the electrode, and the negative electrode (cathode) of the power supply is in contact with the electroplating solution to form a closed loop, and the power supply applies current for electroplating. The plating solution temperature of the second electroplating can be room temperature (RT), and the current can be in the range of 0.001 to 20A.

[0123] In some embodiments, the width of the first gate line electrode 105 is 2-35 μm. In some embodiments, the width of the first gate line electrode 105 is 10-25 μm.

[0124] In some embodiments, the width of the second gate line electrode 205 is 2-35 μm. In some embodiments, the width of the second gate line electrode 205 is 10-25 μm.

[0125] According to the embodiment of the present invention, the width of the main gate line may be 10-35 μm, the width of the secondary gate line may be 2-20 μm, or both may be 2-35 μm.

[0126] In some embodiments, the material of the first gate line electrode 105 may include nickel, cobalt, copper, silver, tin, etc.; the material of the second gate line electrode 205 may include nickel, cobalt, copper, silver, tin, etc.

[0127] In some embodiments, the thickness of the first patterned mask layer 104 may be 3-50 μm; the thickness of the second patterned mask layer 204 may be 3-50 μm.

[0128] In some embodiments, the height of the first gate line electrode 105 may be 2-50 μm; the height of the second gate line electrode 205 may be 2-50 μm.

[0129] Taking into account the thickness of the mask, which is generally less than 20μm, the width of the development analysis is 1:1 with the thickness of the mask, but the thickness of the electroplating is not greater than the thickness of the mask. Therefore, the aspect ratio of the gate line electrode can be controlled at about 0.8:1, thereby reducing the process difficulty.

[0130] It should be noted that the numerical ranges in the embodiments of the present invention all include endpoint values.

[0131] In some embodiments, a method for forming a photovoltaic device is also provided, the method comprising:

[0132] A semiconductor substrate 1 is provided, wherein the semiconductor substrate 1 comprises a first surface 10 and a second surface 20 arranged opposite to each other, wherein the first surface 10 is an n-type doping layer of a battery, and the second surface 20 is a p-type doping layer;

[0133] forming a second intrinsic amorphous silicon layer 201 on the second surface 20;

[0134] forming a first intrinsic amorphous silicon layer 101 on the first surface 10;

[0135] forming an n-type doping layer 102 on the first intrinsic amorphous silicon layer 101;

[0136] forming a p-type doped layer 202 on the second intrinsic amorphous silicon layer 201;

[0137] forming a second transparent conductive layer 203 on the p-type doped layer 202;

[0138] forming a first transparent conductive layer 103 on the n-type doped layer 102;

[0139] A first gate line electrode 105 and a second gate line electrode 205 are formed on the first transparent conductive layer 103 and the second transparent conductive layer 203 , respectively.

[0140] As mentioned above, the provided semiconductor substrate is a solar cell substrate that can be used for light-induced electroplating and electroplating, and is a solar cell substrate with a PN junction. The semiconductor substrate may include an N-type or P-type doped silicon substrate, an intrinsic amorphous silicon layer, an n-type doped silicon layer doped with phosphorus (P), a p-type doped silicon layer doped with boron (B), and a transparent conductive oxide layer (TCO).

[0141] In some embodiments, a photovoltaic device is also provided, wherein the photovoltaic device is manufactured using the method for forming a photovoltaic device as described above. Figure 5 or Figure 6 As shown, exemplarily, the photovoltaic device comprises:

[0142] A semiconductor substrate 1, wherein the semiconductor substrate 1 comprises a first surface 10 and a second surface 20 arranged opposite to each other;

[0143] a first intrinsic amorphous silicon layer 101 located on the first surface 10;

[0144] an n-type doped layer 102 located on the first intrinsic amorphous silicon layer 101;

[0145] a first transparent conductive layer 103 located on the n-type doped layer 102;

[0146] A first gate line electrode 105 located on the first transparent conductive layer 103;

[0147] a second intrinsic amorphous silicon layer 201 located on the second surface 20;

[0148] a p-type doped layer 202 located on the second intrinsic amorphous silicon layer 201;

[0149] a second transparent conductive layer 203 located on the p-type doped layer 202;

[0150] The second gate line electrode 205 is located on the second transparent conductive layer 203 .

[0151] It should be understood that the method for forming a grid electrode of the present invention can be applied to various bifacial cells, so the above-mentioned method for forming a photovoltaic device and the photovoltaic device are merely exemplary and are not intended to limit the present invention.

[0152] Those skilled in the art can understand that the method for forming a photovoltaic device and the photovoltaic device and the aforementioned method for forming a gate electrode of a photovoltaic device are based on the same inventive concept, and the features and advantages described above for the method for forming a gate electrode of a photovoltaic device are also applicable to the method for forming a photovoltaic device and the application of the photovoltaic device. Therefore, the method for forming a photovoltaic device and the photovoltaic device have at least the same or similar features and advantages as the aforementioned method for forming a gate electrode of a photovoltaic device, which will not be repeated here.

[0153] In summary, the method for forming a grid electrode of a photovoltaic device according to the embodiment of the present invention has at least the following advantages over the prior art:

[0154] (1) The light-induced electroplating (first electroplating) in the method of the embodiment of the present invention is different from the conventional light-induced electroplating in that the light-receiving surface and the electroplating surface are not on the same side. This can avoid the need for the incident light to penetrate the mask layer and the plating solution to reach the battery. On the one hand, it improves the utilization rate of the light source. On the other hand, it avoids the unevenness of the photogenerated current density caused by the unevenness of the mask layer, thereby improving the quality of electroplating.

[0155] (2) The light-induced plating (first plating) in the method of the embodiment of the present invention does not require sputtering of a Cu seed layer on the surface to be plated before plating, and does not require a reverse etching process of the Cu seed layer after plating, which not only reduces the process steps, but also greatly reduces the corrosion resistance requirements of the TCO. The problem that currently cheap non-In TCOs such as AZO and GZO cannot tolerate the reverse etching solution of the Cu seed layer can be avoided. The reduction of the process steps of the present invention also protects the silicon film and the TCO film from damage, and improves the pFF of the battery.

[0156] (3) The electroplating process (second electroplating) in the method of the embodiment of the present invention cleverly uses the metal grid lines (including the main grid and the auxiliary grid) that have been electroplated as electrodes to introduce current, which can improve the electroplating speed and grid line uniformity of the surface to be plated. Because the conductivity of TCO itself is much worse than that of metal, it is generally necessary to sputter a Cu seed layer on the TCO.

[0157] (4) In the electroplating process (second electroplating) of the method of the embodiment of the present invention, the TCO of the non-to-be-plated surface is protected by a mask.

[0158] (5) The method of the embodiment of the present invention can use relatively cheap metal materials, which can reduce the manufacturing cost and the production cost is relatively low.

[0159] (6) The relevant performance of the solar cell finally obtained by the method of the embodiment of the present invention compared with the solar cell obtained by conventional screen printing and conventional electroplating process is shown in the following Table 1.

[0160] Table 1

[0161] Process solution Eta(%) Voc(V) Isc(A) FF(%) pFF(%) The present invention 25.61 0.747 10.968 85.72 87.17 Conventional silk screen 25.33 0.747 10.940 85.03 87.39 Conventional electroplating 25.31 0.745 10.955 85.02 86.98

[0162] It can be seen from Table 1 that the solar cell finally obtained by the method of the embodiment of the present invention can improve the conversion efficiency of the cell by at least 0.28% compared with the solar cell obtained by conventional screen printing of low-temperature slurry.

[0163] (7) This method does not require an external power supply, avoids the use of electroplating clamps in traditional electroplating, and improves the electroplating speed and grid line uniformity of the surface to be plated, and can achieve electroplating of extremely fine grid lines (less than 20 microns). In addition, a water film is set up, and the light-receiving surface is protected by the water film so that it does not contact the electroplating solution at all. During the entire electroplating process, the light-receiving surface does not change at all, and the absorption of the irradiated light is stable throughout the process.

[0164] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0165] Note: A portion of this patent application document contains material which is subject to copyright protection. The copyright owner reserves all rights reserved except for the production of copies of the material in the patent file or patent record in the Patent Office.

Claims

1. A method for forming a grid line electrode of a photovoltaic device, characterized in that: The method comprises: Providing a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface arranged opposite to each other, the first surface being an n-type doping layer of a battery, and the second surface being a p-type doping layer; Fabricating a first mask layer on the first surface; performing patterning on the first mask layer to form a first patterned mask layer; Using light-induced electroplating, a light source is used to illuminate the second surface, so that the first surface is in contact with the electroplating solution, so as to form a first grid line electrode on the first surface, and the light generated by the light source does not pass through the electroplating solution; no external power supply is required; forming a second patterned mask layer on the second surface; When the first patterned mask layer is an opaque material, applying a power source to the first gate line electrode, and using an electroplating process to form a second gate line electrode on the second surface; removing the first patterned mask layer and the second patterned mask layer; or, Before forming a second patterned mask layer on the second surface, removing the first patterned mask layer, forming a second gate line electrode on the second surface by electroplating combined with a light-induced process; removing the second patterned mask layer; When the first patterned mask layer is a transparent material, applying a power source to the first gate line electrode, and forming a second gate line electrode on the second surface by electroplating or electroplating combined with a light-induced process; removing the first patterned mask layer and the second patterned mask layer; The method also includes forming a water film on the non-electroplating surface before the electroplating process step; the water film is formed on the non-electroplating surface by forming a water layer protective film on the non-electroplating surface through a water film mechanism, and a feeding mechanism is provided at the same time to balance the change of tank liquid concentration caused by the water film mechanism.

2. A method for forming a grid line electrode of a photovoltaic device, characterized in that: The method comprises: Providing a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface arranged opposite to each other, the first surface being an n-type doping layer of a battery, and the second surface being a p-type doping layer; A first mask layer is formed on the first surface; a second mask layer is formed on the second surface, wherein the second mask layer is a transparent mask structure; and the first mask layer is patterned to form a first patterned mask layer; Using light-induced electroplating, a light source is used to illuminate the second surface, so that the first surface is in contact with the electroplating solution, so as to form a first grid line electrode on the first surface, and the light generated by the light source does not pass through the electroplating solution; no external power supply is required; Performing patterning on the second mask layer on the second surface to form a second patterned mask layer; When the first patterned mask layer is an opaque material, a power source is applied to the first gate line electrode, and a second gate line electrode is formed on the second surface by using an electroplating process; or Before patterning the second mask layer on the second surface to form the second patterned mask layer, removing the first patterned mask layer, forming a second gate line electrode on the second surface by electroplating combined with a light-induced process; removing the second patterned mask layer; When the first patterned mask layer is a transparent material, applying a power source to the first gate line electrode, and forming a second gate line electrode on the second surface by electroplating or electroplating combined with a light-induced process; removing the first patterned mask layer and the second patterned mask layer; The method also includes forming a water film on the non-electroplating surface before the electroplating process step; the water film is formed on the non-electroplating surface by forming a water layer protective film on the non-electroplating surface through a water film mechanism, and a feeding mechanism is provided at the same time to balance the change of tank liquid concentration caused by the water film mechanism.

3. The method for forming a grid line electrode of a photovoltaic device according to claim 1 or 2, characterized in that: The first patterned mask layer includes an anti-plating material, which is deposited using a photosensitive material and forms a patterned opening after exposure and development. And / or, the second patterned mask layer includes an anti-electroplating material, and the anti-electroplating material is deposited by using a photosensitive material, and a patterned opening is formed after exposure and development processing.

4. The method for forming a grid line electrode of a photovoltaic device according to claim 1 or 2, characterized in that: The process conditions of the light-induced electroplating include: the light intensity is 100-100000 lux, and the temperature of the electroplating solution is 20-50°C.

5. The method for forming a grid line electrode of a photovoltaic device according to claim 1 or 2, characterized in that: The electroplating process conditions include: the current is 0.001-20A, and the temperature of the electroplating solution is 20-50°C.

6. The method for forming a grid line electrode of a photovoltaic device according to claim 1 or 2, characterized in that: The width of the first gate line electrode is 2 to 35 μm; And / or, the width of the second gate line electrode is 2-35 μm.

7. The method for forming a grid line electrode of a photovoltaic device according to claim 1 or 2, characterized in that: The semiconductor substrate further comprises: a first intrinsic amorphous silicon layer formed on the first surface; an n-type doped layer formed on the first intrinsic amorphous silicon layer; a first transparent conductive layer formed on the n-type doped layer; The first patterned mask layer is formed on the first transparent conductive layer; a second intrinsic amorphous silicon layer formed on the second surface; a p-type doped layer formed on the second intrinsic amorphous silicon layer; a second transparent conductive layer formed on the p-type doped layer; The second patterned mask layer is formed on the second transparent conductive layer; Wherein, the semiconductor substrate is a P-type silicon wafer or an N-type silicon wafer.

8. A method for forming a photovoltaic device, wherein the method for forming a first gate electrode and a second gate electrode in the photovoltaic device is formed by the method according to any one of claims 1 to 7, and further, the method for forming the photovoltaic device further comprises: Providing a semiconductor substrate, the semiconductor substrate comprising a first surface and a second surface arranged opposite to each other, the first surface being an n-type doping layer of a battery, and the second surface being a p-type doping layer; forming a second intrinsic amorphous silicon layer on the second surface; forming a first intrinsic amorphous silicon layer on the first surface; forming an n-type doped layer on the first intrinsic amorphous silicon layer; forming a p-type doped layer on the second intrinsic amorphous silicon layer; forming a second transparent conductive layer on the p-type doped layer; forming a first transparent conductive layer on the n-type doped layer; A first gate line electrode and a second gate line electrode are formed on the first transparent conductive layer and the second transparent conductive layer, respectively.

9. A photovoltaic device, characterized in that: The photovoltaic device is prepared by the method for forming a photovoltaic device according to claim 8.

Images