An integrated assembly and method of manufacture

By integrating the filter resonator and power amplifier on the same substrate, the problem of excessive RF module area is solved, achieving higher integration and making it suitable for mobile communications and other fields requiring RF.

CN114696772BActive Publication Date: 2026-04-17HANGZHOU SAPPLAND MICROELECTRONICS TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HANGZHOU SAPPLAND MICROELECTRONICS TECH CO LTD
Filing Date
2020-12-25
Publication Date
2026-04-17

AI Technical Summary

Technical Problem

In the field of mobile communications, power amplifiers and filter resonators are two independent structures, occupying a large area of ​​the radio frequency module and limiting the integration.

Method used

By placing a filter resonator and a power amplifier, such as a surface acoustic wave resonator and a CMOS cell, on two surfaces of the same substrate, the signal amplification and filtering functions can be realized.

Benefits of technology

It reduces the area of ​​the RF module, expands the application range, and is suitable for communication fields with high integration requirements.

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Abstract

This application provides an integrated component and its fabrication method. The method includes: providing a substrate having a first surface and a second surface disposed opposite to each other; fabricating a filter resonator on the first surface of the substrate; and forming a power amplifier on the second surface of the substrate. By separately setting the filter resonator and the power amplifier on the two surfaces of the same substrate, both the amplification and filtering functions of radio frequency signals can be achieved, and the problem that the power amplifier and the filter resonator are two independent structures in related technologies is solved. This reduces the area of ​​the radio frequency module, increases the application range, and is especially suitable for communication fields with high integration requirements.
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Description

Technical Field

[0001] This application relates to the field of communication filtering technology, and in particular to a resonant filtering technology, specifically to integrated components and their fabrication methods. Background Technology

[0002] With the development of wireless communication applications, people have increasingly higher requirements for data transmission speed. In the field of mobile communication, the first generation of communication technology is analog technology, the second generation of communication technology realizes digital voice communication, the third generation of communication technology is characterized by multimedia communication, the fourth generation of communication technology increases the communication rate to 1Gbps and reduces the latency to 10ms, and the fifth generation of communication technology is the next generation of mobile communication technology after the fourth generation. The fifth generation of communication technology aims to solve the communication between people and things, and between things, in addition to the communication between people, realizing the vision of "Internet of Everything".

[0003] The increase in data rates corresponds to higher spectrum utilization and more complex communication protocols. Due to limited spectrum, it is essential to fully utilize the spectrum to meet data rate demands. Furthermore, starting with fourth-generation (4G) communication technology, carrier aggregation technology has been employed to allow a single device to transmit data simultaneously using different carrier spectrums. On the other hand, to support sufficient data transmission rates within limited bandwidth, communication protocols have become increasingly complex, thus imposing stringent requirements on various performance aspects of radio frequency (RF) systems. The most mainstream implementation methods for RF filters are surface acoustic wave (SAW) filters and filters based on integrated component technology.

[0004] In current radio frequency (RF) signal transmission systems, signals are received / transmitted through an RF front-end. Taking signal transmission as an example, the transmitted RF signal is first amplified by a power amplifier, then filtered to remove noise by an RF filter, and finally transmitted through an antenna. Therefore, the power amplifier is a key module of the RF system, as it needs to amplify the transmitted low-power signal to a sufficiently high level to meet the requirements of communication protocols. In related technologies, the power amplifier and the filter resonator are two independent structures, both placed on the RF module's substrate and electrically connected via external connectors. This increases the area of ​​the RF module, making it unsuitable for mobile communication applications with high integration requirements.

[0005] It should be noted that the description of the background technology in this application does not constitute prior art as defined in this application, nor does it limit the scope of application. For example, this application can be applied not only to the field of mobile communications, but also to other fields requiring radio frequency, such as Wi-Fi. Summary of the Invention

[0006] In view of the shortcomings of the related technologies, the integrated components and manufacturing methods provided in this application solve the problem that the power amplifier and the filter resonator are two independent structures in the related technologies, reduce the area of ​​the radio frequency module, increase the application range, and are especially suitable for communication fields with high integration requirements.

[0007] In a first aspect, this application provides a method for fabricating an integrated component, the method comprising: providing a substrate having a first side and a second side disposed opposite to each other; fabricating a filter resonator on the first side of the substrate; and forming a power amplifier on the second side of the substrate.

[0008] Optionally, when the resonator is a surface acoustic wave (SAW) resonator, the filter resonator is fabricated on the first surface of the substrate, comprising: providing a first release substrate; forming a piezoelectric material layer on the first release substrate, the piezoelectric material layer having a first side and a second side disposed opposite to each other, the first side being the side away from the first release substrate; forming a reflective layer on the first surface of the piezoelectric material layer; forming a bonding layer on the first surface of the substrate; bonding the bonding layer on the substrate to the reflective layer on the first release substrate through a bonding process; peeling off the first release substrate and forming interdigitated electrodes on the second surface of the piezoelectric material layer, thereby forming the SAW resonator on the first surface of the substrate.

[0009] Optionally, forming interdigitated electrodes on the second surface of the piezoelectric material layer includes: forming a patterned photoresist layer on the second surface of the piezoelectric material layer; depositing a metal material layer on the second surface of the piezoelectric material layer such that the metal material layer covers the top surface of the photoresist layer and the piezoelectric material layer not covered by the photoresist layer; and peeling off the photoresist layer to form the interdigitated electrodes from the metal material remaining on the piezoelectric material layer.

[0010] Optionally, providing the substrate and forming a bonding layer on a first surface of the substrate includes: providing the substrate and forming a first cavity on the first surface of the substrate; forming a bonding layer on the first surface of the substrate such that the bonding layer surrounds the outer periphery of the top opening of the first cavity.

[0011] Optionally, a power amplifier is formed on the second surface of the substrate, comprising: providing a second release substrate, forming an isolation layer on the second release substrate; fabricating a CMOS cell on the side of the isolation layer away from the second release substrate; fabricating a metal conductive layer on the CMOS cell; peeling off the second release substrate, and attaching the isolation layer to the second surface of the substrate, thereby forming the power amplifier on the second surface of the substrate.

[0012] Optionally, fabricating a CMOS cell on the side of the isolation layer away from the second release substrate includes: fabricating a gate electrode on the side of the isolation layer away from the second release substrate; depositing an insulating layer on the isolation layer and the gate electrode; fabricating a channel semiconductor layer, a source electrode, and a drain electrode on the insulating layer; and forming a source electrode isolation layer and a drain electrode isolation layer on the source electrode and the drain electrode to form the CMOS cell.

[0013] Optionally, the power amplifier is formed by fabricating a metal conductive layer on the CMOS cell, including: forming a photoelectric layer on the insulating layer, the source electrode isolation layer, and the drain electrode isolation layer; growing a metal material on the photoelectric layer to form the metal conductive layer; depositing an electrode protective layer on the metal conductive layer; and patterning the electrode protective layer to obtain the power amplifier.

[0014] Secondly, this application provides an integrated component, the integrated component including: a substrate, a filter resonator and a power amplifier; the substrate has a first side and a second side disposed opposite to each other, the filter resonator is disposed on the first side of the substrate, and the power amplifier is disposed on the second side of the substrate, so that the radio frequency signal passes through the power amplifier and the filter resonator in sequence to obtain an amplified and filtered signal.

[0015] Optionally, the filter resonator includes a surface acoustic wave resonator or a thin-film bulk acoustic wave resonator.

[0016] Optionally, the surface acoustic wave resonator includes: a bonding layer formed on a first surface of the substrate; a reflective layer bonded to the bonding layer; a piezoelectric material layer, the first surface of which is attached to the reflective layer; and a plurality of interdigitated electrodes disposed on a second surface of the piezoelectric material layer.

[0017] Optionally, a first cavity is provided on a first surface of the substrate, the bonding layer is disposed around the top opening of the first cavity, and the plurality of interdigitated electrodes are disposed directly above the first cavity.

[0018] Optionally, the thin-film bulk acoustic resonator includes: a substrate with a second cavity and a piezoelectric thin film stack structure with at least one elastic connection structure; the side of the substrate away from the second cavity is formed on a first surface of the substrate, the piezoelectric thin film stack structure is disposed on the second cavity of the substrate, and at least one elastic connection structure of the piezoelectric thin film stack is fixedly connected to the substrate.

[0019] Optionally, the piezoelectric thin film stack structure includes: a first electrode layer, a piezoelectric layer, a second electrode layer, and at least one elastic connection structure; the piezoelectric layer is located between the first electrode layer and the second electrode layer, and the first electrode layer and the second electrode layer are disposed opposite to each other; the at least one elastic connection structure is used to fix the piezoelectric thin film stack structure to the substrate.

[0020] Optionally, the power amplifier includes: an isolation layer disposed on a second surface of the substrate; a CMOS cell disposed on a first surface of the isolation layer; and a metal conductive layer disposed on the second surface of the CMOS cell.

[0021] Optionally, the CMOS cell includes: a gate electrode formed on the isolation layer; an insulating layer covering the gate electrode and the isolation layer; a channel semiconductor layer formed on the insulating layer; a source electrode and a drain electrode formed on the insulating layer and the channel semiconductor layer, respectively.

[0022] Optionally, the CMOS cell further includes: a source electrode isolation layer, a drain electrode isolation layer, and a photoelectric layer; the source electrode isolation layer and the drain electrode isolation layer are respectively disposed on the source electrode and the drain electrode, and the photoelectric layer covers the channel semiconductor layer, the source electrode isolation layer, and the drain electrode isolation layer.

[0023] Optionally, the substrate includes a plurality of through holes, and copper metal is disposed in the plurality of through holes, so that the plurality of pairs of interdigital electrodes are electrically connected to the power amplifier through the copper metal.

[0024] Compared with related technologies, this application has the following advantages:

[0025] By setting the filter resonator and the power amplifier on two surfaces of the same substrate respectively, the amplification and filtering functions of the radio frequency signal can be realized. This also solves the problem that the power amplifier and the filter resonator are two independent structures in related technologies, reducing the area of ​​the radio frequency module and increasing the application range. It is especially suitable for communication fields with high integration requirements. Attached Figure Description

[0026] Figure 1 The diagram shown is a structural schematic of an integrated component provided in an exemplary embodiment of this application;

[0027] Figure 2 The diagram shown is a structural schematic of another integrated component provided in an exemplary embodiment of this application;

[0028] Figure 3 The diagram shown is a structural schematic of another integrated component provided in an exemplary embodiment of this application;

[0029] Figure 4 The diagram shown is a schematic flowchart of a method for preparing an integrated component according to an exemplary embodiment of this application.

[0030] Figure 5 The diagram shown is a schematic diagram of the fabrication of a surface acoustic wave resonator provided in an exemplary embodiment of this application;

[0031] Figure 6 The diagram shown is a schematic diagram of the fabrication of a power amplifier provided in an exemplary embodiment of this application.

[0032] Explanation of reference numerals in the figures: 100, substrate; 110, first release substrate; 120, piezoelectric material layer; 130, reflective layer; 140, bonding layer; 150, interdigitated electrode; 160, first cavity; 170, through-hole; 200, power amplifier; 210, second release substrate; 220, isolation layer; 230, CMOS cell; 240, conductive metal layer; 300, surface acoustic wave resonator; 400, thin-film bulk acoustic wave resonator; 510, first electrode layer; 520, second electrode layer; 530, piezoelectric layer; 540, elastic connection structure; 410, silicon dioxide layer; 420, first insulating layer; 430, metal layer; 440, second cavity. Detailed Implementation

[0033] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0034] The terminology used in this application is for the purpose of describing specific embodiments only and is not intended to limit the application. In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing the application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0035] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0036] In this application, unless otherwise expressly specified and limited, "above" or "below" a second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of a second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" a second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature. Exemplary embodiments of this application will now be described in detail with reference to the accompanying drawings. Unless otherwise specified, the features in the following embodiments and implementations can complement or combine with each other.

[0037] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0038] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Unless otherwise specified, the following embodiments and features in the implementation methods can be combined with each other. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0039] In a first aspect, this application provides an integrated component, specifically including the following embodiments:

[0040] Exemplary Implementation Example 1

[0041] Figure 1 The diagram shown is a structural schematic of an integrated component provided in an exemplary embodiment of this application. Figure 1 As shown, an embodiment of this application provides an integrated component that specifically includes:

[0042] Substrate 100, surface acoustic wave resonator 300 and power amplifier 200;

[0043] The substrate 100 has a first side and a second side arranged opposite to each other. The surface acoustic wave resonator 300 is disposed on the first side of the substrate 100, and the power amplifier 200 is disposed on the second side of the substrate 100, so that the radio frequency signal passes through the power amplifier 200 and the surface acoustic wave resonator 300 in sequence to obtain an amplified and filtered transmission signal.

[0044] It should be noted that, in the embodiments of this application, by respectively setting the surface acoustic wave resonator 300 and the power amplifier 200 on two surfaces of the same substrate 100, both the amplification and filtering functions of the radio frequency signal can be achieved, while reducing the surface area of ​​the radio frequency module. In this application, by converting the power amplifier and surface acoustic wave resonator, which are independently set on the same circuit board in related technologies, into a stacked arrangement on the same substrate, the surface area of ​​both is reduced, and the application range is expanded, especially suitable for communication fields with high integration requirements.

[0045] In an embodiment of this application, the surface acoustic wave resonator 300 includes: a bonding layer 140 formed on a first surface of the substrate 100; a reflective layer 130 bonded to the bonding layer 140; a piezoelectric material layer 120, the first surface of which is attached to the reflective layer 130; and a plurality of interdigitated electrodes 150 spaced apart on a second surface of the piezoelectric material layer 120.

[0046] It should be noted that the bonding layer 140 is mainly used to achieve mutual bonding between the substrate 100 and the reflective layer 130; the reflective layer 130 mainly improves the reflectivity of the acoustic signal; the plurality of interdigital electrodes 150 can serve as input and output electrodes, enabling the conversion between acoustic and electrical signals. Specifically, during the operation of the surface acoustic wave resonator 300, the interdigital electrodes at the input end convert the input electrical signal into an acoustic signal through the inverse piezoelectric effect. The acoustic signal propagates along the surface of the piezoelectric material layer 120 and is converted into an electrical signal at the output interdigital electrodes. In some embodiments, the reflective layer 130 may not be included. In other embodiments, the reflective layer 130 is a Bragg reflector layer, which consists of alternating high acoustic impedance layers and low acoustic impedance layers. This is not limited and can be configured as needed.

[0047] In an embodiment of this application, the power amplifier 200 includes: an isolation layer 220 disposed on a second surface of the substrate 100; a CMOS cell 230 disposed on the isolation layer 220; and a metal conductive layer 240 disposed on the CMOS cell 230. The CMOS cell 230 includes: a gate electrode formed on the isolation layer 220; an insulating layer covering the gate electrode and the isolation layer 220; a channel semiconductor layer formed on the insulating layer; and a source electrode and a drain electrode formed on the insulating layer and the channel semiconductor layer, respectively. Further, the CMOS cell 230 also includes: a source electrode isolation layer, a drain electrode isolation layer, and a photoelectric layer; the source electrode isolation layer and the drain electrode isolation layer are respectively disposed on the source electrode and the drain electrode, and the photoelectric layer covers the channel semiconductor layer, the source electrode isolation layer, and the drain electrode isolation layer.

[0048] Exemplary Embodiment Two

[0049] Figure 2 The diagram shown is a schematic diagram of another integrated component provided by an exemplary embodiment of this application. In the embodiment of this application, a first cavity 160 is provided on the first surface of the substrate 100, the bonding layer 140 is disposed around the top opening of the first cavity 160, and the plurality of interdigitated electrodes 150 are disposed directly above the first cavity 160.

[0050] It should be noted that the first cavity 160 can further realize multiple reflections of sound waves propagating in the vertical direction, reducing the loss of sound wave energy and helping to improve the Q value of the surface acoustic wave resonator.

[0051] In this embodiment of the application, the bonding layer 140 may be disposed around the top opening of the first cavity 160. In order to improve the bonding stability between the bonding layer 140 and the reflective layer 130, the bonding layer may also cover the top opening of the first cavity 160 and the outer periphery of the top opening.

[0052] Exemplary Implementation Example 3

[0053] In embodiments of this application, the substrate includes a plurality of through-holes, each containing copper metal. This allows the plurality of interdigital electrodes to be electrically connected to the power amplifier via the copper metal. Specifically, when receiving a signal, after the electrical signal passes through the power amplifier, it is guided through the metal wires within the through-holes to a resonator, which can be the busbar of the resonator. After signal conversion via the interdigital electrodes and piezoelectric material, noise is filtered out before the signal is output. The plurality of interdigital electrodes are electrically connected to the power amplifier through the plurality of through-holes, such as... Figure 5 As shown in b, by providing vias in the substrate 100, bonding layer 140, reflective layer 130, piezoelectric material layer 120, isolation layer 220 and CMOS cell 230, the plurality of interdigital electrodes 150 are connected to the CMOS cell 230 through the plurality of vias, thereby realizing the electrical connection between the surface acoustic wave resonator and the power amplifier, reducing the electrical connection wires around the surface acoustic wave resonator and the power amplifier, and further optimizing the design of the integrated component.

[0054] Exemplary Implementation Example 4

[0055] Figure 3 The diagram shown is a structural schematic of another integrated component provided in an exemplary embodiment of this application, as follows: Figure 3 As shown, in this embodiment, the integrated components include: a power amplifier 200, a substrate 100, and a thin-film bulk acoustic resonator 400.

[0056] The thin-film bulk acoustic resonator 400 includes: a substrate with a second cavity 440 and a piezoelectric thin film stack structure;

[0057] The piezoelectric thin film stack structure includes a first electrode layer 510, a piezoelectric layer 530, a second electrode layer 520, and at least one elastic connection structure 540. The piezoelectric layer 530 is located between the first electrode layer 510 and the second electrode layer 520, and the first electrode layer 510 and the second electrode layer 520 are disposed approximately opposite to each other.

[0058] The piezoelectric thin film stack structure is disposed on the second cavity 440 of the substrate, and the first electrode layer 510 and / or the second electrode layer 520 are fixedly connected to the substrate through at least one elastic connection structure 540. Specifically, the fixed connection between the first electrode layer 510 and / or the second electrode layer 520 and the substrate can be referred to as anchoring. The anchoring is achieved through a structure with elastic deformation capability, which is the elastic connection structure. The first electrode layer 510 is made of one or a combination of tungsten, molybdenum, platinum, ruthenium, iridium, titanium tungsten, and aluminum. The substrate is made of one of monocrystalline silicon, polycrystalline silicon, glass, quartz, or sapphire.

[0059] It should be noted that, in the embodiments of this application, the number of the elastic connection structures includes one or more. The first electrode layer 510 and / or the second electrode layer 520 of the piezoelectric thin film stack structure are fixedly connected to the substrate through the elastic connection structure 540. Since the elastic connection structure 540 itself has a certain elastic deformation capability, it can absorb / release the support stress at the connection between the piezoelectric thin film stack structure and the substrate. On the one hand, it reduces anchor loss, and on the other hand, it effectively prevents the connection from breaking, thereby improving the structural stability of the resonator and thus improving the stability of the product.

[0060] In addition, the elastic connection structure provided in this application embodiment can store other energy during the propagation process as elastic potential energy, and can convert elastic potential energy into other forms of energy, which can maintain the suppression of transverse clutter, avoid energy loss to a large extent, and improve the filtering performance of the resonator.

[0061] In one embodiment of the application, a silicon dioxide layer 410, a first insulating layer 420, and a metal layer 430 are sequentially disposed on the substrate from bottom to top. A second cavity 440 is formed in the first insulating layer 420 and the metal layer 430, and the piezoelectric thin film stack structure is disposed on the second cavity 440. The first electrode layer 510 and / or the second electrode layer 520 are fixedly connected to the metal layer 430 through at least one elastic connection structure 540. In other embodiments, the substrate contains only monocrystalline silicon. This is not a limitation; any implementation that achieves the desired function is acceptable.

[0062] It should be noted that, in this exemplary embodiment, the at least one elastic connection structure is integrally formed with the first electrode layer, and / or the at least one elastic connection structure is integrally formed with the second electrode.

[0063] It should be noted that, in this exemplary embodiment, the shape of the at least one elastic connection structure includes a polygonal shape, a square wave shape, a wavy shape, an Ω shape, or a spring shape.

[0064] It should be noted that, in this exemplary embodiment, the material of the at least one elastic connection structure includes one or a combination of tungsten, molybdenum, platinum, ruthenium, iridium, titanium tungsten, and aluminum.

[0065] In this exemplary embodiment, the elastic connection structure 540 can be positioned in an aligned manner, which is relatively stable from a mechanical point of view. Optionally, the position of the elastic connection structure can be arbitrarily set, for example, it can be set only on one side, or on opposite sides.

[0066] Secondly, this application provides a method for preparing an integrated component, specifically including the following embodiments:

[0067] Exemplary Implementation Example 5

[0068] Figure 4 The diagram shown is a schematic flowchart of a method for fabricating an integrated component according to an exemplary embodiment of this application. Figure 4 As shown, the method for fabricating the integrated component provided in this application specifically includes the following steps. It should be noted that, within the limits allowed by the process, the steps can be substituted or reduced, and the steps do not constitute a limitation of this method:

[0069] Step S101: A substrate is provided, the substrate having a first side and a second side disposed opposite to each other.

[0070] Specifically, in the embodiments of this application, the substrate includes, but is not limited to, being made of silicon material and having two surfaces arranged opposite to each other.

[0071] Step S102: Fabricate a filter resonator on the first surface of the substrate;

[0072] It should be noted that, as Figure 5As shown in Figure a, a first release substrate 110 is provided. A piezoelectric material layer 120 is formed on the first release substrate 110 by a deposition process. The piezoelectric material layer 120 has a first side and a second side disposed opposite to each other. The first side is the side away from the first release substrate 110, and the second side is the side that is in contact with the first release substrate 110. Then, a silicon oxide material is deposited on the first side of the piezoelectric material layer 120 to form a reflective layer 130. The reflective layer 130 mainly realizes the function of sound wave reflection. The material of the reflective layer includes a high acoustic impedance layer, or alternatively includes a solid phase material, such as metals (aluminum, platinum, palladium, tungsten, molybdenum, chromium, titanium, tantalum, or one or more elements from Group IIIA and / or Group IVA of the periodic table, or elements from IB, IIB, IIIB, IVB, VB, VIB, VIIB and / or VI). The acoustic impedance layer can be composed of one or more transition metals from Group IIB, ceramics, glass, polymers, etc., with SiC having an acoustic impedance of approximately 427 × 10⁶ N·s / m³, Ir having an acoustic impedance of approximately 10⁸ × 10⁶ N·s / m³, and W having an acoustic impedance of approximately 99.9 × 10⁶ N·s / m³. Optional low acoustic impedance layers may include gaseous materials, which may include one or more of the following: hydrogen, nitrogen, carbon dioxide, carbon monoxide, oxygen, and / or one or more Group VIII inert gases (e.g., helium, neon, argon, krypton, xenon), etc. The gaseous material can be an organic material, such as hydrocarbons or their substituted derivatives with different functional groups. The gaseous material can be a mixture of any of the aforementioned substances. Air can be a suitable gaseous material or mixture having a low acoustic impedance of approximately 0.0004 × 10⁶ N·s / m³.

[0073] like Figure 5 As shown in b, a substrate 100 is provided having a first surface and a second surface disposed opposite to each other. A bonding layer 140 is formed on the first surface of the substrate 100. The bonding layer 140 is mainly used for bonding with the aforementioned reflective layer 130. In order to improve the bonding strength between the bonding layer 140 and the reflective layer 130 and to ensure the performance of the formed surface acoustic wave resonator, the bonding layer 140 and the reflective layer 130 can be made of the same material.

[0074] Furthermore, the bonding layer 140 on the substrate 100 is bonded to the reflective layer 130 on the first release substrate 110 using a bonding process. Figure 5 c is a schematic diagram showing the bonding layer 140 and the reflective layer 130 after bonding; as shown Figure 5 As shown in c, the first stripped substrate 110 is peeled off, and interdigitated electrodes 150 are formed on the second surface of the piezoelectric material layer 120, so that a surface acoustic wave resonator is formed on the first surface of the substrate 100.

[0075] Furthermore, forming the interdigitated electrode 150 on the second surface of the piezoelectric material layer 120 specifically includes: first, forming a patterned photoresist layer on the second surface of the piezoelectric material layer 120; then, depositing a metal material layer, the metal material layer covering the top surface of the photoresist layer, and the metal material layer also covering the piezoelectric material layer 120 not covered by the photoresist layer; finally, peeling off the photoresist layer to remove the metal material covering the photoresist layer, while retaining the metal material covering the piezoelectric material layer to form the interdigitated electrode 150.

[0076] Step S103: A power amplifier is formed on the second surface of the substrate to form the integrated component.

[0077] In the embodiments of this application, such as Figure 6 a and Figure 6 As shown in Figure b, a second release substrate 210 is provided, an isolation layer 220 is formed on the second release substrate 210, a CMOS cell 230 is fabricated on the side of the isolation layer 220 away from the second release substrate, and then a metal conductive layer 240 is fabricated on the CMOS cell 230. The second release substrate 210 is then peeled off, and the isolation layer 220 is bonded to the second side of the substrate 100, so that a power amplifier with signal amplification function is formed on the second side of the substrate 100.

[0078] In another embodiment of this application, fabricating a CMOS cell 230 on the side of the isolation layer 220 away from the second release substrate 210 specifically includes: fabricating a gate electrode on the side of the isolation layer 220 away from the second release substrate 210; depositing an insulating layer on the isolation layer 220 and the gate electrode; fabricating a channel semiconductor layer, a source electrode, and a drain electrode on the insulating layer; and forming a source electrode isolation layer and a drain electrode isolation layer on the source electrode and the drain electrode to form the CMOS cell.

[0079] In another embodiment of this application, a metal conductive layer is fabricated on the CMOS cell to form the power amplifier, comprising: forming a photoelectric layer on the insulating layer, the source electrode isolation layer, and the drain electrode isolation layer; growing a metal material on the photoelectric layer to form the metal conductive layer; depositing an electrode protective layer on the metal conductive layer; and performing patterned etching on the electrode protective layer to obtain the power amplifier.

[0080] It should be noted that a metal thin film is grown on the surface of the isolation layer 220 using sputtering deposition, and the metal thin film is photolithographically patterned into a predetermined pattern and then etched to form a gate electrode. An insulating layer covering the isolation layer 220 and the gate electrode is deposited on the upper surface of the gate electrode using thin film deposition. A channel semiconductor material is deposited on the upper surface of the insulating layer using thin film deposition, and the channel semiconductor material is photolithographically patterned into a predetermined pattern and then etched to form a channel semiconductor layer. A metal thin film is grown on the upper surface of the insulating layer and the channel semiconductor layer using sputtering deposition, and the metal thin film is photolithographically patterned into a predetermined pattern to form a source electrode and a drain electrode. The photolithographically formed source electrode and drain electrode have overlapping regions with the channel semiconductor layer and the gate electrode, respectively. An insulating layer covering the source electrode and drain electrode is deposited on the upper surface of the source electrode and drain electrode using thin film deposition, and then photolithographically patterned into a predetermined pattern to form a source electrode isolation layer and a drain electrode isolation layer, respectively. An X-ray photoconductive layer is deposited on the upper surface of the source electrode isolation layer, the drain electrode isolation layer, and the channel semiconductor layer using thin film deposition. A conductive material is grown on the surface of the X-ray photoconductive layer using a sputtering deposition method to form a metal conductive layer; an electrode protective layer covering the metal conductive layer is deposited on the upper surface of the metal conductive layer using a thin film deposition process; the electrode protective layer is patterned and etched using methods such as plasma etching to expose the electrodes of the metal conductive layer, thereby forming the power amplifier.

[0081] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method for fabricating an integrated component, characterized in that, The method includes: A substrate is provided, the substrate having a first side and a second side disposed opposite to each other; A filter resonator is fabricated on a first surface of the substrate. When the resonator is a surface acoustic wave (SAW) resonator, fabricating the filter resonator on the first surface of the substrate includes: providing a first release substrate; forming a piezoelectric material layer on the first release substrate, the piezoelectric material layer having a first side and a second side disposed opposite to each other, the first side being the side away from the first release substrate; forming a reflective layer on the first side of the piezoelectric material layer; forming a bonding layer on the first surface of the substrate; bonding the bonding layer on the substrate to the reflective layer on the first release substrate using a bonding process; peeling off the first release substrate; forming interdigitated electrodes on the second side of the piezoelectric material layer, thereby forming the SAW resonator on the first surface of the substrate. A power amplifier is formed on the second surface of the substrate.

2. The method for preparing the integrated component as described in claim 1, characterized in that, Interdigitated electrodes are formed on the second surface of the piezoelectric material layer, including: A patterned photoresist layer is formed on the second surface of the piezoelectric material layer; A metal material layer is deposited on the second surface of the piezoelectric material layer, such that the metal material layer covers the top surface of the photoresist layer and the piezoelectric material layer not covered by the photoresist layer; The photoresist layer is peeled off, and the metal material remaining on the piezoelectric material layer forms the interdigitated electrodes.

3. The method for preparing the integrated component as described in claim 1, characterized in that, The substrate is provided, and a bonding layer is formed on a first surface of the substrate, comprising: The substrate is provided, and a first cavity is formed on a first surface of the substrate; A bonding layer is formed on a first surface of the substrate, such that the bonding layer surrounds the outer periphery of the top opening of the first cavity.

4. The method for preparing the integrated component as described in claim 1, characterized in that, A power amplifier is formed on the second surface of the substrate, comprising: A second release substrate is provided, and an isolation layer is formed on the second release substrate; A CMOS cell is fabricated on the side of the isolation layer away from the second release substrate; A metal conductive layer is fabricated on the CMOS cell; The second release substrate is peeled off, and the isolation layer is bonded to the second side of the substrate to form the power amplifier on the second side of the substrate.

5. The method for preparing the integrated component as described in claim 4, characterized in that, A CMOS cell is fabricated on the side of the isolation layer away from the second release substrate, including: A gate electrode is formed on the side of the isolation layer away from the second release substrate; An insulating layer is deposited on the isolation layer and the gate electrode; A channel semiconductor layer, a source electrode, and a drain electrode are fabricated on the insulating layer, and a source electrode isolation layer and a drain electrode isolation layer are formed on the source electrode and the drain electrode to form the CMOS cell.

6. The method for preparing the integrated component as described in claim 5, characterized in that, The power amplifier is formed by fabricating a metal conductive layer on the CMOS cell, comprising: A photoelectric layer is formed on the insulating layer, the source electrode isolation layer, and the drain electrode isolation layer; A layer of metal material is grown on the photoelectric layer to form the metal conductive layer; An electrode protective layer is deposited on the metal conductive layer; The power amplifier is obtained by patterning and etching the electrode protective layer.

7. An integrated component, characterized in that, The integrated component includes: The substrate, the filter resonator, and the power amplifier; wherein the filter resonator includes a surface acoustic wave resonator; The surface acoustic wave resonator includes: a bonding layer formed on a first surface of the substrate; a reflective layer bonded to the bonding layer; a piezoelectric material layer, the first surface of which is attached to the reflective layer; and a plurality of interdigitated electrodes disposed on a second surface of the piezoelectric material layer. The substrate has a first side and a second side arranged opposite to each other. The filter resonator is disposed on the first side of the substrate, and the power amplifier is disposed on the second side of the substrate, so that the radio frequency signal passes through the power amplifier and the filter resonator in sequence to obtain an amplified and filtered signal.

8. The integrated component as described in claim 7, characterized in that, The filter resonator also includes a thin-film bulk acoustic resonator.

9. The integrated component as claimed in claim 8, characterized in that, A first cavity is provided on a first surface of the substrate, the bonding layer is disposed around the top opening of the first cavity, and the plurality of interdigitated electrodes are disposed directly above the first cavity.

10. The integrated component as claimed in claim 8, characterized in that, The thin-film bulk acoustic resonator includes: a substrate with a second cavity and a piezoelectric thin-film stacked structure with at least one elastic connection structure; The side of the substrate away from the second cavity is formed on the first surface of the substrate, the piezoelectric thin film stack structure is disposed on the second cavity of the substrate, and at least one elastic connection structure of the piezoelectric thin film stack is fixedly connected to the substrate.

11. The integrated component as claimed in claim 10, characterized in that, The piezoelectric thin film stack structure includes: A first electrode layer, a piezoelectric layer, a second electrode layer, and at least one elastic connection structure; The piezoelectric layer is located between the first electrode layer and the second electrode layer, and the first electrode layer and the second electrode layer are disposed opposite to each other; The at least one elastic connection structure is used to fix the piezoelectric thin film stack structure to the substrate.

12. The integrated component as claimed in claim 7, characterized in that, The power amplifier includes: An isolation layer is disposed on the second surface of the substrate; CMOS cell, wherein the first surface of the CMOS cell is disposed on the isolation layer; A conductive metal layer is disposed on the second surface of the CMOS cell.

13. The integrated component as claimed in claim 12, characterized in that, The CMOS unit includes: A gate electrode is formed on the isolation layer; An insulating layer covers the gate electrode and the isolation layer; A channel semiconductor layer is formed on the insulating layer; The source electrode and the drain electrode are formed on the insulating layer and the channel semiconductor layer, respectively.

14. The integrated component as claimed in claim 13, characterized in that, The CMOS unit further includes: Source electrode isolation layer, drain electrode isolation layer, and photoelectric layer; The source electrode isolation layer and the drain electrode isolation layer are respectively disposed on the source electrode and the drain electrode, and the photoelectric layer covers the channel semiconductor layer, the source electrode isolation layer and the drain electrode isolation layer.

15. The integrated component as claimed in claim 8, characterized in that, The substrate includes several through holes, and copper metal is disposed in the several through holes, so that the several pairs of interdigital electrodes are electrically connected to the power amplifier through the copper metal.

Citation Information

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